mac-scc.c 13 KB

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  1. /*
  2. * Ethernet on Serial Communications Controller (SCC) driver for Motorola MPC8xx and MPC82xx.
  3. *
  4. * Copyright (c) 2003 Intracom S.A.
  5. * by Pantelis Antoniou <panto@intracom.gr>
  6. *
  7. * 2005 (c) MontaVista Software, Inc.
  8. * Vitaly Bordug <vbordug@ru.mvista.com>
  9. *
  10. * This file is licensed under the terms of the GNU General Public License
  11. * version 2. This program is licensed "as is" without any warranty of any
  12. * kind, whether express or implied.
  13. */
  14. #include <linux/config.h>
  15. #include <linux/module.h>
  16. #include <linux/kernel.h>
  17. #include <linux/types.h>
  18. #include <linux/sched.h>
  19. #include <linux/string.h>
  20. #include <linux/ptrace.h>
  21. #include <linux/errno.h>
  22. #include <linux/ioport.h>
  23. #include <linux/slab.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/pci.h>
  26. #include <linux/init.h>
  27. #include <linux/delay.h>
  28. #include <linux/netdevice.h>
  29. #include <linux/etherdevice.h>
  30. #include <linux/skbuff.h>
  31. #include <linux/spinlock.h>
  32. #include <linux/mii.h>
  33. #include <linux/ethtool.h>
  34. #include <linux/bitops.h>
  35. #include <linux/fs.h>
  36. #include <asm/irq.h>
  37. #include <asm/uaccess.h>
  38. #ifdef CONFIG_8xx
  39. #include <asm/8xx_immap.h>
  40. #include <asm/pgtable.h>
  41. #include <asm/mpc8xx.h>
  42. #include <asm/commproc.h>
  43. #endif
  44. #include "fs_enet.h"
  45. /*************************************************/
  46. #if defined(CONFIG_CPM1)
  47. /* for a 8xx __raw_xxx's are sufficient */
  48. #define __fs_out32(addr, x) __raw_writel(x, addr)
  49. #define __fs_out16(addr, x) __raw_writew(x, addr)
  50. #define __fs_out8(addr, x) __raw_writeb(x, addr)
  51. #define __fs_in32(addr) __raw_readl(addr)
  52. #define __fs_in16(addr) __raw_readw(addr)
  53. #define __fs_in8(addr) __raw_readb(addr)
  54. #else
  55. /* for others play it safe */
  56. #define __fs_out32(addr, x) out_be32(addr, x)
  57. #define __fs_out16(addr, x) out_be16(addr, x)
  58. #define __fs_in32(addr) in_be32(addr)
  59. #define __fs_in16(addr) in_be16(addr)
  60. #endif
  61. /* write, read, set bits, clear bits */
  62. #define W32(_p, _m, _v) __fs_out32(&(_p)->_m, (_v))
  63. #define R32(_p, _m) __fs_in32(&(_p)->_m)
  64. #define S32(_p, _m, _v) W32(_p, _m, R32(_p, _m) | (_v))
  65. #define C32(_p, _m, _v) W32(_p, _m, R32(_p, _m) & ~(_v))
  66. #define W16(_p, _m, _v) __fs_out16(&(_p)->_m, (_v))
  67. #define R16(_p, _m) __fs_in16(&(_p)->_m)
  68. #define S16(_p, _m, _v) W16(_p, _m, R16(_p, _m) | (_v))
  69. #define C16(_p, _m, _v) W16(_p, _m, R16(_p, _m) & ~(_v))
  70. #define W8(_p, _m, _v) __fs_out8(&(_p)->_m, (_v))
  71. #define R8(_p, _m) __fs_in8(&(_p)->_m)
  72. #define S8(_p, _m, _v) W8(_p, _m, R8(_p, _m) | (_v))
  73. #define C8(_p, _m, _v) W8(_p, _m, R8(_p, _m) & ~(_v))
  74. #define SCC_MAX_MULTICAST_ADDRS 64
  75. /*
  76. * Delay to wait for SCC reset command to complete (in us)
  77. */
  78. #define SCC_RESET_DELAY 50
  79. #define MAX_CR_CMD_LOOPS 10000
  80. static inline int scc_cr_cmd(struct fs_enet_private *fep, u32 op)
  81. {
  82. cpm8xx_t *cpmp = &((immap_t *)fs_enet_immap)->im_cpm;
  83. u32 v, ch;
  84. int i = 0;
  85. ch = fep->scc.idx << 2;
  86. v = mk_cr_cmd(ch, op);
  87. W16(cpmp, cp_cpcr, v | CPM_CR_FLG);
  88. for (i = 0; i < MAX_CR_CMD_LOOPS; i++)
  89. if ((R16(cpmp, cp_cpcr) & CPM_CR_FLG) == 0)
  90. break;
  91. if (i >= MAX_CR_CMD_LOOPS) {
  92. printk(KERN_ERR "%s(): Not able to issue CPM command\n",
  93. __FUNCTION__);
  94. return 1;
  95. }
  96. return 0;
  97. }
  98. static int do_pd_setup(struct fs_enet_private *fep)
  99. {
  100. struct platform_device *pdev = to_platform_device(fep->dev);
  101. struct resource *r;
  102. /* Fill out IRQ field */
  103. fep->interrupt = platform_get_irq_byname(pdev, "interrupt");
  104. r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs");
  105. fep->scc.sccp = (void *)r->start;
  106. if (fep->scc.sccp == NULL)
  107. return -EINVAL;
  108. r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pram");
  109. fep->scc.ep = (void *)r->start;
  110. if (fep->scc.ep == NULL)
  111. return -EINVAL;
  112. return 0;
  113. }
  114. #define SCC_NAPI_RX_EVENT_MSK (SCCE_ENET_RXF | SCCE_ENET_RXB)
  115. #define SCC_RX_EVENT (SCCE_ENET_RXF)
  116. #define SCC_TX_EVENT (SCCE_ENET_TXB)
  117. #define SCC_ERR_EVENT_MSK (SCCE_ENET_TXE | SCCE_ENET_BSY)
  118. static int setup_data(struct net_device *dev)
  119. {
  120. struct fs_enet_private *fep = netdev_priv(dev);
  121. const struct fs_platform_info *fpi = fep->fpi;
  122. fep->scc.idx = fs_get_scc_index(fpi->fs_no);
  123. if ((unsigned int)fep->fcc.idx > 4) /* max 4 SCCs */
  124. return -EINVAL;
  125. do_pd_setup(fep);
  126. fep->scc.hthi = 0;
  127. fep->scc.htlo = 0;
  128. fep->ev_napi_rx = SCC_NAPI_RX_EVENT_MSK;
  129. fep->ev_rx = SCC_RX_EVENT;
  130. fep->ev_tx = SCC_TX_EVENT;
  131. fep->ev_err = SCC_ERR_EVENT_MSK;
  132. return 0;
  133. }
  134. static int allocate_bd(struct net_device *dev)
  135. {
  136. struct fs_enet_private *fep = netdev_priv(dev);
  137. const struct fs_platform_info *fpi = fep->fpi;
  138. fep->ring_mem_addr = cpm_dpalloc((fpi->tx_ring + fpi->rx_ring) *
  139. sizeof(cbd_t), 8);
  140. if (IS_DPERR(fep->ring_mem_addr))
  141. return -ENOMEM;
  142. fep->ring_base = cpm_dpram_addr(fep->ring_mem_addr);
  143. return 0;
  144. }
  145. static void free_bd(struct net_device *dev)
  146. {
  147. struct fs_enet_private *fep = netdev_priv(dev);
  148. if (fep->ring_base)
  149. cpm_dpfree(fep->ring_mem_addr);
  150. }
  151. static void cleanup_data(struct net_device *dev)
  152. {
  153. /* nothing */
  154. }
  155. static void set_promiscuous_mode(struct net_device *dev)
  156. {
  157. struct fs_enet_private *fep = netdev_priv(dev);
  158. scc_t *sccp = fep->scc.sccp;
  159. S16(sccp, scc_psmr, SCC_PSMR_PRO);
  160. }
  161. static void set_multicast_start(struct net_device *dev)
  162. {
  163. struct fs_enet_private *fep = netdev_priv(dev);
  164. scc_enet_t *ep = fep->scc.ep;
  165. W16(ep, sen_gaddr1, 0);
  166. W16(ep, sen_gaddr2, 0);
  167. W16(ep, sen_gaddr3, 0);
  168. W16(ep, sen_gaddr4, 0);
  169. }
  170. static void set_multicast_one(struct net_device *dev, const u8 * mac)
  171. {
  172. struct fs_enet_private *fep = netdev_priv(dev);
  173. scc_enet_t *ep = fep->scc.ep;
  174. u16 taddrh, taddrm, taddrl;
  175. taddrh = ((u16) mac[5] << 8) | mac[4];
  176. taddrm = ((u16) mac[3] << 8) | mac[2];
  177. taddrl = ((u16) mac[1] << 8) | mac[0];
  178. W16(ep, sen_taddrh, taddrh);
  179. W16(ep, sen_taddrm, taddrm);
  180. W16(ep, sen_taddrl, taddrl);
  181. scc_cr_cmd(fep, CPM_CR_SET_GADDR);
  182. }
  183. static void set_multicast_finish(struct net_device *dev)
  184. {
  185. struct fs_enet_private *fep = netdev_priv(dev);
  186. scc_t *sccp = fep->scc.sccp;
  187. scc_enet_t *ep = fep->scc.ep;
  188. /* clear promiscuous always */
  189. C16(sccp, scc_psmr, SCC_PSMR_PRO);
  190. /* if all multi or too many multicasts; just enable all */
  191. if ((dev->flags & IFF_ALLMULTI) != 0 ||
  192. dev->mc_count > SCC_MAX_MULTICAST_ADDRS) {
  193. W16(ep, sen_gaddr1, 0xffff);
  194. W16(ep, sen_gaddr2, 0xffff);
  195. W16(ep, sen_gaddr3, 0xffff);
  196. W16(ep, sen_gaddr4, 0xffff);
  197. }
  198. }
  199. static void set_multicast_list(struct net_device *dev)
  200. {
  201. struct dev_mc_list *pmc;
  202. if ((dev->flags & IFF_PROMISC) == 0) {
  203. set_multicast_start(dev);
  204. for (pmc = dev->mc_list; pmc != NULL; pmc = pmc->next)
  205. set_multicast_one(dev, pmc->dmi_addr);
  206. set_multicast_finish(dev);
  207. } else
  208. set_promiscuous_mode(dev);
  209. }
  210. /*
  211. * This function is called to start or restart the FEC during a link
  212. * change. This only happens when switching between half and full
  213. * duplex.
  214. */
  215. static void restart(struct net_device *dev)
  216. {
  217. struct fs_enet_private *fep = netdev_priv(dev);
  218. scc_t *sccp = fep->scc.sccp;
  219. scc_enet_t *ep = fep->scc.ep;
  220. const struct fs_platform_info *fpi = fep->fpi;
  221. u16 paddrh, paddrm, paddrl;
  222. const unsigned char *mac;
  223. int i;
  224. C32(sccp, scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
  225. /* clear everything (slow & steady does it) */
  226. for (i = 0; i < sizeof(*ep); i++)
  227. __fs_out8((char *)ep + i, 0);
  228. /* point to bds */
  229. W16(ep, sen_genscc.scc_rbase, fep->ring_mem_addr);
  230. W16(ep, sen_genscc.scc_tbase,
  231. fep->ring_mem_addr + sizeof(cbd_t) * fpi->rx_ring);
  232. /* Initialize function code registers for big-endian.
  233. */
  234. W8(ep, sen_genscc.scc_rfcr, SCC_EB);
  235. W8(ep, sen_genscc.scc_tfcr, SCC_EB);
  236. /* Set maximum bytes per receive buffer.
  237. * This appears to be an Ethernet frame size, not the buffer
  238. * fragment size. It must be a multiple of four.
  239. */
  240. W16(ep, sen_genscc.scc_mrblr, 0x5f0);
  241. /* Set CRC preset and mask.
  242. */
  243. W32(ep, sen_cpres, 0xffffffff);
  244. W32(ep, sen_cmask, 0xdebb20e3);
  245. W32(ep, sen_crcec, 0); /* CRC Error counter */
  246. W32(ep, sen_alec, 0); /* alignment error counter */
  247. W32(ep, sen_disfc, 0); /* discard frame counter */
  248. W16(ep, sen_pads, 0x8888); /* Tx short frame pad character */
  249. W16(ep, sen_retlim, 15); /* Retry limit threshold */
  250. W16(ep, sen_maxflr, 0x5ee); /* maximum frame length register */
  251. W16(ep, sen_minflr, PKT_MINBUF_SIZE); /* minimum frame length register */
  252. W16(ep, sen_maxd1, 0x000005f0); /* maximum DMA1 length */
  253. W16(ep, sen_maxd2, 0x000005f0); /* maximum DMA2 length */
  254. /* Clear hash tables.
  255. */
  256. W16(ep, sen_gaddr1, 0);
  257. W16(ep, sen_gaddr2, 0);
  258. W16(ep, sen_gaddr3, 0);
  259. W16(ep, sen_gaddr4, 0);
  260. W16(ep, sen_iaddr1, 0);
  261. W16(ep, sen_iaddr2, 0);
  262. W16(ep, sen_iaddr3, 0);
  263. W16(ep, sen_iaddr4, 0);
  264. /* set address
  265. */
  266. mac = dev->dev_addr;
  267. paddrh = ((u16) mac[5] << 8) | mac[4];
  268. paddrm = ((u16) mac[3] << 8) | mac[2];
  269. paddrl = ((u16) mac[1] << 8) | mac[0];
  270. W16(ep, sen_paddrh, paddrh);
  271. W16(ep, sen_paddrm, paddrm);
  272. W16(ep, sen_paddrl, paddrl);
  273. W16(ep, sen_pper, 0);
  274. W16(ep, sen_taddrl, 0);
  275. W16(ep, sen_taddrm, 0);
  276. W16(ep, sen_taddrh, 0);
  277. fs_init_bds(dev);
  278. scc_cr_cmd(fep, CPM_CR_INIT_TRX);
  279. W16(sccp, scc_scce, 0xffff);
  280. /* Enable interrupts we wish to service.
  281. */
  282. W16(sccp, scc_sccm, SCCE_ENET_TXE | SCCE_ENET_RXF | SCCE_ENET_TXB);
  283. /* Set GSMR_H to enable all normal operating modes.
  284. * Set GSMR_L to enable Ethernet to MC68160.
  285. */
  286. W32(sccp, scc_gsmrh, 0);
  287. W32(sccp, scc_gsmrl,
  288. SCC_GSMRL_TCI | SCC_GSMRL_TPL_48 | SCC_GSMRL_TPP_10 |
  289. SCC_GSMRL_MODE_ENET);
  290. /* Set sync/delimiters.
  291. */
  292. W16(sccp, scc_dsr, 0xd555);
  293. /* Set processing mode. Use Ethernet CRC, catch broadcast, and
  294. * start frame search 22 bit times after RENA.
  295. */
  296. W16(sccp, scc_psmr, SCC_PSMR_ENCRC | SCC_PSMR_NIB22);
  297. /* Set full duplex mode if needed */
  298. if (fep->duplex)
  299. S16(sccp, scc_psmr, SCC_PSMR_LPB | SCC_PSMR_FDE);
  300. S32(sccp, scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
  301. }
  302. static void stop(struct net_device *dev)
  303. {
  304. struct fs_enet_private *fep = netdev_priv(dev);
  305. scc_t *sccp = fep->scc.sccp;
  306. int i;
  307. for (i = 0; (R16(sccp, scc_sccm) == 0) && i < SCC_RESET_DELAY; i++)
  308. udelay(1);
  309. if (i == SCC_RESET_DELAY)
  310. printk(KERN_WARNING DRV_MODULE_NAME
  311. ": %s SCC timeout on graceful transmit stop\n",
  312. dev->name);
  313. W16(sccp, scc_sccm, 0);
  314. C32(sccp, scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
  315. fs_cleanup_bds(dev);
  316. }
  317. static void pre_request_irq(struct net_device *dev, int irq)
  318. {
  319. immap_t *immap = fs_enet_immap;
  320. u32 siel;
  321. /* SIU interrupt */
  322. if (irq >= SIU_IRQ0 && irq < SIU_LEVEL7) {
  323. siel = in_be32(&immap->im_siu_conf.sc_siel);
  324. if ((irq & 1) == 0)
  325. siel |= (0x80000000 >> irq);
  326. else
  327. siel &= ~(0x80000000 >> (irq & ~1));
  328. out_be32(&immap->im_siu_conf.sc_siel, siel);
  329. }
  330. }
  331. static void post_free_irq(struct net_device *dev, int irq)
  332. {
  333. /* nothing */
  334. }
  335. static void napi_clear_rx_event(struct net_device *dev)
  336. {
  337. struct fs_enet_private *fep = netdev_priv(dev);
  338. scc_t *sccp = fep->scc.sccp;
  339. W16(sccp, scc_scce, SCC_NAPI_RX_EVENT_MSK);
  340. }
  341. static void napi_enable_rx(struct net_device *dev)
  342. {
  343. struct fs_enet_private *fep = netdev_priv(dev);
  344. scc_t *sccp = fep->scc.sccp;
  345. S16(sccp, scc_sccm, SCC_NAPI_RX_EVENT_MSK);
  346. }
  347. static void napi_disable_rx(struct net_device *dev)
  348. {
  349. struct fs_enet_private *fep = netdev_priv(dev);
  350. scc_t *sccp = fep->scc.sccp;
  351. C16(sccp, scc_sccm, SCC_NAPI_RX_EVENT_MSK);
  352. }
  353. static void rx_bd_done(struct net_device *dev)
  354. {
  355. /* nothing */
  356. }
  357. static void tx_kickstart(struct net_device *dev)
  358. {
  359. /* nothing */
  360. }
  361. static u32 get_int_events(struct net_device *dev)
  362. {
  363. struct fs_enet_private *fep = netdev_priv(dev);
  364. scc_t *sccp = fep->scc.sccp;
  365. return (u32) R16(sccp, scc_scce);
  366. }
  367. static void clear_int_events(struct net_device *dev, u32 int_events)
  368. {
  369. struct fs_enet_private *fep = netdev_priv(dev);
  370. scc_t *sccp = fep->scc.sccp;
  371. W16(sccp, scc_scce, int_events & 0xffff);
  372. }
  373. static void ev_error(struct net_device *dev, u32 int_events)
  374. {
  375. printk(KERN_WARNING DRV_MODULE_NAME
  376. ": %s SCC ERROR(s) 0x%x\n", dev->name, int_events);
  377. }
  378. static int get_regs(struct net_device *dev, void *p, int *sizep)
  379. {
  380. struct fs_enet_private *fep = netdev_priv(dev);
  381. if (*sizep < sizeof(scc_t) + sizeof(scc_enet_t))
  382. return -EINVAL;
  383. memcpy_fromio(p, fep->scc.sccp, sizeof(scc_t));
  384. p = (char *)p + sizeof(scc_t);
  385. memcpy_fromio(p, fep->scc.ep, sizeof(scc_enet_t));
  386. return 0;
  387. }
  388. static int get_regs_len(struct net_device *dev)
  389. {
  390. return sizeof(scc_t) + sizeof(scc_enet_t);
  391. }
  392. static void tx_restart(struct net_device *dev)
  393. {
  394. struct fs_enet_private *fep = netdev_priv(dev);
  395. scc_cr_cmd(fep, CPM_CR_RESTART_TX);
  396. }
  397. /*************************************************************************/
  398. const struct fs_ops fs_scc_ops = {
  399. .setup_data = setup_data,
  400. .cleanup_data = cleanup_data,
  401. .set_multicast_list = set_multicast_list,
  402. .restart = restart,
  403. .stop = stop,
  404. .pre_request_irq = pre_request_irq,
  405. .post_free_irq = post_free_irq,
  406. .napi_clear_rx_event = napi_clear_rx_event,
  407. .napi_enable_rx = napi_enable_rx,
  408. .napi_disable_rx = napi_disable_rx,
  409. .rx_bd_done = rx_bd_done,
  410. .tx_kickstart = tx_kickstart,
  411. .get_int_events = get_int_events,
  412. .clear_int_events = clear_int_events,
  413. .ev_error = ev_error,
  414. .get_regs = get_regs,
  415. .get_regs_len = get_regs_len,
  416. .tx_restart = tx_restart,
  417. .allocate_bd = allocate_bd,
  418. .free_bd = free_bd,
  419. };