mac-fcc.c 15 KB

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  1. /*
  2. * FCC driver for Motorola MPC82xx (PQ2).
  3. *
  4. * Copyright (c) 2003 Intracom S.A.
  5. * by Pantelis Antoniou <panto@intracom.gr>
  6. *
  7. * 2005 (c) MontaVista Software, Inc.
  8. * Vitaly Bordug <vbordug@ru.mvista.com>
  9. *
  10. * This file is licensed under the terms of the GNU General Public License
  11. * version 2. This program is licensed "as is" without any warranty of any
  12. * kind, whether express or implied.
  13. */
  14. #include <linux/config.h>
  15. #include <linux/module.h>
  16. #include <linux/kernel.h>
  17. #include <linux/types.h>
  18. #include <linux/sched.h>
  19. #include <linux/string.h>
  20. #include <linux/ptrace.h>
  21. #include <linux/errno.h>
  22. #include <linux/ioport.h>
  23. #include <linux/slab.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/pci.h>
  26. #include <linux/init.h>
  27. #include <linux/delay.h>
  28. #include <linux/netdevice.h>
  29. #include <linux/etherdevice.h>
  30. #include <linux/skbuff.h>
  31. #include <linux/spinlock.h>
  32. #include <linux/mii.h>
  33. #include <linux/ethtool.h>
  34. #include <linux/bitops.h>
  35. #include <linux/fs.h>
  36. #include <asm/immap_cpm2.h>
  37. #include <asm/mpc8260.h>
  38. #include <asm/cpm2.h>
  39. #include <asm/pgtable.h>
  40. #include <asm/irq.h>
  41. #include <asm/uaccess.h>
  42. #include "fs_enet.h"
  43. /*************************************************/
  44. /* FCC access macros */
  45. #define __fcc_out32(addr, x) out_be32((unsigned *)addr, x)
  46. #define __fcc_out16(addr, x) out_be16((unsigned short *)addr, x)
  47. #define __fcc_out8(addr, x) out_8((unsigned char *)addr, x)
  48. #define __fcc_in32(addr) in_be32((unsigned *)addr)
  49. #define __fcc_in16(addr) in_be16((unsigned short *)addr)
  50. #define __fcc_in8(addr) in_8((unsigned char *)addr)
  51. /* parameter space */
  52. /* write, read, set bits, clear bits */
  53. #define W32(_p, _m, _v) __fcc_out32(&(_p)->_m, (_v))
  54. #define R32(_p, _m) __fcc_in32(&(_p)->_m)
  55. #define S32(_p, _m, _v) W32(_p, _m, R32(_p, _m) | (_v))
  56. #define C32(_p, _m, _v) W32(_p, _m, R32(_p, _m) & ~(_v))
  57. #define W16(_p, _m, _v) __fcc_out16(&(_p)->_m, (_v))
  58. #define R16(_p, _m) __fcc_in16(&(_p)->_m)
  59. #define S16(_p, _m, _v) W16(_p, _m, R16(_p, _m) | (_v))
  60. #define C16(_p, _m, _v) W16(_p, _m, R16(_p, _m) & ~(_v))
  61. #define W8(_p, _m, _v) __fcc_out8(&(_p)->_m, (_v))
  62. #define R8(_p, _m) __fcc_in8(&(_p)->_m)
  63. #define S8(_p, _m, _v) W8(_p, _m, R8(_p, _m) | (_v))
  64. #define C8(_p, _m, _v) W8(_p, _m, R8(_p, _m) & ~(_v))
  65. /*************************************************/
  66. #define FCC_MAX_MULTICAST_ADDRS 64
  67. #define mk_mii_read(REG) (0x60020000 | ((REG & 0x1f) << 18))
  68. #define mk_mii_write(REG, VAL) (0x50020000 | ((REG & 0x1f) << 18) | (VAL & 0xffff))
  69. #define mk_mii_end 0
  70. #define MAX_CR_CMD_LOOPS 10000
  71. static inline int fcc_cr_cmd(struct fs_enet_private *fep, u32 mcn, u32 op)
  72. {
  73. const struct fs_platform_info *fpi = fep->fpi;
  74. cpm2_map_t *immap = fs_enet_immap;
  75. cpm_cpm2_t *cpmp = &immap->im_cpm;
  76. u32 v;
  77. int i;
  78. /* Currently I don't know what feature call will look like. But
  79. I guess there'd be something like do_cpm_cmd() which will require page & sblock */
  80. v = mk_cr_cmd(fpi->cp_page, fpi->cp_block, mcn, op);
  81. W32(cpmp, cp_cpcr, v | CPM_CR_FLG);
  82. for (i = 0; i < MAX_CR_CMD_LOOPS; i++)
  83. if ((R32(cpmp, cp_cpcr) & CPM_CR_FLG) == 0)
  84. break;
  85. if (i >= MAX_CR_CMD_LOOPS) {
  86. printk(KERN_ERR "%s(): Not able to issue CPM command\n",
  87. __FUNCTION__);
  88. return 1;
  89. }
  90. return 0;
  91. }
  92. static int do_pd_setup(struct fs_enet_private *fep)
  93. {
  94. struct platform_device *pdev = to_platform_device(fep->dev);
  95. struct resource *r;
  96. /* Fill out IRQ field */
  97. fep->interrupt = platform_get_irq(pdev, 0);
  98. /* Attach the memory for the FCC Parameter RAM */
  99. r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "fcc_pram");
  100. fep->fcc.ep = (void *)r->start;
  101. if (fep->fcc.ep == NULL)
  102. return -EINVAL;
  103. r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "fcc_regs");
  104. fep->fcc.fccp = (void *)r->start;
  105. if (fep->fcc.fccp == NULL)
  106. return -EINVAL;
  107. fep->fcc.fcccp = (void *)fep->fpi->fcc_regs_c;
  108. if (fep->fcc.fcccp == NULL)
  109. return -EINVAL;
  110. return 0;
  111. }
  112. #define FCC_NAPI_RX_EVENT_MSK (FCC_ENET_RXF | FCC_ENET_RXB)
  113. #define FCC_RX_EVENT (FCC_ENET_RXF)
  114. #define FCC_TX_EVENT (FCC_ENET_TXB)
  115. #define FCC_ERR_EVENT_MSK (FCC_ENET_TXE | FCC_ENET_BSY)
  116. static int setup_data(struct net_device *dev)
  117. {
  118. struct fs_enet_private *fep = netdev_priv(dev);
  119. const struct fs_platform_info *fpi = fep->fpi;
  120. fep->fcc.idx = fs_get_fcc_index(fpi->fs_no);
  121. if ((unsigned int)fep->fcc.idx >= 3) /* max 3 FCCs */
  122. return -EINVAL;
  123. fep->fcc.mem = (void *)fpi->mem_offset;
  124. if (do_pd_setup(fep) != 0)
  125. return -EINVAL;
  126. fep->ev_napi_rx = FCC_NAPI_RX_EVENT_MSK;
  127. fep->ev_rx = FCC_RX_EVENT;
  128. fep->ev_tx = FCC_TX_EVENT;
  129. fep->ev_err = FCC_ERR_EVENT_MSK;
  130. return 0;
  131. }
  132. static int allocate_bd(struct net_device *dev)
  133. {
  134. struct fs_enet_private *fep = netdev_priv(dev);
  135. const struct fs_platform_info *fpi = fep->fpi;
  136. fep->ring_base = dma_alloc_coherent(fep->dev,
  137. (fpi->tx_ring + fpi->rx_ring) *
  138. sizeof(cbd_t), &fep->ring_mem_addr,
  139. GFP_KERNEL);
  140. if (fep->ring_base == NULL)
  141. return -ENOMEM;
  142. return 0;
  143. }
  144. static void free_bd(struct net_device *dev)
  145. {
  146. struct fs_enet_private *fep = netdev_priv(dev);
  147. const struct fs_platform_info *fpi = fep->fpi;
  148. if (fep->ring_base)
  149. dma_free_coherent(fep->dev,
  150. (fpi->tx_ring + fpi->rx_ring) * sizeof(cbd_t),
  151. fep->ring_base, fep->ring_mem_addr);
  152. }
  153. static void cleanup_data(struct net_device *dev)
  154. {
  155. /* nothing */
  156. }
  157. static void set_promiscuous_mode(struct net_device *dev)
  158. {
  159. struct fs_enet_private *fep = netdev_priv(dev);
  160. fcc_t *fccp = fep->fcc.fccp;
  161. S32(fccp, fcc_fpsmr, FCC_PSMR_PRO);
  162. }
  163. static void set_multicast_start(struct net_device *dev)
  164. {
  165. struct fs_enet_private *fep = netdev_priv(dev);
  166. fcc_enet_t *ep = fep->fcc.ep;
  167. W32(ep, fen_gaddrh, 0);
  168. W32(ep, fen_gaddrl, 0);
  169. }
  170. static void set_multicast_one(struct net_device *dev, const u8 *mac)
  171. {
  172. struct fs_enet_private *fep = netdev_priv(dev);
  173. fcc_enet_t *ep = fep->fcc.ep;
  174. u16 taddrh, taddrm, taddrl;
  175. taddrh = ((u16)mac[5] << 8) | mac[4];
  176. taddrm = ((u16)mac[3] << 8) | mac[2];
  177. taddrl = ((u16)mac[1] << 8) | mac[0];
  178. W16(ep, fen_taddrh, taddrh);
  179. W16(ep, fen_taddrm, taddrm);
  180. W16(ep, fen_taddrl, taddrl);
  181. fcc_cr_cmd(fep, 0x0C, CPM_CR_SET_GADDR);
  182. }
  183. static void set_multicast_finish(struct net_device *dev)
  184. {
  185. struct fs_enet_private *fep = netdev_priv(dev);
  186. fcc_t *fccp = fep->fcc.fccp;
  187. fcc_enet_t *ep = fep->fcc.ep;
  188. /* clear promiscuous always */
  189. C32(fccp, fcc_fpsmr, FCC_PSMR_PRO);
  190. /* if all multi or too many multicasts; just enable all */
  191. if ((dev->flags & IFF_ALLMULTI) != 0 ||
  192. dev->mc_count > FCC_MAX_MULTICAST_ADDRS) {
  193. W32(ep, fen_gaddrh, 0xffffffff);
  194. W32(ep, fen_gaddrl, 0xffffffff);
  195. }
  196. /* read back */
  197. fep->fcc.gaddrh = R32(ep, fen_gaddrh);
  198. fep->fcc.gaddrl = R32(ep, fen_gaddrl);
  199. }
  200. static void set_multicast_list(struct net_device *dev)
  201. {
  202. struct dev_mc_list *pmc;
  203. if ((dev->flags & IFF_PROMISC) == 0) {
  204. set_multicast_start(dev);
  205. for (pmc = dev->mc_list; pmc != NULL; pmc = pmc->next)
  206. set_multicast_one(dev, pmc->dmi_addr);
  207. set_multicast_finish(dev);
  208. } else
  209. set_promiscuous_mode(dev);
  210. }
  211. static void restart(struct net_device *dev)
  212. {
  213. struct fs_enet_private *fep = netdev_priv(dev);
  214. const struct fs_platform_info *fpi = fep->fpi;
  215. fcc_t *fccp = fep->fcc.fccp;
  216. fcc_c_t *fcccp = fep->fcc.fcccp;
  217. fcc_enet_t *ep = fep->fcc.ep;
  218. dma_addr_t rx_bd_base_phys, tx_bd_base_phys;
  219. u16 paddrh, paddrm, paddrl;
  220. u16 mem_addr;
  221. const unsigned char *mac;
  222. int i;
  223. C32(fccp, fcc_gfmr, FCC_GFMR_ENR | FCC_GFMR_ENT);
  224. /* clear everything (slow & steady does it) */
  225. for (i = 0; i < sizeof(*ep); i++)
  226. __fcc_out8((char *)ep + i, 0);
  227. /* get physical address */
  228. rx_bd_base_phys = fep->ring_mem_addr;
  229. tx_bd_base_phys = rx_bd_base_phys + sizeof(cbd_t) * fpi->rx_ring;
  230. /* point to bds */
  231. W32(ep, fen_genfcc.fcc_rbase, rx_bd_base_phys);
  232. W32(ep, fen_genfcc.fcc_tbase, tx_bd_base_phys);
  233. /* Set maximum bytes per receive buffer.
  234. * It must be a multiple of 32.
  235. */
  236. W16(ep, fen_genfcc.fcc_mrblr, PKT_MAXBLR_SIZE);
  237. W32(ep, fen_genfcc.fcc_rstate, (CPMFCR_GBL | CPMFCR_EB) << 24);
  238. W32(ep, fen_genfcc.fcc_tstate, (CPMFCR_GBL | CPMFCR_EB) << 24);
  239. /* Allocate space in the reserved FCC area of DPRAM for the
  240. * internal buffers. No one uses this space (yet), so we
  241. * can do this. Later, we will add resource management for
  242. * this area.
  243. */
  244. mem_addr = (u32) fep->fcc.mem; /* de-fixup dpram offset */
  245. W16(ep, fen_genfcc.fcc_riptr, (mem_addr & 0xffff));
  246. W16(ep, fen_genfcc.fcc_tiptr, ((mem_addr + 32) & 0xffff));
  247. W16(ep, fen_padptr, mem_addr + 64);
  248. /* fill with special symbol... */
  249. memset(fep->fcc.mem + fpi->dpram_offset + 64, 0x88, 32);
  250. W32(ep, fen_genfcc.fcc_rbptr, 0);
  251. W32(ep, fen_genfcc.fcc_tbptr, 0);
  252. W32(ep, fen_genfcc.fcc_rcrc, 0);
  253. W32(ep, fen_genfcc.fcc_tcrc, 0);
  254. W16(ep, fen_genfcc.fcc_res1, 0);
  255. W32(ep, fen_genfcc.fcc_res2, 0);
  256. /* no CAM */
  257. W32(ep, fen_camptr, 0);
  258. /* Set CRC preset and mask */
  259. W32(ep, fen_cmask, 0xdebb20e3);
  260. W32(ep, fen_cpres, 0xffffffff);
  261. W32(ep, fen_crcec, 0); /* CRC Error counter */
  262. W32(ep, fen_alec, 0); /* alignment error counter */
  263. W32(ep, fen_disfc, 0); /* discard frame counter */
  264. W16(ep, fen_retlim, 15); /* Retry limit threshold */
  265. W16(ep, fen_pper, 0); /* Normal persistence */
  266. /* set group address */
  267. W32(ep, fen_gaddrh, fep->fcc.gaddrh);
  268. W32(ep, fen_gaddrl, fep->fcc.gaddrh);
  269. /* Clear hash filter tables */
  270. W32(ep, fen_iaddrh, 0);
  271. W32(ep, fen_iaddrl, 0);
  272. /* Clear the Out-of-sequence TxBD */
  273. W16(ep, fen_tfcstat, 0);
  274. W16(ep, fen_tfclen, 0);
  275. W32(ep, fen_tfcptr, 0);
  276. W16(ep, fen_mflr, PKT_MAXBUF_SIZE); /* maximum frame length register */
  277. W16(ep, fen_minflr, PKT_MINBUF_SIZE); /* minimum frame length register */
  278. /* set address */
  279. mac = dev->dev_addr;
  280. paddrh = ((u16)mac[5] << 8) | mac[4];
  281. paddrm = ((u16)mac[3] << 8) | mac[2];
  282. paddrl = ((u16)mac[1] << 8) | mac[0];
  283. W16(ep, fen_paddrh, paddrh);
  284. W16(ep, fen_paddrm, paddrm);
  285. W16(ep, fen_paddrl, paddrl);
  286. W16(ep, fen_taddrh, 0);
  287. W16(ep, fen_taddrm, 0);
  288. W16(ep, fen_taddrl, 0);
  289. W16(ep, fen_maxd1, 1520); /* maximum DMA1 length */
  290. W16(ep, fen_maxd2, 1520); /* maximum DMA2 length */
  291. /* Clear stat counters, in case we ever enable RMON */
  292. W32(ep, fen_octc, 0);
  293. W32(ep, fen_colc, 0);
  294. W32(ep, fen_broc, 0);
  295. W32(ep, fen_mulc, 0);
  296. W32(ep, fen_uspc, 0);
  297. W32(ep, fen_frgc, 0);
  298. W32(ep, fen_ospc, 0);
  299. W32(ep, fen_jbrc, 0);
  300. W32(ep, fen_p64c, 0);
  301. W32(ep, fen_p65c, 0);
  302. W32(ep, fen_p128c, 0);
  303. W32(ep, fen_p256c, 0);
  304. W32(ep, fen_p512c, 0);
  305. W32(ep, fen_p1024c, 0);
  306. W16(ep, fen_rfthr, 0); /* Suggested by manual */
  307. W16(ep, fen_rfcnt, 0);
  308. W16(ep, fen_cftype, 0);
  309. fs_init_bds(dev);
  310. /* adjust to speed (for RMII mode) */
  311. if (fpi->use_rmii) {
  312. if (fep->speed == 100)
  313. C8(fcccp, fcc_gfemr, 0x20);
  314. else
  315. S8(fcccp, fcc_gfemr, 0x20);
  316. }
  317. fcc_cr_cmd(fep, 0x0c, CPM_CR_INIT_TRX);
  318. /* clear events */
  319. W16(fccp, fcc_fcce, 0xffff);
  320. /* Enable interrupts we wish to service */
  321. W16(fccp, fcc_fccm, FCC_ENET_TXE | FCC_ENET_RXF | FCC_ENET_TXB);
  322. /* Set GFMR to enable Ethernet operating mode */
  323. W32(fccp, fcc_gfmr, FCC_GFMR_TCI | FCC_GFMR_MODE_ENET);
  324. /* set sync/delimiters */
  325. W16(fccp, fcc_fdsr, 0xd555);
  326. W32(fccp, fcc_fpsmr, FCC_PSMR_ENCRC);
  327. if (fpi->use_rmii)
  328. S32(fccp, fcc_fpsmr, FCC_PSMR_RMII);
  329. /* adjust to duplex mode */
  330. if (fep->duplex)
  331. S32(fccp, fcc_fpsmr, FCC_PSMR_FDE | FCC_PSMR_LPB);
  332. else
  333. C32(fccp, fcc_fpsmr, FCC_PSMR_FDE | FCC_PSMR_LPB);
  334. S32(fccp, fcc_gfmr, FCC_GFMR_ENR | FCC_GFMR_ENT);
  335. }
  336. static void stop(struct net_device *dev)
  337. {
  338. struct fs_enet_private *fep = netdev_priv(dev);
  339. fcc_t *fccp = fep->fcc.fccp;
  340. /* stop ethernet */
  341. C32(fccp, fcc_gfmr, FCC_GFMR_ENR | FCC_GFMR_ENT);
  342. /* clear events */
  343. W16(fccp, fcc_fcce, 0xffff);
  344. /* clear interrupt mask */
  345. W16(fccp, fcc_fccm, 0);
  346. fs_cleanup_bds(dev);
  347. }
  348. static void pre_request_irq(struct net_device *dev, int irq)
  349. {
  350. /* nothing */
  351. }
  352. static void post_free_irq(struct net_device *dev, int irq)
  353. {
  354. /* nothing */
  355. }
  356. static void napi_clear_rx_event(struct net_device *dev)
  357. {
  358. struct fs_enet_private *fep = netdev_priv(dev);
  359. fcc_t *fccp = fep->fcc.fccp;
  360. W16(fccp, fcc_fcce, FCC_NAPI_RX_EVENT_MSK);
  361. }
  362. static void napi_enable_rx(struct net_device *dev)
  363. {
  364. struct fs_enet_private *fep = netdev_priv(dev);
  365. fcc_t *fccp = fep->fcc.fccp;
  366. S16(fccp, fcc_fccm, FCC_NAPI_RX_EVENT_MSK);
  367. }
  368. static void napi_disable_rx(struct net_device *dev)
  369. {
  370. struct fs_enet_private *fep = netdev_priv(dev);
  371. fcc_t *fccp = fep->fcc.fccp;
  372. C16(fccp, fcc_fccm, FCC_NAPI_RX_EVENT_MSK);
  373. }
  374. static void rx_bd_done(struct net_device *dev)
  375. {
  376. /* nothing */
  377. }
  378. static void tx_kickstart(struct net_device *dev)
  379. {
  380. /* nothing */
  381. }
  382. static u32 get_int_events(struct net_device *dev)
  383. {
  384. struct fs_enet_private *fep = netdev_priv(dev);
  385. fcc_t *fccp = fep->fcc.fccp;
  386. return (u32)R16(fccp, fcc_fcce);
  387. }
  388. static void clear_int_events(struct net_device *dev, u32 int_events)
  389. {
  390. struct fs_enet_private *fep = netdev_priv(dev);
  391. fcc_t *fccp = fep->fcc.fccp;
  392. W16(fccp, fcc_fcce, int_events & 0xffff);
  393. }
  394. static void ev_error(struct net_device *dev, u32 int_events)
  395. {
  396. printk(KERN_WARNING DRV_MODULE_NAME
  397. ": %s FS_ENET ERROR(s) 0x%x\n", dev->name, int_events);
  398. }
  399. int get_regs(struct net_device *dev, void *p, int *sizep)
  400. {
  401. struct fs_enet_private *fep = netdev_priv(dev);
  402. if (*sizep < sizeof(fcc_t) + sizeof(fcc_c_t) + sizeof(fcc_enet_t))
  403. return -EINVAL;
  404. memcpy_fromio(p, fep->fcc.fccp, sizeof(fcc_t));
  405. p = (char *)p + sizeof(fcc_t);
  406. memcpy_fromio(p, fep->fcc.fcccp, sizeof(fcc_c_t));
  407. p = (char *)p + sizeof(fcc_c_t);
  408. memcpy_fromio(p, fep->fcc.ep, sizeof(fcc_enet_t));
  409. return 0;
  410. }
  411. int get_regs_len(struct net_device *dev)
  412. {
  413. return sizeof(fcc_t) + sizeof(fcc_c_t) + sizeof(fcc_enet_t);
  414. }
  415. /* Some transmit errors cause the transmitter to shut
  416. * down. We now issue a restart transmit. Since the
  417. * errors close the BD and update the pointers, the restart
  418. * _should_ pick up without having to reset any of our
  419. * pointers either. Also, To workaround 8260 device erratum
  420. * CPM37, we must disable and then re-enable the transmitter
  421. * following a Late Collision, Underrun, or Retry Limit error.
  422. */
  423. void tx_restart(struct net_device *dev)
  424. {
  425. struct fs_enet_private *fep = netdev_priv(dev);
  426. fcc_t *fccp = fep->fcc.fccp;
  427. C32(fccp, fcc_gfmr, FCC_GFMR_ENT);
  428. udelay(10);
  429. S32(fccp, fcc_gfmr, FCC_GFMR_ENT);
  430. fcc_cr_cmd(fep, 0x0C, CPM_CR_RESTART_TX);
  431. }
  432. /*************************************************************************/
  433. const struct fs_ops fs_fcc_ops = {
  434. .setup_data = setup_data,
  435. .cleanup_data = cleanup_data,
  436. .set_multicast_list = set_multicast_list,
  437. .restart = restart,
  438. .stop = stop,
  439. .pre_request_irq = pre_request_irq,
  440. .post_free_irq = post_free_irq,
  441. .napi_clear_rx_event = napi_clear_rx_event,
  442. .napi_enable_rx = napi_enable_rx,
  443. .napi_disable_rx = napi_disable_rx,
  444. .rx_bd_done = rx_bd_done,
  445. .tx_kickstart = tx_kickstart,
  446. .get_int_events = get_int_events,
  447. .clear_int_events = clear_int_events,
  448. .ev_error = ev_error,
  449. .get_regs = get_regs,
  450. .get_regs_len = get_regs_len,
  451. .tx_restart = tx_restart,
  452. .allocate_bd = allocate_bd,
  453. .free_bd = free_bd,
  454. };