indirect_pci.c 4.2 KB

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  1. /*
  2. * Support for indirect PCI bridges.
  3. *
  4. * Copyright (C) 1998 Gabriel Paubert.
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version
  9. * 2 of the License, or (at your option) any later version.
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/pci.h>
  13. #include <linux/delay.h>
  14. #include <linux/string.h>
  15. #include <linux/init.h>
  16. #include <asm/io.h>
  17. #include <asm/prom.h>
  18. #include <asm/pci-bridge.h>
  19. #include <asm/machdep.h>
  20. #ifdef CONFIG_PPC_INDIRECT_PCI_BE
  21. #define PCI_CFG_OUT out_be32
  22. #else
  23. #define PCI_CFG_OUT out_le32
  24. #endif
  25. static int
  26. indirect_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
  27. int len, u32 *val)
  28. {
  29. struct pci_controller *hose = bus->sysdata;
  30. volatile void __iomem *cfg_data;
  31. u8 cfg_type = 0;
  32. u32 bus_no, reg;
  33. if (hose->indirect_type & PPC_INDIRECT_TYPE_NO_PCIE_LINK) {
  34. if (bus->number != hose->first_busno)
  35. return PCIBIOS_DEVICE_NOT_FOUND;
  36. if (devfn != 0)
  37. return PCIBIOS_DEVICE_NOT_FOUND;
  38. }
  39. if (ppc_md.pci_exclude_device)
  40. if (ppc_md.pci_exclude_device(hose, bus->number, devfn))
  41. return PCIBIOS_DEVICE_NOT_FOUND;
  42. if (hose->indirect_type & PPC_INDIRECT_TYPE_SET_CFG_TYPE)
  43. if (bus->number != hose->first_busno)
  44. cfg_type = 1;
  45. bus_no = (bus->number == hose->first_busno) ?
  46. hose->self_busno : bus->number;
  47. if (hose->indirect_type & PPC_INDIRECT_TYPE_EXT_REG)
  48. reg = ((offset & 0xf00) << 16) | (offset & 0xfc);
  49. else
  50. reg = offset & 0xfc;
  51. PCI_CFG_OUT(hose->cfg_addr,
  52. (0x80000000 | (bus_no << 16)
  53. | (devfn << 8) | reg | cfg_type));
  54. /*
  55. * Note: the caller has already checked that offset is
  56. * suitably aligned and that len is 1, 2 or 4.
  57. */
  58. cfg_data = hose->cfg_data + (offset & 3);
  59. switch (len) {
  60. case 1:
  61. *val = in_8(cfg_data);
  62. break;
  63. case 2:
  64. *val = in_le16(cfg_data);
  65. break;
  66. default:
  67. *val = in_le32(cfg_data);
  68. break;
  69. }
  70. return PCIBIOS_SUCCESSFUL;
  71. }
  72. static int
  73. indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
  74. int len, u32 val)
  75. {
  76. struct pci_controller *hose = bus->sysdata;
  77. volatile void __iomem *cfg_data;
  78. u8 cfg_type = 0;
  79. u32 bus_no, reg;
  80. if (hose->indirect_type & PPC_INDIRECT_TYPE_NO_PCIE_LINK) {
  81. if (bus->number != hose->first_busno)
  82. return PCIBIOS_DEVICE_NOT_FOUND;
  83. if (devfn != 0)
  84. return PCIBIOS_DEVICE_NOT_FOUND;
  85. }
  86. if (ppc_md.pci_exclude_device)
  87. if (ppc_md.pci_exclude_device(hose, bus->number, devfn))
  88. return PCIBIOS_DEVICE_NOT_FOUND;
  89. if (hose->indirect_type & PPC_INDIRECT_TYPE_SET_CFG_TYPE)
  90. if (bus->number != hose->first_busno)
  91. cfg_type = 1;
  92. bus_no = (bus->number == hose->first_busno) ?
  93. hose->self_busno : bus->number;
  94. if (hose->indirect_type & PPC_INDIRECT_TYPE_EXT_REG)
  95. reg = ((offset & 0xf00) << 16) | (offset & 0xfc);
  96. else
  97. reg = offset & 0xfc;
  98. PCI_CFG_OUT(hose->cfg_addr,
  99. (0x80000000 | (bus_no << 16)
  100. | (devfn << 8) | reg | cfg_type));
  101. /* surpress setting of PCI_PRIMARY_BUS */
  102. if (hose->indirect_type & PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS)
  103. if ((offset == PCI_PRIMARY_BUS) &&
  104. (bus->number == hose->first_busno))
  105. val &= 0xffffff00;
  106. /*
  107. * Note: the caller has already checked that offset is
  108. * suitably aligned and that len is 1, 2 or 4.
  109. */
  110. cfg_data = hose->cfg_data + (offset & 3);
  111. switch (len) {
  112. case 1:
  113. out_8(cfg_data, val);
  114. break;
  115. case 2:
  116. out_le16(cfg_data, val);
  117. break;
  118. default:
  119. out_le32(cfg_data, val);
  120. break;
  121. }
  122. return PCIBIOS_SUCCESSFUL;
  123. }
  124. static struct pci_ops indirect_pci_ops =
  125. {
  126. indirect_read_config,
  127. indirect_write_config
  128. };
  129. void __init
  130. setup_indirect_pci_nomap(struct pci_controller* hose, void __iomem * cfg_addr,
  131. void __iomem * cfg_data)
  132. {
  133. hose->cfg_addr = cfg_addr;
  134. hose->cfg_data = cfg_data;
  135. hose->ops = &indirect_pci_ops;
  136. }
  137. void __init
  138. setup_indirect_pci(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data)
  139. {
  140. unsigned long base = cfg_addr & PAGE_MASK;
  141. void __iomem *mbase, *addr, *data;
  142. mbase = ioremap(base, PAGE_SIZE);
  143. addr = mbase + (cfg_addr & ~PAGE_MASK);
  144. if ((cfg_data & PAGE_MASK) != base)
  145. mbase = ioremap(cfg_data & PAGE_MASK, PAGE_SIZE);
  146. data = mbase + (cfg_data & ~PAGE_MASK);
  147. setup_indirect_pci_nomap(hose, addr, data);
  148. }