i8042.c 27 KB

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  1. /*
  2. * i8042 keyboard and mouse controller driver for Linux
  3. *
  4. * Copyright (c) 1999-2004 Vojtech Pavlik
  5. */
  6. /*
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License version 2 as published by
  9. * the Free Software Foundation.
  10. */
  11. #include <linux/delay.h>
  12. #include <linux/module.h>
  13. #include <linux/moduleparam.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/ioport.h>
  16. #include <linux/init.h>
  17. #include <linux/serio.h>
  18. #include <linux/err.h>
  19. #include <linux/rcupdate.h>
  20. #include <linux/platform_device.h>
  21. #include <asm/io.h>
  22. MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>");
  23. MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver");
  24. MODULE_LICENSE("GPL");
  25. static unsigned int i8042_nokbd;
  26. module_param_named(nokbd, i8042_nokbd, bool, 0);
  27. MODULE_PARM_DESC(nokbd, "Do not probe or use KBD port.");
  28. static unsigned int i8042_noaux;
  29. module_param_named(noaux, i8042_noaux, bool, 0);
  30. MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port.");
  31. static unsigned int i8042_nomux;
  32. module_param_named(nomux, i8042_nomux, bool, 0);
  33. MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing conrtoller is present.");
  34. static unsigned int i8042_unlock;
  35. module_param_named(unlock, i8042_unlock, bool, 0);
  36. MODULE_PARM_DESC(unlock, "Ignore keyboard lock.");
  37. static unsigned int i8042_reset;
  38. module_param_named(reset, i8042_reset, bool, 0);
  39. MODULE_PARM_DESC(reset, "Reset controller during init and cleanup.");
  40. static unsigned int i8042_direct;
  41. module_param_named(direct, i8042_direct, bool, 0);
  42. MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode.");
  43. static unsigned int i8042_dumbkbd;
  44. module_param_named(dumbkbd, i8042_dumbkbd, bool, 0);
  45. MODULE_PARM_DESC(dumbkbd, "Pretend that controller can only read data from keyboard");
  46. static unsigned int i8042_noloop;
  47. module_param_named(noloop, i8042_noloop, bool, 0);
  48. MODULE_PARM_DESC(noloop, "Disable the AUX Loopback command while probing for the AUX port");
  49. static unsigned int i8042_blink_frequency = 500;
  50. module_param_named(panicblink, i8042_blink_frequency, uint, 0600);
  51. MODULE_PARM_DESC(panicblink, "Frequency with which keyboard LEDs should blink when kernel panics");
  52. #ifdef CONFIG_PNP
  53. static int i8042_nopnp;
  54. module_param_named(nopnp, i8042_nopnp, bool, 0);
  55. MODULE_PARM_DESC(nopnp, "Do not use PNP to detect controller settings");
  56. #endif
  57. #define DEBUG
  58. #ifdef DEBUG
  59. static int i8042_debug;
  60. module_param_named(debug, i8042_debug, bool, 0600);
  61. MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off");
  62. #endif
  63. #include "i8042.h"
  64. static DEFINE_SPINLOCK(i8042_lock);
  65. struct i8042_port {
  66. struct serio *serio;
  67. int irq;
  68. unsigned char exists;
  69. signed char mux;
  70. };
  71. #define I8042_KBD_PORT_NO 0
  72. #define I8042_AUX_PORT_NO 1
  73. #define I8042_MUX_PORT_NO 2
  74. #define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2)
  75. static struct i8042_port i8042_ports[I8042_NUM_PORTS];
  76. static unsigned char i8042_initial_ctr;
  77. static unsigned char i8042_ctr;
  78. static unsigned char i8042_mux_present;
  79. static unsigned char i8042_kbd_irq_registered;
  80. static unsigned char i8042_aux_irq_registered;
  81. static unsigned char i8042_suppress_kbd_ack;
  82. static struct platform_device *i8042_platform_device;
  83. static irqreturn_t i8042_interrupt(int irq, void *dev_id);
  84. /*
  85. * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to
  86. * be ready for reading values from it / writing values to it.
  87. * Called always with i8042_lock held.
  88. */
  89. static int i8042_wait_read(void)
  90. {
  91. int i = 0;
  92. while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) {
  93. udelay(50);
  94. i++;
  95. }
  96. return -(i == I8042_CTL_TIMEOUT);
  97. }
  98. static int i8042_wait_write(void)
  99. {
  100. int i = 0;
  101. while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) {
  102. udelay(50);
  103. i++;
  104. }
  105. return -(i == I8042_CTL_TIMEOUT);
  106. }
  107. /*
  108. * i8042_flush() flushes all data that may be in the keyboard and mouse buffers
  109. * of the i8042 down the toilet.
  110. */
  111. static int i8042_flush(void)
  112. {
  113. unsigned long flags;
  114. unsigned char data, str;
  115. int i = 0;
  116. spin_lock_irqsave(&i8042_lock, flags);
  117. while (((str = i8042_read_status()) & I8042_STR_OBF) && (i < I8042_BUFFER_SIZE)) {
  118. udelay(50);
  119. data = i8042_read_data();
  120. i++;
  121. dbg("%02x <- i8042 (flush, %s)", data,
  122. str & I8042_STR_AUXDATA ? "aux" : "kbd");
  123. }
  124. spin_unlock_irqrestore(&i8042_lock, flags);
  125. return i;
  126. }
  127. /*
  128. * i8042_command() executes a command on the i8042. It also sends the input
  129. * parameter(s) of the commands to it, and receives the output value(s). The
  130. * parameters are to be stored in the param array, and the output is placed
  131. * into the same array. The number of the parameters and output values is
  132. * encoded in bits 8-11 of the command number.
  133. */
  134. static int __i8042_command(unsigned char *param, int command)
  135. {
  136. int i, error;
  137. if (i8042_noloop && command == I8042_CMD_AUX_LOOP)
  138. return -1;
  139. error = i8042_wait_write();
  140. if (error)
  141. return error;
  142. dbg("%02x -> i8042 (command)", command & 0xff);
  143. i8042_write_command(command & 0xff);
  144. for (i = 0; i < ((command >> 12) & 0xf); i++) {
  145. error = i8042_wait_write();
  146. if (error)
  147. return error;
  148. dbg("%02x -> i8042 (parameter)", param[i]);
  149. i8042_write_data(param[i]);
  150. }
  151. for (i = 0; i < ((command >> 8) & 0xf); i++) {
  152. error = i8042_wait_read();
  153. if (error) {
  154. dbg(" -- i8042 (timeout)");
  155. return error;
  156. }
  157. if (command == I8042_CMD_AUX_LOOP &&
  158. !(i8042_read_status() & I8042_STR_AUXDATA)) {
  159. dbg(" -- i8042 (auxerr)");
  160. return -1;
  161. }
  162. param[i] = i8042_read_data();
  163. dbg("%02x <- i8042 (return)", param[i]);
  164. }
  165. return 0;
  166. }
  167. static int i8042_command(unsigned char *param, int command)
  168. {
  169. unsigned long flags;
  170. int retval;
  171. spin_lock_irqsave(&i8042_lock, flags);
  172. retval = __i8042_command(param, command);
  173. spin_unlock_irqrestore(&i8042_lock, flags);
  174. return retval;
  175. }
  176. /*
  177. * i8042_kbd_write() sends a byte out through the keyboard interface.
  178. */
  179. static int i8042_kbd_write(struct serio *port, unsigned char c)
  180. {
  181. unsigned long flags;
  182. int retval = 0;
  183. spin_lock_irqsave(&i8042_lock, flags);
  184. if (!(retval = i8042_wait_write())) {
  185. dbg("%02x -> i8042 (kbd-data)", c);
  186. i8042_write_data(c);
  187. }
  188. spin_unlock_irqrestore(&i8042_lock, flags);
  189. return retval;
  190. }
  191. /*
  192. * i8042_aux_write() sends a byte out through the aux interface.
  193. */
  194. static int i8042_aux_write(struct serio *serio, unsigned char c)
  195. {
  196. struct i8042_port *port = serio->port_data;
  197. return i8042_command(&c, port->mux == -1 ?
  198. I8042_CMD_AUX_SEND :
  199. I8042_CMD_MUX_SEND + port->mux);
  200. }
  201. /*
  202. * i8042_start() is called by serio core when port is about to finish
  203. * registering. It will mark port as existing so i8042_interrupt can
  204. * start sending data through it.
  205. */
  206. static int i8042_start(struct serio *serio)
  207. {
  208. struct i8042_port *port = serio->port_data;
  209. port->exists = 1;
  210. mb();
  211. return 0;
  212. }
  213. /*
  214. * i8042_stop() marks serio port as non-existing so i8042_interrupt
  215. * will not try to send data to the port that is about to go away.
  216. * The function is called by serio core as part of unregister procedure.
  217. */
  218. static void i8042_stop(struct serio *serio)
  219. {
  220. struct i8042_port *port = serio->port_data;
  221. port->exists = 0;
  222. synchronize_sched();
  223. port->serio = NULL;
  224. }
  225. /*
  226. * i8042_interrupt() is the most important function in this driver -
  227. * it handles the interrupts from the i8042, and sends incoming bytes
  228. * to the upper layers.
  229. */
  230. static irqreturn_t i8042_interrupt(int irq, void *dev_id)
  231. {
  232. struct i8042_port *port;
  233. unsigned long flags;
  234. unsigned char str, data;
  235. unsigned int dfl;
  236. unsigned int port_no;
  237. int ret = 1;
  238. spin_lock_irqsave(&i8042_lock, flags);
  239. str = i8042_read_status();
  240. if (unlikely(~str & I8042_STR_OBF)) {
  241. spin_unlock_irqrestore(&i8042_lock, flags);
  242. if (irq) dbg("Interrupt %d, without any data", irq);
  243. ret = 0;
  244. goto out;
  245. }
  246. data = i8042_read_data();
  247. spin_unlock_irqrestore(&i8042_lock, flags);
  248. if (i8042_mux_present && (str & I8042_STR_AUXDATA)) {
  249. static unsigned long last_transmit;
  250. static unsigned char last_str;
  251. dfl = 0;
  252. if (str & I8042_STR_MUXERR) {
  253. dbg("MUX error, status is %02x, data is %02x", str, data);
  254. /*
  255. * When MUXERR condition is signalled the data register can only contain
  256. * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately
  257. * it is not always the case. Some KBCs also report 0xfc when there is
  258. * nothing connected to the port while others sometimes get confused which
  259. * port the data came from and signal error leaving the data intact. They
  260. * _do not_ revert to legacy mode (actually I've never seen KBC reverting
  261. * to legacy mode yet, when we see one we'll add proper handling).
  262. * Anyway, we process 0xfc, 0xfd, 0xfe and 0xff as timeouts, and for the
  263. * rest assume that the data came from the same serio last byte
  264. * was transmitted (if transmission happened not too long ago).
  265. */
  266. switch (data) {
  267. default:
  268. if (time_before(jiffies, last_transmit + HZ/10)) {
  269. str = last_str;
  270. break;
  271. }
  272. /* fall through - report timeout */
  273. case 0xfc:
  274. case 0xfd:
  275. case 0xfe: dfl = SERIO_TIMEOUT; data = 0xfe; break;
  276. case 0xff: dfl = SERIO_PARITY; data = 0xfe; break;
  277. }
  278. }
  279. port_no = I8042_MUX_PORT_NO + ((str >> 6) & 3);
  280. last_str = str;
  281. last_transmit = jiffies;
  282. } else {
  283. dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) |
  284. ((str & I8042_STR_TIMEOUT) ? SERIO_TIMEOUT : 0);
  285. port_no = (str & I8042_STR_AUXDATA) ?
  286. I8042_AUX_PORT_NO : I8042_KBD_PORT_NO;
  287. }
  288. port = &i8042_ports[port_no];
  289. dbg("%02x <- i8042 (interrupt, %d, %d%s%s)",
  290. data, port_no, irq,
  291. dfl & SERIO_PARITY ? ", bad parity" : "",
  292. dfl & SERIO_TIMEOUT ? ", timeout" : "");
  293. if (unlikely(i8042_suppress_kbd_ack))
  294. if (port_no == I8042_KBD_PORT_NO &&
  295. (data == 0xfa || data == 0xfe)) {
  296. i8042_suppress_kbd_ack--;
  297. goto out;
  298. }
  299. if (likely(port->exists))
  300. serio_interrupt(port->serio, data, dfl);
  301. out:
  302. return IRQ_RETVAL(ret);
  303. }
  304. /*
  305. * i8042_enable_kbd_port enables keybaord port on chip
  306. */
  307. static int i8042_enable_kbd_port(void)
  308. {
  309. i8042_ctr &= ~I8042_CTR_KBDDIS;
  310. i8042_ctr |= I8042_CTR_KBDINT;
  311. if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
  312. printk(KERN_ERR "i8042.c: Failed to enable KBD port.\n");
  313. return -EIO;
  314. }
  315. return 0;
  316. }
  317. /*
  318. * i8042_enable_aux_port enables AUX (mouse) port on chip
  319. */
  320. static int i8042_enable_aux_port(void)
  321. {
  322. i8042_ctr &= ~I8042_CTR_AUXDIS;
  323. i8042_ctr |= I8042_CTR_AUXINT;
  324. if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
  325. printk(KERN_ERR "i8042.c: Failed to enable AUX port.\n");
  326. return -EIO;
  327. }
  328. return 0;
  329. }
  330. /*
  331. * i8042_enable_mux_ports enables 4 individual AUX ports after
  332. * the controller has been switched into Multiplexed mode
  333. */
  334. static int i8042_enable_mux_ports(void)
  335. {
  336. unsigned char param;
  337. int i;
  338. for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
  339. i8042_command(&param, I8042_CMD_MUX_PFX + i);
  340. i8042_command(&param, I8042_CMD_AUX_ENABLE);
  341. }
  342. return i8042_enable_aux_port();
  343. }
  344. /*
  345. * i8042_set_mux_mode checks whether the controller has an active
  346. * multiplexor and puts the chip into Multiplexed (1) or Legacy (0) mode.
  347. */
  348. static int i8042_set_mux_mode(unsigned int mode, unsigned char *mux_version)
  349. {
  350. unsigned char param;
  351. /*
  352. * Get rid of bytes in the queue.
  353. */
  354. i8042_flush();
  355. /*
  356. * Internal loopback test - send three bytes, they should come back from the
  357. * mouse interface, the last should be version.
  358. */
  359. param = 0xf0;
  360. if (i8042_command(&param, I8042_CMD_AUX_LOOP) || param != 0xf0)
  361. return -1;
  362. param = mode ? 0x56 : 0xf6;
  363. if (i8042_command(&param, I8042_CMD_AUX_LOOP) || param != (mode ? 0x56 : 0xf6))
  364. return -1;
  365. param = mode ? 0xa4 : 0xa5;
  366. if (i8042_command(&param, I8042_CMD_AUX_LOOP) || param == (mode ? 0xa4 : 0xa5))
  367. return -1;
  368. if (mux_version)
  369. *mux_version = param;
  370. return 0;
  371. }
  372. /*
  373. * i8042_check_mux() checks whether the controller supports the PS/2 Active
  374. * Multiplexing specification by Synaptics, Phoenix, Insyde and
  375. * LCS/Telegraphics.
  376. */
  377. static int __devinit i8042_check_mux(void)
  378. {
  379. unsigned char mux_version;
  380. if (i8042_set_mux_mode(1, &mux_version))
  381. return -1;
  382. /*
  383. * Workaround for interference with USB Legacy emulation
  384. * that causes a v10.12 MUX to be found.
  385. */
  386. if (mux_version == 0xAC)
  387. return -1;
  388. printk(KERN_INFO "i8042.c: Detected active multiplexing controller, rev %d.%d.\n",
  389. (mux_version >> 4) & 0xf, mux_version & 0xf);
  390. /*
  391. * Disable all muxed ports by disabling AUX.
  392. */
  393. i8042_ctr |= I8042_CTR_AUXDIS;
  394. i8042_ctr &= ~I8042_CTR_AUXINT;
  395. if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
  396. printk(KERN_ERR "i8042.c: Failed to disable AUX port, can't use MUX.\n");
  397. return -EIO;
  398. }
  399. i8042_mux_present = 1;
  400. return 0;
  401. }
  402. /*
  403. * The following is used to test AUX IRQ delivery.
  404. */
  405. static struct completion i8042_aux_irq_delivered __devinitdata;
  406. static int i8042_irq_being_tested __devinitdata;
  407. static irqreturn_t __devinit i8042_aux_test_irq(int irq, void *dev_id)
  408. {
  409. unsigned long flags;
  410. unsigned char str, data;
  411. spin_lock_irqsave(&i8042_lock, flags);
  412. str = i8042_read_status();
  413. if (str & I8042_STR_OBF) {
  414. data = i8042_read_data();
  415. if (i8042_irq_being_tested &&
  416. data == 0xa5 && (str & I8042_STR_AUXDATA))
  417. complete(&i8042_aux_irq_delivered);
  418. }
  419. spin_unlock_irqrestore(&i8042_lock, flags);
  420. return IRQ_HANDLED;
  421. }
  422. /*
  423. * i8042_check_aux() applies as much paranoia as it can at detecting
  424. * the presence of an AUX interface.
  425. */
  426. static int __devinit i8042_check_aux(void)
  427. {
  428. int retval = -1;
  429. int irq_registered = 0;
  430. int aux_loop_broken = 0;
  431. unsigned long flags;
  432. unsigned char param;
  433. /*
  434. * Get rid of bytes in the queue.
  435. */
  436. i8042_flush();
  437. /*
  438. * Internal loopback test - filters out AT-type i8042's. Unfortunately
  439. * SiS screwed up and their 5597 doesn't support the LOOP command even
  440. * though it has an AUX port.
  441. */
  442. param = 0x5a;
  443. if (i8042_command(&param, I8042_CMD_AUX_LOOP) || param != 0x5a) {
  444. /*
  445. * External connection test - filters out AT-soldered PS/2 i8042's
  446. * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error
  447. * 0xfa - no error on some notebooks which ignore the spec
  448. * Because it's common for chipsets to return error on perfectly functioning
  449. * AUX ports, we test for this only when the LOOP command failed.
  450. */
  451. if (i8042_command(&param, I8042_CMD_AUX_TEST) ||
  452. (param && param != 0xfa && param != 0xff))
  453. return -1;
  454. aux_loop_broken = 1;
  455. }
  456. /*
  457. * Bit assignment test - filters out PS/2 i8042's in AT mode
  458. */
  459. if (i8042_command(&param, I8042_CMD_AUX_DISABLE))
  460. return -1;
  461. if (i8042_command(&param, I8042_CMD_CTL_RCTR) || (~param & I8042_CTR_AUXDIS)) {
  462. printk(KERN_WARNING "Failed to disable AUX port, but continuing anyway... Is this a SiS?\n");
  463. printk(KERN_WARNING "If AUX port is really absent please use the 'i8042.noaux' option.\n");
  464. }
  465. if (i8042_command(&param, I8042_CMD_AUX_ENABLE))
  466. return -1;
  467. if (i8042_command(&param, I8042_CMD_CTL_RCTR) || (param & I8042_CTR_AUXDIS))
  468. return -1;
  469. /*
  470. * Test AUX IRQ delivery to make sure BIOS did not grab the IRQ and
  471. * used it for a PCI card or somethig else.
  472. */
  473. if (i8042_noloop || aux_loop_broken) {
  474. /*
  475. * Without LOOP command we can't test AUX IRQ delivery. Assume the port
  476. * is working and hope we are right.
  477. */
  478. retval = 0;
  479. goto out;
  480. }
  481. if (request_irq(I8042_AUX_IRQ, i8042_aux_test_irq, IRQF_SHARED,
  482. "i8042", i8042_platform_device))
  483. goto out;
  484. irq_registered = 1;
  485. if (i8042_enable_aux_port())
  486. goto out;
  487. spin_lock_irqsave(&i8042_lock, flags);
  488. init_completion(&i8042_aux_irq_delivered);
  489. i8042_irq_being_tested = 1;
  490. param = 0xa5;
  491. retval = __i8042_command(&param, I8042_CMD_AUX_LOOP & 0xf0ff);
  492. spin_unlock_irqrestore(&i8042_lock, flags);
  493. if (retval)
  494. goto out;
  495. if (wait_for_completion_timeout(&i8042_aux_irq_delivered,
  496. msecs_to_jiffies(250)) == 0) {
  497. /*
  498. * AUX IRQ was never delivered so we need to flush the controller to
  499. * get rid of the byte we put there; otherwise keyboard may not work.
  500. */
  501. i8042_flush();
  502. retval = -1;
  503. }
  504. out:
  505. /*
  506. * Disable the interface.
  507. */
  508. i8042_ctr |= I8042_CTR_AUXDIS;
  509. i8042_ctr &= ~I8042_CTR_AUXINT;
  510. if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
  511. retval = -1;
  512. if (irq_registered)
  513. free_irq(I8042_AUX_IRQ, i8042_platform_device);
  514. return retval;
  515. }
  516. static int i8042_controller_check(void)
  517. {
  518. if (i8042_flush() == I8042_BUFFER_SIZE) {
  519. printk(KERN_ERR "i8042.c: No controller found.\n");
  520. return -ENODEV;
  521. }
  522. return 0;
  523. }
  524. static int i8042_controller_selftest(void)
  525. {
  526. unsigned char param;
  527. if (!i8042_reset)
  528. return 0;
  529. if (i8042_command(&param, I8042_CMD_CTL_TEST)) {
  530. printk(KERN_ERR "i8042.c: i8042 controller self test timeout.\n");
  531. return -ENODEV;
  532. }
  533. if (param != I8042_RET_CTL_TEST) {
  534. printk(KERN_ERR "i8042.c: i8042 controller selftest failed. (%#x != %#x)\n",
  535. param, I8042_RET_CTL_TEST);
  536. return -EIO;
  537. }
  538. return 0;
  539. }
  540. /*
  541. * i8042_controller init initializes the i8042 controller, and,
  542. * most importantly, sets it into non-xlated mode if that's
  543. * desired.
  544. */
  545. static int i8042_controller_init(void)
  546. {
  547. unsigned long flags;
  548. /*
  549. * Save the CTR for restoral on unload / reboot.
  550. */
  551. if (i8042_command(&i8042_ctr, I8042_CMD_CTL_RCTR)) {
  552. printk(KERN_ERR "i8042.c: Can't read CTR while initializing i8042.\n");
  553. return -EIO;
  554. }
  555. i8042_initial_ctr = i8042_ctr;
  556. /*
  557. * Disable the keyboard interface and interrupt.
  558. */
  559. i8042_ctr |= I8042_CTR_KBDDIS;
  560. i8042_ctr &= ~I8042_CTR_KBDINT;
  561. /*
  562. * Handle keylock.
  563. */
  564. spin_lock_irqsave(&i8042_lock, flags);
  565. if (~i8042_read_status() & I8042_STR_KEYLOCK) {
  566. if (i8042_unlock)
  567. i8042_ctr |= I8042_CTR_IGNKEYLOCK;
  568. else
  569. printk(KERN_WARNING "i8042.c: Warning: Keylock active.\n");
  570. }
  571. spin_unlock_irqrestore(&i8042_lock, flags);
  572. /*
  573. * If the chip is configured into nontranslated mode by the BIOS, don't
  574. * bother enabling translating and be happy.
  575. */
  576. if (~i8042_ctr & I8042_CTR_XLATE)
  577. i8042_direct = 1;
  578. /*
  579. * Set nontranslated mode for the kbd interface if requested by an option.
  580. * After this the kbd interface becomes a simple serial in/out, like the aux
  581. * interface is. We don't do this by default, since it can confuse notebook
  582. * BIOSes.
  583. */
  584. if (i8042_direct)
  585. i8042_ctr &= ~I8042_CTR_XLATE;
  586. /*
  587. * Write CTR back.
  588. */
  589. if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
  590. printk(KERN_ERR "i8042.c: Can't write CTR while initializing i8042.\n");
  591. return -EIO;
  592. }
  593. return 0;
  594. }
  595. /*
  596. * Reset the controller and reset CRT to the original value set by BIOS.
  597. */
  598. static void i8042_controller_reset(void)
  599. {
  600. i8042_flush();
  601. /*
  602. * Disable MUX mode if present.
  603. */
  604. if (i8042_mux_present)
  605. i8042_set_mux_mode(0, NULL);
  606. /*
  607. * Reset the controller if requested.
  608. */
  609. i8042_controller_selftest();
  610. /*
  611. * Restore the original control register setting.
  612. */
  613. if (i8042_command(&i8042_initial_ctr, I8042_CMD_CTL_WCTR))
  614. printk(KERN_WARNING "i8042.c: Can't restore CTR.\n");
  615. }
  616. /*
  617. * i8042_panic_blink() will flash the keyboard LEDs and is called when
  618. * kernel panics. Flashing LEDs is useful for users running X who may
  619. * not see the console and will help distingushing panics from "real"
  620. * lockups.
  621. *
  622. * Note that DELAY has a limit of 10ms so we will not get stuck here
  623. * waiting for KBC to free up even if KBD interrupt is off
  624. */
  625. #define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0)
  626. static long i8042_panic_blink(long count)
  627. {
  628. long delay = 0;
  629. static long last_blink;
  630. static char led;
  631. /*
  632. * We expect frequency to be about 1/2s. KDB uses about 1s.
  633. * Make sure they are different.
  634. */
  635. if (!i8042_blink_frequency)
  636. return 0;
  637. if (count - last_blink < i8042_blink_frequency)
  638. return 0;
  639. led ^= 0x01 | 0x04;
  640. while (i8042_read_status() & I8042_STR_IBF)
  641. DELAY;
  642. dbg("%02x -> i8042 (panic blink)", 0xed);
  643. i8042_suppress_kbd_ack = 2;
  644. i8042_write_data(0xed); /* set leds */
  645. DELAY;
  646. while (i8042_read_status() & I8042_STR_IBF)
  647. DELAY;
  648. DELAY;
  649. dbg("%02x -> i8042 (panic blink)", led);
  650. i8042_write_data(led);
  651. DELAY;
  652. last_blink = count;
  653. return delay;
  654. }
  655. #undef DELAY
  656. #ifdef CONFIG_PM
  657. /*
  658. * Here we try to restore the original BIOS settings. We only want to
  659. * do that once, when we really suspend, not when we taking memory
  660. * snapshot for swsusp (in this case we'll perform required cleanup
  661. * as part of shutdown process).
  662. */
  663. static int i8042_suspend(struct platform_device *dev, pm_message_t state)
  664. {
  665. if (dev->dev.power.power_state.event != state.event) {
  666. if (state.event == PM_EVENT_SUSPEND)
  667. i8042_controller_reset();
  668. dev->dev.power.power_state = state;
  669. }
  670. return 0;
  671. }
  672. /*
  673. * Here we try to reset everything back to a state in which suspended
  674. */
  675. static int i8042_resume(struct platform_device *dev)
  676. {
  677. int error;
  678. /*
  679. * Do not bother with restoring state if we haven't suspened yet
  680. */
  681. if (dev->dev.power.power_state.event == PM_EVENT_ON)
  682. return 0;
  683. error = i8042_controller_check();
  684. if (error)
  685. return error;
  686. error = i8042_controller_selftest();
  687. if (error)
  688. return error;
  689. /*
  690. * Restore original CTR value and disable all ports
  691. */
  692. i8042_ctr = i8042_initial_ctr;
  693. if (i8042_direct)
  694. i8042_ctr &= ~I8042_CTR_XLATE;
  695. i8042_ctr |= I8042_CTR_AUXDIS | I8042_CTR_KBDDIS;
  696. i8042_ctr &= ~(I8042_CTR_AUXINT | I8042_CTR_KBDINT);
  697. if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
  698. printk(KERN_ERR "i8042: Can't write CTR to resume\n");
  699. return -EIO;
  700. }
  701. if (i8042_mux_present) {
  702. if (i8042_set_mux_mode(1, NULL) || i8042_enable_mux_ports())
  703. printk(KERN_WARNING
  704. "i8042: failed to resume active multiplexor, "
  705. "mouse won't work.\n");
  706. } else if (i8042_ports[I8042_AUX_PORT_NO].serio)
  707. i8042_enable_aux_port();
  708. if (i8042_ports[I8042_KBD_PORT_NO].serio)
  709. i8042_enable_kbd_port();
  710. i8042_interrupt(0, NULL);
  711. dev->dev.power.power_state = PMSG_ON;
  712. return 0;
  713. }
  714. #endif /* CONFIG_PM */
  715. /*
  716. * We need to reset the 8042 back to original mode on system shutdown,
  717. * because otherwise BIOSes will be confused.
  718. */
  719. static void i8042_shutdown(struct platform_device *dev)
  720. {
  721. i8042_controller_reset();
  722. }
  723. static int __devinit i8042_create_kbd_port(void)
  724. {
  725. struct serio *serio;
  726. struct i8042_port *port = &i8042_ports[I8042_KBD_PORT_NO];
  727. serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
  728. if (!serio)
  729. return -ENOMEM;
  730. serio->id.type = i8042_direct ? SERIO_8042 : SERIO_8042_XL;
  731. serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write;
  732. serio->start = i8042_start;
  733. serio->stop = i8042_stop;
  734. serio->port_data = port;
  735. serio->dev.parent = &i8042_platform_device->dev;
  736. strlcpy(serio->name, "i8042 KBD port", sizeof(serio->name));
  737. strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys));
  738. port->serio = serio;
  739. port->irq = I8042_KBD_IRQ;
  740. return 0;
  741. }
  742. static int __devinit i8042_create_aux_port(int idx)
  743. {
  744. struct serio *serio;
  745. int port_no = idx < 0 ? I8042_AUX_PORT_NO : I8042_MUX_PORT_NO + idx;
  746. struct i8042_port *port = &i8042_ports[port_no];
  747. serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
  748. if (!serio)
  749. return -ENOMEM;
  750. serio->id.type = SERIO_8042;
  751. serio->write = i8042_aux_write;
  752. serio->start = i8042_start;
  753. serio->stop = i8042_stop;
  754. serio->port_data = port;
  755. serio->dev.parent = &i8042_platform_device->dev;
  756. if (idx < 0) {
  757. strlcpy(serio->name, "i8042 AUX port", sizeof(serio->name));
  758. strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys));
  759. } else {
  760. snprintf(serio->name, sizeof(serio->name), "i8042 AUX%d port", idx);
  761. snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, idx + 1);
  762. }
  763. port->serio = serio;
  764. port->mux = idx;
  765. port->irq = I8042_AUX_IRQ;
  766. return 0;
  767. }
  768. static void __devinit i8042_free_kbd_port(void)
  769. {
  770. kfree(i8042_ports[I8042_KBD_PORT_NO].serio);
  771. i8042_ports[I8042_KBD_PORT_NO].serio = NULL;
  772. }
  773. static void __devinit i8042_free_aux_ports(void)
  774. {
  775. int i;
  776. for (i = I8042_AUX_PORT_NO; i < I8042_NUM_PORTS; i++) {
  777. kfree(i8042_ports[i].serio);
  778. i8042_ports[i].serio = NULL;
  779. }
  780. }
  781. static void __devinit i8042_register_ports(void)
  782. {
  783. int i;
  784. for (i = 0; i < I8042_NUM_PORTS; i++) {
  785. if (i8042_ports[i].serio) {
  786. printk(KERN_INFO "serio: %s at %#lx,%#lx irq %d\n",
  787. i8042_ports[i].serio->name,
  788. (unsigned long) I8042_DATA_REG,
  789. (unsigned long) I8042_COMMAND_REG,
  790. i8042_ports[i].irq);
  791. serio_register_port(i8042_ports[i].serio);
  792. }
  793. }
  794. }
  795. static void __devinit i8042_unregister_ports(void)
  796. {
  797. int i;
  798. for (i = 0; i < I8042_NUM_PORTS; i++) {
  799. if (i8042_ports[i].serio) {
  800. serio_unregister_port(i8042_ports[i].serio);
  801. i8042_ports[i].serio = NULL;
  802. }
  803. }
  804. }
  805. static void i8042_free_irqs(void)
  806. {
  807. if (i8042_aux_irq_registered)
  808. free_irq(I8042_AUX_IRQ, i8042_platform_device);
  809. if (i8042_kbd_irq_registered)
  810. free_irq(I8042_KBD_IRQ, i8042_platform_device);
  811. i8042_aux_irq_registered = i8042_kbd_irq_registered = 0;
  812. }
  813. static int __devinit i8042_setup_aux(void)
  814. {
  815. int (*aux_enable)(void);
  816. int error;
  817. int i;
  818. if (i8042_check_aux())
  819. return -ENODEV;
  820. if (i8042_nomux || i8042_check_mux()) {
  821. error = i8042_create_aux_port(-1);
  822. if (error)
  823. goto err_free_ports;
  824. aux_enable = i8042_enable_aux_port;
  825. } else {
  826. for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
  827. error = i8042_create_aux_port(i);
  828. if (error)
  829. goto err_free_ports;
  830. }
  831. aux_enable = i8042_enable_mux_ports;
  832. }
  833. error = request_irq(I8042_AUX_IRQ, i8042_interrupt, IRQF_SHARED,
  834. "i8042", i8042_platform_device);
  835. if (error)
  836. goto err_free_ports;
  837. if (aux_enable())
  838. goto err_free_irq;
  839. i8042_aux_irq_registered = 1;
  840. return 0;
  841. err_free_irq:
  842. free_irq(I8042_AUX_IRQ, i8042_platform_device);
  843. err_free_ports:
  844. i8042_free_aux_ports();
  845. return error;
  846. }
  847. static int __devinit i8042_setup_kbd(void)
  848. {
  849. int error;
  850. error = i8042_create_kbd_port();
  851. if (error)
  852. return error;
  853. error = request_irq(I8042_KBD_IRQ, i8042_interrupt, IRQF_SHARED,
  854. "i8042", i8042_platform_device);
  855. if (error)
  856. goto err_free_port;
  857. error = i8042_enable_kbd_port();
  858. if (error)
  859. goto err_free_irq;
  860. i8042_kbd_irq_registered = 1;
  861. return 0;
  862. err_free_irq:
  863. free_irq(I8042_KBD_IRQ, i8042_platform_device);
  864. err_free_port:
  865. i8042_free_kbd_port();
  866. return error;
  867. }
  868. static int __devinit i8042_probe(struct platform_device *dev)
  869. {
  870. int error;
  871. error = i8042_controller_selftest();
  872. if (error)
  873. return error;
  874. error = i8042_controller_init();
  875. if (error)
  876. return error;
  877. if (!i8042_noaux) {
  878. error = i8042_setup_aux();
  879. if (error && error != -ENODEV && error != -EBUSY)
  880. goto out_fail;
  881. }
  882. if (!i8042_nokbd) {
  883. error = i8042_setup_kbd();
  884. if (error)
  885. goto out_fail;
  886. }
  887. /*
  888. * Ok, everything is ready, let's register all serio ports
  889. */
  890. i8042_register_ports();
  891. return 0;
  892. out_fail:
  893. i8042_free_aux_ports(); /* in case KBD failed but AUX not */
  894. i8042_free_irqs();
  895. i8042_controller_reset();
  896. return error;
  897. }
  898. static int __devexit i8042_remove(struct platform_device *dev)
  899. {
  900. i8042_unregister_ports();
  901. i8042_free_irqs();
  902. i8042_controller_reset();
  903. return 0;
  904. }
  905. static struct platform_driver i8042_driver = {
  906. .driver = {
  907. .name = "i8042",
  908. .owner = THIS_MODULE,
  909. },
  910. .probe = i8042_probe,
  911. .remove = __devexit_p(i8042_remove),
  912. .shutdown = i8042_shutdown,
  913. #ifdef CONFIG_PM
  914. .suspend = i8042_suspend,
  915. .resume = i8042_resume,
  916. #endif
  917. };
  918. static int __init i8042_init(void)
  919. {
  920. int err;
  921. dbg_init();
  922. err = i8042_platform_init();
  923. if (err)
  924. return err;
  925. err = i8042_controller_check();
  926. if (err)
  927. goto err_platform_exit;
  928. err = platform_driver_register(&i8042_driver);
  929. if (err)
  930. goto err_platform_exit;
  931. i8042_platform_device = platform_device_alloc("i8042", -1);
  932. if (!i8042_platform_device) {
  933. err = -ENOMEM;
  934. goto err_unregister_driver;
  935. }
  936. err = platform_device_add(i8042_platform_device);
  937. if (err)
  938. goto err_free_device;
  939. panic_blink = i8042_panic_blink;
  940. return 0;
  941. err_free_device:
  942. platform_device_put(i8042_platform_device);
  943. err_unregister_driver:
  944. platform_driver_unregister(&i8042_driver);
  945. err_platform_exit:
  946. i8042_platform_exit();
  947. return err;
  948. }
  949. static void __exit i8042_exit(void)
  950. {
  951. platform_device_unregister(i8042_platform_device);
  952. platform_driver_unregister(&i8042_driver);
  953. i8042_platform_exit();
  954. panic_blink = NULL;
  955. }
  956. module_init(i8042_init);
  957. module_exit(i8042_exit);