3945-mac.c 107 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  30. #include <linux/kernel.h>
  31. #include <linux/module.h>
  32. #include <linux/init.h>
  33. #include <linux/pci.h>
  34. #include <linux/pci-aspm.h>
  35. #include <linux/slab.h>
  36. #include <linux/dma-mapping.h>
  37. #include <linux/delay.h>
  38. #include <linux/sched.h>
  39. #include <linux/skbuff.h>
  40. #include <linux/netdevice.h>
  41. #include <linux/firmware.h>
  42. #include <linux/etherdevice.h>
  43. #include <linux/if_arp.h>
  44. #include <net/ieee80211_radiotap.h>
  45. #include <net/mac80211.h>
  46. #include <asm/div64.h>
  47. #define DRV_NAME "iwl3945"
  48. #include "commands.h"
  49. #include "iwl-sta.h"
  50. #include "3945.h"
  51. #include "iwl-core.h"
  52. #include "iwl-helpers.h"
  53. #include "iwl-dev.h"
  54. #include "iwl-spectrum.h"
  55. /*
  56. * module name, copyright, version, etc.
  57. */
  58. #define DRV_DESCRIPTION \
  59. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  60. #ifdef CONFIG_IWLEGACY_DEBUG
  61. #define VD "d"
  62. #else
  63. #define VD
  64. #endif
  65. /*
  66. * add "s" to indicate spectrum measurement included.
  67. * we add it here to be consistent with previous releases in which
  68. * this was configurable.
  69. */
  70. #define DRV_VERSION IWLWIFI_VERSION VD "s"
  71. #define DRV_COPYRIGHT "Copyright(c) 2003-2011 Intel Corporation"
  72. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  73. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  74. MODULE_VERSION(DRV_VERSION);
  75. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  76. MODULE_LICENSE("GPL");
  77. /* module parameters */
  78. struct il_mod_params il3945_mod_params = {
  79. .sw_crypto = 1,
  80. .restart_fw = 1,
  81. .disable_hw_scan = 1,
  82. /* the rest are 0 by default */
  83. };
  84. /**
  85. * il3945_get_antenna_flags - Get antenna flags for RXON command
  86. * @il: eeprom and antenna fields are used to determine antenna flags
  87. *
  88. * il->eeprom39 is used to determine if antenna AUX/MAIN are reversed
  89. * il3945_mod_params.antenna specifies the antenna diversity mode:
  90. *
  91. * IL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
  92. * IL_ANTENNA_MAIN - Force MAIN antenna
  93. * IL_ANTENNA_AUX - Force AUX antenna
  94. */
  95. __le32 il3945_get_antenna_flags(const struct il_priv *il)
  96. {
  97. struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
  98. switch (il3945_mod_params.antenna) {
  99. case IL_ANTENNA_DIVERSITY:
  100. return 0;
  101. case IL_ANTENNA_MAIN:
  102. if (eeprom->antenna_switch_type)
  103. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  104. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  105. case IL_ANTENNA_AUX:
  106. if (eeprom->antenna_switch_type)
  107. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  108. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  109. }
  110. /* bad antenna selector value */
  111. IL_ERR("Bad antenna selector value (0x%x)\n",
  112. il3945_mod_params.antenna);
  113. return 0; /* "diversity" is default if error */
  114. }
  115. static int il3945_set_ccmp_dynamic_key_info(struct il_priv *il,
  116. struct ieee80211_key_conf *keyconf,
  117. u8 sta_id)
  118. {
  119. unsigned long flags;
  120. __le16 key_flags = 0;
  121. int ret;
  122. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  123. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  124. if (sta_id == il->ctx.bcast_sta_id)
  125. key_flags |= STA_KEY_MULTICAST_MSK;
  126. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  127. keyconf->hw_key_idx = keyconf->keyidx;
  128. key_flags &= ~STA_KEY_FLG_INVALID;
  129. spin_lock_irqsave(&il->sta_lock, flags);
  130. il->stations[sta_id].keyinfo.cipher = keyconf->cipher;
  131. il->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  132. memcpy(il->stations[sta_id].keyinfo.key, keyconf->key,
  133. keyconf->keylen);
  134. memcpy(il->stations[sta_id].sta.key.key, keyconf->key,
  135. keyconf->keylen);
  136. if ((il->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
  137. == STA_KEY_FLG_NO_ENC)
  138. il->stations[sta_id].sta.key.key_offset =
  139. il_get_free_ucode_key_idx(il);
  140. /* else, we are overriding an existing key => no need to allocated room
  141. * in uCode. */
  142. WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
  143. "no space for a new key");
  144. il->stations[sta_id].sta.key.key_flags = key_flags;
  145. il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  146. il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  147. D_INFO("hwcrypto: modify ucode station key info\n");
  148. ret = il_send_add_sta(il,
  149. &il->stations[sta_id].sta, CMD_ASYNC);
  150. spin_unlock_irqrestore(&il->sta_lock, flags);
  151. return ret;
  152. }
  153. static int il3945_set_tkip_dynamic_key_info(struct il_priv *il,
  154. struct ieee80211_key_conf *keyconf,
  155. u8 sta_id)
  156. {
  157. return -EOPNOTSUPP;
  158. }
  159. static int il3945_set_wep_dynamic_key_info(struct il_priv *il,
  160. struct ieee80211_key_conf *keyconf,
  161. u8 sta_id)
  162. {
  163. return -EOPNOTSUPP;
  164. }
  165. static int il3945_clear_sta_key_info(struct il_priv *il, u8 sta_id)
  166. {
  167. unsigned long flags;
  168. struct il_addsta_cmd sta_cmd;
  169. spin_lock_irqsave(&il->sta_lock, flags);
  170. memset(&il->stations[sta_id].keyinfo, 0, sizeof(struct il_hw_key));
  171. memset(&il->stations[sta_id].sta.key, 0,
  172. sizeof(struct il4965_keyinfo));
  173. il->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  174. il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  175. il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  176. memcpy(&sta_cmd, &il->stations[sta_id].sta, sizeof(struct il_addsta_cmd));
  177. spin_unlock_irqrestore(&il->sta_lock, flags);
  178. D_INFO("hwcrypto: clear ucode station key info\n");
  179. return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
  180. }
  181. static int il3945_set_dynamic_key(struct il_priv *il,
  182. struct ieee80211_key_conf *keyconf, u8 sta_id)
  183. {
  184. int ret = 0;
  185. keyconf->hw_key_idx = HW_KEY_DYNAMIC;
  186. switch (keyconf->cipher) {
  187. case WLAN_CIPHER_SUITE_CCMP:
  188. ret = il3945_set_ccmp_dynamic_key_info(il, keyconf, sta_id);
  189. break;
  190. case WLAN_CIPHER_SUITE_TKIP:
  191. ret = il3945_set_tkip_dynamic_key_info(il, keyconf, sta_id);
  192. break;
  193. case WLAN_CIPHER_SUITE_WEP40:
  194. case WLAN_CIPHER_SUITE_WEP104:
  195. ret = il3945_set_wep_dynamic_key_info(il, keyconf, sta_id);
  196. break;
  197. default:
  198. IL_ERR("Unknown alg: %s alg=%x\n", __func__,
  199. keyconf->cipher);
  200. ret = -EINVAL;
  201. }
  202. D_WEP("Set dynamic key: alg=%x len=%d idx=%d sta=%d ret=%d\n",
  203. keyconf->cipher, keyconf->keylen, keyconf->keyidx,
  204. sta_id, ret);
  205. return ret;
  206. }
  207. static int il3945_remove_static_key(struct il_priv *il)
  208. {
  209. int ret = -EOPNOTSUPP;
  210. return ret;
  211. }
  212. static int il3945_set_static_key(struct il_priv *il,
  213. struct ieee80211_key_conf *key)
  214. {
  215. if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
  216. key->cipher == WLAN_CIPHER_SUITE_WEP104)
  217. return -EOPNOTSUPP;
  218. IL_ERR("Static key invalid: cipher %x\n", key->cipher);
  219. return -EINVAL;
  220. }
  221. static void il3945_clear_free_frames(struct il_priv *il)
  222. {
  223. struct list_head *element;
  224. D_INFO("%d frames on pre-allocated heap on clear.\n",
  225. il->frames_count);
  226. while (!list_empty(&il->free_frames)) {
  227. element = il->free_frames.next;
  228. list_del(element);
  229. kfree(list_entry(element, struct il3945_frame, list));
  230. il->frames_count--;
  231. }
  232. if (il->frames_count) {
  233. IL_WARN("%d frames still in use. Did we lose one?\n",
  234. il->frames_count);
  235. il->frames_count = 0;
  236. }
  237. }
  238. static struct il3945_frame *il3945_get_free_frame(struct il_priv *il)
  239. {
  240. struct il3945_frame *frame;
  241. struct list_head *element;
  242. if (list_empty(&il->free_frames)) {
  243. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  244. if (!frame) {
  245. IL_ERR("Could not allocate frame!\n");
  246. return NULL;
  247. }
  248. il->frames_count++;
  249. return frame;
  250. }
  251. element = il->free_frames.next;
  252. list_del(element);
  253. return list_entry(element, struct il3945_frame, list);
  254. }
  255. static void il3945_free_frame(struct il_priv *il, struct il3945_frame *frame)
  256. {
  257. memset(frame, 0, sizeof(*frame));
  258. list_add(&frame->list, &il->free_frames);
  259. }
  260. unsigned int il3945_fill_beacon_frame(struct il_priv *il,
  261. struct ieee80211_hdr *hdr,
  262. int left)
  263. {
  264. if (!il_is_associated(il) || !il->beacon_skb)
  265. return 0;
  266. if (il->beacon_skb->len > left)
  267. return 0;
  268. memcpy(hdr, il->beacon_skb->data, il->beacon_skb->len);
  269. return il->beacon_skb->len;
  270. }
  271. static int il3945_send_beacon_cmd(struct il_priv *il)
  272. {
  273. struct il3945_frame *frame;
  274. unsigned int frame_size;
  275. int rc;
  276. u8 rate;
  277. frame = il3945_get_free_frame(il);
  278. if (!frame) {
  279. IL_ERR("Could not obtain free frame buffer for beacon "
  280. "command.\n");
  281. return -ENOMEM;
  282. }
  283. rate = il_get_lowest_plcp(il,
  284. &il->ctx);
  285. frame_size = il3945_hw_get_beacon_cmd(il, frame, rate);
  286. rc = il_send_cmd_pdu(il, C_TX_BEACON, frame_size,
  287. &frame->u.cmd[0]);
  288. il3945_free_frame(il, frame);
  289. return rc;
  290. }
  291. static void il3945_unset_hw_params(struct il_priv *il)
  292. {
  293. if (il->_3945.shared_virt)
  294. dma_free_coherent(&il->pci_dev->dev,
  295. sizeof(struct il3945_shared),
  296. il->_3945.shared_virt,
  297. il->_3945.shared_phys);
  298. }
  299. static void il3945_build_tx_cmd_hwcrypto(struct il_priv *il,
  300. struct ieee80211_tx_info *info,
  301. struct il_device_cmd *cmd,
  302. struct sk_buff *skb_frag,
  303. int sta_id)
  304. {
  305. struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
  306. struct il_hw_key *keyinfo = &il->stations[sta_id].keyinfo;
  307. tx_cmd->sec_ctl = 0;
  308. switch (keyinfo->cipher) {
  309. case WLAN_CIPHER_SUITE_CCMP:
  310. tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
  311. memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
  312. D_TX("tx_cmd with AES hwcrypto\n");
  313. break;
  314. case WLAN_CIPHER_SUITE_TKIP:
  315. break;
  316. case WLAN_CIPHER_SUITE_WEP104:
  317. tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
  318. /* fall through */
  319. case WLAN_CIPHER_SUITE_WEP40:
  320. tx_cmd->sec_ctl |= TX_CMD_SEC_WEP |
  321. (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  322. memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
  323. D_TX("Configuring packet for WEP encryption "
  324. "with key %d\n", info->control.hw_key->hw_key_idx);
  325. break;
  326. default:
  327. IL_ERR("Unknown encode cipher %x\n", keyinfo->cipher);
  328. break;
  329. }
  330. }
  331. /*
  332. * handle build C_TX command notification.
  333. */
  334. static void il3945_build_tx_cmd_basic(struct il_priv *il,
  335. struct il_device_cmd *cmd,
  336. struct ieee80211_tx_info *info,
  337. struct ieee80211_hdr *hdr, u8 std_id)
  338. {
  339. struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
  340. __le32 tx_flags = tx_cmd->tx_flags;
  341. __le16 fc = hdr->frame_control;
  342. tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  343. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  344. tx_flags |= TX_CMD_FLG_ACK_MSK;
  345. if (ieee80211_is_mgmt(fc))
  346. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  347. if (ieee80211_is_probe_resp(fc) &&
  348. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  349. tx_flags |= TX_CMD_FLG_TSF_MSK;
  350. } else {
  351. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  352. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  353. }
  354. tx_cmd->sta_id = std_id;
  355. if (ieee80211_has_morefrags(fc))
  356. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  357. if (ieee80211_is_data_qos(fc)) {
  358. u8 *qc = ieee80211_get_qos_ctl(hdr);
  359. tx_cmd->tid_tspec = qc[0] & 0xf;
  360. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  361. } else {
  362. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  363. }
  364. il_tx_cmd_protection(il, info, fc, &tx_flags);
  365. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  366. if (ieee80211_is_mgmt(fc)) {
  367. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  368. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
  369. else
  370. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
  371. } else {
  372. tx_cmd->timeout.pm_frame_timeout = 0;
  373. }
  374. tx_cmd->driver_txop = 0;
  375. tx_cmd->tx_flags = tx_flags;
  376. tx_cmd->next_frame_len = 0;
  377. }
  378. /*
  379. * start C_TX command process
  380. */
  381. static int il3945_tx_skb(struct il_priv *il, struct sk_buff *skb)
  382. {
  383. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  384. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  385. struct il3945_tx_cmd *tx_cmd;
  386. struct il_tx_queue *txq = NULL;
  387. struct il_queue *q = NULL;
  388. struct il_device_cmd *out_cmd;
  389. struct il_cmd_meta *out_meta;
  390. dma_addr_t phys_addr;
  391. dma_addr_t txcmd_phys;
  392. int txq_id = skb_get_queue_mapping(skb);
  393. u16 len, idx, hdr_len;
  394. u8 id;
  395. u8 unicast;
  396. u8 sta_id;
  397. u8 tid = 0;
  398. __le16 fc;
  399. u8 wait_write_ptr = 0;
  400. unsigned long flags;
  401. spin_lock_irqsave(&il->lock, flags);
  402. if (il_is_rfkill(il)) {
  403. D_DROP("Dropping - RF KILL\n");
  404. goto drop_unlock;
  405. }
  406. if ((ieee80211_get_tx_rate(il->hw, info)->hw_value & 0xFF) == IL_INVALID_RATE) {
  407. IL_ERR("ERROR: No TX rate available.\n");
  408. goto drop_unlock;
  409. }
  410. unicast = !is_multicast_ether_addr(hdr->addr1);
  411. id = 0;
  412. fc = hdr->frame_control;
  413. #ifdef CONFIG_IWLEGACY_DEBUG
  414. if (ieee80211_is_auth(fc))
  415. D_TX("Sending AUTH frame\n");
  416. else if (ieee80211_is_assoc_req(fc))
  417. D_TX("Sending ASSOC frame\n");
  418. else if (ieee80211_is_reassoc_req(fc))
  419. D_TX("Sending REASSOC frame\n");
  420. #endif
  421. spin_unlock_irqrestore(&il->lock, flags);
  422. hdr_len = ieee80211_hdrlen(fc);
  423. /* Find idx into station table for destination station */
  424. sta_id = il_sta_id_or_broadcast(
  425. il, &il->ctx,
  426. info->control.sta);
  427. if (sta_id == IL_INVALID_STATION) {
  428. D_DROP("Dropping - INVALID STATION: %pM\n",
  429. hdr->addr1);
  430. goto drop;
  431. }
  432. D_RATE("station Id %d\n", sta_id);
  433. if (ieee80211_is_data_qos(fc)) {
  434. u8 *qc = ieee80211_get_qos_ctl(hdr);
  435. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  436. if (unlikely(tid >= MAX_TID_COUNT))
  437. goto drop;
  438. }
  439. /* Descriptor for chosen Tx queue */
  440. txq = &il->txq[txq_id];
  441. q = &txq->q;
  442. if ((il_queue_space(q) < q->high_mark))
  443. goto drop;
  444. spin_lock_irqsave(&il->lock, flags);
  445. idx = il_get_cmd_idx(q, q->write_ptr, 0);
  446. /* Set up driver data for this TFD */
  447. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct il_tx_info));
  448. txq->txb[q->write_ptr].skb = skb;
  449. txq->txb[q->write_ptr].ctx = &il->ctx;
  450. /* Init first empty entry in queue's array of Tx/cmd buffers */
  451. out_cmd = txq->cmd[idx];
  452. out_meta = &txq->meta[idx];
  453. tx_cmd = (struct il3945_tx_cmd *)out_cmd->cmd.payload;
  454. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  455. memset(tx_cmd, 0, sizeof(*tx_cmd));
  456. /*
  457. * Set up the Tx-command (not MAC!) header.
  458. * Store the chosen Tx queue and TFD idx within the sequence field;
  459. * after Tx, uCode's Tx response will return this value so driver can
  460. * locate the frame within the tx queue and do post-tx processing.
  461. */
  462. out_cmd->hdr.cmd = C_TX;
  463. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  464. IDX_TO_SEQ(q->write_ptr)));
  465. /* Copy MAC header from skb into command buffer */
  466. memcpy(tx_cmd->hdr, hdr, hdr_len);
  467. if (info->control.hw_key)
  468. il3945_build_tx_cmd_hwcrypto(il, info, out_cmd, skb, sta_id);
  469. /* TODO need this for burst mode later on */
  470. il3945_build_tx_cmd_basic(il, out_cmd, info, hdr, sta_id);
  471. /* set is_hcca to 0; it probably will never be implemented */
  472. il3945_hw_build_tx_cmd_rate(il, out_cmd, info, hdr, sta_id, 0);
  473. /* Total # bytes to be transmitted */
  474. len = (u16)skb->len;
  475. tx_cmd->len = cpu_to_le16(len);
  476. il_dbg_log_tx_data_frame(il, len, hdr);
  477. il_update_stats(il, true, fc, len);
  478. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  479. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  480. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  481. txq->need_update = 1;
  482. } else {
  483. wait_write_ptr = 1;
  484. txq->need_update = 0;
  485. }
  486. D_TX("sequence nr = 0X%x\n",
  487. le16_to_cpu(out_cmd->hdr.sequence));
  488. D_TX("tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
  489. il_print_hex_dump(il, IL_DL_TX, tx_cmd, sizeof(*tx_cmd));
  490. il_print_hex_dump(il, IL_DL_TX, (u8 *)tx_cmd->hdr,
  491. ieee80211_hdrlen(fc));
  492. /*
  493. * Use the first empty entry in this queue's command buffer array
  494. * to contain the Tx command and MAC header concatenated together
  495. * (payload data will be in another buffer).
  496. * Size of this varies, due to varying MAC header length.
  497. * If end is not dword aligned, we'll have 2 extra bytes at the end
  498. * of the MAC header (device reads on dword boundaries).
  499. * We'll tell device about this padding later.
  500. */
  501. len = sizeof(struct il3945_tx_cmd) +
  502. sizeof(struct il_cmd_header) + hdr_len;
  503. len = (len + 3) & ~3;
  504. /* Physical address of this Tx command's header (not MAC header!),
  505. * within command buffer array. */
  506. txcmd_phys = pci_map_single(il->pci_dev, &out_cmd->hdr,
  507. len, PCI_DMA_TODEVICE);
  508. /* we do not map meta data ... so we can safely access address to
  509. * provide to unmap command*/
  510. dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
  511. dma_unmap_len_set(out_meta, len, len);
  512. /* Add buffer containing Tx command and MAC(!) header to TFD's
  513. * first entry */
  514. il->cfg->ops->lib->txq_attach_buf_to_tfd(il, txq,
  515. txcmd_phys, len, 1, 0);
  516. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  517. * if any (802.11 null frames have no payload). */
  518. len = skb->len - hdr_len;
  519. if (len) {
  520. phys_addr = pci_map_single(il->pci_dev, skb->data + hdr_len,
  521. len, PCI_DMA_TODEVICE);
  522. il->cfg->ops->lib->txq_attach_buf_to_tfd(il, txq,
  523. phys_addr, len,
  524. 0, U32_PAD(len));
  525. }
  526. /* Tell device the write idx *just past* this latest filled TFD */
  527. q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
  528. il_txq_update_write_ptr(il, txq);
  529. spin_unlock_irqrestore(&il->lock, flags);
  530. if (il_queue_space(q) < q->high_mark
  531. && il->mac80211_registered) {
  532. if (wait_write_ptr) {
  533. spin_lock_irqsave(&il->lock, flags);
  534. txq->need_update = 1;
  535. il_txq_update_write_ptr(il, txq);
  536. spin_unlock_irqrestore(&il->lock, flags);
  537. }
  538. il_stop_queue(il, txq);
  539. }
  540. return 0;
  541. drop_unlock:
  542. spin_unlock_irqrestore(&il->lock, flags);
  543. drop:
  544. return -1;
  545. }
  546. static int il3945_get_measurement(struct il_priv *il,
  547. struct ieee80211_measurement_params *params,
  548. u8 type)
  549. {
  550. struct il_spectrum_cmd spectrum;
  551. struct il_rx_pkt *pkt;
  552. struct il_host_cmd cmd = {
  553. .id = C_SPECTRUM_MEASUREMENT,
  554. .data = (void *)&spectrum,
  555. .flags = CMD_WANT_SKB,
  556. };
  557. u32 add_time = le64_to_cpu(params->start_time);
  558. int rc;
  559. int spectrum_resp_status;
  560. int duration = le16_to_cpu(params->duration);
  561. struct il_rxon_context *ctx = &il->ctx;
  562. if (il_is_associated(il))
  563. add_time = il_usecs_to_beacons(il,
  564. le64_to_cpu(params->start_time) - il->_3945.last_tsf,
  565. le16_to_cpu(ctx->timing.beacon_interval));
  566. memset(&spectrum, 0, sizeof(spectrum));
  567. spectrum.channel_count = cpu_to_le16(1);
  568. spectrum.flags =
  569. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  570. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  571. cmd.len = sizeof(spectrum);
  572. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  573. if (il_is_associated(il))
  574. spectrum.start_time =
  575. il_add_beacon_time(il,
  576. il->_3945.last_beacon_time, add_time,
  577. le16_to_cpu(ctx->timing.beacon_interval));
  578. else
  579. spectrum.start_time = 0;
  580. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  581. spectrum.channels[0].channel = params->channel;
  582. spectrum.channels[0].type = type;
  583. if (ctx->active.flags & RXON_FLG_BAND_24G_MSK)
  584. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  585. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  586. rc = il_send_cmd_sync(il, &cmd);
  587. if (rc)
  588. return rc;
  589. pkt = (struct il_rx_pkt *)cmd.reply_page;
  590. if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
  591. IL_ERR("Bad return from N_RX_ON_ASSOC command\n");
  592. rc = -EIO;
  593. }
  594. spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
  595. switch (spectrum_resp_status) {
  596. case 0: /* Command will be handled */
  597. if (pkt->u.spectrum.id != 0xff) {
  598. D_INFO("Replaced existing measurement: %d\n",
  599. pkt->u.spectrum.id);
  600. il->measurement_status &= ~MEASUREMENT_READY;
  601. }
  602. il->measurement_status |= MEASUREMENT_ACTIVE;
  603. rc = 0;
  604. break;
  605. case 1: /* Command will not be handled */
  606. rc = -EAGAIN;
  607. break;
  608. }
  609. il_free_pages(il, cmd.reply_page);
  610. return rc;
  611. }
  612. static void il3945_hdl_alive(struct il_priv *il,
  613. struct il_rx_buf *rxb)
  614. {
  615. struct il_rx_pkt *pkt = rxb_addr(rxb);
  616. struct il_alive_resp *palive;
  617. struct delayed_work *pwork;
  618. palive = &pkt->u.alive_frame;
  619. D_INFO("Alive ucode status 0x%08X revision "
  620. "0x%01X 0x%01X\n",
  621. palive->is_valid, palive->ver_type,
  622. palive->ver_subtype);
  623. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  624. D_INFO("Initialization Alive received.\n");
  625. memcpy(&il->card_alive_init, &pkt->u.alive_frame,
  626. sizeof(struct il_alive_resp));
  627. pwork = &il->init_alive_start;
  628. } else {
  629. D_INFO("Runtime Alive received.\n");
  630. memcpy(&il->card_alive, &pkt->u.alive_frame,
  631. sizeof(struct il_alive_resp));
  632. pwork = &il->alive_start;
  633. il3945_disable_events(il);
  634. }
  635. /* We delay the ALIVE response by 5ms to
  636. * give the HW RF Kill time to activate... */
  637. if (palive->is_valid == UCODE_VALID_OK)
  638. queue_delayed_work(il->workqueue, pwork,
  639. msecs_to_jiffies(5));
  640. else
  641. IL_WARN("uCode did not respond OK.\n");
  642. }
  643. static void il3945_hdl_add_sta(struct il_priv *il,
  644. struct il_rx_buf *rxb)
  645. {
  646. #ifdef CONFIG_IWLEGACY_DEBUG
  647. struct il_rx_pkt *pkt = rxb_addr(rxb);
  648. #endif
  649. D_RX("Received C_ADD_STA: 0x%02X\n", pkt->u.status);
  650. }
  651. static void il3945_hdl_beacon(struct il_priv *il,
  652. struct il_rx_buf *rxb)
  653. {
  654. struct il_rx_pkt *pkt = rxb_addr(rxb);
  655. struct il3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  656. #ifdef CONFIG_IWLEGACY_DEBUG
  657. u8 rate = beacon->beacon_notify_hdr.rate;
  658. D_RX("beacon status %x retries %d iss %d "
  659. "tsf %d %d rate %d\n",
  660. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  661. beacon->beacon_notify_hdr.failure_frame,
  662. le32_to_cpu(beacon->ibss_mgr_status),
  663. le32_to_cpu(beacon->high_tsf),
  664. le32_to_cpu(beacon->low_tsf), rate);
  665. #endif
  666. il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
  667. }
  668. /* Handle notification from uCode that card's power state is changing
  669. * due to software, hardware, or critical temperature RFKILL */
  670. static void il3945_hdl_card_state(struct il_priv *il,
  671. struct il_rx_buf *rxb)
  672. {
  673. struct il_rx_pkt *pkt = rxb_addr(rxb);
  674. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  675. unsigned long status = il->status;
  676. IL_WARN("Card state received: HW:%s SW:%s\n",
  677. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  678. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  679. _il_wr(il, CSR_UCODE_DRV_GP1_SET,
  680. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  681. if (flags & HW_CARD_DISABLED)
  682. set_bit(S_RF_KILL_HW, &il->status);
  683. else
  684. clear_bit(S_RF_KILL_HW, &il->status);
  685. il_scan_cancel(il);
  686. if ((test_bit(S_RF_KILL_HW, &status) !=
  687. test_bit(S_RF_KILL_HW, &il->status)))
  688. wiphy_rfkill_set_hw_state(il->hw->wiphy,
  689. test_bit(S_RF_KILL_HW, &il->status));
  690. else
  691. wake_up(&il->wait_command_queue);
  692. }
  693. /**
  694. * il3945_setup_handlers - Initialize Rx handler callbacks
  695. *
  696. * Setup the RX handlers for each of the reply types sent from the uCode
  697. * to the host.
  698. *
  699. * This function chains into the hardware specific files for them to setup
  700. * any hardware specific handlers as well.
  701. */
  702. static void il3945_setup_handlers(struct il_priv *il)
  703. {
  704. il->handlers[N_ALIVE] = il3945_hdl_alive;
  705. il->handlers[C_ADD_STA] = il3945_hdl_add_sta;
  706. il->handlers[N_ERROR] = il_hdl_error;
  707. il->handlers[N_CHANNEL_SWITCH] = il_hdl_csa;
  708. il->handlers[N_SPECTRUM_MEASUREMENT] =
  709. il_hdl_spectrum_measurement;
  710. il->handlers[N_PM_SLEEP] = il_hdl_pm_sleep;
  711. il->handlers[N_PM_DEBUG_STATS] =
  712. il_hdl_pm_debug_stats;
  713. il->handlers[N_BEACON] = il3945_hdl_beacon;
  714. /*
  715. * The same handler is used for both the REPLY to a discrete
  716. * stats request from the host as well as for the periodic
  717. * stats notifications (after received beacons) from the uCode.
  718. */
  719. il->handlers[C_STATS] = il3945_hdl_c_stats;
  720. il->handlers[N_STATS] = il3945_hdl_stats;
  721. il_setup_rx_scan_handlers(il);
  722. il->handlers[N_CARD_STATE] = il3945_hdl_card_state;
  723. /* Set up hardware specific Rx handlers */
  724. il3945_hw_handler_setup(il);
  725. }
  726. /************************** RX-FUNCTIONS ****************************/
  727. /*
  728. * Rx theory of operation
  729. *
  730. * The host allocates 32 DMA target addresses and passes the host address
  731. * to the firmware at register IL_RFDS_TBL_LOWER + N * RFD_SIZE where N is
  732. * 0 to 31
  733. *
  734. * Rx Queue Indexes
  735. * The host/firmware share two idx registers for managing the Rx buffers.
  736. *
  737. * The READ idx maps to the first position that the firmware may be writing
  738. * to -- the driver can read up to (but not including) this position and get
  739. * good data.
  740. * The READ idx is managed by the firmware once the card is enabled.
  741. *
  742. * The WRITE idx maps to the last position the driver has read from -- the
  743. * position preceding WRITE is the last slot the firmware can place a packet.
  744. *
  745. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  746. * WRITE = READ.
  747. *
  748. * During initialization, the host sets up the READ queue position to the first
  749. * IDX position, and WRITE to the last (READ - 1 wrapped)
  750. *
  751. * When the firmware places a packet in a buffer, it will advance the READ idx
  752. * and fire the RX interrupt. The driver can then query the READ idx and
  753. * process as many packets as possible, moving the WRITE idx forward as it
  754. * resets the Rx queue buffers with new memory.
  755. *
  756. * The management in the driver is as follows:
  757. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  758. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  759. * to replenish the iwl->rxq->rx_free.
  760. * + In il3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  761. * iwl->rxq is replenished and the READ IDX is updated (updating the
  762. * 'processed' and 'read' driver idxes as well)
  763. * + A received packet is processed and handed to the kernel network stack,
  764. * detached from the iwl->rxq. The driver 'processed' idx is updated.
  765. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  766. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  767. * IDX is not incremented and iwl->status(RX_STALLED) is set. If there
  768. * were enough free buffers and RX_STALLED is set it is cleared.
  769. *
  770. *
  771. * Driver sequence:
  772. *
  773. * il3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  774. * il3945_rx_queue_restock
  775. * il3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  776. * queue, updates firmware pointers, and updates
  777. * the WRITE idx. If insufficient rx_free buffers
  778. * are available, schedules il3945_rx_replenish
  779. *
  780. * -- enable interrupts --
  781. * ISR - il3945_rx() Detach il_rx_bufs from pool up to the
  782. * READ IDX, detaching the SKB from the pool.
  783. * Moves the packet buffer from queue to rx_used.
  784. * Calls il3945_rx_queue_restock to refill any empty
  785. * slots.
  786. * ...
  787. *
  788. */
  789. /**
  790. * il3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  791. */
  792. static inline __le32 il3945_dma_addr2rbd_ptr(struct il_priv *il,
  793. dma_addr_t dma_addr)
  794. {
  795. return cpu_to_le32((u32)dma_addr);
  796. }
  797. /**
  798. * il3945_rx_queue_restock - refill RX queue from pre-allocated pool
  799. *
  800. * If there are slots in the RX queue that need to be restocked,
  801. * and we have free pre-allocated buffers, fill the ranks as much
  802. * as we can, pulling from rx_free.
  803. *
  804. * This moves the 'write' idx forward to catch up with 'processed', and
  805. * also updates the memory address in the firmware to reference the new
  806. * target buffer.
  807. */
  808. static void il3945_rx_queue_restock(struct il_priv *il)
  809. {
  810. struct il_rx_queue *rxq = &il->rxq;
  811. struct list_head *element;
  812. struct il_rx_buf *rxb;
  813. unsigned long flags;
  814. int write;
  815. spin_lock_irqsave(&rxq->lock, flags);
  816. write = rxq->write & ~0x7;
  817. while (il_rx_queue_space(rxq) > 0 && rxq->free_count) {
  818. /* Get next free Rx buffer, remove from free list */
  819. element = rxq->rx_free.next;
  820. rxb = list_entry(element, struct il_rx_buf, list);
  821. list_del(element);
  822. /* Point to Rx buffer via next RBD in circular buffer */
  823. rxq->bd[rxq->write] = il3945_dma_addr2rbd_ptr(il, rxb->page_dma);
  824. rxq->queue[rxq->write] = rxb;
  825. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  826. rxq->free_count--;
  827. }
  828. spin_unlock_irqrestore(&rxq->lock, flags);
  829. /* If the pre-allocated buffer pool is dropping low, schedule to
  830. * refill it */
  831. if (rxq->free_count <= RX_LOW_WATERMARK)
  832. queue_work(il->workqueue, &il->rx_replenish);
  833. /* If we've added more space for the firmware to place data, tell it.
  834. * Increment device's write pointer in multiples of 8. */
  835. if (rxq->write_actual != (rxq->write & ~0x7) ||
  836. abs(rxq->write - rxq->read) > 7) {
  837. spin_lock_irqsave(&rxq->lock, flags);
  838. rxq->need_update = 1;
  839. spin_unlock_irqrestore(&rxq->lock, flags);
  840. il_rx_queue_update_write_ptr(il, rxq);
  841. }
  842. }
  843. /**
  844. * il3945_rx_replenish - Move all used packet from rx_used to rx_free
  845. *
  846. * When moving to rx_free an SKB is allocated for the slot.
  847. *
  848. * Also restock the Rx queue via il3945_rx_queue_restock.
  849. * This is called as a scheduled work item (except for during initialization)
  850. */
  851. static void il3945_rx_allocate(struct il_priv *il, gfp_t priority)
  852. {
  853. struct il_rx_queue *rxq = &il->rxq;
  854. struct list_head *element;
  855. struct il_rx_buf *rxb;
  856. struct page *page;
  857. unsigned long flags;
  858. gfp_t gfp_mask = priority;
  859. while (1) {
  860. spin_lock_irqsave(&rxq->lock, flags);
  861. if (list_empty(&rxq->rx_used)) {
  862. spin_unlock_irqrestore(&rxq->lock, flags);
  863. return;
  864. }
  865. spin_unlock_irqrestore(&rxq->lock, flags);
  866. if (rxq->free_count > RX_LOW_WATERMARK)
  867. gfp_mask |= __GFP_NOWARN;
  868. if (il->hw_params.rx_page_order > 0)
  869. gfp_mask |= __GFP_COMP;
  870. /* Alloc a new receive buffer */
  871. page = alloc_pages(gfp_mask, il->hw_params.rx_page_order);
  872. if (!page) {
  873. if (net_ratelimit())
  874. D_INFO("Failed to allocate SKB buffer.\n");
  875. if (rxq->free_count <= RX_LOW_WATERMARK &&
  876. net_ratelimit())
  877. IL_ERR("Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n",
  878. priority == GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL",
  879. rxq->free_count);
  880. /* We don't reschedule replenish work here -- we will
  881. * call the restock method and if it still needs
  882. * more buffers it will schedule replenish */
  883. break;
  884. }
  885. spin_lock_irqsave(&rxq->lock, flags);
  886. if (list_empty(&rxq->rx_used)) {
  887. spin_unlock_irqrestore(&rxq->lock, flags);
  888. __free_pages(page, il->hw_params.rx_page_order);
  889. return;
  890. }
  891. element = rxq->rx_used.next;
  892. rxb = list_entry(element, struct il_rx_buf, list);
  893. list_del(element);
  894. spin_unlock_irqrestore(&rxq->lock, flags);
  895. rxb->page = page;
  896. /* Get physical address of RB/SKB */
  897. rxb->page_dma = pci_map_page(il->pci_dev, page, 0,
  898. PAGE_SIZE << il->hw_params.rx_page_order,
  899. PCI_DMA_FROMDEVICE);
  900. spin_lock_irqsave(&rxq->lock, flags);
  901. list_add_tail(&rxb->list, &rxq->rx_free);
  902. rxq->free_count++;
  903. il->alloc_rxb_page++;
  904. spin_unlock_irqrestore(&rxq->lock, flags);
  905. }
  906. }
  907. void il3945_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq)
  908. {
  909. unsigned long flags;
  910. int i;
  911. spin_lock_irqsave(&rxq->lock, flags);
  912. INIT_LIST_HEAD(&rxq->rx_free);
  913. INIT_LIST_HEAD(&rxq->rx_used);
  914. /* Fill the rx_used queue with _all_ of the Rx buffers */
  915. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  916. /* In the reset function, these buffers may have been allocated
  917. * to an SKB, so we need to unmap and free potential storage */
  918. if (rxq->pool[i].page != NULL) {
  919. pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
  920. PAGE_SIZE << il->hw_params.rx_page_order,
  921. PCI_DMA_FROMDEVICE);
  922. __il_free_pages(il, rxq->pool[i].page);
  923. rxq->pool[i].page = NULL;
  924. }
  925. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  926. }
  927. /* Set us so that we have processed and used all buffers, but have
  928. * not restocked the Rx queue with fresh buffers */
  929. rxq->read = rxq->write = 0;
  930. rxq->write_actual = 0;
  931. rxq->free_count = 0;
  932. spin_unlock_irqrestore(&rxq->lock, flags);
  933. }
  934. void il3945_rx_replenish(void *data)
  935. {
  936. struct il_priv *il = data;
  937. unsigned long flags;
  938. il3945_rx_allocate(il, GFP_KERNEL);
  939. spin_lock_irqsave(&il->lock, flags);
  940. il3945_rx_queue_restock(il);
  941. spin_unlock_irqrestore(&il->lock, flags);
  942. }
  943. static void il3945_rx_replenish_now(struct il_priv *il)
  944. {
  945. il3945_rx_allocate(il, GFP_ATOMIC);
  946. il3945_rx_queue_restock(il);
  947. }
  948. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  949. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  950. * This free routine walks the list of POOL entries and if SKB is set to
  951. * non NULL it is unmapped and freed
  952. */
  953. static void il3945_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq)
  954. {
  955. int i;
  956. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  957. if (rxq->pool[i].page != NULL) {
  958. pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
  959. PAGE_SIZE << il->hw_params.rx_page_order,
  960. PCI_DMA_FROMDEVICE);
  961. __il_free_pages(il, rxq->pool[i].page);
  962. rxq->pool[i].page = NULL;
  963. }
  964. }
  965. dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  966. rxq->bd_dma);
  967. dma_free_coherent(&il->pci_dev->dev, sizeof(struct il_rb_status),
  968. rxq->rb_stts, rxq->rb_stts_dma);
  969. rxq->bd = NULL;
  970. rxq->rb_stts = NULL;
  971. }
  972. /* Convert linear signal-to-noise ratio into dB */
  973. static u8 ratio2dB[100] = {
  974. /* 0 1 2 3 4 5 6 7 8 9 */
  975. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  976. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  977. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  978. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  979. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  980. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  981. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  982. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  983. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  984. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  985. };
  986. /* Calculates a relative dB value from a ratio of linear
  987. * (i.e. not dB) signal levels.
  988. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  989. int il3945_calc_db_from_ratio(int sig_ratio)
  990. {
  991. /* 1000:1 or higher just report as 60 dB */
  992. if (sig_ratio >= 1000)
  993. return 60;
  994. /* 100:1 or higher, divide by 10 and use table,
  995. * add 20 dB to make up for divide by 10 */
  996. if (sig_ratio >= 100)
  997. return 20 + (int)ratio2dB[sig_ratio/10];
  998. /* We shouldn't see this */
  999. if (sig_ratio < 1)
  1000. return 0;
  1001. /* Use table for ratios 1:1 - 99:1 */
  1002. return (int)ratio2dB[sig_ratio];
  1003. }
  1004. /**
  1005. * il3945_rx_handle - Main entry function for receiving responses from uCode
  1006. *
  1007. * Uses the il->handlers callback function array to invoke
  1008. * the appropriate handlers, including command responses,
  1009. * frame-received notifications, and other notifications.
  1010. */
  1011. static void il3945_rx_handle(struct il_priv *il)
  1012. {
  1013. struct il_rx_buf *rxb;
  1014. struct il_rx_pkt *pkt;
  1015. struct il_rx_queue *rxq = &il->rxq;
  1016. u32 r, i;
  1017. int reclaim;
  1018. unsigned long flags;
  1019. u8 fill_rx = 0;
  1020. u32 count = 8;
  1021. int total_empty = 0;
  1022. /* uCode's read idx (stored in shared DRAM) indicates the last Rx
  1023. * buffer that the driver may process (last buffer filled by ucode). */
  1024. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  1025. i = rxq->read;
  1026. /* calculate total frames need to be restock after handling RX */
  1027. total_empty = r - rxq->write_actual;
  1028. if (total_empty < 0)
  1029. total_empty += RX_QUEUE_SIZE;
  1030. if (total_empty > (RX_QUEUE_SIZE / 2))
  1031. fill_rx = 1;
  1032. /* Rx interrupt, but nothing sent from uCode */
  1033. if (i == r)
  1034. D_RX("r = %d, i = %d\n", r, i);
  1035. while (i != r) {
  1036. int len;
  1037. rxb = rxq->queue[i];
  1038. /* If an RXB doesn't have a Rx queue slot associated with it,
  1039. * then a bug has been introduced in the queue refilling
  1040. * routines -- catch it here */
  1041. BUG_ON(rxb == NULL);
  1042. rxq->queue[i] = NULL;
  1043. pci_unmap_page(il->pci_dev, rxb->page_dma,
  1044. PAGE_SIZE << il->hw_params.rx_page_order,
  1045. PCI_DMA_FROMDEVICE);
  1046. pkt = rxb_addr(rxb);
  1047. len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
  1048. len += sizeof(u32); /* account for status word */
  1049. /* Reclaim a command buffer only if this packet is a response
  1050. * to a (driver-originated) command.
  1051. * If the packet (e.g. Rx frame) originated from uCode,
  1052. * there is no command buffer to reclaim.
  1053. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  1054. * but apparently a few don't get set; catch them here. */
  1055. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  1056. pkt->hdr.cmd != N_STATS &&
  1057. pkt->hdr.cmd != C_TX;
  1058. /* Based on type of command response or notification,
  1059. * handle those that need handling via function in
  1060. * handlers table. See il3945_setup_handlers() */
  1061. if (il->handlers[pkt->hdr.cmd]) {
  1062. D_RX("r = %d, i = %d, %s, 0x%02x\n", r, i,
  1063. il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1064. il->isr_stats.handlers[pkt->hdr.cmd]++;
  1065. il->handlers[pkt->hdr.cmd] (il, rxb);
  1066. } else {
  1067. /* No handling needed */
  1068. D_RX(
  1069. "r %d i %d No handler needed for %s, 0x%02x\n",
  1070. r, i, il_get_cmd_string(pkt->hdr.cmd),
  1071. pkt->hdr.cmd);
  1072. }
  1073. /*
  1074. * XXX: After here, we should always check rxb->page
  1075. * against NULL before touching it or its virtual
  1076. * memory (pkt). Because some handler might have
  1077. * already taken or freed the pages.
  1078. */
  1079. if (reclaim) {
  1080. /* Invoke any callbacks, transfer the buffer to caller,
  1081. * and fire off the (possibly) blocking il_send_cmd()
  1082. * as we reclaim the driver command queue */
  1083. if (rxb->page)
  1084. il_tx_cmd_complete(il, rxb);
  1085. else
  1086. IL_WARN("Claim null rxb?\n");
  1087. }
  1088. /* Reuse the page if possible. For notification packets and
  1089. * SKBs that fail to Rx correctly, add them back into the
  1090. * rx_free list for reuse later. */
  1091. spin_lock_irqsave(&rxq->lock, flags);
  1092. if (rxb->page != NULL) {
  1093. rxb->page_dma = pci_map_page(il->pci_dev, rxb->page,
  1094. 0, PAGE_SIZE << il->hw_params.rx_page_order,
  1095. PCI_DMA_FROMDEVICE);
  1096. list_add_tail(&rxb->list, &rxq->rx_free);
  1097. rxq->free_count++;
  1098. } else
  1099. list_add_tail(&rxb->list, &rxq->rx_used);
  1100. spin_unlock_irqrestore(&rxq->lock, flags);
  1101. i = (i + 1) & RX_QUEUE_MASK;
  1102. /* If there are a lot of unused frames,
  1103. * restock the Rx queue so ucode won't assert. */
  1104. if (fill_rx) {
  1105. count++;
  1106. if (count >= 8) {
  1107. rxq->read = i;
  1108. il3945_rx_replenish_now(il);
  1109. count = 0;
  1110. }
  1111. }
  1112. }
  1113. /* Backtrack one entry */
  1114. rxq->read = i;
  1115. if (fill_rx)
  1116. il3945_rx_replenish_now(il);
  1117. else
  1118. il3945_rx_queue_restock(il);
  1119. }
  1120. /* call this function to flush any scheduled tasklet */
  1121. static inline void il3945_synchronize_irq(struct il_priv *il)
  1122. {
  1123. /* wait to make sure we flush pending tasklet*/
  1124. synchronize_irq(il->pci_dev->irq);
  1125. tasklet_kill(&il->irq_tasklet);
  1126. }
  1127. static const char *il3945_desc_lookup(int i)
  1128. {
  1129. switch (i) {
  1130. case 1:
  1131. return "FAIL";
  1132. case 2:
  1133. return "BAD_PARAM";
  1134. case 3:
  1135. return "BAD_CHECKSUM";
  1136. case 4:
  1137. return "NMI_INTERRUPT";
  1138. case 5:
  1139. return "SYSASSERT";
  1140. case 6:
  1141. return "FATAL_ERROR";
  1142. }
  1143. return "UNKNOWN";
  1144. }
  1145. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1146. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1147. void il3945_dump_nic_error_log(struct il_priv *il)
  1148. {
  1149. u32 i;
  1150. u32 desc, time, count, base, data1;
  1151. u32 blink1, blink2, ilink1, ilink2;
  1152. base = le32_to_cpu(il->card_alive.error_event_table_ptr);
  1153. if (!il3945_hw_valid_rtc_data_addr(base)) {
  1154. IL_ERR("Not valid error log pointer 0x%08X\n", base);
  1155. return;
  1156. }
  1157. count = il_read_targ_mem(il, base);
  1158. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  1159. IL_ERR("Start IWL Error Log Dump:\n");
  1160. IL_ERR("Status: 0x%08lX, count: %d\n",
  1161. il->status, count);
  1162. }
  1163. IL_ERR("Desc Time asrtPC blink2 "
  1164. "ilink1 nmiPC Line\n");
  1165. for (i = ERROR_START_OFFSET;
  1166. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  1167. i += ERROR_ELEM_SIZE) {
  1168. desc = il_read_targ_mem(il, base + i);
  1169. time =
  1170. il_read_targ_mem(il, base + i + 1 * sizeof(u32));
  1171. blink1 =
  1172. il_read_targ_mem(il, base + i + 2 * sizeof(u32));
  1173. blink2 =
  1174. il_read_targ_mem(il, base + i + 3 * sizeof(u32));
  1175. ilink1 =
  1176. il_read_targ_mem(il, base + i + 4 * sizeof(u32));
  1177. ilink2 =
  1178. il_read_targ_mem(il, base + i + 5 * sizeof(u32));
  1179. data1 =
  1180. il_read_targ_mem(il, base + i + 6 * sizeof(u32));
  1181. IL_ERR(
  1182. "%-13s (0x%X) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  1183. il3945_desc_lookup(desc), desc, time, blink1, blink2,
  1184. ilink1, ilink2, data1);
  1185. }
  1186. }
  1187. static void il3945_irq_tasklet(struct il_priv *il)
  1188. {
  1189. u32 inta, handled = 0;
  1190. u32 inta_fh;
  1191. unsigned long flags;
  1192. #ifdef CONFIG_IWLEGACY_DEBUG
  1193. u32 inta_mask;
  1194. #endif
  1195. spin_lock_irqsave(&il->lock, flags);
  1196. /* Ack/clear/reset pending uCode interrupts.
  1197. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  1198. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  1199. inta = _il_rd(il, CSR_INT);
  1200. _il_wr(il, CSR_INT, inta);
  1201. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  1202. * Any new interrupts that happen after this, either while we're
  1203. * in this tasklet, or later, will show up in next ISR/tasklet. */
  1204. inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
  1205. _il_wr(il, CSR_FH_INT_STATUS, inta_fh);
  1206. #ifdef CONFIG_IWLEGACY_DEBUG
  1207. if (il_get_debug_level(il) & IL_DL_ISR) {
  1208. /* just for debug */
  1209. inta_mask = _il_rd(il, CSR_INT_MASK);
  1210. D_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  1211. inta, inta_mask, inta_fh);
  1212. }
  1213. #endif
  1214. spin_unlock_irqrestore(&il->lock, flags);
  1215. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  1216. * atomic, make sure that inta covers all the interrupts that
  1217. * we've discovered, even if FH interrupt came in just after
  1218. * reading CSR_INT. */
  1219. if (inta_fh & CSR39_FH_INT_RX_MASK)
  1220. inta |= CSR_INT_BIT_FH_RX;
  1221. if (inta_fh & CSR39_FH_INT_TX_MASK)
  1222. inta |= CSR_INT_BIT_FH_TX;
  1223. /* Now service all interrupt bits discovered above. */
  1224. if (inta & CSR_INT_BIT_HW_ERR) {
  1225. IL_ERR("Hardware error detected. Restarting.\n");
  1226. /* Tell the device to stop sending interrupts */
  1227. il_disable_interrupts(il);
  1228. il->isr_stats.hw++;
  1229. il_irq_handle_error(il);
  1230. handled |= CSR_INT_BIT_HW_ERR;
  1231. return;
  1232. }
  1233. #ifdef CONFIG_IWLEGACY_DEBUG
  1234. if (il_get_debug_level(il) & (IL_DL_ISR)) {
  1235. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  1236. if (inta & CSR_INT_BIT_SCD) {
  1237. D_ISR("Scheduler finished to transmit "
  1238. "the frame/frames.\n");
  1239. il->isr_stats.sch++;
  1240. }
  1241. /* Alive notification via Rx interrupt will do the real work */
  1242. if (inta & CSR_INT_BIT_ALIVE) {
  1243. D_ISR("Alive interrupt\n");
  1244. il->isr_stats.alive++;
  1245. }
  1246. }
  1247. #endif
  1248. /* Safely ignore these bits for debug checks below */
  1249. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  1250. /* Error detected by uCode */
  1251. if (inta & CSR_INT_BIT_SW_ERR) {
  1252. IL_ERR("Microcode SW error detected. "
  1253. "Restarting 0x%X.\n", inta);
  1254. il->isr_stats.sw++;
  1255. il_irq_handle_error(il);
  1256. handled |= CSR_INT_BIT_SW_ERR;
  1257. }
  1258. /* uCode wakes up after power-down sleep */
  1259. if (inta & CSR_INT_BIT_WAKEUP) {
  1260. D_ISR("Wakeup interrupt\n");
  1261. il_rx_queue_update_write_ptr(il, &il->rxq);
  1262. il_txq_update_write_ptr(il, &il->txq[0]);
  1263. il_txq_update_write_ptr(il, &il->txq[1]);
  1264. il_txq_update_write_ptr(il, &il->txq[2]);
  1265. il_txq_update_write_ptr(il, &il->txq[3]);
  1266. il_txq_update_write_ptr(il, &il->txq[4]);
  1267. il_txq_update_write_ptr(il, &il->txq[5]);
  1268. il->isr_stats.wakeup++;
  1269. handled |= CSR_INT_BIT_WAKEUP;
  1270. }
  1271. /* All uCode command responses, including Tx command responses,
  1272. * Rx "responses" (frame-received notification), and other
  1273. * notifications from uCode come through here*/
  1274. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  1275. il3945_rx_handle(il);
  1276. il->isr_stats.rx++;
  1277. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  1278. }
  1279. if (inta & CSR_INT_BIT_FH_TX) {
  1280. D_ISR("Tx interrupt\n");
  1281. il->isr_stats.tx++;
  1282. _il_wr(il, CSR_FH_INT_STATUS, (1 << 6));
  1283. il_wr(il, FH39_TCSR_CREDIT
  1284. (FH39_SRVC_CHNL), 0x0);
  1285. handled |= CSR_INT_BIT_FH_TX;
  1286. }
  1287. if (inta & ~handled) {
  1288. IL_ERR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  1289. il->isr_stats.unhandled++;
  1290. }
  1291. if (inta & ~il->inta_mask) {
  1292. IL_WARN("Disabled INTA bits 0x%08x were pending\n",
  1293. inta & ~il->inta_mask);
  1294. IL_WARN(" with FH_INT = 0x%08x\n", inta_fh);
  1295. }
  1296. /* Re-enable all interrupts */
  1297. /* only Re-enable if disabled by irq */
  1298. if (test_bit(S_INT_ENABLED, &il->status))
  1299. il_enable_interrupts(il);
  1300. #ifdef CONFIG_IWLEGACY_DEBUG
  1301. if (il_get_debug_level(il) & (IL_DL_ISR)) {
  1302. inta = _il_rd(il, CSR_INT);
  1303. inta_mask = _il_rd(il, CSR_INT_MASK);
  1304. inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
  1305. D_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  1306. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  1307. }
  1308. #endif
  1309. }
  1310. static int il3945_get_channels_for_scan(struct il_priv *il,
  1311. enum ieee80211_band band,
  1312. u8 is_active, u8 n_probes,
  1313. struct il3945_scan_channel *scan_ch,
  1314. struct ieee80211_vif *vif)
  1315. {
  1316. struct ieee80211_channel *chan;
  1317. const struct ieee80211_supported_band *sband;
  1318. const struct il_channel_info *ch_info;
  1319. u16 passive_dwell = 0;
  1320. u16 active_dwell = 0;
  1321. int added, i;
  1322. sband = il_get_hw_mode(il, band);
  1323. if (!sband)
  1324. return 0;
  1325. active_dwell = il_get_active_dwell_time(il, band, n_probes);
  1326. passive_dwell = il_get_passive_dwell_time(il, band, vif);
  1327. if (passive_dwell <= active_dwell)
  1328. passive_dwell = active_dwell + 1;
  1329. for (i = 0, added = 0; i < il->scan_request->n_channels; i++) {
  1330. chan = il->scan_request->channels[i];
  1331. if (chan->band != band)
  1332. continue;
  1333. scan_ch->channel = chan->hw_value;
  1334. ch_info = il_get_channel_info(il, band,
  1335. scan_ch->channel);
  1336. if (!il_is_channel_valid(ch_info)) {
  1337. D_SCAN(
  1338. "Channel %d is INVALID for this band.\n",
  1339. scan_ch->channel);
  1340. continue;
  1341. }
  1342. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  1343. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  1344. /* If passive , set up for auto-switch
  1345. * and use long active_dwell time.
  1346. */
  1347. if (!is_active || il_is_channel_passive(ch_info) ||
  1348. (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
  1349. scan_ch->type = 0; /* passive */
  1350. if (IL_UCODE_API(il->ucode_ver) == 1)
  1351. scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
  1352. } else {
  1353. scan_ch->type = 1; /* active */
  1354. }
  1355. /* Set direct probe bits. These may be used both for active
  1356. * scan channels (probes gets sent right away),
  1357. * or for passive channels (probes get se sent only after
  1358. * hearing clear Rx packet).*/
  1359. if (IL_UCODE_API(il->ucode_ver) >= 2) {
  1360. if (n_probes)
  1361. scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
  1362. } else {
  1363. /* uCode v1 does not allow setting direct probe bits on
  1364. * passive channel. */
  1365. if ((scan_ch->type & 1) && n_probes)
  1366. scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
  1367. }
  1368. /* Set txpower levels to defaults */
  1369. scan_ch->tpc.dsp_atten = 110;
  1370. /* scan_pwr_info->tpc.dsp_atten; */
  1371. /*scan_pwr_info->tpc.tx_gain; */
  1372. if (band == IEEE80211_BAND_5GHZ)
  1373. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  1374. else {
  1375. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  1376. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  1377. * power level:
  1378. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  1379. */
  1380. }
  1381. D_SCAN("Scanning %d [%s %d]\n",
  1382. scan_ch->channel,
  1383. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  1384. (scan_ch->type & 1) ?
  1385. active_dwell : passive_dwell);
  1386. scan_ch++;
  1387. added++;
  1388. }
  1389. D_SCAN("total channels to scan %d\n", added);
  1390. return added;
  1391. }
  1392. static void il3945_init_hw_rates(struct il_priv *il,
  1393. struct ieee80211_rate *rates)
  1394. {
  1395. int i;
  1396. for (i = 0; i < RATE_COUNT_LEGACY; i++) {
  1397. rates[i].bitrate = il3945_rates[i].ieee * 5;
  1398. rates[i].hw_value = i; /* Rate scaling will work on idxes */
  1399. rates[i].hw_value_short = i;
  1400. rates[i].flags = 0;
  1401. if (i > IL39_LAST_OFDM_RATE || i < IL_FIRST_OFDM_RATE) {
  1402. /*
  1403. * If CCK != 1M then set short preamble rate flag.
  1404. */
  1405. rates[i].flags |= (il3945_rates[i].plcp == 10) ?
  1406. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  1407. }
  1408. }
  1409. }
  1410. /******************************************************************************
  1411. *
  1412. * uCode download functions
  1413. *
  1414. ******************************************************************************/
  1415. static void il3945_dealloc_ucode_pci(struct il_priv *il)
  1416. {
  1417. il_free_fw_desc(il->pci_dev, &il->ucode_code);
  1418. il_free_fw_desc(il->pci_dev, &il->ucode_data);
  1419. il_free_fw_desc(il->pci_dev, &il->ucode_data_backup);
  1420. il_free_fw_desc(il->pci_dev, &il->ucode_init);
  1421. il_free_fw_desc(il->pci_dev, &il->ucode_init_data);
  1422. il_free_fw_desc(il->pci_dev, &il->ucode_boot);
  1423. }
  1424. /**
  1425. * il3945_verify_inst_full - verify runtime uCode image in card vs. host,
  1426. * looking at all data.
  1427. */
  1428. static int il3945_verify_inst_full(struct il_priv *il, __le32 *image, u32 len)
  1429. {
  1430. u32 val;
  1431. u32 save_len = len;
  1432. int rc = 0;
  1433. u32 errcnt;
  1434. D_INFO("ucode inst image size is %u\n", len);
  1435. il_wr(il, HBUS_TARG_MEM_RADDR,
  1436. IL39_RTC_INST_LOWER_BOUND);
  1437. errcnt = 0;
  1438. for (; len > 0; len -= sizeof(u32), image++) {
  1439. /* read data comes through single port, auto-incr addr */
  1440. /* NOTE: Use the debugless read so we don't flood kernel log
  1441. * if IL_DL_IO is set */
  1442. val = _il_rd(il, HBUS_TARG_MEM_RDAT);
  1443. if (val != le32_to_cpu(*image)) {
  1444. IL_ERR("uCode INST section is invalid at "
  1445. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1446. save_len - len, val, le32_to_cpu(*image));
  1447. rc = -EIO;
  1448. errcnt++;
  1449. if (errcnt >= 20)
  1450. break;
  1451. }
  1452. }
  1453. if (!errcnt)
  1454. D_INFO(
  1455. "ucode image in INSTRUCTION memory is good\n");
  1456. return rc;
  1457. }
  1458. /**
  1459. * il3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1460. * using sample data 100 bytes apart. If these sample points are good,
  1461. * it's a pretty good bet that everything between them is good, too.
  1462. */
  1463. static int il3945_verify_inst_sparse(struct il_priv *il, __le32 *image, u32 len)
  1464. {
  1465. u32 val;
  1466. int rc = 0;
  1467. u32 errcnt = 0;
  1468. u32 i;
  1469. D_INFO("ucode inst image size is %u\n", len);
  1470. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  1471. /* read data comes through single port, auto-incr addr */
  1472. /* NOTE: Use the debugless read so we don't flood kernel log
  1473. * if IL_DL_IO is set */
  1474. il_wr(il, HBUS_TARG_MEM_RADDR,
  1475. i + IL39_RTC_INST_LOWER_BOUND);
  1476. val = _il_rd(il, HBUS_TARG_MEM_RDAT);
  1477. if (val != le32_to_cpu(*image)) {
  1478. #if 0 /* Enable this if you want to see details */
  1479. IL_ERR("uCode INST section is invalid at "
  1480. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1481. i, val, *image);
  1482. #endif
  1483. rc = -EIO;
  1484. errcnt++;
  1485. if (errcnt >= 3)
  1486. break;
  1487. }
  1488. }
  1489. return rc;
  1490. }
  1491. /**
  1492. * il3945_verify_ucode - determine which instruction image is in SRAM,
  1493. * and verify its contents
  1494. */
  1495. static int il3945_verify_ucode(struct il_priv *il)
  1496. {
  1497. __le32 *image;
  1498. u32 len;
  1499. int rc = 0;
  1500. /* Try bootstrap */
  1501. image = (__le32 *)il->ucode_boot.v_addr;
  1502. len = il->ucode_boot.len;
  1503. rc = il3945_verify_inst_sparse(il, image, len);
  1504. if (rc == 0) {
  1505. D_INFO("Bootstrap uCode is good in inst SRAM\n");
  1506. return 0;
  1507. }
  1508. /* Try initialize */
  1509. image = (__le32 *)il->ucode_init.v_addr;
  1510. len = il->ucode_init.len;
  1511. rc = il3945_verify_inst_sparse(il, image, len);
  1512. if (rc == 0) {
  1513. D_INFO("Initialize uCode is good in inst SRAM\n");
  1514. return 0;
  1515. }
  1516. /* Try runtime/protocol */
  1517. image = (__le32 *)il->ucode_code.v_addr;
  1518. len = il->ucode_code.len;
  1519. rc = il3945_verify_inst_sparse(il, image, len);
  1520. if (rc == 0) {
  1521. D_INFO("Runtime uCode is good in inst SRAM\n");
  1522. return 0;
  1523. }
  1524. IL_ERR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1525. /* Since nothing seems to match, show first several data entries in
  1526. * instruction SRAM, so maybe visual inspection will give a clue.
  1527. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1528. image = (__le32 *)il->ucode_boot.v_addr;
  1529. len = il->ucode_boot.len;
  1530. rc = il3945_verify_inst_full(il, image, len);
  1531. return rc;
  1532. }
  1533. static void il3945_nic_start(struct il_priv *il)
  1534. {
  1535. /* Remove all resets to allow NIC to operate */
  1536. _il_wr(il, CSR_RESET, 0);
  1537. }
  1538. #define IL3945_UCODE_GET(item) \
  1539. static u32 il3945_ucode_get_##item(const struct il_ucode_header *ucode)\
  1540. { \
  1541. return le32_to_cpu(ucode->v1.item); \
  1542. }
  1543. static u32 il3945_ucode_get_header_size(u32 api_ver)
  1544. {
  1545. return 24;
  1546. }
  1547. static u8 *il3945_ucode_get_data(const struct il_ucode_header *ucode)
  1548. {
  1549. return (u8 *) ucode->v1.data;
  1550. }
  1551. IL3945_UCODE_GET(inst_size);
  1552. IL3945_UCODE_GET(data_size);
  1553. IL3945_UCODE_GET(init_size);
  1554. IL3945_UCODE_GET(init_data_size);
  1555. IL3945_UCODE_GET(boot_size);
  1556. /**
  1557. * il3945_read_ucode - Read uCode images from disk file.
  1558. *
  1559. * Copy into buffers for card to fetch via bus-mastering
  1560. */
  1561. static int il3945_read_ucode(struct il_priv *il)
  1562. {
  1563. const struct il_ucode_header *ucode;
  1564. int ret = -EINVAL, idx;
  1565. const struct firmware *ucode_raw;
  1566. /* firmware file name contains uCode/driver compatibility version */
  1567. const char *name_pre = il->cfg->fw_name_pre;
  1568. const unsigned int api_max = il->cfg->ucode_api_max;
  1569. const unsigned int api_min = il->cfg->ucode_api_min;
  1570. char buf[25];
  1571. u8 *src;
  1572. size_t len;
  1573. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  1574. /* Ask kernel firmware_class module to get the boot firmware off disk.
  1575. * request_firmware() is synchronous, file is in memory on return. */
  1576. for (idx = api_max; idx >= api_min; idx--) {
  1577. sprintf(buf, "%s%u%s", name_pre, idx, ".ucode");
  1578. ret = request_firmware(&ucode_raw, buf, &il->pci_dev->dev);
  1579. if (ret < 0) {
  1580. IL_ERR("%s firmware file req failed: %d\n",
  1581. buf, ret);
  1582. if (ret == -ENOENT)
  1583. continue;
  1584. else
  1585. goto error;
  1586. } else {
  1587. if (idx < api_max)
  1588. IL_ERR("Loaded firmware %s, "
  1589. "which is deprecated. "
  1590. " Please use API v%u instead.\n",
  1591. buf, api_max);
  1592. D_INFO("Got firmware '%s' file "
  1593. "(%zd bytes) from disk\n",
  1594. buf, ucode_raw->size);
  1595. break;
  1596. }
  1597. }
  1598. if (ret < 0)
  1599. goto error;
  1600. /* Make sure that we got at least our header! */
  1601. if (ucode_raw->size < il3945_ucode_get_header_size(1)) {
  1602. IL_ERR("File size way too small!\n");
  1603. ret = -EINVAL;
  1604. goto err_release;
  1605. }
  1606. /* Data from ucode file: header followed by uCode images */
  1607. ucode = (struct il_ucode_header *)ucode_raw->data;
  1608. il->ucode_ver = le32_to_cpu(ucode->ver);
  1609. api_ver = IL_UCODE_API(il->ucode_ver);
  1610. inst_size = il3945_ucode_get_inst_size(ucode);
  1611. data_size = il3945_ucode_get_data_size(ucode);
  1612. init_size = il3945_ucode_get_init_size(ucode);
  1613. init_data_size = il3945_ucode_get_init_data_size(ucode);
  1614. boot_size = il3945_ucode_get_boot_size(ucode);
  1615. src = il3945_ucode_get_data(ucode);
  1616. /* api_ver should match the api version forming part of the
  1617. * firmware filename ... but we don't check for that and only rely
  1618. * on the API version read from firmware header from here on forward */
  1619. if (api_ver < api_min || api_ver > api_max) {
  1620. IL_ERR("Driver unable to support your firmware API. "
  1621. "Driver supports v%u, firmware is v%u.\n",
  1622. api_max, api_ver);
  1623. il->ucode_ver = 0;
  1624. ret = -EINVAL;
  1625. goto err_release;
  1626. }
  1627. if (api_ver != api_max)
  1628. IL_ERR("Firmware has old API version. Expected %u, "
  1629. "got %u. New firmware can be obtained "
  1630. "from http://www.intellinuxwireless.org.\n",
  1631. api_max, api_ver);
  1632. IL_INFO("loaded firmware version %u.%u.%u.%u\n",
  1633. IL_UCODE_MAJOR(il->ucode_ver),
  1634. IL_UCODE_MINOR(il->ucode_ver),
  1635. IL_UCODE_API(il->ucode_ver),
  1636. IL_UCODE_SERIAL(il->ucode_ver));
  1637. snprintf(il->hw->wiphy->fw_version,
  1638. sizeof(il->hw->wiphy->fw_version),
  1639. "%u.%u.%u.%u",
  1640. IL_UCODE_MAJOR(il->ucode_ver),
  1641. IL_UCODE_MINOR(il->ucode_ver),
  1642. IL_UCODE_API(il->ucode_ver),
  1643. IL_UCODE_SERIAL(il->ucode_ver));
  1644. D_INFO("f/w package hdr ucode version raw = 0x%x\n",
  1645. il->ucode_ver);
  1646. D_INFO("f/w package hdr runtime inst size = %u\n",
  1647. inst_size);
  1648. D_INFO("f/w package hdr runtime data size = %u\n",
  1649. data_size);
  1650. D_INFO("f/w package hdr init inst size = %u\n",
  1651. init_size);
  1652. D_INFO("f/w package hdr init data size = %u\n",
  1653. init_data_size);
  1654. D_INFO("f/w package hdr boot inst size = %u\n",
  1655. boot_size);
  1656. /* Verify size of file vs. image size info in file's header */
  1657. if (ucode_raw->size != il3945_ucode_get_header_size(api_ver) +
  1658. inst_size + data_size + init_size +
  1659. init_data_size + boot_size) {
  1660. D_INFO(
  1661. "uCode file size %zd does not match expected size\n",
  1662. ucode_raw->size);
  1663. ret = -EINVAL;
  1664. goto err_release;
  1665. }
  1666. /* Verify that uCode images will fit in card's SRAM */
  1667. if (inst_size > IL39_MAX_INST_SIZE) {
  1668. D_INFO("uCode instr len %d too large to fit in\n",
  1669. inst_size);
  1670. ret = -EINVAL;
  1671. goto err_release;
  1672. }
  1673. if (data_size > IL39_MAX_DATA_SIZE) {
  1674. D_INFO("uCode data len %d too large to fit in\n",
  1675. data_size);
  1676. ret = -EINVAL;
  1677. goto err_release;
  1678. }
  1679. if (init_size > IL39_MAX_INST_SIZE) {
  1680. D_INFO(
  1681. "uCode init instr len %d too large to fit in\n",
  1682. init_size);
  1683. ret = -EINVAL;
  1684. goto err_release;
  1685. }
  1686. if (init_data_size > IL39_MAX_DATA_SIZE) {
  1687. D_INFO(
  1688. "uCode init data len %d too large to fit in\n",
  1689. init_data_size);
  1690. ret = -EINVAL;
  1691. goto err_release;
  1692. }
  1693. if (boot_size > IL39_MAX_BSM_SIZE) {
  1694. D_INFO(
  1695. "uCode boot instr len %d too large to fit in\n",
  1696. boot_size);
  1697. ret = -EINVAL;
  1698. goto err_release;
  1699. }
  1700. /* Allocate ucode buffers for card's bus-master loading ... */
  1701. /* Runtime instructions and 2 copies of data:
  1702. * 1) unmodified from disk
  1703. * 2) backup cache for save/restore during power-downs */
  1704. il->ucode_code.len = inst_size;
  1705. il_alloc_fw_desc(il->pci_dev, &il->ucode_code);
  1706. il->ucode_data.len = data_size;
  1707. il_alloc_fw_desc(il->pci_dev, &il->ucode_data);
  1708. il->ucode_data_backup.len = data_size;
  1709. il_alloc_fw_desc(il->pci_dev, &il->ucode_data_backup);
  1710. if (!il->ucode_code.v_addr || !il->ucode_data.v_addr ||
  1711. !il->ucode_data_backup.v_addr)
  1712. goto err_pci_alloc;
  1713. /* Initialization instructions and data */
  1714. if (init_size && init_data_size) {
  1715. il->ucode_init.len = init_size;
  1716. il_alloc_fw_desc(il->pci_dev, &il->ucode_init);
  1717. il->ucode_init_data.len = init_data_size;
  1718. il_alloc_fw_desc(il->pci_dev, &il->ucode_init_data);
  1719. if (!il->ucode_init.v_addr || !il->ucode_init_data.v_addr)
  1720. goto err_pci_alloc;
  1721. }
  1722. /* Bootstrap (instructions only, no data) */
  1723. if (boot_size) {
  1724. il->ucode_boot.len = boot_size;
  1725. il_alloc_fw_desc(il->pci_dev, &il->ucode_boot);
  1726. if (!il->ucode_boot.v_addr)
  1727. goto err_pci_alloc;
  1728. }
  1729. /* Copy images into buffers for card's bus-master reads ... */
  1730. /* Runtime instructions (first block of data in file) */
  1731. len = inst_size;
  1732. D_INFO(
  1733. "Copying (but not loading) uCode instr len %zd\n", len);
  1734. memcpy(il->ucode_code.v_addr, src, len);
  1735. src += len;
  1736. D_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  1737. il->ucode_code.v_addr, (u32)il->ucode_code.p_addr);
  1738. /* Runtime data (2nd block)
  1739. * NOTE: Copy into backup buffer will be done in il3945_up() */
  1740. len = data_size;
  1741. D_INFO(
  1742. "Copying (but not loading) uCode data len %zd\n", len);
  1743. memcpy(il->ucode_data.v_addr, src, len);
  1744. memcpy(il->ucode_data_backup.v_addr, src, len);
  1745. src += len;
  1746. /* Initialization instructions (3rd block) */
  1747. if (init_size) {
  1748. len = init_size;
  1749. D_INFO(
  1750. "Copying (but not loading) init instr len %zd\n", len);
  1751. memcpy(il->ucode_init.v_addr, src, len);
  1752. src += len;
  1753. }
  1754. /* Initialization data (4th block) */
  1755. if (init_data_size) {
  1756. len = init_data_size;
  1757. D_INFO(
  1758. "Copying (but not loading) init data len %zd\n", len);
  1759. memcpy(il->ucode_init_data.v_addr, src, len);
  1760. src += len;
  1761. }
  1762. /* Bootstrap instructions (5th block) */
  1763. len = boot_size;
  1764. D_INFO(
  1765. "Copying (but not loading) boot instr len %zd\n", len);
  1766. memcpy(il->ucode_boot.v_addr, src, len);
  1767. /* We have our copies now, allow OS release its copies */
  1768. release_firmware(ucode_raw);
  1769. return 0;
  1770. err_pci_alloc:
  1771. IL_ERR("failed to allocate pci memory\n");
  1772. ret = -ENOMEM;
  1773. il3945_dealloc_ucode_pci(il);
  1774. err_release:
  1775. release_firmware(ucode_raw);
  1776. error:
  1777. return ret;
  1778. }
  1779. /**
  1780. * il3945_set_ucode_ptrs - Set uCode address location
  1781. *
  1782. * Tell initialization uCode where to find runtime uCode.
  1783. *
  1784. * BSM registers initially contain pointers to initialization uCode.
  1785. * We need to replace them to load runtime uCode inst and data,
  1786. * and to save runtime data when powering down.
  1787. */
  1788. static int il3945_set_ucode_ptrs(struct il_priv *il)
  1789. {
  1790. dma_addr_t pinst;
  1791. dma_addr_t pdata;
  1792. /* bits 31:0 for 3945 */
  1793. pinst = il->ucode_code.p_addr;
  1794. pdata = il->ucode_data_backup.p_addr;
  1795. /* Tell bootstrap uCode where to find image to load */
  1796. il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
  1797. il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
  1798. il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG,
  1799. il->ucode_data.len);
  1800. /* Inst byte count must be last to set up, bit 31 signals uCode
  1801. * that all new ptr/size info is in place */
  1802. il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG,
  1803. il->ucode_code.len | BSM_DRAM_INST_LOAD);
  1804. D_INFO("Runtime uCode pointers are set.\n");
  1805. return 0;
  1806. }
  1807. /**
  1808. * il3945_init_alive_start - Called after N_ALIVE notification received
  1809. *
  1810. * Called after N_ALIVE notification received from "initialize" uCode.
  1811. *
  1812. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  1813. */
  1814. static void il3945_init_alive_start(struct il_priv *il)
  1815. {
  1816. /* Check alive response for "valid" sign from uCode */
  1817. if (il->card_alive_init.is_valid != UCODE_VALID_OK) {
  1818. /* We had an error bringing up the hardware, so take it
  1819. * all the way back down so we can try again */
  1820. D_INFO("Initialize Alive failed.\n");
  1821. goto restart;
  1822. }
  1823. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  1824. * This is a paranoid check, because we would not have gotten the
  1825. * "initialize" alive if code weren't properly loaded. */
  1826. if (il3945_verify_ucode(il)) {
  1827. /* Runtime instruction load was bad;
  1828. * take it all the way back down so we can try again */
  1829. D_INFO("Bad \"initialize\" uCode load.\n");
  1830. goto restart;
  1831. }
  1832. /* Send pointers to protocol/runtime uCode image ... init code will
  1833. * load and launch runtime uCode, which will send us another "Alive"
  1834. * notification. */
  1835. D_INFO("Initialization Alive received.\n");
  1836. if (il3945_set_ucode_ptrs(il)) {
  1837. /* Runtime instruction load won't happen;
  1838. * take it all the way back down so we can try again */
  1839. D_INFO("Couldn't set up uCode pointers.\n");
  1840. goto restart;
  1841. }
  1842. return;
  1843. restart:
  1844. queue_work(il->workqueue, &il->restart);
  1845. }
  1846. /**
  1847. * il3945_alive_start - called after N_ALIVE notification received
  1848. * from protocol/runtime uCode (initialization uCode's
  1849. * Alive gets handled by il3945_init_alive_start()).
  1850. */
  1851. static void il3945_alive_start(struct il_priv *il)
  1852. {
  1853. int thermal_spin = 0;
  1854. u32 rfkill;
  1855. struct il_rxon_context *ctx = &il->ctx;
  1856. D_INFO("Runtime Alive received.\n");
  1857. if (il->card_alive.is_valid != UCODE_VALID_OK) {
  1858. /* We had an error bringing up the hardware, so take it
  1859. * all the way back down so we can try again */
  1860. D_INFO("Alive failed.\n");
  1861. goto restart;
  1862. }
  1863. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  1864. * This is a paranoid check, because we would not have gotten the
  1865. * "runtime" alive if code weren't properly loaded. */
  1866. if (il3945_verify_ucode(il)) {
  1867. /* Runtime instruction load was bad;
  1868. * take it all the way back down so we can try again */
  1869. D_INFO("Bad runtime uCode load.\n");
  1870. goto restart;
  1871. }
  1872. rfkill = il_rd_prph(il, APMG_RFKILL_REG);
  1873. D_INFO("RFKILL status: 0x%x\n", rfkill);
  1874. if (rfkill & 0x1) {
  1875. clear_bit(S_RF_KILL_HW, &il->status);
  1876. /* if RFKILL is not on, then wait for thermal
  1877. * sensor in adapter to kick in */
  1878. while (il3945_hw_get_temperature(il) == 0) {
  1879. thermal_spin++;
  1880. udelay(10);
  1881. }
  1882. if (thermal_spin)
  1883. D_INFO("Thermal calibration took %dus\n",
  1884. thermal_spin * 10);
  1885. } else
  1886. set_bit(S_RF_KILL_HW, &il->status);
  1887. /* After the ALIVE response, we can send commands to 3945 uCode */
  1888. set_bit(S_ALIVE, &il->status);
  1889. /* Enable watchdog to monitor the driver tx queues */
  1890. il_setup_watchdog(il);
  1891. if (il_is_rfkill(il))
  1892. return;
  1893. ieee80211_wake_queues(il->hw);
  1894. il->active_rate = RATES_MASK_3945;
  1895. il_power_update_mode(il, true);
  1896. if (il_is_associated(il)) {
  1897. struct il3945_rxon_cmd *active_rxon =
  1898. (struct il3945_rxon_cmd *)(&ctx->active);
  1899. ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  1900. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1901. } else {
  1902. /* Initialize our rx_config data */
  1903. il_connection_init_rx_config(il, ctx);
  1904. }
  1905. /* Configure Bluetooth device coexistence support */
  1906. il_send_bt_config(il);
  1907. set_bit(S_READY, &il->status);
  1908. /* Configure the adapter for unassociated operation */
  1909. il3945_commit_rxon(il, ctx);
  1910. il3945_reg_txpower_periodic(il);
  1911. D_INFO("ALIVE processing complete.\n");
  1912. wake_up(&il->wait_command_queue);
  1913. return;
  1914. restart:
  1915. queue_work(il->workqueue, &il->restart);
  1916. }
  1917. static void il3945_cancel_deferred_work(struct il_priv *il);
  1918. static void __il3945_down(struct il_priv *il)
  1919. {
  1920. unsigned long flags;
  1921. int exit_pending;
  1922. D_INFO(DRV_NAME " is going down\n");
  1923. il_scan_cancel_timeout(il, 200);
  1924. exit_pending = test_and_set_bit(S_EXIT_PENDING, &il->status);
  1925. /* Stop TX queues watchdog. We need to have S_EXIT_PENDING bit set
  1926. * to prevent rearm timer */
  1927. del_timer_sync(&il->watchdog);
  1928. /* Station information will now be cleared in device */
  1929. il_clear_ucode_stations(il, NULL);
  1930. il_dealloc_bcast_stations(il);
  1931. il_clear_driver_stations(il);
  1932. /* Unblock any waiting calls */
  1933. wake_up_all(&il->wait_command_queue);
  1934. /* Wipe out the EXIT_PENDING status bit if we are not actually
  1935. * exiting the module */
  1936. if (!exit_pending)
  1937. clear_bit(S_EXIT_PENDING, &il->status);
  1938. /* stop and reset the on-board processor */
  1939. _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  1940. /* tell the device to stop sending interrupts */
  1941. spin_lock_irqsave(&il->lock, flags);
  1942. il_disable_interrupts(il);
  1943. spin_unlock_irqrestore(&il->lock, flags);
  1944. il3945_synchronize_irq(il);
  1945. if (il->mac80211_registered)
  1946. ieee80211_stop_queues(il->hw);
  1947. /* If we have not previously called il3945_init() then
  1948. * clear all bits but the RF Kill bits and return */
  1949. if (!il_is_init(il)) {
  1950. il->status = test_bit(S_RF_KILL_HW, &il->status) <<
  1951. S_RF_KILL_HW |
  1952. test_bit(S_GEO_CONFIGURED, &il->status) <<
  1953. S_GEO_CONFIGURED |
  1954. test_bit(S_EXIT_PENDING, &il->status) <<
  1955. S_EXIT_PENDING;
  1956. goto exit;
  1957. }
  1958. /* ...otherwise clear out all the status bits but the RF Kill
  1959. * bit and continue taking the NIC down. */
  1960. il->status &= test_bit(S_RF_KILL_HW, &il->status) <<
  1961. S_RF_KILL_HW |
  1962. test_bit(S_GEO_CONFIGURED, &il->status) <<
  1963. S_GEO_CONFIGURED |
  1964. test_bit(S_FW_ERROR, &il->status) <<
  1965. S_FW_ERROR |
  1966. test_bit(S_EXIT_PENDING, &il->status) <<
  1967. S_EXIT_PENDING;
  1968. il3945_hw_txq_ctx_stop(il);
  1969. il3945_hw_rxq_stop(il);
  1970. /* Power-down device's busmaster DMA clocks */
  1971. il_wr_prph(il, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
  1972. udelay(5);
  1973. /* Stop the device, and put it in low power state */
  1974. il_apm_stop(il);
  1975. exit:
  1976. memset(&il->card_alive, 0, sizeof(struct il_alive_resp));
  1977. if (il->beacon_skb)
  1978. dev_kfree_skb(il->beacon_skb);
  1979. il->beacon_skb = NULL;
  1980. /* clear out any free frames */
  1981. il3945_clear_free_frames(il);
  1982. }
  1983. static void il3945_down(struct il_priv *il)
  1984. {
  1985. mutex_lock(&il->mutex);
  1986. __il3945_down(il);
  1987. mutex_unlock(&il->mutex);
  1988. il3945_cancel_deferred_work(il);
  1989. }
  1990. #define MAX_HW_RESTARTS 5
  1991. static int il3945_alloc_bcast_station(struct il_priv *il)
  1992. {
  1993. struct il_rxon_context *ctx = &il->ctx;
  1994. unsigned long flags;
  1995. u8 sta_id;
  1996. spin_lock_irqsave(&il->sta_lock, flags);
  1997. sta_id = il_prep_station(il, ctx,
  1998. il_bcast_addr, false, NULL);
  1999. if (sta_id == IL_INVALID_STATION) {
  2000. IL_ERR("Unable to prepare broadcast station\n");
  2001. spin_unlock_irqrestore(&il->sta_lock, flags);
  2002. return -EINVAL;
  2003. }
  2004. il->stations[sta_id].used |= IL_STA_DRIVER_ACTIVE;
  2005. il->stations[sta_id].used |= IL_STA_BCAST;
  2006. spin_unlock_irqrestore(&il->sta_lock, flags);
  2007. return 0;
  2008. }
  2009. static int __il3945_up(struct il_priv *il)
  2010. {
  2011. int rc, i;
  2012. rc = il3945_alloc_bcast_station(il);
  2013. if (rc)
  2014. return rc;
  2015. if (test_bit(S_EXIT_PENDING, &il->status)) {
  2016. IL_WARN("Exit pending; will not bring the NIC up\n");
  2017. return -EIO;
  2018. }
  2019. if (!il->ucode_data_backup.v_addr || !il->ucode_data.v_addr) {
  2020. IL_ERR("ucode not available for device bring up\n");
  2021. return -EIO;
  2022. }
  2023. /* If platform's RF_KILL switch is NOT set to KILL */
  2024. if (_il_rd(il, CSR_GP_CNTRL) &
  2025. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2026. clear_bit(S_RF_KILL_HW, &il->status);
  2027. else {
  2028. set_bit(S_RF_KILL_HW, &il->status);
  2029. IL_WARN("Radio disabled by HW RF Kill switch\n");
  2030. return -ENODEV;
  2031. }
  2032. _il_wr(il, CSR_INT, 0xFFFFFFFF);
  2033. rc = il3945_hw_nic_init(il);
  2034. if (rc) {
  2035. IL_ERR("Unable to int nic\n");
  2036. return rc;
  2037. }
  2038. /* make sure rfkill handshake bits are cleared */
  2039. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2040. _il_wr(il, CSR_UCODE_DRV_GP1_CLR,
  2041. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2042. /* clear (again), then enable host interrupts */
  2043. _il_wr(il, CSR_INT, 0xFFFFFFFF);
  2044. il_enable_interrupts(il);
  2045. /* really make sure rfkill handshake bits are cleared */
  2046. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2047. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2048. /* Copy original ucode data image from disk into backup cache.
  2049. * This will be used to initialize the on-board processor's
  2050. * data SRAM for a clean start when the runtime program first loads. */
  2051. memcpy(il->ucode_data_backup.v_addr, il->ucode_data.v_addr,
  2052. il->ucode_data.len);
  2053. /* We return success when we resume from suspend and rf_kill is on. */
  2054. if (test_bit(S_RF_KILL_HW, &il->status))
  2055. return 0;
  2056. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  2057. /* load bootstrap state machine,
  2058. * load bootstrap program into processor's memory,
  2059. * prepare to load the "initialize" uCode */
  2060. rc = il->cfg->ops->lib->load_ucode(il);
  2061. if (rc) {
  2062. IL_ERR(
  2063. "Unable to set up bootstrap uCode: %d\n", rc);
  2064. continue;
  2065. }
  2066. /* start card; "initialize" will load runtime ucode */
  2067. il3945_nic_start(il);
  2068. D_INFO(DRV_NAME " is coming up\n");
  2069. return 0;
  2070. }
  2071. set_bit(S_EXIT_PENDING, &il->status);
  2072. __il3945_down(il);
  2073. clear_bit(S_EXIT_PENDING, &il->status);
  2074. /* tried to restart and config the device for as long as our
  2075. * patience could withstand */
  2076. IL_ERR("Unable to initialize device after %d attempts.\n", i);
  2077. return -EIO;
  2078. }
  2079. /*****************************************************************************
  2080. *
  2081. * Workqueue callbacks
  2082. *
  2083. *****************************************************************************/
  2084. static void il3945_bg_init_alive_start(struct work_struct *data)
  2085. {
  2086. struct il_priv *il =
  2087. container_of(data, struct il_priv, init_alive_start.work);
  2088. mutex_lock(&il->mutex);
  2089. if (test_bit(S_EXIT_PENDING, &il->status))
  2090. goto out;
  2091. il3945_init_alive_start(il);
  2092. out:
  2093. mutex_unlock(&il->mutex);
  2094. }
  2095. static void il3945_bg_alive_start(struct work_struct *data)
  2096. {
  2097. struct il_priv *il =
  2098. container_of(data, struct il_priv, alive_start.work);
  2099. mutex_lock(&il->mutex);
  2100. if (test_bit(S_EXIT_PENDING, &il->status))
  2101. goto out;
  2102. il3945_alive_start(il);
  2103. out:
  2104. mutex_unlock(&il->mutex);
  2105. }
  2106. /*
  2107. * 3945 cannot interrupt driver when hardware rf kill switch toggles;
  2108. * driver must poll CSR_GP_CNTRL_REG register for change. This register
  2109. * *is* readable even when device has been SW_RESET into low power mode
  2110. * (e.g. during RF KILL).
  2111. */
  2112. static void il3945_rfkill_poll(struct work_struct *data)
  2113. {
  2114. struct il_priv *il =
  2115. container_of(data, struct il_priv, _3945.rfkill_poll.work);
  2116. bool old_rfkill = test_bit(S_RF_KILL_HW, &il->status);
  2117. bool new_rfkill = !(_il_rd(il, CSR_GP_CNTRL)
  2118. & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
  2119. if (new_rfkill != old_rfkill) {
  2120. if (new_rfkill)
  2121. set_bit(S_RF_KILL_HW, &il->status);
  2122. else
  2123. clear_bit(S_RF_KILL_HW, &il->status);
  2124. wiphy_rfkill_set_hw_state(il->hw->wiphy, new_rfkill);
  2125. D_RF_KILL("RF_KILL bit toggled to %s.\n",
  2126. new_rfkill ? "disable radio" : "enable radio");
  2127. }
  2128. /* Keep this running, even if radio now enabled. This will be
  2129. * cancelled in mac_start() if system decides to start again */
  2130. queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
  2131. round_jiffies_relative(2 * HZ));
  2132. }
  2133. int il3945_request_scan(struct il_priv *il, struct ieee80211_vif *vif)
  2134. {
  2135. struct il_host_cmd cmd = {
  2136. .id = C_SCAN,
  2137. .len = sizeof(struct il3945_scan_cmd),
  2138. .flags = CMD_SIZE_HUGE,
  2139. };
  2140. struct il3945_scan_cmd *scan;
  2141. u8 n_probes = 0;
  2142. enum ieee80211_band band;
  2143. bool is_active = false;
  2144. int ret;
  2145. u16 len;
  2146. lockdep_assert_held(&il->mutex);
  2147. if (!il->scan_cmd) {
  2148. il->scan_cmd = kmalloc(sizeof(struct il3945_scan_cmd) +
  2149. IL_MAX_SCAN_SIZE, GFP_KERNEL);
  2150. if (!il->scan_cmd) {
  2151. D_SCAN("Fail to allocate scan memory\n");
  2152. return -ENOMEM;
  2153. }
  2154. }
  2155. scan = il->scan_cmd;
  2156. memset(scan, 0, sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE);
  2157. scan->quiet_plcp_th = IL_PLCP_QUIET_THRESH;
  2158. scan->quiet_time = IL_ACTIVE_QUIET_TIME;
  2159. if (il_is_associated(il)) {
  2160. u16 interval;
  2161. u32 extra;
  2162. u32 suspend_time = 100;
  2163. u32 scan_suspend_time = 100;
  2164. D_INFO("Scanning while associated...\n");
  2165. interval = vif->bss_conf.beacon_int;
  2166. scan->suspend_time = 0;
  2167. scan->max_out_time = cpu_to_le32(200 * 1024);
  2168. if (!interval)
  2169. interval = suspend_time;
  2170. /*
  2171. * suspend time format:
  2172. * 0-19: beacon interval in usec (time before exec.)
  2173. * 20-23: 0
  2174. * 24-31: number of beacons (suspend between channels)
  2175. */
  2176. extra = (suspend_time / interval) << 24;
  2177. scan_suspend_time = 0xFF0FFFFF &
  2178. (extra | ((suspend_time % interval) * 1024));
  2179. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  2180. D_SCAN("suspend_time 0x%X beacon interval %d\n",
  2181. scan_suspend_time, interval);
  2182. }
  2183. if (il->scan_request->n_ssids) {
  2184. int i, p = 0;
  2185. D_SCAN("Kicking off active scan\n");
  2186. for (i = 0; i < il->scan_request->n_ssids; i++) {
  2187. /* always does wildcard anyway */
  2188. if (!il->scan_request->ssids[i].ssid_len)
  2189. continue;
  2190. scan->direct_scan[p].id = WLAN_EID_SSID;
  2191. scan->direct_scan[p].len =
  2192. il->scan_request->ssids[i].ssid_len;
  2193. memcpy(scan->direct_scan[p].ssid,
  2194. il->scan_request->ssids[i].ssid,
  2195. il->scan_request->ssids[i].ssid_len);
  2196. n_probes++;
  2197. p++;
  2198. }
  2199. is_active = true;
  2200. } else
  2201. D_SCAN("Kicking off passive scan.\n");
  2202. /* We don't build a direct scan probe request; the uCode will do
  2203. * that based on the direct_mask added to each channel entry */
  2204. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  2205. scan->tx_cmd.sta_id = il->ctx.bcast_sta_id;
  2206. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2207. /* flags + rate selection */
  2208. switch (il->scan_band) {
  2209. case IEEE80211_BAND_2GHZ:
  2210. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  2211. scan->tx_cmd.rate = RATE_1M_PLCP;
  2212. band = IEEE80211_BAND_2GHZ;
  2213. break;
  2214. case IEEE80211_BAND_5GHZ:
  2215. scan->tx_cmd.rate = RATE_6M_PLCP;
  2216. band = IEEE80211_BAND_5GHZ;
  2217. break;
  2218. default:
  2219. IL_WARN("Invalid scan band\n");
  2220. return -EIO;
  2221. }
  2222. /*
  2223. * If active scaning is requested but a certain channel
  2224. * is marked passive, we can do active scanning if we
  2225. * detect transmissions.
  2226. */
  2227. scan->good_CRC_th = is_active ? IL_GOOD_CRC_TH_DEFAULT :
  2228. IL_GOOD_CRC_TH_DISABLED;
  2229. len = il_fill_probe_req(il, (struct ieee80211_mgmt *)scan->data,
  2230. vif->addr, il->scan_request->ie,
  2231. il->scan_request->ie_len,
  2232. IL_MAX_SCAN_SIZE - sizeof(*scan));
  2233. scan->tx_cmd.len = cpu_to_le16(len);
  2234. /* select Rx antennas */
  2235. scan->flags |= il3945_get_antenna_flags(il);
  2236. scan->channel_count = il3945_get_channels_for_scan(il, band, is_active, n_probes,
  2237. (void *)&scan->data[len], vif);
  2238. if (scan->channel_count == 0) {
  2239. D_SCAN("channel count %d\n", scan->channel_count);
  2240. return -EIO;
  2241. }
  2242. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  2243. scan->channel_count * sizeof(struct il3945_scan_channel);
  2244. cmd.data = scan;
  2245. scan->len = cpu_to_le16(cmd.len);
  2246. set_bit(S_SCAN_HW, &il->status);
  2247. ret = il_send_cmd_sync(il, &cmd);
  2248. if (ret)
  2249. clear_bit(S_SCAN_HW, &il->status);
  2250. return ret;
  2251. }
  2252. void il3945_post_scan(struct il_priv *il)
  2253. {
  2254. struct il_rxon_context *ctx = &il->ctx;
  2255. /*
  2256. * Since setting the RXON may have been deferred while
  2257. * performing the scan, fire one off if needed
  2258. */
  2259. if (memcmp(&ctx->staging, &ctx->active, sizeof(ctx->staging)))
  2260. il3945_commit_rxon(il, ctx);
  2261. }
  2262. static void il3945_bg_restart(struct work_struct *data)
  2263. {
  2264. struct il_priv *il = container_of(data, struct il_priv, restart);
  2265. if (test_bit(S_EXIT_PENDING, &il->status))
  2266. return;
  2267. if (test_and_clear_bit(S_FW_ERROR, &il->status)) {
  2268. mutex_lock(&il->mutex);
  2269. il->ctx.vif = NULL;
  2270. il->is_open = 0;
  2271. mutex_unlock(&il->mutex);
  2272. il3945_down(il);
  2273. ieee80211_restart_hw(il->hw);
  2274. } else {
  2275. il3945_down(il);
  2276. mutex_lock(&il->mutex);
  2277. if (test_bit(S_EXIT_PENDING, &il->status)) {
  2278. mutex_unlock(&il->mutex);
  2279. return;
  2280. }
  2281. __il3945_up(il);
  2282. mutex_unlock(&il->mutex);
  2283. }
  2284. }
  2285. static void il3945_bg_rx_replenish(struct work_struct *data)
  2286. {
  2287. struct il_priv *il =
  2288. container_of(data, struct il_priv, rx_replenish);
  2289. mutex_lock(&il->mutex);
  2290. if (test_bit(S_EXIT_PENDING, &il->status))
  2291. goto out;
  2292. il3945_rx_replenish(il);
  2293. out:
  2294. mutex_unlock(&il->mutex);
  2295. }
  2296. void il3945_post_associate(struct il_priv *il)
  2297. {
  2298. int rc = 0;
  2299. struct ieee80211_conf *conf = NULL;
  2300. struct il_rxon_context *ctx = &il->ctx;
  2301. if (!ctx->vif || !il->is_open)
  2302. return;
  2303. D_ASSOC("Associated as %d to: %pM\n",
  2304. ctx->vif->bss_conf.aid, ctx->active.bssid_addr);
  2305. if (test_bit(S_EXIT_PENDING, &il->status))
  2306. return;
  2307. il_scan_cancel_timeout(il, 200);
  2308. conf = &il->hw->conf;
  2309. ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2310. il3945_commit_rxon(il, ctx);
  2311. rc = il_send_rxon_timing(il, ctx);
  2312. if (rc)
  2313. IL_WARN("C_RXON_TIMING failed - "
  2314. "Attempting to continue.\n");
  2315. ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2316. ctx->staging.assoc_id = cpu_to_le16(ctx->vif->bss_conf.aid);
  2317. D_ASSOC("assoc id %d beacon interval %d\n",
  2318. ctx->vif->bss_conf.aid, ctx->vif->bss_conf.beacon_int);
  2319. if (ctx->vif->bss_conf.use_short_preamble)
  2320. ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2321. else
  2322. ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2323. if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
  2324. if (ctx->vif->bss_conf.use_short_slot)
  2325. ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2326. else
  2327. ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2328. }
  2329. il3945_commit_rxon(il, ctx);
  2330. switch (ctx->vif->type) {
  2331. case NL80211_IFTYPE_STATION:
  2332. il3945_rate_scale_init(il->hw, IL_AP_ID);
  2333. break;
  2334. case NL80211_IFTYPE_ADHOC:
  2335. il3945_send_beacon_cmd(il);
  2336. break;
  2337. default:
  2338. IL_ERR("%s Should not be called in %d mode\n",
  2339. __func__, ctx->vif->type);
  2340. break;
  2341. }
  2342. }
  2343. /*****************************************************************************
  2344. *
  2345. * mac80211 entry point functions
  2346. *
  2347. *****************************************************************************/
  2348. #define UCODE_READY_TIMEOUT (2 * HZ)
  2349. static int il3945_mac_start(struct ieee80211_hw *hw)
  2350. {
  2351. struct il_priv *il = hw->priv;
  2352. int ret;
  2353. D_MAC80211("enter\n");
  2354. /* we should be verifying the device is ready to be opened */
  2355. mutex_lock(&il->mutex);
  2356. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  2357. * ucode filename and max sizes are card-specific. */
  2358. if (!il->ucode_code.len) {
  2359. ret = il3945_read_ucode(il);
  2360. if (ret) {
  2361. IL_ERR("Could not read microcode: %d\n", ret);
  2362. mutex_unlock(&il->mutex);
  2363. goto out_release_irq;
  2364. }
  2365. }
  2366. ret = __il3945_up(il);
  2367. mutex_unlock(&il->mutex);
  2368. if (ret)
  2369. goto out_release_irq;
  2370. D_INFO("Start UP work.\n");
  2371. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  2372. * mac80211 will not be run successfully. */
  2373. ret = wait_event_timeout(il->wait_command_queue,
  2374. test_bit(S_READY, &il->status),
  2375. UCODE_READY_TIMEOUT);
  2376. if (!ret) {
  2377. if (!test_bit(S_READY, &il->status)) {
  2378. IL_ERR(
  2379. "Wait for START_ALIVE timeout after %dms.\n",
  2380. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  2381. ret = -ETIMEDOUT;
  2382. goto out_release_irq;
  2383. }
  2384. }
  2385. /* ucode is running and will send rfkill notifications,
  2386. * no need to poll the killswitch state anymore */
  2387. cancel_delayed_work(&il->_3945.rfkill_poll);
  2388. il->is_open = 1;
  2389. D_MAC80211("leave\n");
  2390. return 0;
  2391. out_release_irq:
  2392. il->is_open = 0;
  2393. D_MAC80211("leave - failed\n");
  2394. return ret;
  2395. }
  2396. static void il3945_mac_stop(struct ieee80211_hw *hw)
  2397. {
  2398. struct il_priv *il = hw->priv;
  2399. D_MAC80211("enter\n");
  2400. if (!il->is_open) {
  2401. D_MAC80211("leave - skip\n");
  2402. return;
  2403. }
  2404. il->is_open = 0;
  2405. il3945_down(il);
  2406. flush_workqueue(il->workqueue);
  2407. /* start polling the killswitch state again */
  2408. queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
  2409. round_jiffies_relative(2 * HZ));
  2410. D_MAC80211("leave\n");
  2411. }
  2412. static void il3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2413. {
  2414. struct il_priv *il = hw->priv;
  2415. D_MAC80211("enter\n");
  2416. D_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  2417. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  2418. if (il3945_tx_skb(il, skb))
  2419. dev_kfree_skb_any(skb);
  2420. D_MAC80211("leave\n");
  2421. }
  2422. void il3945_config_ap(struct il_priv *il)
  2423. {
  2424. struct il_rxon_context *ctx = &il->ctx;
  2425. struct ieee80211_vif *vif = ctx->vif;
  2426. int rc = 0;
  2427. if (test_bit(S_EXIT_PENDING, &il->status))
  2428. return;
  2429. /* The following should be done only at AP bring up */
  2430. if (!(il_is_associated(il))) {
  2431. /* RXON - unassoc (to set timing command) */
  2432. ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2433. il3945_commit_rxon(il, ctx);
  2434. /* RXON Timing */
  2435. rc = il_send_rxon_timing(il, ctx);
  2436. if (rc)
  2437. IL_WARN("C_RXON_TIMING failed - "
  2438. "Attempting to continue.\n");
  2439. ctx->staging.assoc_id = 0;
  2440. if (vif->bss_conf.use_short_preamble)
  2441. ctx->staging.flags |=
  2442. RXON_FLG_SHORT_PREAMBLE_MSK;
  2443. else
  2444. ctx->staging.flags &=
  2445. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2446. if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
  2447. if (vif->bss_conf.use_short_slot)
  2448. ctx->staging.flags |=
  2449. RXON_FLG_SHORT_SLOT_MSK;
  2450. else
  2451. ctx->staging.flags &=
  2452. ~RXON_FLG_SHORT_SLOT_MSK;
  2453. }
  2454. /* restore RXON assoc */
  2455. ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2456. il3945_commit_rxon(il, ctx);
  2457. }
  2458. il3945_send_beacon_cmd(il);
  2459. }
  2460. static int il3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  2461. struct ieee80211_vif *vif,
  2462. struct ieee80211_sta *sta,
  2463. struct ieee80211_key_conf *key)
  2464. {
  2465. struct il_priv *il = hw->priv;
  2466. int ret = 0;
  2467. u8 sta_id = IL_INVALID_STATION;
  2468. u8 static_key;
  2469. D_MAC80211("enter\n");
  2470. if (il3945_mod_params.sw_crypto) {
  2471. D_MAC80211("leave - hwcrypto disabled\n");
  2472. return -EOPNOTSUPP;
  2473. }
  2474. /*
  2475. * To support IBSS RSN, don't program group keys in IBSS, the
  2476. * hardware will then not attempt to decrypt the frames.
  2477. */
  2478. if (vif->type == NL80211_IFTYPE_ADHOC &&
  2479. !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
  2480. return -EOPNOTSUPP;
  2481. static_key = !il_is_associated(il);
  2482. if (!static_key) {
  2483. sta_id = il_sta_id_or_broadcast(
  2484. il, &il->ctx, sta);
  2485. if (sta_id == IL_INVALID_STATION)
  2486. return -EINVAL;
  2487. }
  2488. mutex_lock(&il->mutex);
  2489. il_scan_cancel_timeout(il, 100);
  2490. switch (cmd) {
  2491. case SET_KEY:
  2492. if (static_key)
  2493. ret = il3945_set_static_key(il, key);
  2494. else
  2495. ret = il3945_set_dynamic_key(il, key, sta_id);
  2496. D_MAC80211("enable hwcrypto key\n");
  2497. break;
  2498. case DISABLE_KEY:
  2499. if (static_key)
  2500. ret = il3945_remove_static_key(il);
  2501. else
  2502. ret = il3945_clear_sta_key_info(il, sta_id);
  2503. D_MAC80211("disable hwcrypto key\n");
  2504. break;
  2505. default:
  2506. ret = -EINVAL;
  2507. }
  2508. mutex_unlock(&il->mutex);
  2509. D_MAC80211("leave\n");
  2510. return ret;
  2511. }
  2512. static int il3945_mac_sta_add(struct ieee80211_hw *hw,
  2513. struct ieee80211_vif *vif,
  2514. struct ieee80211_sta *sta)
  2515. {
  2516. struct il_priv *il = hw->priv;
  2517. struct il3945_sta_priv *sta_priv = (void *)sta->drv_priv;
  2518. int ret;
  2519. bool is_ap = vif->type == NL80211_IFTYPE_STATION;
  2520. u8 sta_id;
  2521. D_INFO("received request to add station %pM\n",
  2522. sta->addr);
  2523. mutex_lock(&il->mutex);
  2524. D_INFO("proceeding to add station %pM\n",
  2525. sta->addr);
  2526. sta_priv->common.sta_id = IL_INVALID_STATION;
  2527. ret = il_add_station_common(il,
  2528. &il->ctx,
  2529. sta->addr, is_ap, sta, &sta_id);
  2530. if (ret) {
  2531. IL_ERR("Unable to add station %pM (%d)\n",
  2532. sta->addr, ret);
  2533. /* Should we return success if return code is EEXIST ? */
  2534. mutex_unlock(&il->mutex);
  2535. return ret;
  2536. }
  2537. sta_priv->common.sta_id = sta_id;
  2538. /* Initialize rate scaling */
  2539. D_INFO("Initializing rate scaling for station %pM\n",
  2540. sta->addr);
  2541. il3945_rs_rate_init(il, sta, sta_id);
  2542. mutex_unlock(&il->mutex);
  2543. return 0;
  2544. }
  2545. static void il3945_configure_filter(struct ieee80211_hw *hw,
  2546. unsigned int changed_flags,
  2547. unsigned int *total_flags,
  2548. u64 multicast)
  2549. {
  2550. struct il_priv *il = hw->priv;
  2551. __le32 filter_or = 0, filter_nand = 0;
  2552. struct il_rxon_context *ctx = &il->ctx;
  2553. #define CHK(test, flag) do { \
  2554. if (*total_flags & (test)) \
  2555. filter_or |= (flag); \
  2556. else \
  2557. filter_nand |= (flag); \
  2558. } while (0)
  2559. D_MAC80211("Enter: changed: 0x%x, total: 0x%x\n",
  2560. changed_flags, *total_flags);
  2561. CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
  2562. CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
  2563. CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
  2564. #undef CHK
  2565. mutex_lock(&il->mutex);
  2566. ctx->staging.filter_flags &= ~filter_nand;
  2567. ctx->staging.filter_flags |= filter_or;
  2568. /*
  2569. * Not committing directly because hardware can perform a scan,
  2570. * but even if hw is ready, committing here breaks for some reason,
  2571. * we'll eventually commit the filter flags change anyway.
  2572. */
  2573. mutex_unlock(&il->mutex);
  2574. /*
  2575. * Receiving all multicast frames is always enabled by the
  2576. * default flags setup in il_connection_init_rx_config()
  2577. * since we currently do not support programming multicast
  2578. * filters into the device.
  2579. */
  2580. *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
  2581. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
  2582. }
  2583. /*****************************************************************************
  2584. *
  2585. * sysfs attributes
  2586. *
  2587. *****************************************************************************/
  2588. #ifdef CONFIG_IWLEGACY_DEBUG
  2589. /*
  2590. * The following adds a new attribute to the sysfs representation
  2591. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  2592. * used for controlling the debug level.
  2593. *
  2594. * See the level definitions in iwl for details.
  2595. *
  2596. * The debug_level being managed using sysfs below is a per device debug
  2597. * level that is used instead of the global debug level if it (the per
  2598. * device debug level) is set.
  2599. */
  2600. static ssize_t il3945_show_debug_level(struct device *d,
  2601. struct device_attribute *attr, char *buf)
  2602. {
  2603. struct il_priv *il = dev_get_drvdata(d);
  2604. return sprintf(buf, "0x%08X\n", il_get_debug_level(il));
  2605. }
  2606. static ssize_t il3945_store_debug_level(struct device *d,
  2607. struct device_attribute *attr,
  2608. const char *buf, size_t count)
  2609. {
  2610. struct il_priv *il = dev_get_drvdata(d);
  2611. unsigned long val;
  2612. int ret;
  2613. ret = strict_strtoul(buf, 0, &val);
  2614. if (ret)
  2615. IL_INFO("%s is not in hex or decimal form.\n", buf);
  2616. else {
  2617. il->debug_level = val;
  2618. if (il_alloc_traffic_mem(il))
  2619. IL_ERR(
  2620. "Not enough memory to generate traffic log\n");
  2621. }
  2622. return strnlen(buf, count);
  2623. }
  2624. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
  2625. il3945_show_debug_level, il3945_store_debug_level);
  2626. #endif /* CONFIG_IWLEGACY_DEBUG */
  2627. static ssize_t il3945_show_temperature(struct device *d,
  2628. struct device_attribute *attr, char *buf)
  2629. {
  2630. struct il_priv *il = dev_get_drvdata(d);
  2631. if (!il_is_alive(il))
  2632. return -EAGAIN;
  2633. return sprintf(buf, "%d\n", il3945_hw_get_temperature(il));
  2634. }
  2635. static DEVICE_ATTR(temperature, S_IRUGO, il3945_show_temperature, NULL);
  2636. static ssize_t il3945_show_tx_power(struct device *d,
  2637. struct device_attribute *attr, char *buf)
  2638. {
  2639. struct il_priv *il = dev_get_drvdata(d);
  2640. return sprintf(buf, "%d\n", il->tx_power_user_lmt);
  2641. }
  2642. static ssize_t il3945_store_tx_power(struct device *d,
  2643. struct device_attribute *attr,
  2644. const char *buf, size_t count)
  2645. {
  2646. struct il_priv *il = dev_get_drvdata(d);
  2647. char *p = (char *)buf;
  2648. u32 val;
  2649. val = simple_strtoul(p, &p, 10);
  2650. if (p == buf)
  2651. IL_INFO(": %s is not in decimal form.\n", buf);
  2652. else
  2653. il3945_hw_reg_set_txpower(il, val);
  2654. return count;
  2655. }
  2656. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, il3945_show_tx_power, il3945_store_tx_power);
  2657. static ssize_t il3945_show_flags(struct device *d,
  2658. struct device_attribute *attr, char *buf)
  2659. {
  2660. struct il_priv *il = dev_get_drvdata(d);
  2661. struct il_rxon_context *ctx = &il->ctx;
  2662. return sprintf(buf, "0x%04X\n", ctx->active.flags);
  2663. }
  2664. static ssize_t il3945_store_flags(struct device *d,
  2665. struct device_attribute *attr,
  2666. const char *buf, size_t count)
  2667. {
  2668. struct il_priv *il = dev_get_drvdata(d);
  2669. u32 flags = simple_strtoul(buf, NULL, 0);
  2670. struct il_rxon_context *ctx = &il->ctx;
  2671. mutex_lock(&il->mutex);
  2672. if (le32_to_cpu(ctx->staging.flags) != flags) {
  2673. /* Cancel any currently running scans... */
  2674. if (il_scan_cancel_timeout(il, 100))
  2675. IL_WARN("Could not cancel scan.\n");
  2676. else {
  2677. D_INFO("Committing rxon.flags = 0x%04X\n",
  2678. flags);
  2679. ctx->staging.flags = cpu_to_le32(flags);
  2680. il3945_commit_rxon(il, ctx);
  2681. }
  2682. }
  2683. mutex_unlock(&il->mutex);
  2684. return count;
  2685. }
  2686. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, il3945_show_flags, il3945_store_flags);
  2687. static ssize_t il3945_show_filter_flags(struct device *d,
  2688. struct device_attribute *attr, char *buf)
  2689. {
  2690. struct il_priv *il = dev_get_drvdata(d);
  2691. struct il_rxon_context *ctx = &il->ctx;
  2692. return sprintf(buf, "0x%04X\n",
  2693. le32_to_cpu(ctx->active.filter_flags));
  2694. }
  2695. static ssize_t il3945_store_filter_flags(struct device *d,
  2696. struct device_attribute *attr,
  2697. const char *buf, size_t count)
  2698. {
  2699. struct il_priv *il = dev_get_drvdata(d);
  2700. struct il_rxon_context *ctx = &il->ctx;
  2701. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  2702. mutex_lock(&il->mutex);
  2703. if (le32_to_cpu(ctx->staging.filter_flags) != filter_flags) {
  2704. /* Cancel any currently running scans... */
  2705. if (il_scan_cancel_timeout(il, 100))
  2706. IL_WARN("Could not cancel scan.\n");
  2707. else {
  2708. D_INFO("Committing rxon.filter_flags = "
  2709. "0x%04X\n", filter_flags);
  2710. ctx->staging.filter_flags =
  2711. cpu_to_le32(filter_flags);
  2712. il3945_commit_rxon(il, ctx);
  2713. }
  2714. }
  2715. mutex_unlock(&il->mutex);
  2716. return count;
  2717. }
  2718. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, il3945_show_filter_flags,
  2719. il3945_store_filter_flags);
  2720. static ssize_t il3945_show_measurement(struct device *d,
  2721. struct device_attribute *attr, char *buf)
  2722. {
  2723. struct il_priv *il = dev_get_drvdata(d);
  2724. struct il_spectrum_notification measure_report;
  2725. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  2726. u8 *data = (u8 *)&measure_report;
  2727. unsigned long flags;
  2728. spin_lock_irqsave(&il->lock, flags);
  2729. if (!(il->measurement_status & MEASUREMENT_READY)) {
  2730. spin_unlock_irqrestore(&il->lock, flags);
  2731. return 0;
  2732. }
  2733. memcpy(&measure_report, &il->measure_report, size);
  2734. il->measurement_status = 0;
  2735. spin_unlock_irqrestore(&il->lock, flags);
  2736. while (size && PAGE_SIZE - len) {
  2737. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  2738. PAGE_SIZE - len, 1);
  2739. len = strlen(buf);
  2740. if (PAGE_SIZE - len)
  2741. buf[len++] = '\n';
  2742. ofs += 16;
  2743. size -= min(size, 16U);
  2744. }
  2745. return len;
  2746. }
  2747. static ssize_t il3945_store_measurement(struct device *d,
  2748. struct device_attribute *attr,
  2749. const char *buf, size_t count)
  2750. {
  2751. struct il_priv *il = dev_get_drvdata(d);
  2752. struct il_rxon_context *ctx = &il->ctx;
  2753. struct ieee80211_measurement_params params = {
  2754. .channel = le16_to_cpu(ctx->active.channel),
  2755. .start_time = cpu_to_le64(il->_3945.last_tsf),
  2756. .duration = cpu_to_le16(1),
  2757. };
  2758. u8 type = IL_MEASURE_BASIC;
  2759. u8 buffer[32];
  2760. u8 channel;
  2761. if (count) {
  2762. char *p = buffer;
  2763. strncpy(buffer, buf, min(sizeof(buffer), count));
  2764. channel = simple_strtoul(p, NULL, 0);
  2765. if (channel)
  2766. params.channel = channel;
  2767. p = buffer;
  2768. while (*p && *p != ' ')
  2769. p++;
  2770. if (*p)
  2771. type = simple_strtoul(p + 1, NULL, 0);
  2772. }
  2773. D_INFO("Invoking measurement of type %d on "
  2774. "channel %d (for '%s')\n", type, params.channel, buf);
  2775. il3945_get_measurement(il, &params, type);
  2776. return count;
  2777. }
  2778. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  2779. il3945_show_measurement, il3945_store_measurement);
  2780. static ssize_t il3945_store_retry_rate(struct device *d,
  2781. struct device_attribute *attr,
  2782. const char *buf, size_t count)
  2783. {
  2784. struct il_priv *il = dev_get_drvdata(d);
  2785. il->retry_rate = simple_strtoul(buf, NULL, 0);
  2786. if (il->retry_rate <= 0)
  2787. il->retry_rate = 1;
  2788. return count;
  2789. }
  2790. static ssize_t il3945_show_retry_rate(struct device *d,
  2791. struct device_attribute *attr, char *buf)
  2792. {
  2793. struct il_priv *il = dev_get_drvdata(d);
  2794. return sprintf(buf, "%d", il->retry_rate);
  2795. }
  2796. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, il3945_show_retry_rate,
  2797. il3945_store_retry_rate);
  2798. static ssize_t il3945_show_channels(struct device *d,
  2799. struct device_attribute *attr, char *buf)
  2800. {
  2801. /* all this shit doesn't belong into sysfs anyway */
  2802. return 0;
  2803. }
  2804. static DEVICE_ATTR(channels, S_IRUSR, il3945_show_channels, NULL);
  2805. static ssize_t il3945_show_antenna(struct device *d,
  2806. struct device_attribute *attr, char *buf)
  2807. {
  2808. struct il_priv *il = dev_get_drvdata(d);
  2809. if (!il_is_alive(il))
  2810. return -EAGAIN;
  2811. return sprintf(buf, "%d\n", il3945_mod_params.antenna);
  2812. }
  2813. static ssize_t il3945_store_antenna(struct device *d,
  2814. struct device_attribute *attr,
  2815. const char *buf, size_t count)
  2816. {
  2817. struct il_priv *il __maybe_unused = dev_get_drvdata(d);
  2818. int ant;
  2819. if (count == 0)
  2820. return 0;
  2821. if (sscanf(buf, "%1i", &ant) != 1) {
  2822. D_INFO("not in hex or decimal form.\n");
  2823. return count;
  2824. }
  2825. if (ant >= 0 && ant <= 2) {
  2826. D_INFO("Setting antenna select to %d.\n", ant);
  2827. il3945_mod_params.antenna = (enum il3945_antenna)ant;
  2828. } else
  2829. D_INFO("Bad antenna select value %d.\n", ant);
  2830. return count;
  2831. }
  2832. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, il3945_show_antenna, il3945_store_antenna);
  2833. static ssize_t il3945_show_status(struct device *d,
  2834. struct device_attribute *attr, char *buf)
  2835. {
  2836. struct il_priv *il = dev_get_drvdata(d);
  2837. if (!il_is_alive(il))
  2838. return -EAGAIN;
  2839. return sprintf(buf, "0x%08x\n", (int)il->status);
  2840. }
  2841. static DEVICE_ATTR(status, S_IRUGO, il3945_show_status, NULL);
  2842. static ssize_t il3945_dump_error_log(struct device *d,
  2843. struct device_attribute *attr,
  2844. const char *buf, size_t count)
  2845. {
  2846. struct il_priv *il = dev_get_drvdata(d);
  2847. char *p = (char *)buf;
  2848. if (p[0] == '1')
  2849. il3945_dump_nic_error_log(il);
  2850. return strnlen(buf, count);
  2851. }
  2852. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, il3945_dump_error_log);
  2853. /*****************************************************************************
  2854. *
  2855. * driver setup and tear down
  2856. *
  2857. *****************************************************************************/
  2858. static void il3945_setup_deferred_work(struct il_priv *il)
  2859. {
  2860. il->workqueue = create_singlethread_workqueue(DRV_NAME);
  2861. init_waitqueue_head(&il->wait_command_queue);
  2862. INIT_WORK(&il->restart, il3945_bg_restart);
  2863. INIT_WORK(&il->rx_replenish, il3945_bg_rx_replenish);
  2864. INIT_DELAYED_WORK(&il->init_alive_start, il3945_bg_init_alive_start);
  2865. INIT_DELAYED_WORK(&il->alive_start, il3945_bg_alive_start);
  2866. INIT_DELAYED_WORK(&il->_3945.rfkill_poll, il3945_rfkill_poll);
  2867. il_setup_scan_deferred_work(il);
  2868. il3945_hw_setup_deferred_work(il);
  2869. init_timer(&il->watchdog);
  2870. il->watchdog.data = (unsigned long)il;
  2871. il->watchdog.function = il_bg_watchdog;
  2872. tasklet_init(&il->irq_tasklet, (void (*)(unsigned long))
  2873. il3945_irq_tasklet, (unsigned long)il);
  2874. }
  2875. static void il3945_cancel_deferred_work(struct il_priv *il)
  2876. {
  2877. il3945_hw_cancel_deferred_work(il);
  2878. cancel_delayed_work_sync(&il->init_alive_start);
  2879. cancel_delayed_work(&il->alive_start);
  2880. il_cancel_scan_deferred_work(il);
  2881. }
  2882. static struct attribute *il3945_sysfs_entries[] = {
  2883. &dev_attr_antenna.attr,
  2884. &dev_attr_channels.attr,
  2885. &dev_attr_dump_errors.attr,
  2886. &dev_attr_flags.attr,
  2887. &dev_attr_filter_flags.attr,
  2888. &dev_attr_measurement.attr,
  2889. &dev_attr_retry_rate.attr,
  2890. &dev_attr_status.attr,
  2891. &dev_attr_temperature.attr,
  2892. &dev_attr_tx_power.attr,
  2893. #ifdef CONFIG_IWLEGACY_DEBUG
  2894. &dev_attr_debug_level.attr,
  2895. #endif
  2896. NULL
  2897. };
  2898. static struct attribute_group il3945_attribute_group = {
  2899. .name = NULL, /* put in device directory */
  2900. .attrs = il3945_sysfs_entries,
  2901. };
  2902. struct ieee80211_ops il3945_hw_ops = {
  2903. .tx = il3945_mac_tx,
  2904. .start = il3945_mac_start,
  2905. .stop = il3945_mac_stop,
  2906. .add_interface = il_mac_add_interface,
  2907. .remove_interface = il_mac_remove_interface,
  2908. .change_interface = il_mac_change_interface,
  2909. .config = il_mac_config,
  2910. .configure_filter = il3945_configure_filter,
  2911. .set_key = il3945_mac_set_key,
  2912. .conf_tx = il_mac_conf_tx,
  2913. .reset_tsf = il_mac_reset_tsf,
  2914. .bss_info_changed = il_mac_bss_info_changed,
  2915. .hw_scan = il_mac_hw_scan,
  2916. .sta_add = il3945_mac_sta_add,
  2917. .sta_remove = il_mac_sta_remove,
  2918. .tx_last_beacon = il_mac_tx_last_beacon,
  2919. };
  2920. static int il3945_init_drv(struct il_priv *il)
  2921. {
  2922. int ret;
  2923. struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
  2924. il->retry_rate = 1;
  2925. il->beacon_skb = NULL;
  2926. spin_lock_init(&il->sta_lock);
  2927. spin_lock_init(&il->hcmd_lock);
  2928. INIT_LIST_HEAD(&il->free_frames);
  2929. mutex_init(&il->mutex);
  2930. il->ieee_channels = NULL;
  2931. il->ieee_rates = NULL;
  2932. il->band = IEEE80211_BAND_2GHZ;
  2933. il->iw_mode = NL80211_IFTYPE_STATION;
  2934. il->missed_beacon_threshold = IL_MISSED_BEACON_THRESHOLD_DEF;
  2935. /* initialize force reset */
  2936. il->force_reset.reset_duration = IL_DELAY_NEXT_FORCE_FW_RELOAD;
  2937. if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
  2938. IL_WARN("Unsupported EEPROM version: 0x%04X\n",
  2939. eeprom->version);
  2940. ret = -EINVAL;
  2941. goto err;
  2942. }
  2943. ret = il_init_channel_map(il);
  2944. if (ret) {
  2945. IL_ERR("initializing regulatory failed: %d\n", ret);
  2946. goto err;
  2947. }
  2948. /* Set up txpower settings in driver for all channels */
  2949. if (il3945_txpower_set_from_eeprom(il)) {
  2950. ret = -EIO;
  2951. goto err_free_channel_map;
  2952. }
  2953. ret = il_init_geos(il);
  2954. if (ret) {
  2955. IL_ERR("initializing geos failed: %d\n", ret);
  2956. goto err_free_channel_map;
  2957. }
  2958. il3945_init_hw_rates(il, il->ieee_rates);
  2959. return 0;
  2960. err_free_channel_map:
  2961. il_free_channel_map(il);
  2962. err:
  2963. return ret;
  2964. }
  2965. #define IL3945_MAX_PROBE_REQUEST 200
  2966. static int il3945_setup_mac(struct il_priv *il)
  2967. {
  2968. int ret;
  2969. struct ieee80211_hw *hw = il->hw;
  2970. hw->rate_control_algorithm = "iwl-3945-rs";
  2971. hw->sta_data_size = sizeof(struct il3945_sta_priv);
  2972. hw->vif_data_size = sizeof(struct il_vif_priv);
  2973. /* Tell mac80211 our characteristics */
  2974. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  2975. IEEE80211_HW_SPECTRUM_MGMT;
  2976. hw->wiphy->interface_modes =
  2977. il->ctx.interface_modes;
  2978. hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
  2979. WIPHY_FLAG_DISABLE_BEACON_HINTS |
  2980. WIPHY_FLAG_IBSS_RSN;
  2981. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
  2982. /* we create the 802.11 header and a zero-length SSID element */
  2983. hw->wiphy->max_scan_ie_len = IL3945_MAX_PROBE_REQUEST - 24 - 2;
  2984. /* Default value; 4 EDCA QOS priorities */
  2985. hw->queues = 4;
  2986. if (il->bands[IEEE80211_BAND_2GHZ].n_channels)
  2987. il->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  2988. &il->bands[IEEE80211_BAND_2GHZ];
  2989. if (il->bands[IEEE80211_BAND_5GHZ].n_channels)
  2990. il->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  2991. &il->bands[IEEE80211_BAND_5GHZ];
  2992. il_leds_init(il);
  2993. ret = ieee80211_register_hw(il->hw);
  2994. if (ret) {
  2995. IL_ERR("Failed to register hw (error %d)\n", ret);
  2996. return ret;
  2997. }
  2998. il->mac80211_registered = 1;
  2999. return 0;
  3000. }
  3001. static int il3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  3002. {
  3003. int err = 0;
  3004. struct il_priv *il;
  3005. struct ieee80211_hw *hw;
  3006. struct il_cfg *cfg = (struct il_cfg *)(ent->driver_data);
  3007. struct il3945_eeprom *eeprom;
  3008. unsigned long flags;
  3009. /***********************
  3010. * 1. Allocating HW data
  3011. * ********************/
  3012. /* mac80211 allocates memory for this device instance, including
  3013. * space for this driver's ilate structure */
  3014. hw = il_alloc_all(cfg);
  3015. if (hw == NULL) {
  3016. pr_err("Can not allocate network device\n");
  3017. err = -ENOMEM;
  3018. goto out;
  3019. }
  3020. il = hw->priv;
  3021. SET_IEEE80211_DEV(hw, &pdev->dev);
  3022. il->cmd_queue = IL39_CMD_QUEUE_NUM;
  3023. il->ctx.ctxid = 0;
  3024. il->ctx.rxon_cmd = C_RXON;
  3025. il->ctx.rxon_timing_cmd = C_RXON_TIMING;
  3026. il->ctx.rxon_assoc_cmd = C_RXON_ASSOC;
  3027. il->ctx.qos_cmd = C_QOS_PARAM;
  3028. il->ctx.ap_sta_id = IL_AP_ID;
  3029. il->ctx.wep_key_cmd = C_WEPKEY;
  3030. il->ctx.interface_modes =
  3031. BIT(NL80211_IFTYPE_STATION) |
  3032. BIT(NL80211_IFTYPE_ADHOC);
  3033. il->ctx.ibss_devtype = RXON_DEV_TYPE_IBSS;
  3034. il->ctx.station_devtype = RXON_DEV_TYPE_ESS;
  3035. il->ctx.unused_devtype = RXON_DEV_TYPE_ESS;
  3036. /*
  3037. * Disabling hardware scan means that mac80211 will perform scans
  3038. * "the hard way", rather than using device's scan.
  3039. */
  3040. if (il3945_mod_params.disable_hw_scan) {
  3041. D_INFO("Disabling hw_scan\n");
  3042. il3945_hw_ops.hw_scan = NULL;
  3043. }
  3044. D_INFO("*** LOAD DRIVER ***\n");
  3045. il->cfg = cfg;
  3046. il->pci_dev = pdev;
  3047. il->inta_mask = CSR_INI_SET_MASK;
  3048. if (il_alloc_traffic_mem(il))
  3049. IL_ERR("Not enough memory to generate traffic log\n");
  3050. /***************************
  3051. * 2. Initializing PCI bus
  3052. * *************************/
  3053. pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
  3054. PCIE_LINK_STATE_CLKPM);
  3055. if (pci_enable_device(pdev)) {
  3056. err = -ENODEV;
  3057. goto out_ieee80211_free_hw;
  3058. }
  3059. pci_set_master(pdev);
  3060. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3061. if (!err)
  3062. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3063. if (err) {
  3064. IL_WARN("No suitable DMA available.\n");
  3065. goto out_pci_disable_device;
  3066. }
  3067. pci_set_drvdata(pdev, il);
  3068. err = pci_request_regions(pdev, DRV_NAME);
  3069. if (err)
  3070. goto out_pci_disable_device;
  3071. /***********************
  3072. * 3. Read REV Register
  3073. * ********************/
  3074. il->hw_base = pci_iomap(pdev, 0, 0);
  3075. if (!il->hw_base) {
  3076. err = -ENODEV;
  3077. goto out_pci_release_regions;
  3078. }
  3079. D_INFO("pci_resource_len = 0x%08llx\n",
  3080. (unsigned long long) pci_resource_len(pdev, 0));
  3081. D_INFO("pci_resource_base = %p\n", il->hw_base);
  3082. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  3083. * PCI Tx retries from interfering with C3 CPU state */
  3084. pci_write_config_byte(pdev, 0x41, 0x00);
  3085. /* these spin locks will be used in apm_ops.init and EEPROM access
  3086. * we should init now
  3087. */
  3088. spin_lock_init(&il->reg_lock);
  3089. spin_lock_init(&il->lock);
  3090. /*
  3091. * stop and reset the on-board processor just in case it is in a
  3092. * strange state ... like being left stranded by a primary kernel
  3093. * and this is now the kdump kernel trying to start up
  3094. */
  3095. _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  3096. /***********************
  3097. * 4. Read EEPROM
  3098. * ********************/
  3099. /* Read the EEPROM */
  3100. err = il_eeprom_init(il);
  3101. if (err) {
  3102. IL_ERR("Unable to init EEPROM\n");
  3103. goto out_iounmap;
  3104. }
  3105. /* MAC Address location in EEPROM same for 3945/4965 */
  3106. eeprom = (struct il3945_eeprom *)il->eeprom;
  3107. D_INFO("MAC address: %pM\n", eeprom->mac_address);
  3108. SET_IEEE80211_PERM_ADDR(il->hw, eeprom->mac_address);
  3109. /***********************
  3110. * 5. Setup HW Constants
  3111. * ********************/
  3112. /* Device-specific setup */
  3113. if (il3945_hw_set_hw_params(il)) {
  3114. IL_ERR("failed to set hw settings\n");
  3115. goto out_eeprom_free;
  3116. }
  3117. /***********************
  3118. * 6. Setup il
  3119. * ********************/
  3120. err = il3945_init_drv(il);
  3121. if (err) {
  3122. IL_ERR("initializing driver failed\n");
  3123. goto out_unset_hw_params;
  3124. }
  3125. IL_INFO("Detected Intel Wireless WiFi Link %s\n",
  3126. il->cfg->name);
  3127. /***********************
  3128. * 7. Setup Services
  3129. * ********************/
  3130. spin_lock_irqsave(&il->lock, flags);
  3131. il_disable_interrupts(il);
  3132. spin_unlock_irqrestore(&il->lock, flags);
  3133. pci_enable_msi(il->pci_dev);
  3134. err = request_irq(il->pci_dev->irq, il_isr,
  3135. IRQF_SHARED, DRV_NAME, il);
  3136. if (err) {
  3137. IL_ERR("Error allocating IRQ %d\n", il->pci_dev->irq);
  3138. goto out_disable_msi;
  3139. }
  3140. err = sysfs_create_group(&pdev->dev.kobj, &il3945_attribute_group);
  3141. if (err) {
  3142. IL_ERR("failed to create sysfs device attributes\n");
  3143. goto out_release_irq;
  3144. }
  3145. il_set_rxon_channel(il,
  3146. &il->bands[IEEE80211_BAND_2GHZ].channels[5],
  3147. &il->ctx);
  3148. il3945_setup_deferred_work(il);
  3149. il3945_setup_handlers(il);
  3150. il_power_initialize(il);
  3151. /*********************************
  3152. * 8. Setup and Register mac80211
  3153. * *******************************/
  3154. il_enable_interrupts(il);
  3155. err = il3945_setup_mac(il);
  3156. if (err)
  3157. goto out_remove_sysfs;
  3158. err = il_dbgfs_register(il, DRV_NAME);
  3159. if (err)
  3160. IL_ERR("failed to create debugfs files. Ignoring error: %d\n", err);
  3161. /* Start monitoring the killswitch */
  3162. queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
  3163. 2 * HZ);
  3164. return 0;
  3165. out_remove_sysfs:
  3166. destroy_workqueue(il->workqueue);
  3167. il->workqueue = NULL;
  3168. sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
  3169. out_release_irq:
  3170. free_irq(il->pci_dev->irq, il);
  3171. out_disable_msi:
  3172. pci_disable_msi(il->pci_dev);
  3173. il_free_geos(il);
  3174. il_free_channel_map(il);
  3175. out_unset_hw_params:
  3176. il3945_unset_hw_params(il);
  3177. out_eeprom_free:
  3178. il_eeprom_free(il);
  3179. out_iounmap:
  3180. pci_iounmap(pdev, il->hw_base);
  3181. out_pci_release_regions:
  3182. pci_release_regions(pdev);
  3183. out_pci_disable_device:
  3184. pci_set_drvdata(pdev, NULL);
  3185. pci_disable_device(pdev);
  3186. out_ieee80211_free_hw:
  3187. il_free_traffic_mem(il);
  3188. ieee80211_free_hw(il->hw);
  3189. out:
  3190. return err;
  3191. }
  3192. static void __devexit il3945_pci_remove(struct pci_dev *pdev)
  3193. {
  3194. struct il_priv *il = pci_get_drvdata(pdev);
  3195. unsigned long flags;
  3196. if (!il)
  3197. return;
  3198. D_INFO("*** UNLOAD DRIVER ***\n");
  3199. il_dbgfs_unregister(il);
  3200. set_bit(S_EXIT_PENDING, &il->status);
  3201. il_leds_exit(il);
  3202. if (il->mac80211_registered) {
  3203. ieee80211_unregister_hw(il->hw);
  3204. il->mac80211_registered = 0;
  3205. } else {
  3206. il3945_down(il);
  3207. }
  3208. /*
  3209. * Make sure device is reset to low power before unloading driver.
  3210. * This may be redundant with il_down(), but there are paths to
  3211. * run il_down() without calling apm_ops.stop(), and there are
  3212. * paths to avoid running il_down() at all before leaving driver.
  3213. * This (inexpensive) call *makes sure* device is reset.
  3214. */
  3215. il_apm_stop(il);
  3216. /* make sure we flush any pending irq or
  3217. * tasklet for the driver
  3218. */
  3219. spin_lock_irqsave(&il->lock, flags);
  3220. il_disable_interrupts(il);
  3221. spin_unlock_irqrestore(&il->lock, flags);
  3222. il3945_synchronize_irq(il);
  3223. sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
  3224. cancel_delayed_work_sync(&il->_3945.rfkill_poll);
  3225. il3945_dealloc_ucode_pci(il);
  3226. if (il->rxq.bd)
  3227. il3945_rx_queue_free(il, &il->rxq);
  3228. il3945_hw_txq_ctx_free(il);
  3229. il3945_unset_hw_params(il);
  3230. /*netif_stop_queue(dev); */
  3231. flush_workqueue(il->workqueue);
  3232. /* ieee80211_unregister_hw calls il3945_mac_stop, which flushes
  3233. * il->workqueue... so we can't take down the workqueue
  3234. * until now... */
  3235. destroy_workqueue(il->workqueue);
  3236. il->workqueue = NULL;
  3237. il_free_traffic_mem(il);
  3238. free_irq(pdev->irq, il);
  3239. pci_disable_msi(pdev);
  3240. pci_iounmap(pdev, il->hw_base);
  3241. pci_release_regions(pdev);
  3242. pci_disable_device(pdev);
  3243. pci_set_drvdata(pdev, NULL);
  3244. il_free_channel_map(il);
  3245. il_free_geos(il);
  3246. kfree(il->scan_cmd);
  3247. if (il->beacon_skb)
  3248. dev_kfree_skb(il->beacon_skb);
  3249. ieee80211_free_hw(il->hw);
  3250. }
  3251. /*****************************************************************************
  3252. *
  3253. * driver and module entry point
  3254. *
  3255. *****************************************************************************/
  3256. static struct pci_driver il3945_driver = {
  3257. .name = DRV_NAME,
  3258. .id_table = il3945_hw_card_ids,
  3259. .probe = il3945_pci_probe,
  3260. .remove = __devexit_p(il3945_pci_remove),
  3261. .driver.pm = IL_LEGACY_PM_OPS,
  3262. };
  3263. static int __init il3945_init(void)
  3264. {
  3265. int ret;
  3266. pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
  3267. pr_info(DRV_COPYRIGHT "\n");
  3268. ret = il3945_rate_control_register();
  3269. if (ret) {
  3270. pr_err("Unable to register rate control algorithm: %d\n", ret);
  3271. return ret;
  3272. }
  3273. ret = pci_register_driver(&il3945_driver);
  3274. if (ret) {
  3275. pr_err("Unable to initialize PCI module\n");
  3276. goto error_register;
  3277. }
  3278. return ret;
  3279. error_register:
  3280. il3945_rate_control_unregister();
  3281. return ret;
  3282. }
  3283. static void __exit il3945_exit(void)
  3284. {
  3285. pci_unregister_driver(&il3945_driver);
  3286. il3945_rate_control_unregister();
  3287. }
  3288. MODULE_FIRMWARE(IL3945_MODULE_FIRMWARE(IL3945_UCODE_API_MAX));
  3289. module_param_named(antenna, il3945_mod_params.antenna, int, S_IRUGO);
  3290. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  3291. module_param_named(swcrypto, il3945_mod_params.sw_crypto, int, S_IRUGO);
  3292. MODULE_PARM_DESC(swcrypto,
  3293. "using software crypto (default 1 [software])");
  3294. module_param_named(disable_hw_scan, il3945_mod_params.disable_hw_scan,
  3295. int, S_IRUGO);
  3296. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 1)");
  3297. #ifdef CONFIG_IWLEGACY_DEBUG
  3298. module_param_named(debug, il_debug_level, uint, S_IRUGO | S_IWUSR);
  3299. MODULE_PARM_DESC(debug, "debug output mask");
  3300. #endif
  3301. module_param_named(fw_restart, il3945_mod_params.restart_fw, int, S_IRUGO);
  3302. MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
  3303. module_exit(il3945_exit);
  3304. module_init(il3945_init);