devices.c 17 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719
  1. /*
  2. * linux/arch/arm/mach-omap2/devices.c
  3. *
  4. * OMAP2 platform device setup/initialization
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/init.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/io.h>
  15. #include <linux/clk.h>
  16. #include <linux/err.h>
  17. #include <linux/slab.h>
  18. #include <mach/hardware.h>
  19. #include <mach/irqs.h>
  20. #include <asm/mach-types.h>
  21. #include <asm/mach/map.h>
  22. #include <asm/pmu.h>
  23. #include <plat/tc.h>
  24. #include <plat/board.h>
  25. #include <plat/mcbsp.h>
  26. #include <mach/gpio.h>
  27. #include <plat/mmc.h>
  28. #include <plat/dma.h>
  29. #include <plat/omap_hwmod.h>
  30. #include <plat/omap_device.h>
  31. #include <plat/omap4-keypad.h>
  32. #include "mux.h"
  33. #include "control.h"
  34. #define L3_MODULES_MAX_LEN 12
  35. #define L3_MODULES 3
  36. static int __init omap3_l3_init(void)
  37. {
  38. int l;
  39. struct omap_hwmod *oh;
  40. struct omap_device *od;
  41. char oh_name[L3_MODULES_MAX_LEN];
  42. /*
  43. * To avoid code running on other OMAPs in
  44. * multi-omap builds
  45. */
  46. if (!(cpu_is_omap34xx()))
  47. return -ENODEV;
  48. l = snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main");
  49. oh = omap_hwmod_lookup(oh_name);
  50. if (!oh)
  51. pr_err("could not look up %s\n", oh_name);
  52. od = omap_device_build("omap_l3_smx", 0, oh, NULL, 0,
  53. NULL, 0, 0);
  54. WARN(IS_ERR(od), "could not build omap_device for %s\n", oh_name);
  55. return PTR_ERR(od);
  56. }
  57. postcore_initcall(omap3_l3_init);
  58. static int __init omap4_l3_init(void)
  59. {
  60. int l, i;
  61. struct omap_hwmod *oh[3];
  62. struct omap_device *od;
  63. char oh_name[L3_MODULES_MAX_LEN];
  64. /*
  65. * To avoid code running on other OMAPs in
  66. * multi-omap builds
  67. */
  68. if (!(cpu_is_omap44xx()))
  69. return -ENODEV;
  70. for (i = 0; i < L3_MODULES; i++) {
  71. l = snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main_%d", i+1);
  72. oh[i] = omap_hwmod_lookup(oh_name);
  73. if (!(oh[i]))
  74. pr_err("could not look up %s\n", oh_name);
  75. }
  76. od = omap_device_build_ss("omap_l3_noc", 0, oh, 3, NULL,
  77. 0, NULL, 0, 0);
  78. WARN(IS_ERR(od), "could not build omap_device for %s\n", oh_name);
  79. return PTR_ERR(od);
  80. }
  81. postcore_initcall(omap4_l3_init);
  82. #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
  83. static struct resource cam_resources[] = {
  84. {
  85. .start = OMAP24XX_CAMERA_BASE,
  86. .end = OMAP24XX_CAMERA_BASE + 0xfff,
  87. .flags = IORESOURCE_MEM,
  88. },
  89. {
  90. .start = INT_24XX_CAM_IRQ,
  91. .flags = IORESOURCE_IRQ,
  92. }
  93. };
  94. static struct platform_device omap_cam_device = {
  95. .name = "omap24xxcam",
  96. .id = -1,
  97. .num_resources = ARRAY_SIZE(cam_resources),
  98. .resource = cam_resources,
  99. };
  100. static inline void omap_init_camera(void)
  101. {
  102. platform_device_register(&omap_cam_device);
  103. }
  104. #elif defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE)
  105. static struct resource omap3isp_resources[] = {
  106. {
  107. .start = OMAP3430_ISP_BASE,
  108. .end = OMAP3430_ISP_END,
  109. .flags = IORESOURCE_MEM,
  110. },
  111. {
  112. .start = OMAP3430_ISP_CBUFF_BASE,
  113. .end = OMAP3430_ISP_CBUFF_END,
  114. .flags = IORESOURCE_MEM,
  115. },
  116. {
  117. .start = OMAP3430_ISP_CCP2_BASE,
  118. .end = OMAP3430_ISP_CCP2_END,
  119. .flags = IORESOURCE_MEM,
  120. },
  121. {
  122. .start = OMAP3430_ISP_CCDC_BASE,
  123. .end = OMAP3430_ISP_CCDC_END,
  124. .flags = IORESOURCE_MEM,
  125. },
  126. {
  127. .start = OMAP3430_ISP_HIST_BASE,
  128. .end = OMAP3430_ISP_HIST_END,
  129. .flags = IORESOURCE_MEM,
  130. },
  131. {
  132. .start = OMAP3430_ISP_H3A_BASE,
  133. .end = OMAP3430_ISP_H3A_END,
  134. .flags = IORESOURCE_MEM,
  135. },
  136. {
  137. .start = OMAP3430_ISP_PREV_BASE,
  138. .end = OMAP3430_ISP_PREV_END,
  139. .flags = IORESOURCE_MEM,
  140. },
  141. {
  142. .start = OMAP3430_ISP_RESZ_BASE,
  143. .end = OMAP3430_ISP_RESZ_END,
  144. .flags = IORESOURCE_MEM,
  145. },
  146. {
  147. .start = OMAP3430_ISP_SBL_BASE,
  148. .end = OMAP3430_ISP_SBL_END,
  149. .flags = IORESOURCE_MEM,
  150. },
  151. {
  152. .start = OMAP3430_ISP_CSI2A_BASE,
  153. .end = OMAP3430_ISP_CSI2A_END,
  154. .flags = IORESOURCE_MEM,
  155. },
  156. {
  157. .start = OMAP3430_ISP_CSI2PHY_BASE,
  158. .end = OMAP3430_ISP_CSI2PHY_END,
  159. .flags = IORESOURCE_MEM,
  160. },
  161. {
  162. .start = INT_34XX_CAM_IRQ,
  163. .flags = IORESOURCE_IRQ,
  164. }
  165. };
  166. static struct platform_device omap3isp_device = {
  167. .name = "omap3isp",
  168. .id = -1,
  169. .num_resources = ARRAY_SIZE(omap3isp_resources),
  170. .resource = omap3isp_resources,
  171. };
  172. static inline void omap_init_camera(void)
  173. {
  174. platform_device_register(&omap3isp_device);
  175. }
  176. #else
  177. static inline void omap_init_camera(void)
  178. {
  179. }
  180. #endif
  181. struct omap_device_pm_latency omap_keyboard_latency[] = {
  182. {
  183. .deactivate_func = omap_device_idle_hwmods,
  184. .activate_func = omap_device_enable_hwmods,
  185. .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
  186. },
  187. };
  188. int __init omap4_keyboard_init(struct omap4_keypad_platform_data
  189. *sdp4430_keypad_data)
  190. {
  191. struct omap_device *od;
  192. struct omap_hwmod *oh;
  193. struct omap4_keypad_platform_data *keypad_data;
  194. unsigned int id = -1;
  195. char *oh_name = "kbd";
  196. char *name = "omap4-keypad";
  197. oh = omap_hwmod_lookup(oh_name);
  198. if (!oh) {
  199. pr_err("Could not look up %s\n", oh_name);
  200. return -ENODEV;
  201. }
  202. keypad_data = sdp4430_keypad_data;
  203. od = omap_device_build(name, id, oh, keypad_data,
  204. sizeof(struct omap4_keypad_platform_data),
  205. omap_keyboard_latency,
  206. ARRAY_SIZE(omap_keyboard_latency), 0);
  207. if (IS_ERR(od)) {
  208. WARN(1, "Cant build omap_device for %s:%s.\n",
  209. name, oh->name);
  210. return PTR_ERR(od);
  211. }
  212. return 0;
  213. }
  214. #if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE)
  215. static struct omap_device_pm_latency mbox_latencies[] = {
  216. [0] = {
  217. .activate_func = omap_device_enable_hwmods,
  218. .deactivate_func = omap_device_idle_hwmods,
  219. .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
  220. },
  221. };
  222. static inline void omap_init_mbox(void)
  223. {
  224. struct omap_hwmod *oh;
  225. struct omap_device *od;
  226. oh = omap_hwmod_lookup("mailbox");
  227. if (!oh) {
  228. pr_err("%s: unable to find hwmod\n", __func__);
  229. return;
  230. }
  231. od = omap_device_build("omap-mailbox", -1, oh, NULL, 0,
  232. mbox_latencies, ARRAY_SIZE(mbox_latencies), 0);
  233. WARN(IS_ERR(od), "%s: could not build device, err %ld\n",
  234. __func__, PTR_ERR(od));
  235. }
  236. #else
  237. static inline void omap_init_mbox(void) { }
  238. #endif /* CONFIG_OMAP_MBOX_FWK */
  239. static inline void omap_init_sti(void) {}
  240. #if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)
  241. static struct platform_device omap_pcm = {
  242. .name = "omap-pcm-audio",
  243. .id = -1,
  244. };
  245. /*
  246. * OMAP2420 has 2 McBSP ports
  247. * OMAP2430 has 5 McBSP ports
  248. * OMAP3 has 5 McBSP ports
  249. * OMAP4 has 4 McBSP ports
  250. */
  251. OMAP_MCBSP_PLATFORM_DEVICE(1);
  252. OMAP_MCBSP_PLATFORM_DEVICE(2);
  253. OMAP_MCBSP_PLATFORM_DEVICE(3);
  254. OMAP_MCBSP_PLATFORM_DEVICE(4);
  255. OMAP_MCBSP_PLATFORM_DEVICE(5);
  256. static void omap_init_audio(void)
  257. {
  258. platform_device_register(&omap_mcbsp1);
  259. platform_device_register(&omap_mcbsp2);
  260. if (cpu_is_omap243x() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
  261. platform_device_register(&omap_mcbsp3);
  262. platform_device_register(&omap_mcbsp4);
  263. }
  264. if (cpu_is_omap243x() || cpu_is_omap34xx())
  265. platform_device_register(&omap_mcbsp5);
  266. platform_device_register(&omap_pcm);
  267. }
  268. #else
  269. static inline void omap_init_audio(void) {}
  270. #endif
  271. #if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
  272. #include <plat/mcspi.h>
  273. struct omap_device_pm_latency omap_mcspi_latency[] = {
  274. [0] = {
  275. .deactivate_func = omap_device_idle_hwmods,
  276. .activate_func = omap_device_enable_hwmods,
  277. .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
  278. },
  279. };
  280. static int omap_mcspi_init(struct omap_hwmod *oh, void *unused)
  281. {
  282. struct omap_device *od;
  283. char *name = "omap2_mcspi";
  284. struct omap2_mcspi_platform_config *pdata;
  285. static int spi_num;
  286. struct omap2_mcspi_dev_attr *mcspi_attrib = oh->dev_attr;
  287. pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
  288. if (!pdata) {
  289. pr_err("Memory allocation for McSPI device failed\n");
  290. return -ENOMEM;
  291. }
  292. pdata->num_cs = mcspi_attrib->num_chipselect;
  293. switch (oh->class->rev) {
  294. case OMAP2_MCSPI_REV:
  295. case OMAP3_MCSPI_REV:
  296. pdata->regs_offset = 0;
  297. break;
  298. case OMAP4_MCSPI_REV:
  299. pdata->regs_offset = OMAP4_MCSPI_REG_OFFSET;
  300. break;
  301. default:
  302. pr_err("Invalid McSPI Revision value\n");
  303. return -EINVAL;
  304. }
  305. spi_num++;
  306. od = omap_device_build(name, spi_num, oh, pdata,
  307. sizeof(*pdata), omap_mcspi_latency,
  308. ARRAY_SIZE(omap_mcspi_latency), 0);
  309. WARN(IS_ERR(od), "Cant build omap_device for %s:%s\n",
  310. name, oh->name);
  311. kfree(pdata);
  312. return 0;
  313. }
  314. static void omap_init_mcspi(void)
  315. {
  316. omap_hwmod_for_each_by_class("mcspi", omap_mcspi_init, NULL);
  317. }
  318. #else
  319. static inline void omap_init_mcspi(void) {}
  320. #endif
  321. static struct resource omap2_pmu_resource = {
  322. .start = 3,
  323. .end = 3,
  324. .flags = IORESOURCE_IRQ,
  325. };
  326. static struct resource omap3_pmu_resource = {
  327. .start = INT_34XX_BENCH_MPU_EMUL,
  328. .end = INT_34XX_BENCH_MPU_EMUL,
  329. .flags = IORESOURCE_IRQ,
  330. };
  331. static struct platform_device omap_pmu_device = {
  332. .name = "arm-pmu",
  333. .id = ARM_PMU_DEVICE_CPU,
  334. .num_resources = 1,
  335. };
  336. static void omap_init_pmu(void)
  337. {
  338. if (cpu_is_omap24xx())
  339. omap_pmu_device.resource = &omap2_pmu_resource;
  340. else if (cpu_is_omap34xx())
  341. omap_pmu_device.resource = &omap3_pmu_resource;
  342. else
  343. return;
  344. platform_device_register(&omap_pmu_device);
  345. }
  346. #if defined(CONFIG_CRYPTO_DEV_OMAP_SHAM) || defined(CONFIG_CRYPTO_DEV_OMAP_SHAM_MODULE)
  347. #ifdef CONFIG_ARCH_OMAP2
  348. static struct resource omap2_sham_resources[] = {
  349. {
  350. .start = OMAP24XX_SEC_SHA1MD5_BASE,
  351. .end = OMAP24XX_SEC_SHA1MD5_BASE + 0x64,
  352. .flags = IORESOURCE_MEM,
  353. },
  354. {
  355. .start = INT_24XX_SHA1MD5,
  356. .flags = IORESOURCE_IRQ,
  357. }
  358. };
  359. static int omap2_sham_resources_sz = ARRAY_SIZE(omap2_sham_resources);
  360. #else
  361. #define omap2_sham_resources NULL
  362. #define omap2_sham_resources_sz 0
  363. #endif
  364. #ifdef CONFIG_ARCH_OMAP3
  365. static struct resource omap3_sham_resources[] = {
  366. {
  367. .start = OMAP34XX_SEC_SHA1MD5_BASE,
  368. .end = OMAP34XX_SEC_SHA1MD5_BASE + 0x64,
  369. .flags = IORESOURCE_MEM,
  370. },
  371. {
  372. .start = INT_34XX_SHA1MD52_IRQ,
  373. .flags = IORESOURCE_IRQ,
  374. },
  375. {
  376. .start = OMAP34XX_DMA_SHA1MD5_RX,
  377. .flags = IORESOURCE_DMA,
  378. }
  379. };
  380. static int omap3_sham_resources_sz = ARRAY_SIZE(omap3_sham_resources);
  381. #else
  382. #define omap3_sham_resources NULL
  383. #define omap3_sham_resources_sz 0
  384. #endif
  385. static struct platform_device sham_device = {
  386. .name = "omap-sham",
  387. .id = -1,
  388. };
  389. static void omap_init_sham(void)
  390. {
  391. if (cpu_is_omap24xx()) {
  392. sham_device.resource = omap2_sham_resources;
  393. sham_device.num_resources = omap2_sham_resources_sz;
  394. } else if (cpu_is_omap34xx()) {
  395. sham_device.resource = omap3_sham_resources;
  396. sham_device.num_resources = omap3_sham_resources_sz;
  397. } else {
  398. pr_err("%s: platform not supported\n", __func__);
  399. return;
  400. }
  401. platform_device_register(&sham_device);
  402. }
  403. #else
  404. static inline void omap_init_sham(void) { }
  405. #endif
  406. #if defined(CONFIG_CRYPTO_DEV_OMAP_AES) || defined(CONFIG_CRYPTO_DEV_OMAP_AES_MODULE)
  407. #ifdef CONFIG_ARCH_OMAP2
  408. static struct resource omap2_aes_resources[] = {
  409. {
  410. .start = OMAP24XX_SEC_AES_BASE,
  411. .end = OMAP24XX_SEC_AES_BASE + 0x4C,
  412. .flags = IORESOURCE_MEM,
  413. },
  414. {
  415. .start = OMAP24XX_DMA_AES_TX,
  416. .flags = IORESOURCE_DMA,
  417. },
  418. {
  419. .start = OMAP24XX_DMA_AES_RX,
  420. .flags = IORESOURCE_DMA,
  421. }
  422. };
  423. static int omap2_aes_resources_sz = ARRAY_SIZE(omap2_aes_resources);
  424. #else
  425. #define omap2_aes_resources NULL
  426. #define omap2_aes_resources_sz 0
  427. #endif
  428. #ifdef CONFIG_ARCH_OMAP3
  429. static struct resource omap3_aes_resources[] = {
  430. {
  431. .start = OMAP34XX_SEC_AES_BASE,
  432. .end = OMAP34XX_SEC_AES_BASE + 0x4C,
  433. .flags = IORESOURCE_MEM,
  434. },
  435. {
  436. .start = OMAP34XX_DMA_AES2_TX,
  437. .flags = IORESOURCE_DMA,
  438. },
  439. {
  440. .start = OMAP34XX_DMA_AES2_RX,
  441. .flags = IORESOURCE_DMA,
  442. }
  443. };
  444. static int omap3_aes_resources_sz = ARRAY_SIZE(omap3_aes_resources);
  445. #else
  446. #define omap3_aes_resources NULL
  447. #define omap3_aes_resources_sz 0
  448. #endif
  449. static struct platform_device aes_device = {
  450. .name = "omap-aes",
  451. .id = -1,
  452. };
  453. static void omap_init_aes(void)
  454. {
  455. if (cpu_is_omap24xx()) {
  456. aes_device.resource = omap2_aes_resources;
  457. aes_device.num_resources = omap2_aes_resources_sz;
  458. } else if (cpu_is_omap34xx()) {
  459. aes_device.resource = omap3_aes_resources;
  460. aes_device.num_resources = omap3_aes_resources_sz;
  461. } else {
  462. pr_err("%s: platform not supported\n", __func__);
  463. return;
  464. }
  465. platform_device_register(&aes_device);
  466. }
  467. #else
  468. static inline void omap_init_aes(void) { }
  469. #endif
  470. /*-------------------------------------------------------------------------*/
  471. #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
  472. static inline void omap242x_mmc_mux(struct omap_mmc_platform_data
  473. *mmc_controller)
  474. {
  475. if ((mmc_controller->slots[0].switch_pin > 0) && \
  476. (mmc_controller->slots[0].switch_pin < OMAP_MAX_GPIO_LINES))
  477. omap_mux_init_gpio(mmc_controller->slots[0].switch_pin,
  478. OMAP_PIN_INPUT_PULLUP);
  479. if ((mmc_controller->slots[0].gpio_wp > 0) && \
  480. (mmc_controller->slots[0].gpio_wp < OMAP_MAX_GPIO_LINES))
  481. omap_mux_init_gpio(mmc_controller->slots[0].gpio_wp,
  482. OMAP_PIN_INPUT_PULLUP);
  483. omap_mux_init_signal("sdmmc_cmd", 0);
  484. omap_mux_init_signal("sdmmc_clki", 0);
  485. omap_mux_init_signal("sdmmc_clko", 0);
  486. omap_mux_init_signal("sdmmc_dat0", 0);
  487. omap_mux_init_signal("sdmmc_dat_dir0", 0);
  488. omap_mux_init_signal("sdmmc_cmd_dir", 0);
  489. if (mmc_controller->slots[0].caps & MMC_CAP_4_BIT_DATA) {
  490. omap_mux_init_signal("sdmmc_dat1", 0);
  491. omap_mux_init_signal("sdmmc_dat2", 0);
  492. omap_mux_init_signal("sdmmc_dat3", 0);
  493. omap_mux_init_signal("sdmmc_dat_dir1", 0);
  494. omap_mux_init_signal("sdmmc_dat_dir2", 0);
  495. omap_mux_init_signal("sdmmc_dat_dir3", 0);
  496. }
  497. /*
  498. * Use internal loop-back in MMC/SDIO Module Input Clock
  499. * selection
  500. */
  501. if (mmc_controller->slots[0].internal_clock) {
  502. u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
  503. v |= (1 << 24);
  504. omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
  505. }
  506. }
  507. void __init omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)
  508. {
  509. char *name = "mmci-omap";
  510. if (!mmc_data[0]) {
  511. pr_err("%s fails: Incomplete platform data\n", __func__);
  512. return;
  513. }
  514. omap242x_mmc_mux(mmc_data[0]);
  515. omap_mmc_add(name, 0, OMAP2_MMC1_BASE, OMAP2420_MMC_SIZE,
  516. INT_24XX_MMC_IRQ, mmc_data[0]);
  517. }
  518. #endif
  519. /*-------------------------------------------------------------------------*/
  520. #if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE)
  521. #if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_SOC_OMAP3430)
  522. #define OMAP_HDQ_BASE 0x480B2000
  523. #endif
  524. static struct resource omap_hdq_resources[] = {
  525. {
  526. .start = OMAP_HDQ_BASE,
  527. .end = OMAP_HDQ_BASE + 0x1C,
  528. .flags = IORESOURCE_MEM,
  529. },
  530. {
  531. .start = INT_24XX_HDQ_IRQ,
  532. .flags = IORESOURCE_IRQ,
  533. },
  534. };
  535. static struct platform_device omap_hdq_dev = {
  536. .name = "omap_hdq",
  537. .id = 0,
  538. .dev = {
  539. .platform_data = NULL,
  540. },
  541. .num_resources = ARRAY_SIZE(omap_hdq_resources),
  542. .resource = omap_hdq_resources,
  543. };
  544. static inline void omap_hdq_init(void)
  545. {
  546. (void) platform_device_register(&omap_hdq_dev);
  547. }
  548. #else
  549. static inline void omap_hdq_init(void) {}
  550. #endif
  551. /*---------------------------------------------------------------------------*/
  552. #if defined(CONFIG_VIDEO_OMAP2_VOUT) || \
  553. defined(CONFIG_VIDEO_OMAP2_VOUT_MODULE)
  554. #if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
  555. static struct resource omap_vout_resource[3 - CONFIG_FB_OMAP2_NUM_FBS] = {
  556. };
  557. #else
  558. static struct resource omap_vout_resource[2] = {
  559. };
  560. #endif
  561. static struct platform_device omap_vout_device = {
  562. .name = "omap_vout",
  563. .num_resources = ARRAY_SIZE(omap_vout_resource),
  564. .resource = &omap_vout_resource[0],
  565. .id = -1,
  566. };
  567. static void omap_init_vout(void)
  568. {
  569. if (platform_device_register(&omap_vout_device) < 0)
  570. printk(KERN_ERR "Unable to register OMAP-VOUT device\n");
  571. }
  572. #else
  573. static inline void omap_init_vout(void) {}
  574. #endif
  575. /*-------------------------------------------------------------------------*/
  576. static int __init omap2_init_devices(void)
  577. {
  578. /*
  579. * please keep these calls, and their implementations above,
  580. * in alphabetical order so they're easier to sort through.
  581. */
  582. omap_init_audio();
  583. omap_init_camera();
  584. omap_init_mbox();
  585. omap_init_mcspi();
  586. omap_init_pmu();
  587. omap_hdq_init();
  588. omap_init_sti();
  589. omap_init_sham();
  590. omap_init_aes();
  591. omap_init_vout();
  592. return 0;
  593. }
  594. arch_initcall(omap2_init_devices);
  595. #if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
  596. static struct omap_device_pm_latency omap_wdt_latency[] = {
  597. [0] = {
  598. .deactivate_func = omap_device_idle_hwmods,
  599. .activate_func = omap_device_enable_hwmods,
  600. .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
  601. },
  602. };
  603. static int __init omap_init_wdt(void)
  604. {
  605. int id = -1;
  606. struct omap_device *od;
  607. struct omap_hwmod *oh;
  608. char *oh_name = "wd_timer2";
  609. char *dev_name = "omap_wdt";
  610. if (!cpu_class_is_omap2())
  611. return 0;
  612. oh = omap_hwmod_lookup(oh_name);
  613. if (!oh) {
  614. pr_err("Could not look up wd_timer%d hwmod\n", id);
  615. return -EINVAL;
  616. }
  617. od = omap_device_build(dev_name, id, oh, NULL, 0,
  618. omap_wdt_latency,
  619. ARRAY_SIZE(omap_wdt_latency), 0);
  620. WARN(IS_ERR(od), "Cant build omap_device for %s:%s.\n",
  621. dev_name, oh->name);
  622. return 0;
  623. }
  624. subsys_initcall(omap_init_wdt);
  625. #endif