board-3430sdp.c 22 KB

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  1. /*
  2. * linux/arch/arm/mach-omap2/board-3430sdp.c
  3. *
  4. * Copyright (C) 2007 Texas Instruments
  5. *
  6. * Modified from mach-omap2/board-generic.c
  7. *
  8. * Initial code: Syed Mohammed Khasim
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/delay.h>
  18. #include <linux/input.h>
  19. #include <linux/input/matrix_keypad.h>
  20. #include <linux/spi/spi.h>
  21. #include <linux/spi/ads7846.h>
  22. #include <linux/i2c/twl.h>
  23. #include <linux/regulator/machine.h>
  24. #include <linux/io.h>
  25. #include <linux/gpio.h>
  26. #include <linux/mmc/host.h>
  27. #include <mach/hardware.h>
  28. #include <asm/mach-types.h>
  29. #include <asm/mach/arch.h>
  30. #include <asm/mach/map.h>
  31. #include <plat/mcspi.h>
  32. #include <plat/board.h>
  33. #include <plat/usb.h>
  34. #include <plat/common.h>
  35. #include <plat/dma.h>
  36. #include <plat/gpmc.h>
  37. #include <plat/display.h>
  38. #include <plat/panel-generic-dpi.h>
  39. #include <plat/gpmc-smc91x.h>
  40. #include "board-flash.h"
  41. #include "mux.h"
  42. #include "sdram-qimonda-hyb18m512160af-6.h"
  43. #include "hsmmc.h"
  44. #include "pm.h"
  45. #include "control.h"
  46. #define CONFIG_DISABLE_HFCLK 1
  47. #define SDP3430_TS_GPIO_IRQ_SDPV1 3
  48. #define SDP3430_TS_GPIO_IRQ_SDPV2 2
  49. #define ENABLE_VAUX3_DEDICATED 0x03
  50. #define ENABLE_VAUX3_DEV_GRP 0x20
  51. #define TWL4030_MSECURE_GPIO 22
  52. /* FIXME: These values need to be updated based on more profiling on 3430sdp*/
  53. static struct cpuidle_params omap3_cpuidle_params_table[] = {
  54. /* C1 */
  55. {1, 2, 2, 5},
  56. /* C2 */
  57. {1, 10, 10, 30},
  58. /* C3 */
  59. {1, 50, 50, 300},
  60. /* C4 */
  61. {1, 1500, 1800, 4000},
  62. /* C5 */
  63. {1, 2500, 7500, 12000},
  64. /* C6 */
  65. {1, 3000, 8500, 15000},
  66. /* C7 */
  67. {1, 10000, 30000, 300000},
  68. };
  69. static uint32_t board_keymap[] = {
  70. KEY(0, 0, KEY_LEFT),
  71. KEY(0, 1, KEY_RIGHT),
  72. KEY(0, 2, KEY_A),
  73. KEY(0, 3, KEY_B),
  74. KEY(0, 4, KEY_C),
  75. KEY(1, 0, KEY_DOWN),
  76. KEY(1, 1, KEY_UP),
  77. KEY(1, 2, KEY_E),
  78. KEY(1, 3, KEY_F),
  79. KEY(1, 4, KEY_G),
  80. KEY(2, 0, KEY_ENTER),
  81. KEY(2, 1, KEY_I),
  82. KEY(2, 2, KEY_J),
  83. KEY(2, 3, KEY_K),
  84. KEY(2, 4, KEY_3),
  85. KEY(3, 0, KEY_M),
  86. KEY(3, 1, KEY_N),
  87. KEY(3, 2, KEY_O),
  88. KEY(3, 3, KEY_P),
  89. KEY(3, 4, KEY_Q),
  90. KEY(4, 0, KEY_R),
  91. KEY(4, 1, KEY_4),
  92. KEY(4, 2, KEY_T),
  93. KEY(4, 3, KEY_U),
  94. KEY(4, 4, KEY_D),
  95. KEY(5, 0, KEY_V),
  96. KEY(5, 1, KEY_W),
  97. KEY(5, 2, KEY_L),
  98. KEY(5, 3, KEY_S),
  99. KEY(5, 4, KEY_H),
  100. 0
  101. };
  102. static struct matrix_keymap_data board_map_data = {
  103. .keymap = board_keymap,
  104. .keymap_size = ARRAY_SIZE(board_keymap),
  105. };
  106. static struct twl4030_keypad_data sdp3430_kp_data = {
  107. .keymap_data = &board_map_data,
  108. .rows = 5,
  109. .cols = 6,
  110. .rep = 1,
  111. };
  112. static int ts_gpio; /* Needed for ads7846_get_pendown_state */
  113. /**
  114. * @brief ads7846_dev_init : Requests & sets GPIO line for pen-irq
  115. *
  116. * @return - void. If request gpio fails then Flag KERN_ERR.
  117. */
  118. static void ads7846_dev_init(void)
  119. {
  120. if (gpio_request(ts_gpio, "ADS7846 pendown") < 0) {
  121. printk(KERN_ERR "can't get ads746 pen down GPIO\n");
  122. return;
  123. }
  124. gpio_direction_input(ts_gpio);
  125. gpio_set_debounce(ts_gpio, 310);
  126. }
  127. static int ads7846_get_pendown_state(void)
  128. {
  129. return !gpio_get_value(ts_gpio);
  130. }
  131. static struct ads7846_platform_data tsc2046_config __initdata = {
  132. .get_pendown_state = ads7846_get_pendown_state,
  133. .keep_vref_on = 1,
  134. .wakeup = true,
  135. };
  136. static struct omap2_mcspi_device_config tsc2046_mcspi_config = {
  137. .turbo_mode = 0,
  138. .single_channel = 1, /* 0: slave, 1: master */
  139. };
  140. static struct spi_board_info sdp3430_spi_board_info[] __initdata = {
  141. [0] = {
  142. /*
  143. * TSC2046 operates at a max freqency of 2MHz, so
  144. * operate slightly below at 1.5MHz
  145. */
  146. .modalias = "ads7846",
  147. .bus_num = 1,
  148. .chip_select = 0,
  149. .max_speed_hz = 1500000,
  150. .controller_data = &tsc2046_mcspi_config,
  151. .irq = 0,
  152. .platform_data = &tsc2046_config,
  153. },
  154. };
  155. #define SDP3430_LCD_PANEL_BACKLIGHT_GPIO 8
  156. #define SDP3430_LCD_PANEL_ENABLE_GPIO 5
  157. static unsigned backlight_gpio;
  158. static unsigned enable_gpio;
  159. static int lcd_enabled;
  160. static int dvi_enabled;
  161. static void __init sdp3430_display_init(void)
  162. {
  163. int r;
  164. enable_gpio = SDP3430_LCD_PANEL_ENABLE_GPIO;
  165. backlight_gpio = SDP3430_LCD_PANEL_BACKLIGHT_GPIO;
  166. r = gpio_request(enable_gpio, "LCD reset");
  167. if (r) {
  168. printk(KERN_ERR "failed to get LCD reset GPIO\n");
  169. goto err0;
  170. }
  171. r = gpio_request(backlight_gpio, "LCD Backlight");
  172. if (r) {
  173. printk(KERN_ERR "failed to get LCD backlight GPIO\n");
  174. goto err1;
  175. }
  176. gpio_direction_output(enable_gpio, 0);
  177. gpio_direction_output(backlight_gpio, 0);
  178. return;
  179. err1:
  180. gpio_free(enable_gpio);
  181. err0:
  182. return;
  183. }
  184. static int sdp3430_panel_enable_lcd(struct omap_dss_device *dssdev)
  185. {
  186. if (dvi_enabled) {
  187. printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
  188. return -EINVAL;
  189. }
  190. gpio_direction_output(enable_gpio, 1);
  191. gpio_direction_output(backlight_gpio, 1);
  192. lcd_enabled = 1;
  193. return 0;
  194. }
  195. static void sdp3430_panel_disable_lcd(struct omap_dss_device *dssdev)
  196. {
  197. lcd_enabled = 0;
  198. gpio_direction_output(enable_gpio, 0);
  199. gpio_direction_output(backlight_gpio, 0);
  200. }
  201. static int sdp3430_panel_enable_dvi(struct omap_dss_device *dssdev)
  202. {
  203. if (lcd_enabled) {
  204. printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");
  205. return -EINVAL;
  206. }
  207. dvi_enabled = 1;
  208. return 0;
  209. }
  210. static void sdp3430_panel_disable_dvi(struct omap_dss_device *dssdev)
  211. {
  212. dvi_enabled = 0;
  213. }
  214. static int sdp3430_panel_enable_tv(struct omap_dss_device *dssdev)
  215. {
  216. return 0;
  217. }
  218. static void sdp3430_panel_disable_tv(struct omap_dss_device *dssdev)
  219. {
  220. }
  221. static struct omap_dss_device sdp3430_lcd_device = {
  222. .name = "lcd",
  223. .driver_name = "sharp_ls_panel",
  224. .type = OMAP_DISPLAY_TYPE_DPI,
  225. .phy.dpi.data_lines = 16,
  226. .platform_enable = sdp3430_panel_enable_lcd,
  227. .platform_disable = sdp3430_panel_disable_lcd,
  228. };
  229. static struct panel_generic_dpi_data dvi_panel = {
  230. .name = "generic",
  231. .platform_enable = sdp3430_panel_enable_dvi,
  232. .platform_disable = sdp3430_panel_disable_dvi,
  233. };
  234. static struct omap_dss_device sdp3430_dvi_device = {
  235. .name = "dvi",
  236. .type = OMAP_DISPLAY_TYPE_DPI,
  237. .driver_name = "generic_dpi_panel",
  238. .data = &dvi_panel,
  239. .phy.dpi.data_lines = 24,
  240. };
  241. static struct omap_dss_device sdp3430_tv_device = {
  242. .name = "tv",
  243. .driver_name = "venc",
  244. .type = OMAP_DISPLAY_TYPE_VENC,
  245. .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
  246. .platform_enable = sdp3430_panel_enable_tv,
  247. .platform_disable = sdp3430_panel_disable_tv,
  248. };
  249. static struct omap_dss_device *sdp3430_dss_devices[] = {
  250. &sdp3430_lcd_device,
  251. &sdp3430_dvi_device,
  252. &sdp3430_tv_device,
  253. };
  254. static struct omap_dss_board_info sdp3430_dss_data = {
  255. .num_devices = ARRAY_SIZE(sdp3430_dss_devices),
  256. .devices = sdp3430_dss_devices,
  257. .default_device = &sdp3430_lcd_device,
  258. };
  259. static struct regulator_consumer_supply sdp3430_vdda_dac_supply =
  260. REGULATOR_SUPPLY("vdda_dac", "omapdss");
  261. static struct omap_board_config_kernel sdp3430_config[] __initdata = {
  262. };
  263. static void __init omap_3430sdp_init_early(void)
  264. {
  265. omap2_init_common_infrastructure();
  266. omap2_init_common_devices(hyb18m512160af6_sdrc_params, NULL);
  267. }
  268. static int sdp3430_batt_table[] = {
  269. /* 0 C*/
  270. 30800, 29500, 28300, 27100,
  271. 26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900,
  272. 17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100,
  273. 11600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310,
  274. 8020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830,
  275. 5640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170,
  276. 4040, 3910, 3790, 3670, 3550
  277. };
  278. static struct twl4030_bci_platform_data sdp3430_bci_data = {
  279. .battery_tmp_tbl = sdp3430_batt_table,
  280. .tblsize = ARRAY_SIZE(sdp3430_batt_table),
  281. };
  282. static struct omap2_hsmmc_info mmc[] = {
  283. {
  284. .mmc = 1,
  285. /* 8 bits (default) requires S6.3 == ON,
  286. * so the SIM card isn't used; else 4 bits.
  287. */
  288. .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
  289. .gpio_wp = 4,
  290. },
  291. {
  292. .mmc = 2,
  293. .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
  294. .gpio_wp = 7,
  295. },
  296. {} /* Terminator */
  297. };
  298. static int sdp3430_twl_gpio_setup(struct device *dev,
  299. unsigned gpio, unsigned ngpio)
  300. {
  301. /* gpio + 0 is "mmc0_cd" (input/IRQ),
  302. * gpio + 1 is "mmc1_cd" (input/IRQ)
  303. */
  304. mmc[0].gpio_cd = gpio + 0;
  305. mmc[1].gpio_cd = gpio + 1;
  306. omap2_hsmmc_init(mmc);
  307. /* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */
  308. gpio_request(gpio + 7, "sub_lcd_en_bkl");
  309. gpio_direction_output(gpio + 7, 0);
  310. /* gpio + 15 is "sub_lcd_nRST" (output) */
  311. gpio_request(gpio + 15, "sub_lcd_nRST");
  312. gpio_direction_output(gpio + 15, 0);
  313. return 0;
  314. }
  315. static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
  316. .gpio_base = OMAP_MAX_GPIO_LINES,
  317. .irq_base = TWL4030_GPIO_IRQ_BASE,
  318. .irq_end = TWL4030_GPIO_IRQ_END,
  319. .pulldowns = BIT(2) | BIT(6) | BIT(8) | BIT(13)
  320. | BIT(16) | BIT(17),
  321. .setup = sdp3430_twl_gpio_setup,
  322. };
  323. static struct twl4030_usb_data sdp3430_usb_data = {
  324. .usb_mode = T2_USB_MODE_ULPI,
  325. };
  326. static struct twl4030_madc_platform_data sdp3430_madc_data = {
  327. .irq_line = 1,
  328. };
  329. /* regulator consumer mappings */
  330. /* ads7846 on SPI */
  331. static struct regulator_consumer_supply sdp3430_vaux3_supplies[] = {
  332. REGULATOR_SUPPLY("vcc", "spi1.0"),
  333. };
  334. static struct regulator_consumer_supply sdp3430_vdda_dac_supplies[] = {
  335. REGULATOR_SUPPLY("vdda_dac", "omapdss"),
  336. };
  337. /* VPLL2 for digital video outputs */
  338. static struct regulator_consumer_supply sdp3430_vpll2_supplies[] = {
  339. REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
  340. };
  341. static struct regulator_consumer_supply sdp3430_vmmc1_supplies[] = {
  342. REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
  343. };
  344. static struct regulator_consumer_supply sdp3430_vsim_supplies[] = {
  345. REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
  346. };
  347. static struct regulator_consumer_supply sdp3430_vmmc2_supplies[] = {
  348. REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
  349. };
  350. /*
  351. * Apply all the fixed voltages since most versions of U-Boot
  352. * don't bother with that initialization.
  353. */
  354. /* VAUX1 for mainboard (irda and sub-lcd) */
  355. static struct regulator_init_data sdp3430_vaux1 = {
  356. .constraints = {
  357. .min_uV = 2800000,
  358. .max_uV = 2800000,
  359. .apply_uV = true,
  360. .valid_modes_mask = REGULATOR_MODE_NORMAL
  361. | REGULATOR_MODE_STANDBY,
  362. .valid_ops_mask = REGULATOR_CHANGE_MODE
  363. | REGULATOR_CHANGE_STATUS,
  364. },
  365. };
  366. /* VAUX2 for camera module */
  367. static struct regulator_init_data sdp3430_vaux2 = {
  368. .constraints = {
  369. .min_uV = 2800000,
  370. .max_uV = 2800000,
  371. .apply_uV = true,
  372. .valid_modes_mask = REGULATOR_MODE_NORMAL
  373. | REGULATOR_MODE_STANDBY,
  374. .valid_ops_mask = REGULATOR_CHANGE_MODE
  375. | REGULATOR_CHANGE_STATUS,
  376. },
  377. };
  378. /* VAUX3 for LCD board */
  379. static struct regulator_init_data sdp3430_vaux3 = {
  380. .constraints = {
  381. .min_uV = 2800000,
  382. .max_uV = 2800000,
  383. .apply_uV = true,
  384. .valid_modes_mask = REGULATOR_MODE_NORMAL
  385. | REGULATOR_MODE_STANDBY,
  386. .valid_ops_mask = REGULATOR_CHANGE_MODE
  387. | REGULATOR_CHANGE_STATUS,
  388. },
  389. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vaux3_supplies),
  390. .consumer_supplies = sdp3430_vaux3_supplies,
  391. };
  392. /* VAUX4 for OMAP VDD_CSI2 (camera) */
  393. static struct regulator_init_data sdp3430_vaux4 = {
  394. .constraints = {
  395. .min_uV = 1800000,
  396. .max_uV = 1800000,
  397. .apply_uV = true,
  398. .valid_modes_mask = REGULATOR_MODE_NORMAL
  399. | REGULATOR_MODE_STANDBY,
  400. .valid_ops_mask = REGULATOR_CHANGE_MODE
  401. | REGULATOR_CHANGE_STATUS,
  402. },
  403. };
  404. /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
  405. static struct regulator_init_data sdp3430_vmmc1 = {
  406. .constraints = {
  407. .min_uV = 1850000,
  408. .max_uV = 3150000,
  409. .valid_modes_mask = REGULATOR_MODE_NORMAL
  410. | REGULATOR_MODE_STANDBY,
  411. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  412. | REGULATOR_CHANGE_MODE
  413. | REGULATOR_CHANGE_STATUS,
  414. },
  415. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vmmc1_supplies),
  416. .consumer_supplies = sdp3430_vmmc1_supplies,
  417. };
  418. /* VMMC2 for MMC2 card */
  419. static struct regulator_init_data sdp3430_vmmc2 = {
  420. .constraints = {
  421. .min_uV = 1850000,
  422. .max_uV = 1850000,
  423. .apply_uV = true,
  424. .valid_modes_mask = REGULATOR_MODE_NORMAL
  425. | REGULATOR_MODE_STANDBY,
  426. .valid_ops_mask = REGULATOR_CHANGE_MODE
  427. | REGULATOR_CHANGE_STATUS,
  428. },
  429. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vmmc2_supplies),
  430. .consumer_supplies = sdp3430_vmmc2_supplies,
  431. };
  432. /* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
  433. static struct regulator_init_data sdp3430_vsim = {
  434. .constraints = {
  435. .min_uV = 1800000,
  436. .max_uV = 3000000,
  437. .valid_modes_mask = REGULATOR_MODE_NORMAL
  438. | REGULATOR_MODE_STANDBY,
  439. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  440. | REGULATOR_CHANGE_MODE
  441. | REGULATOR_CHANGE_STATUS,
  442. },
  443. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vsim_supplies),
  444. .consumer_supplies = sdp3430_vsim_supplies,
  445. };
  446. /* VDAC for DSS driving S-Video */
  447. static struct regulator_init_data sdp3430_vdac = {
  448. .constraints = {
  449. .min_uV = 1800000,
  450. .max_uV = 1800000,
  451. .apply_uV = true,
  452. .valid_modes_mask = REGULATOR_MODE_NORMAL
  453. | REGULATOR_MODE_STANDBY,
  454. .valid_ops_mask = REGULATOR_CHANGE_MODE
  455. | REGULATOR_CHANGE_STATUS,
  456. },
  457. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vdda_dac_supplies),
  458. .consumer_supplies = sdp3430_vdda_dac_supplies,
  459. };
  460. static struct regulator_init_data sdp3430_vpll2 = {
  461. .constraints = {
  462. .name = "VDVI",
  463. .min_uV = 1800000,
  464. .max_uV = 1800000,
  465. .apply_uV = true,
  466. .valid_modes_mask = REGULATOR_MODE_NORMAL
  467. | REGULATOR_MODE_STANDBY,
  468. .valid_ops_mask = REGULATOR_CHANGE_MODE
  469. | REGULATOR_CHANGE_STATUS,
  470. },
  471. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vpll2_supplies),
  472. .consumer_supplies = sdp3430_vpll2_supplies,
  473. };
  474. static struct twl4030_codec_audio_data sdp3430_audio;
  475. static struct twl4030_codec_data sdp3430_codec = {
  476. .audio_mclk = 26000000,
  477. .audio = &sdp3430_audio,
  478. };
  479. static struct twl4030_platform_data sdp3430_twldata = {
  480. .irq_base = TWL4030_IRQ_BASE,
  481. .irq_end = TWL4030_IRQ_END,
  482. /* platform_data for children goes here */
  483. .bci = &sdp3430_bci_data,
  484. .gpio = &sdp3430_gpio_data,
  485. .madc = &sdp3430_madc_data,
  486. .keypad = &sdp3430_kp_data,
  487. .usb = &sdp3430_usb_data,
  488. .codec = &sdp3430_codec,
  489. .vaux1 = &sdp3430_vaux1,
  490. .vaux2 = &sdp3430_vaux2,
  491. .vaux3 = &sdp3430_vaux3,
  492. .vaux4 = &sdp3430_vaux4,
  493. .vmmc1 = &sdp3430_vmmc1,
  494. .vmmc2 = &sdp3430_vmmc2,
  495. .vsim = &sdp3430_vsim,
  496. .vdac = &sdp3430_vdac,
  497. .vpll2 = &sdp3430_vpll2,
  498. };
  499. static struct i2c_board_info __initdata sdp3430_i2c_boardinfo[] = {
  500. {
  501. I2C_BOARD_INFO("twl4030", 0x48),
  502. .flags = I2C_CLIENT_WAKE,
  503. .irq = INT_34XX_SYS_NIRQ,
  504. .platform_data = &sdp3430_twldata,
  505. },
  506. };
  507. static int __init omap3430_i2c_init(void)
  508. {
  509. /* i2c1 for PMIC only */
  510. omap_register_i2c_bus(1, 2600, sdp3430_i2c_boardinfo,
  511. ARRAY_SIZE(sdp3430_i2c_boardinfo));
  512. /* i2c2 on camera connector (for sensor control) and optional isp1301 */
  513. omap_register_i2c_bus(2, 400, NULL, 0);
  514. /* i2c3 on display connector (for DVI, tfp410) */
  515. omap_register_i2c_bus(3, 400, NULL, 0);
  516. return 0;
  517. }
  518. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  519. static struct omap_smc91x_platform_data board_smc91x_data = {
  520. .cs = 3,
  521. .flags = GPMC_MUX_ADD_DATA | GPMC_TIMINGS_SMC91C96 |
  522. IORESOURCE_IRQ_LOWLEVEL,
  523. };
  524. static void __init board_smc91x_init(void)
  525. {
  526. if (omap_rev() > OMAP3430_REV_ES1_0)
  527. board_smc91x_data.gpio_irq = 6;
  528. else
  529. board_smc91x_data.gpio_irq = 29;
  530. gpmc_smc91x_init(&board_smc91x_data);
  531. }
  532. #else
  533. static inline void board_smc91x_init(void)
  534. {
  535. }
  536. #endif
  537. static void enable_board_wakeup_source(void)
  538. {
  539. /* T2 interrupt line (keypad) */
  540. omap_mux_init_signal("sys_nirq",
  541. OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
  542. }
  543. static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
  544. .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
  545. .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
  546. .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
  547. .phy_reset = true,
  548. .reset_gpio_port[0] = 57,
  549. .reset_gpio_port[1] = 61,
  550. .reset_gpio_port[2] = -EINVAL
  551. };
  552. #ifdef CONFIG_OMAP_MUX
  553. static struct omap_board_mux board_mux[] __initdata = {
  554. { .reg_offset = OMAP_MUX_TERMINATOR },
  555. };
  556. static struct omap_device_pad serial1_pads[] __initdata = {
  557. /*
  558. * Note that off output enable is an active low
  559. * signal. So setting this means pin is a
  560. * input enabled in off mode
  561. */
  562. OMAP_MUX_STATIC("uart1_cts.uart1_cts",
  563. OMAP_PIN_INPUT |
  564. OMAP_PIN_OFF_INPUT_PULLDOWN |
  565. OMAP_OFFOUT_EN |
  566. OMAP_MUX_MODE0),
  567. OMAP_MUX_STATIC("uart1_rts.uart1_rts",
  568. OMAP_PIN_OUTPUT |
  569. OMAP_OFF_EN |
  570. OMAP_MUX_MODE0),
  571. OMAP_MUX_STATIC("uart1_rx.uart1_rx",
  572. OMAP_PIN_INPUT |
  573. OMAP_PIN_OFF_INPUT_PULLDOWN |
  574. OMAP_OFFOUT_EN |
  575. OMAP_MUX_MODE0),
  576. OMAP_MUX_STATIC("uart1_tx.uart1_tx",
  577. OMAP_PIN_OUTPUT |
  578. OMAP_OFF_EN |
  579. OMAP_MUX_MODE0),
  580. };
  581. static struct omap_device_pad serial2_pads[] __initdata = {
  582. OMAP_MUX_STATIC("uart2_cts.uart2_cts",
  583. OMAP_PIN_INPUT_PULLUP |
  584. OMAP_PIN_OFF_INPUT_PULLDOWN |
  585. OMAP_OFFOUT_EN |
  586. OMAP_MUX_MODE0),
  587. OMAP_MUX_STATIC("uart2_rts.uart2_rts",
  588. OMAP_PIN_OUTPUT |
  589. OMAP_OFF_EN |
  590. OMAP_MUX_MODE0),
  591. OMAP_MUX_STATIC("uart2_rx.uart2_rx",
  592. OMAP_PIN_INPUT |
  593. OMAP_PIN_OFF_INPUT_PULLDOWN |
  594. OMAP_OFFOUT_EN |
  595. OMAP_MUX_MODE0),
  596. OMAP_MUX_STATIC("uart2_tx.uart2_tx",
  597. OMAP_PIN_OUTPUT |
  598. OMAP_OFF_EN |
  599. OMAP_MUX_MODE0),
  600. };
  601. static struct omap_device_pad serial3_pads[] __initdata = {
  602. OMAP_MUX_STATIC("uart3_cts_rctx.uart3_cts_rctx",
  603. OMAP_PIN_INPUT_PULLDOWN |
  604. OMAP_PIN_OFF_INPUT_PULLDOWN |
  605. OMAP_OFFOUT_EN |
  606. OMAP_MUX_MODE0),
  607. OMAP_MUX_STATIC("uart3_rts_sd.uart3_rts_sd",
  608. OMAP_PIN_OUTPUT |
  609. OMAP_OFF_EN |
  610. OMAP_MUX_MODE0),
  611. OMAP_MUX_STATIC("uart3_rx_irrx.uart3_rx_irrx",
  612. OMAP_PIN_INPUT |
  613. OMAP_PIN_OFF_INPUT_PULLDOWN |
  614. OMAP_OFFOUT_EN |
  615. OMAP_MUX_MODE0),
  616. OMAP_MUX_STATIC("uart3_tx_irtx.uart3_tx_irtx",
  617. OMAP_PIN_OUTPUT |
  618. OMAP_OFF_EN |
  619. OMAP_MUX_MODE0),
  620. };
  621. static struct omap_board_data serial1_data = {
  622. .id = 0,
  623. .pads = serial1_pads,
  624. .pads_cnt = ARRAY_SIZE(serial1_pads),
  625. };
  626. static struct omap_board_data serial2_data = {
  627. .id = 1,
  628. .pads = serial2_pads,
  629. .pads_cnt = ARRAY_SIZE(serial2_pads),
  630. };
  631. static struct omap_board_data serial3_data = {
  632. .id = 2,
  633. .pads = serial3_pads,
  634. .pads_cnt = ARRAY_SIZE(serial3_pads),
  635. };
  636. static inline void board_serial_init(void)
  637. {
  638. omap_serial_init_port(&serial1_data);
  639. omap_serial_init_port(&serial2_data);
  640. omap_serial_init_port(&serial3_data);
  641. }
  642. #else
  643. #define board_mux NULL
  644. static inline void board_serial_init(void)
  645. {
  646. omap_serial_init();
  647. }
  648. #endif
  649. /*
  650. * SDP3430 V2 Board CS organization
  651. * Different from SDP3430 V1. Now 4 switches used to specify CS
  652. *
  653. * See also the Switch S8 settings in the comments.
  654. */
  655. static char chip_sel_3430[][GPMC_CS_NUM] = {
  656. {PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */
  657. {PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */
  658. {PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */
  659. };
  660. static struct mtd_partition sdp_nor_partitions[] = {
  661. /* bootloader (U-Boot, etc) in first sector */
  662. {
  663. .name = "Bootloader-NOR",
  664. .offset = 0,
  665. .size = SZ_256K,
  666. .mask_flags = MTD_WRITEABLE, /* force read-only */
  667. },
  668. /* bootloader params in the next sector */
  669. {
  670. .name = "Params-NOR",
  671. .offset = MTDPART_OFS_APPEND,
  672. .size = SZ_256K,
  673. .mask_flags = 0,
  674. },
  675. /* kernel */
  676. {
  677. .name = "Kernel-NOR",
  678. .offset = MTDPART_OFS_APPEND,
  679. .size = SZ_2M,
  680. .mask_flags = 0
  681. },
  682. /* file system */
  683. {
  684. .name = "Filesystem-NOR",
  685. .offset = MTDPART_OFS_APPEND,
  686. .size = MTDPART_SIZ_FULL,
  687. .mask_flags = 0
  688. }
  689. };
  690. static struct mtd_partition sdp_onenand_partitions[] = {
  691. {
  692. .name = "X-Loader-OneNAND",
  693. .offset = 0,
  694. .size = 4 * (64 * 2048),
  695. .mask_flags = MTD_WRITEABLE /* force read-only */
  696. },
  697. {
  698. .name = "U-Boot-OneNAND",
  699. .offset = MTDPART_OFS_APPEND,
  700. .size = 2 * (64 * 2048),
  701. .mask_flags = MTD_WRITEABLE /* force read-only */
  702. },
  703. {
  704. .name = "U-Boot Environment-OneNAND",
  705. .offset = MTDPART_OFS_APPEND,
  706. .size = 1 * (64 * 2048),
  707. },
  708. {
  709. .name = "Kernel-OneNAND",
  710. .offset = MTDPART_OFS_APPEND,
  711. .size = 16 * (64 * 2048),
  712. },
  713. {
  714. .name = "File System-OneNAND",
  715. .offset = MTDPART_OFS_APPEND,
  716. .size = MTDPART_SIZ_FULL,
  717. },
  718. };
  719. static struct mtd_partition sdp_nand_partitions[] = {
  720. /* All the partition sizes are listed in terms of NAND block size */
  721. {
  722. .name = "X-Loader-NAND",
  723. .offset = 0,
  724. .size = 4 * (64 * 2048),
  725. .mask_flags = MTD_WRITEABLE, /* force read-only */
  726. },
  727. {
  728. .name = "U-Boot-NAND",
  729. .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
  730. .size = 10 * (64 * 2048),
  731. .mask_flags = MTD_WRITEABLE, /* force read-only */
  732. },
  733. {
  734. .name = "Boot Env-NAND",
  735. .offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */
  736. .size = 6 * (64 * 2048),
  737. },
  738. {
  739. .name = "Kernel-NAND",
  740. .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
  741. .size = 40 * (64 * 2048),
  742. },
  743. {
  744. .name = "File System - NAND",
  745. .size = MTDPART_SIZ_FULL,
  746. .offset = MTDPART_OFS_APPEND, /* Offset = 0x780000 */
  747. },
  748. };
  749. static struct flash_partitions sdp_flash_partitions[] = {
  750. {
  751. .parts = sdp_nor_partitions,
  752. .nr_parts = ARRAY_SIZE(sdp_nor_partitions),
  753. },
  754. {
  755. .parts = sdp_onenand_partitions,
  756. .nr_parts = ARRAY_SIZE(sdp_onenand_partitions),
  757. },
  758. {
  759. .parts = sdp_nand_partitions,
  760. .nr_parts = ARRAY_SIZE(sdp_nand_partitions),
  761. },
  762. };
  763. static struct omap_musb_board_data musb_board_data = {
  764. .interface_type = MUSB_INTERFACE_ULPI,
  765. .mode = MUSB_OTG,
  766. .power = 100,
  767. };
  768. static void __init omap_3430sdp_init(void)
  769. {
  770. omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
  771. omap_board_config = sdp3430_config;
  772. omap_board_config_size = ARRAY_SIZE(sdp3430_config);
  773. omap3_pm_init_cpuidle(omap3_cpuidle_params_table);
  774. omap3430_i2c_init();
  775. omap_display_init(&sdp3430_dss_data);
  776. if (omap_rev() > OMAP3430_REV_ES1_0)
  777. ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV2;
  778. else
  779. ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV1;
  780. sdp3430_spi_board_info[0].irq = gpio_to_irq(ts_gpio);
  781. spi_register_board_info(sdp3430_spi_board_info,
  782. ARRAY_SIZE(sdp3430_spi_board_info));
  783. ads7846_dev_init();
  784. board_serial_init();
  785. usb_musb_init(&musb_board_data);
  786. board_smc91x_init();
  787. board_flash_init(sdp_flash_partitions, chip_sel_3430, 0);
  788. sdp3430_display_init();
  789. enable_board_wakeup_source();
  790. usb_ehci_init(&ehci_pdata);
  791. }
  792. MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
  793. /* Maintainer: Syed Khasim - Texas Instruments Inc */
  794. .boot_params = 0x80000100,
  795. .reserve = omap_reserve,
  796. .map_io = omap3_map_io,
  797. .init_early = omap_3430sdp_init_early,
  798. .init_irq = omap_init_irq,
  799. .init_machine = omap_3430sdp_init,
  800. .timer = &omap_timer,
  801. MACHINE_END