core.c 18 KB

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  1. /*
  2. * Copyright (C) 2006, Rusty Russell <rusty@rustcorp.com.au> IBM Corporation.
  3. * Copyright (C) 2007, Jes Sorensen <jes@sgi.com> SGI.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or
  8. * (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  13. * NON INFRINGEMENT. See the GNU General Public License for more
  14. * details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19. */
  20. #include <linux/kernel.h>
  21. #include <linux/start_kernel.h>
  22. #include <linux/string.h>
  23. #include <linux/console.h>
  24. #include <linux/screen_info.h>
  25. #include <linux/irq.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/clocksource.h>
  28. #include <linux/clockchips.h>
  29. #include <linux/cpu.h>
  30. #include <linux/lguest.h>
  31. #include <linux/lguest_launcher.h>
  32. #include <linux/lguest_bus.h>
  33. #include <asm/paravirt.h>
  34. #include <asm/param.h>
  35. #include <asm/page.h>
  36. #include <asm/pgtable.h>
  37. #include <asm/desc.h>
  38. #include <asm/setup.h>
  39. #include <asm/lguest.h>
  40. #include <asm/uaccess.h>
  41. #include <asm/i387.h>
  42. #include "../lg.h"
  43. static int cpu_had_pge;
  44. static struct {
  45. unsigned long offset;
  46. unsigned short segment;
  47. } lguest_entry;
  48. /* Offset from where switcher.S was compiled to where we've copied it */
  49. static unsigned long switcher_offset(void)
  50. {
  51. return SWITCHER_ADDR - (unsigned long)start_switcher_text;
  52. }
  53. /* This cpu's struct lguest_pages. */
  54. static struct lguest_pages *lguest_pages(unsigned int cpu)
  55. {
  56. return &(((struct lguest_pages *)
  57. (SWITCHER_ADDR + SHARED_SWITCHER_PAGES*PAGE_SIZE))[cpu]);
  58. }
  59. static DEFINE_PER_CPU(struct lguest *, last_guest);
  60. /*S:010
  61. * We are getting close to the Switcher.
  62. *
  63. * Remember that each CPU has two pages which are visible to the Guest when it
  64. * runs on that CPU. This has to contain the state for that Guest: we copy the
  65. * state in just before we run the Guest.
  66. *
  67. * Each Guest has "changed" flags which indicate what has changed in the Guest
  68. * since it last ran. We saw this set in interrupts_and_traps.c and
  69. * segments.c.
  70. */
  71. static void copy_in_guest_info(struct lguest *lg, struct lguest_pages *pages)
  72. {
  73. /* Copying all this data can be quite expensive. We usually run the
  74. * same Guest we ran last time (and that Guest hasn't run anywhere else
  75. * meanwhile). If that's not the case, we pretend everything in the
  76. * Guest has changed. */
  77. if (__get_cpu_var(last_guest) != lg || lg->last_pages != pages) {
  78. __get_cpu_var(last_guest) = lg;
  79. lg->last_pages = pages;
  80. lg->changed = CHANGED_ALL;
  81. }
  82. /* These copies are pretty cheap, so we do them unconditionally: */
  83. /* Save the current Host top-level page directory. */
  84. pages->state.host_cr3 = __pa(current->mm->pgd);
  85. /* Set up the Guest's page tables to see this CPU's pages (and no
  86. * other CPU's pages). */
  87. map_switcher_in_guest(lg, pages);
  88. /* Set up the two "TSS" members which tell the CPU what stack to use
  89. * for traps which do directly into the Guest (ie. traps at privilege
  90. * level 1). */
  91. pages->state.guest_tss.esp1 = lg->esp1;
  92. pages->state.guest_tss.ss1 = lg->ss1;
  93. /* Copy direct-to-Guest trap entries. */
  94. if (lg->changed & CHANGED_IDT)
  95. copy_traps(lg, pages->state.guest_idt, default_idt_entries);
  96. /* Copy all GDT entries which the Guest can change. */
  97. if (lg->changed & CHANGED_GDT)
  98. copy_gdt(lg, pages->state.guest_gdt);
  99. /* If only the TLS entries have changed, copy them. */
  100. else if (lg->changed & CHANGED_GDT_TLS)
  101. copy_gdt_tls(lg, pages->state.guest_gdt);
  102. /* Mark the Guest as unchanged for next time. */
  103. lg->changed = 0;
  104. }
  105. /* Finally: the code to actually call into the Switcher to run the Guest. */
  106. static void run_guest_once(struct lguest *lg, struct lguest_pages *pages)
  107. {
  108. /* This is a dummy value we need for GCC's sake. */
  109. unsigned int clobber;
  110. /* Copy the guest-specific information into this CPU's "struct
  111. * lguest_pages". */
  112. copy_in_guest_info(lg, pages);
  113. /* Set the trap number to 256 (impossible value). If we fault while
  114. * switching to the Guest (bad segment registers or bug), this will
  115. * cause us to abort the Guest. */
  116. lg->regs->trapnum = 256;
  117. /* Now: we push the "eflags" register on the stack, then do an "lcall".
  118. * This is how we change from using the kernel code segment to using
  119. * the dedicated lguest code segment, as well as jumping into the
  120. * Switcher.
  121. *
  122. * The lcall also pushes the old code segment (KERNEL_CS) onto the
  123. * stack, then the address of this call. This stack layout happens to
  124. * exactly match the stack of an interrupt... */
  125. asm volatile("pushf; lcall *lguest_entry"
  126. /* This is how we tell GCC that %eax ("a") and %ebx ("b")
  127. * are changed by this routine. The "=" means output. */
  128. : "=a"(clobber), "=b"(clobber)
  129. /* %eax contains the pages pointer. ("0" refers to the
  130. * 0-th argument above, ie "a"). %ebx contains the
  131. * physical address of the Guest's top-level page
  132. * directory. */
  133. : "0"(pages), "1"(__pa(lg->pgdirs[lg->pgdidx].pgdir))
  134. /* We tell gcc that all these registers could change,
  135. * which means we don't have to save and restore them in
  136. * the Switcher. */
  137. : "memory", "%edx", "%ecx", "%edi", "%esi");
  138. }
  139. /*:*/
  140. /*H:040 This is the i386-specific code to setup and run the Guest. Interrupts
  141. * are disabled: we own the CPU. */
  142. void lguest_arch_run_guest(struct lguest *lg)
  143. {
  144. /* Remember the awfully-named TS bit? If the Guest has asked
  145. * to set it we set it now, so we can trap and pass that trap
  146. * to the Guest if it uses the FPU. */
  147. if (lg->ts)
  148. lguest_set_ts();
  149. /* SYSENTER is an optimized way of doing system calls. We
  150. * can't allow it because it always jumps to privilege level 0.
  151. * A normal Guest won't try it because we don't advertise it in
  152. * CPUID, but a malicious Guest (or malicious Guest userspace
  153. * program) could, so we tell the CPU to disable it before
  154. * running the Guest. */
  155. if (boot_cpu_has(X86_FEATURE_SEP))
  156. wrmsr(MSR_IA32_SYSENTER_CS, 0, 0);
  157. /* Now we actually run the Guest. It will pop back out when
  158. * something interesting happens, and we can examine its
  159. * registers to see what it was doing. */
  160. run_guest_once(lg, lguest_pages(raw_smp_processor_id()));
  161. /* The "regs" pointer contains two extra entries which are not
  162. * really registers: a trap number which says what interrupt or
  163. * trap made the switcher code come back, and an error code
  164. * which some traps set. */
  165. /* If the Guest page faulted, then the cr2 register will tell
  166. * us the bad virtual address. We have to grab this now,
  167. * because once we re-enable interrupts an interrupt could
  168. * fault and thus overwrite cr2, or we could even move off to a
  169. * different CPU. */
  170. if (lg->regs->trapnum == 14)
  171. lg->arch.last_pagefault = read_cr2();
  172. /* Similarly, if we took a trap because the Guest used the FPU,
  173. * we have to restore the FPU it expects to see. */
  174. else if (lg->regs->trapnum == 7)
  175. math_state_restore();
  176. /* Restore SYSENTER if it's supposed to be on. */
  177. if (boot_cpu_has(X86_FEATURE_SEP))
  178. wrmsr(MSR_IA32_SYSENTER_CS, __KERNEL_CS, 0);
  179. }
  180. /*H:130 Our Guest is usually so well behaved; it never tries to do things it
  181. * isn't allowed to. Unfortunately, Linux's paravirtual infrastructure isn't
  182. * quite complete, because it doesn't contain replacements for the Intel I/O
  183. * instructions. As a result, the Guest sometimes fumbles across one during
  184. * the boot process as it probes for various things which are usually attached
  185. * to a PC.
  186. *
  187. * When the Guest uses one of these instructions, we get trap #13 (General
  188. * Protection Fault) and come here. We see if it's one of those troublesome
  189. * instructions and skip over it. We return true if we did. */
  190. static int emulate_insn(struct lguest *lg)
  191. {
  192. u8 insn;
  193. unsigned int insnlen = 0, in = 0, shift = 0;
  194. /* The eip contains the *virtual* address of the Guest's instruction:
  195. * guest_pa just subtracts the Guest's page_offset. */
  196. unsigned long physaddr = guest_pa(lg, lg->regs->eip);
  197. /* The guest_pa() function only works for Guest kernel addresses, but
  198. * that's all we're trying to do anyway. */
  199. if (lg->regs->eip < lg->page_offset)
  200. return 0;
  201. /* Decoding x86 instructions is icky. */
  202. lgread(lg, &insn, physaddr, 1);
  203. /* 0x66 is an "operand prefix". It means it's using the upper 16 bits
  204. of the eax register. */
  205. if (insn == 0x66) {
  206. shift = 16;
  207. /* The instruction is 1 byte so far, read the next byte. */
  208. insnlen = 1;
  209. lgread(lg, &insn, physaddr + insnlen, 1);
  210. }
  211. /* We can ignore the lower bit for the moment and decode the 4 opcodes
  212. * we need to emulate. */
  213. switch (insn & 0xFE) {
  214. case 0xE4: /* in <next byte>,%al */
  215. insnlen += 2;
  216. in = 1;
  217. break;
  218. case 0xEC: /* in (%dx),%al */
  219. insnlen += 1;
  220. in = 1;
  221. break;
  222. case 0xE6: /* out %al,<next byte> */
  223. insnlen += 2;
  224. break;
  225. case 0xEE: /* out %al,(%dx) */
  226. insnlen += 1;
  227. break;
  228. default:
  229. /* OK, we don't know what this is, can't emulate. */
  230. return 0;
  231. }
  232. /* If it was an "IN" instruction, they expect the result to be read
  233. * into %eax, so we change %eax. We always return all-ones, which
  234. * traditionally means "there's nothing there". */
  235. if (in) {
  236. /* Lower bit tells is whether it's a 16 or 32 bit access */
  237. if (insn & 0x1)
  238. lg->regs->eax = 0xFFFFFFFF;
  239. else
  240. lg->regs->eax |= (0xFFFF << shift);
  241. }
  242. /* Finally, we've "done" the instruction, so move past it. */
  243. lg->regs->eip += insnlen;
  244. /* Success! */
  245. return 1;
  246. }
  247. /*H:050 Once we've re-enabled interrupts, we look at why the Guest exited. */
  248. void lguest_arch_handle_trap(struct lguest *lg)
  249. {
  250. switch (lg->regs->trapnum) {
  251. case 13: /* We've intercepted a GPF. */
  252. /* Check if this was one of those annoying IN or OUT
  253. * instructions which we need to emulate. If so, we
  254. * just go back into the Guest after we've done it. */
  255. if (lg->regs->errcode == 0) {
  256. if (emulate_insn(lg))
  257. return;
  258. }
  259. break;
  260. case 14: /* We've intercepted a page fault. */
  261. /* The Guest accessed a virtual address that wasn't
  262. * mapped. This happens a lot: we don't actually set
  263. * up most of the page tables for the Guest at all when
  264. * we start: as it runs it asks for more and more, and
  265. * we set them up as required. In this case, we don't
  266. * even tell the Guest that the fault happened.
  267. *
  268. * The errcode tells whether this was a read or a
  269. * write, and whether kernel or userspace code. */
  270. if (demand_page(lg, lg->arch.last_pagefault, lg->regs->errcode))
  271. return;
  272. /* OK, it's really not there (or not OK): the Guest
  273. * needs to know. We write out the cr2 value so it
  274. * knows where the fault occurred.
  275. *
  276. * Note that if the Guest were really messed up, this
  277. * could happen before it's done the INITIALIZE
  278. * hypercall, so lg->lguest_data will be NULL */
  279. if (lg->lguest_data &&
  280. put_user(lg->arch.last_pagefault, &lg->lguest_data->cr2))
  281. kill_guest(lg, "Writing cr2");
  282. break;
  283. case 7: /* We've intercepted a Device Not Available fault. */
  284. /* If the Guest doesn't want to know, we already
  285. * restored the Floating Point Unit, so we just
  286. * continue without telling it. */
  287. if (!lg->ts)
  288. return;
  289. break;
  290. case 32 ... 255:
  291. /* These values mean a real interrupt occurred, in
  292. * which case the Host handler has already been run.
  293. * We just do a friendly check if another process
  294. * should now be run, then fall through to loop
  295. * around: */
  296. cond_resched();
  297. case LGUEST_TRAP_ENTRY: /* Handled before re-entering Guest */
  298. return;
  299. }
  300. /* We didn't handle the trap, so it needs to go to the Guest. */
  301. if (!deliver_trap(lg, lg->regs->trapnum))
  302. /* If the Guest doesn't have a handler (either it hasn't
  303. * registered any yet, or it's one of the faults we don't let
  304. * it handle), it dies with a cryptic error message. */
  305. kill_guest(lg, "unhandled trap %li at %#lx (%#lx)",
  306. lg->regs->trapnum, lg->regs->eip,
  307. lg->regs->trapnum == 14 ? lg->arch.last_pagefault
  308. : lg->regs->errcode);
  309. }
  310. /* Now we can look at each of the routines this calls, in increasing order of
  311. * complexity: do_hypercalls(), emulate_insn(), maybe_do_interrupt(),
  312. * deliver_trap() and demand_page(). After all those, we'll be ready to
  313. * examine the Switcher, and our philosophical understanding of the Host/Guest
  314. * duality will be complete. :*/
  315. static void adjust_pge(void *on)
  316. {
  317. if (on)
  318. write_cr4(read_cr4() | X86_CR4_PGE);
  319. else
  320. write_cr4(read_cr4() & ~X86_CR4_PGE);
  321. }
  322. /*H:020 Now the Switcher is mapped and every thing else is ready, we need to do
  323. * some more i386-specific initialization. */
  324. void __init lguest_arch_host_init(void)
  325. {
  326. int i;
  327. /* Most of the i386/switcher.S doesn't care that it's been moved; on
  328. * Intel, jumps are relative, and it doesn't access any references to
  329. * external code or data.
  330. *
  331. * The only exception is the interrupt handlers in switcher.S: their
  332. * addresses are placed in a table (default_idt_entries), so we need to
  333. * update the table with the new addresses. switcher_offset() is a
  334. * convenience function which returns the distance between the builtin
  335. * switcher code and the high-mapped copy we just made. */
  336. for (i = 0; i < IDT_ENTRIES; i++)
  337. default_idt_entries[i] += switcher_offset();
  338. /*
  339. * Set up the Switcher's per-cpu areas.
  340. *
  341. * Each CPU gets two pages of its own within the high-mapped region
  342. * (aka. "struct lguest_pages"). Much of this can be initialized now,
  343. * but some depends on what Guest we are running (which is set up in
  344. * copy_in_guest_info()).
  345. */
  346. for_each_possible_cpu(i) {
  347. /* lguest_pages() returns this CPU's two pages. */
  348. struct lguest_pages *pages = lguest_pages(i);
  349. /* This is a convenience pointer to make the code fit one
  350. * statement to a line. */
  351. struct lguest_ro_state *state = &pages->state;
  352. /* The Global Descriptor Table: the Host has a different one
  353. * for each CPU. We keep a descriptor for the GDT which says
  354. * where it is and how big it is (the size is actually the last
  355. * byte, not the size, hence the "-1"). */
  356. state->host_gdt_desc.size = GDT_SIZE-1;
  357. state->host_gdt_desc.address = (long)get_cpu_gdt_table(i);
  358. /* All CPUs on the Host use the same Interrupt Descriptor
  359. * Table, so we just use store_idt(), which gets this CPU's IDT
  360. * descriptor. */
  361. store_idt(&state->host_idt_desc);
  362. /* The descriptors for the Guest's GDT and IDT can be filled
  363. * out now, too. We copy the GDT & IDT into ->guest_gdt and
  364. * ->guest_idt before actually running the Guest. */
  365. state->guest_idt_desc.size = sizeof(state->guest_idt)-1;
  366. state->guest_idt_desc.address = (long)&state->guest_idt;
  367. state->guest_gdt_desc.size = sizeof(state->guest_gdt)-1;
  368. state->guest_gdt_desc.address = (long)&state->guest_gdt;
  369. /* We know where we want the stack to be when the Guest enters
  370. * the switcher: in pages->regs. The stack grows upwards, so
  371. * we start it at the end of that structure. */
  372. state->guest_tss.esp0 = (long)(&pages->regs + 1);
  373. /* And this is the GDT entry to use for the stack: we keep a
  374. * couple of special LGUEST entries. */
  375. state->guest_tss.ss0 = LGUEST_DS;
  376. /* x86 can have a finegrained bitmap which indicates what I/O
  377. * ports the process can use. We set it to the end of our
  378. * structure, meaning "none". */
  379. state->guest_tss.io_bitmap_base = sizeof(state->guest_tss);
  380. /* Some GDT entries are the same across all Guests, so we can
  381. * set them up now. */
  382. setup_default_gdt_entries(state);
  383. /* Most IDT entries are the same for all Guests, too.*/
  384. setup_default_idt_entries(state, default_idt_entries);
  385. /* The Host needs to be able to use the LGUEST segments on this
  386. * CPU, too, so put them in the Host GDT. */
  387. get_cpu_gdt_table(i)[GDT_ENTRY_LGUEST_CS] = FULL_EXEC_SEGMENT;
  388. get_cpu_gdt_table(i)[GDT_ENTRY_LGUEST_DS] = FULL_SEGMENT;
  389. }
  390. /* In the Switcher, we want the %cs segment register to use the
  391. * LGUEST_CS GDT entry: we've put that in the Host and Guest GDTs, so
  392. * it will be undisturbed when we switch. To change %cs and jump we
  393. * need this structure to feed to Intel's "lcall" instruction. */
  394. lguest_entry.offset = (long)switch_to_guest + switcher_offset();
  395. lguest_entry.segment = LGUEST_CS;
  396. /* Finally, we need to turn off "Page Global Enable". PGE is an
  397. * optimization where page table entries are specially marked to show
  398. * they never change. The Host kernel marks all the kernel pages this
  399. * way because it's always present, even when userspace is running.
  400. *
  401. * Lguest breaks this: unbeknownst to the rest of the Host kernel, we
  402. * switch to the Guest kernel. If you don't disable this on all CPUs,
  403. * you'll get really weird bugs that you'll chase for two days.
  404. *
  405. * I used to turn PGE off every time we switched to the Guest and back
  406. * on when we return, but that slowed the Switcher down noticibly. */
  407. /* We don't need the complexity of CPUs coming and going while we're
  408. * doing this. */
  409. lock_cpu_hotplug();
  410. if (cpu_has_pge) { /* We have a broader idea of "global". */
  411. /* Remember that this was originally set (for cleanup). */
  412. cpu_had_pge = 1;
  413. /* adjust_pge is a helper function which sets or unsets the PGE
  414. * bit on its CPU, depending on the argument (0 == unset). */
  415. on_each_cpu(adjust_pge, (void *)0, 0, 1);
  416. /* Turn off the feature in the global feature set. */
  417. clear_bit(X86_FEATURE_PGE, boot_cpu_data.x86_capability);
  418. }
  419. unlock_cpu_hotplug();
  420. };
  421. /*:*/
  422. void __exit lguest_arch_host_fini(void)
  423. {
  424. /* If we had PGE before we started, turn it back on now. */
  425. lock_cpu_hotplug();
  426. if (cpu_had_pge) {
  427. set_bit(X86_FEATURE_PGE, boot_cpu_data.x86_capability);
  428. /* adjust_pge's argument "1" means set PGE. */
  429. on_each_cpu(adjust_pge, (void *)1, 0, 1);
  430. }
  431. unlock_cpu_hotplug();
  432. }