ktlb.S 4.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236
  1. /* arch/sparc64/kernel/ktlb.S: Kernel mapping TLB miss handling.
  2. *
  3. * Copyright (C) 1995, 1997, 2005 David S. Miller <davem@davemloft.net>
  4. * Copyright (C) 1996 Eddie C. Dost (ecd@brainaid.de)
  5. * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
  6. * Copyright (C) 1996,98,99 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
  7. */
  8. #include <linux/config.h>
  9. #include <asm/head.h>
  10. #include <asm/asi.h>
  11. #include <asm/page.h>
  12. #include <asm/pgtable.h>
  13. #include <asm/tsb.h>
  14. .text
  15. .align 32
  16. kvmap_itlb:
  17. /* g6: TAG TARGET */
  18. mov TLB_TAG_ACCESS, %g4
  19. ldxa [%g4] ASI_IMMU, %g4
  20. /* sun4v_itlb_miss branches here with the missing virtual
  21. * address already loaded into %g4
  22. */
  23. kvmap_itlb_4v:
  24. kvmap_itlb_nonlinear:
  25. /* Catch kernel NULL pointer calls. */
  26. sethi %hi(PAGE_SIZE), %g5
  27. cmp %g4, %g5
  28. bleu,pn %xcc, kvmap_dtlb_longpath
  29. nop
  30. KERN_TSB_LOOKUP_TL1(%g4, %g6, %g5, %g1, %g2, %g3, kvmap_itlb_load)
  31. kvmap_itlb_tsb_miss:
  32. sethi %hi(LOW_OBP_ADDRESS), %g5
  33. cmp %g4, %g5
  34. blu,pn %xcc, kvmap_itlb_vmalloc_addr
  35. mov 0x1, %g5
  36. sllx %g5, 32, %g5
  37. cmp %g4, %g5
  38. blu,pn %xcc, kvmap_itlb_obp
  39. nop
  40. kvmap_itlb_vmalloc_addr:
  41. KERN_PGTABLE_WALK(%g4, %g5, %g2, kvmap_itlb_longpath)
  42. KTSB_LOCK_TAG(%g1, %g2, %g7)
  43. /* Load and check PTE. */
  44. ldxa [%g5] ASI_PHYS_USE_EC, %g5
  45. brgez,a,pn %g5, kvmap_itlb_longpath
  46. KTSB_STORE(%g1, %g0)
  47. KTSB_WRITE(%g1, %g5, %g6)
  48. /* fallthrough to TLB load */
  49. kvmap_itlb_load:
  50. 661: stxa %g5, [%g0] ASI_ITLB_DATA_IN
  51. retry
  52. .section .sun4v_2insn_patch, "ax"
  53. .word 661b
  54. nop
  55. nop
  56. .previous
  57. /* For sun4v the ASI_ITLB_DATA_IN store and the retry
  58. * instruction get nop'd out and we get here to branch
  59. * to the sun4v tlb load code. The registers are setup
  60. * as follows:
  61. *
  62. * %g4: vaddr
  63. * %g5: PTE
  64. * %g6: TAG
  65. *
  66. * The sun4v TLB load wants the PTE in %g3 so we fix that
  67. * up here.
  68. */
  69. ba,pt %xcc, sun4v_itlb_load
  70. mov %g5, %g3
  71. kvmap_itlb_longpath:
  72. 661: rdpr %pstate, %g5
  73. wrpr %g5, PSTATE_AG | PSTATE_MG, %pstate
  74. .section .sun4v_2insn_patch, "ax"
  75. .word 661b
  76. nop
  77. nop
  78. .previous
  79. rdpr %tpc, %g5
  80. ba,pt %xcc, sparc64_realfault_common
  81. mov FAULT_CODE_ITLB, %g4
  82. kvmap_itlb_obp:
  83. OBP_TRANS_LOOKUP(%g4, %g5, %g2, %g3, kvmap_itlb_longpath)
  84. KTSB_LOCK_TAG(%g1, %g2, %g7)
  85. KTSB_WRITE(%g1, %g5, %g6)
  86. ba,pt %xcc, kvmap_itlb_load
  87. nop
  88. kvmap_dtlb_obp:
  89. OBP_TRANS_LOOKUP(%g4, %g5, %g2, %g3, kvmap_dtlb_longpath)
  90. KTSB_LOCK_TAG(%g1, %g2, %g7)
  91. KTSB_WRITE(%g1, %g5, %g6)
  92. ba,pt %xcc, kvmap_dtlb_load
  93. nop
  94. .align 32
  95. kvmap_dtlb:
  96. /* %g6: TAG TARGET */
  97. mov TLB_TAG_ACCESS, %g4
  98. ldxa [%g4] ASI_DMMU, %g4
  99. /* sun4v_dtlb_miss branches here with the missing virtual
  100. * address already loaded into %g4
  101. */
  102. kvmap_dtlb_4v:
  103. brgez,pn %g4, kvmap_dtlb_nonlinear
  104. nop
  105. sethi %hi(kern_linear_pte_xor), %g2
  106. ldx [%g2 + %lo(kern_linear_pte_xor)], %g2
  107. .globl kvmap_linear_patch
  108. kvmap_linear_patch:
  109. ba,pt %xcc, kvmap_dtlb_load
  110. xor %g2, %g4, %g5
  111. kvmap_dtlb_vmalloc_addr:
  112. KERN_PGTABLE_WALK(%g4, %g5, %g2, kvmap_dtlb_longpath)
  113. KTSB_LOCK_TAG(%g1, %g2, %g7)
  114. /* Load and check PTE. */
  115. ldxa [%g5] ASI_PHYS_USE_EC, %g5
  116. brgez,a,pn %g5, kvmap_dtlb_longpath
  117. KTSB_STORE(%g1, %g0)
  118. KTSB_WRITE(%g1, %g5, %g6)
  119. /* fallthrough to TLB load */
  120. kvmap_dtlb_load:
  121. 661: stxa %g5, [%g0] ASI_DTLB_DATA_IN ! Reload TLB
  122. retry
  123. .section .sun4v_2insn_patch, "ax"
  124. .word 661b
  125. nop
  126. nop
  127. .previous
  128. /* For sun4v the ASI_DTLB_DATA_IN store and the retry
  129. * instruction get nop'd out and we get here to branch
  130. * to the sun4v tlb load code. The registers are setup
  131. * as follows:
  132. *
  133. * %g4: vaddr
  134. * %g5: PTE
  135. * %g6: TAG
  136. *
  137. * The sun4v TLB load wants the PTE in %g3 so we fix that
  138. * up here.
  139. */
  140. ba,pt %xcc, sun4v_dtlb_load
  141. mov %g5, %g3
  142. kvmap_dtlb_nonlinear:
  143. /* Catch kernel NULL pointer derefs. */
  144. sethi %hi(PAGE_SIZE), %g5
  145. cmp %g4, %g5
  146. bleu,pn %xcc, kvmap_dtlb_longpath
  147. nop
  148. KERN_TSB_LOOKUP_TL1(%g4, %g6, %g5, %g1, %g2, %g3, kvmap_dtlb_load)
  149. kvmap_dtlb_tsbmiss:
  150. sethi %hi(MODULES_VADDR), %g5
  151. cmp %g4, %g5
  152. blu,pn %xcc, kvmap_dtlb_longpath
  153. mov (VMALLOC_END >> 24), %g5
  154. sllx %g5, 24, %g5
  155. cmp %g4, %g5
  156. bgeu,pn %xcc, kvmap_dtlb_longpath
  157. nop
  158. kvmap_check_obp:
  159. sethi %hi(LOW_OBP_ADDRESS), %g5
  160. cmp %g4, %g5
  161. blu,pn %xcc, kvmap_dtlb_vmalloc_addr
  162. mov 0x1, %g5
  163. sllx %g5, 32, %g5
  164. cmp %g4, %g5
  165. blu,pn %xcc, kvmap_dtlb_obp
  166. nop
  167. ba,pt %xcc, kvmap_dtlb_vmalloc_addr
  168. nop
  169. kvmap_dtlb_longpath:
  170. 661: rdpr %pstate, %g5
  171. wrpr %g5, PSTATE_AG | PSTATE_MG, %pstate
  172. .section .sun4v_2insn_patch, "ax"
  173. .word 661b
  174. nop
  175. nop
  176. .previous
  177. rdpr %tl, %g3
  178. cmp %g3, 1
  179. 661: mov TLB_TAG_ACCESS, %g4
  180. ldxa [%g4] ASI_DMMU, %g5
  181. .section .sun4v_2insn_patch, "ax"
  182. .word 661b
  183. mov %g4, %g5
  184. nop
  185. .previous
  186. be,pt %xcc, sparc64_realfault_common
  187. mov FAULT_CODE_DTLB, %g4
  188. ba,pt %xcc, winfix_trampoline
  189. nop