iwl-core.c 58 KB

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  1. /******************************************************************************
  2. *
  3. * GPL LICENSE SUMMARY
  4. *
  5. * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of version 2 of the GNU General Public License as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  19. * USA
  20. *
  21. * The full GNU General Public License is included in this distribution
  22. * in the file called LICENSE.GPL.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *****************************************************************************/
  28. #include <linux/kernel.h>
  29. #include <linux/module.h>
  30. #include <linux/etherdevice.h>
  31. #include <linux/sched.h>
  32. #include <linux/slab.h>
  33. #include <net/mac80211.h>
  34. #include "iwl-eeprom.h"
  35. #include "iwl-dev.h" /* FIXME: remove */
  36. #include "iwl-debug.h"
  37. #include "iwl-core.h"
  38. #include "iwl-io.h"
  39. #include "iwl-power.h"
  40. #include "iwl-sta.h"
  41. #include "iwl-helpers.h"
  42. MODULE_DESCRIPTION("iwl core");
  43. MODULE_VERSION(IWLWIFI_VERSION);
  44. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  45. MODULE_LICENSE("GPL");
  46. /*
  47. * set bt_coex_active to true, uCode will do kill/defer
  48. * every time the priority line is asserted (BT is sending signals on the
  49. * priority line in the PCIx).
  50. * set bt_coex_active to false, uCode will ignore the BT activity and
  51. * perform the normal operation
  52. *
  53. * User might experience transmit issue on some platform due to WiFi/BT
  54. * co-exist problem. The possible behaviors are:
  55. * Able to scan and finding all the available AP
  56. * Not able to associate with any AP
  57. * On those platforms, WiFi communication can be restored by set
  58. * "bt_coex_active" module parameter to "false"
  59. *
  60. * default: bt_coex_active = true (BT_COEX_ENABLE)
  61. */
  62. bool bt_coex_active = true;
  63. EXPORT_SYMBOL_GPL(bt_coex_active);
  64. module_param(bt_coex_active, bool, S_IRUGO);
  65. MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
  66. u32 iwl_debug_level;
  67. EXPORT_SYMBOL(iwl_debug_level);
  68. const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  69. EXPORT_SYMBOL(iwl_bcast_addr);
  70. /* This function both allocates and initializes hw and priv. */
  71. struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg)
  72. {
  73. struct iwl_priv *priv;
  74. /* mac80211 allocates memory for this device instance, including
  75. * space for this driver's private structure */
  76. struct ieee80211_hw *hw;
  77. hw = ieee80211_alloc_hw(sizeof(struct iwl_priv),
  78. cfg->ops->ieee80211_ops);
  79. if (hw == NULL) {
  80. pr_err("%s: Can not allocate network device\n",
  81. cfg->name);
  82. goto out;
  83. }
  84. priv = hw->priv;
  85. priv->hw = hw;
  86. out:
  87. return hw;
  88. }
  89. EXPORT_SYMBOL(iwl_alloc_all);
  90. #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
  91. #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
  92. static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
  93. struct ieee80211_sta_ht_cap *ht_info,
  94. enum ieee80211_band band)
  95. {
  96. u16 max_bit_rate = 0;
  97. u8 rx_chains_num = priv->hw_params.rx_chains_num;
  98. u8 tx_chains_num = priv->hw_params.tx_chains_num;
  99. ht_info->cap = 0;
  100. memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
  101. ht_info->ht_supported = true;
  102. if (priv->cfg->ht_params &&
  103. priv->cfg->ht_params->ht_greenfield_support)
  104. ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
  105. ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
  106. max_bit_rate = MAX_BIT_RATE_20_MHZ;
  107. if (priv->hw_params.ht40_channel & BIT(band)) {
  108. ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  109. ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
  110. ht_info->mcs.rx_mask[4] = 0x01;
  111. max_bit_rate = MAX_BIT_RATE_40_MHZ;
  112. }
  113. if (priv->cfg->mod_params->amsdu_size_8K)
  114. ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  115. ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
  116. if (priv->cfg->bt_params && priv->cfg->bt_params->ampdu_factor)
  117. ht_info->ampdu_factor = priv->cfg->bt_params->ampdu_factor;
  118. ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
  119. if (priv->cfg->bt_params && priv->cfg->bt_params->ampdu_density)
  120. ht_info->ampdu_density = priv->cfg->bt_params->ampdu_density;
  121. ht_info->mcs.rx_mask[0] = 0xFF;
  122. if (rx_chains_num >= 2)
  123. ht_info->mcs.rx_mask[1] = 0xFF;
  124. if (rx_chains_num >= 3)
  125. ht_info->mcs.rx_mask[2] = 0xFF;
  126. /* Highest supported Rx data rate */
  127. max_bit_rate *= rx_chains_num;
  128. WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
  129. ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
  130. /* Tx MCS capabilities */
  131. ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  132. if (tx_chains_num != rx_chains_num) {
  133. ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  134. ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
  135. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
  136. }
  137. }
  138. /**
  139. * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
  140. */
  141. int iwlcore_init_geos(struct iwl_priv *priv)
  142. {
  143. struct iwl_channel_info *ch;
  144. struct ieee80211_supported_band *sband;
  145. struct ieee80211_channel *channels;
  146. struct ieee80211_channel *geo_ch;
  147. struct ieee80211_rate *rates;
  148. int i = 0;
  149. if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  150. priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  151. IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
  152. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  153. return 0;
  154. }
  155. channels = kzalloc(sizeof(struct ieee80211_channel) *
  156. priv->channel_count, GFP_KERNEL);
  157. if (!channels)
  158. return -ENOMEM;
  159. rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
  160. GFP_KERNEL);
  161. if (!rates) {
  162. kfree(channels);
  163. return -ENOMEM;
  164. }
  165. /* 5.2GHz channels start after the 2.4GHz channels */
  166. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  167. sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
  168. /* just OFDM */
  169. sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
  170. sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
  171. if (priv->cfg->sku & IWL_SKU_N)
  172. iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
  173. IEEE80211_BAND_5GHZ);
  174. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  175. sband->channels = channels;
  176. /* OFDM & CCK */
  177. sband->bitrates = rates;
  178. sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
  179. if (priv->cfg->sku & IWL_SKU_N)
  180. iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
  181. IEEE80211_BAND_2GHZ);
  182. priv->ieee_channels = channels;
  183. priv->ieee_rates = rates;
  184. for (i = 0; i < priv->channel_count; i++) {
  185. ch = &priv->channel_info[i];
  186. /* FIXME: might be removed if scan is OK */
  187. if (!is_channel_valid(ch))
  188. continue;
  189. if (is_channel_a_band(ch))
  190. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  191. else
  192. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  193. geo_ch = &sband->channels[sband->n_channels++];
  194. geo_ch->center_freq =
  195. ieee80211_channel_to_frequency(ch->channel,
  196. sband->band);
  197. geo_ch->max_power = ch->max_power_avg;
  198. geo_ch->max_antenna_gain = 0xff;
  199. geo_ch->hw_value = ch->channel;
  200. if (is_channel_valid(ch)) {
  201. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  202. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  203. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  204. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  205. if (ch->flags & EEPROM_CHANNEL_RADAR)
  206. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  207. geo_ch->flags |= ch->ht40_extension_channel;
  208. if (ch->max_power_avg > priv->tx_power_device_lmt)
  209. priv->tx_power_device_lmt = ch->max_power_avg;
  210. } else {
  211. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  212. }
  213. IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
  214. ch->channel, geo_ch->center_freq,
  215. is_channel_a_band(ch) ? "5.2" : "2.4",
  216. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  217. "restricted" : "valid",
  218. geo_ch->flags);
  219. }
  220. if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
  221. priv->cfg->sku & IWL_SKU_A) {
  222. IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
  223. "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
  224. priv->pci_dev->device,
  225. priv->pci_dev->subsystem_device);
  226. priv->cfg->sku &= ~IWL_SKU_A;
  227. }
  228. IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  229. priv->bands[IEEE80211_BAND_2GHZ].n_channels,
  230. priv->bands[IEEE80211_BAND_5GHZ].n_channels);
  231. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  232. return 0;
  233. }
  234. EXPORT_SYMBOL(iwlcore_init_geos);
  235. /*
  236. * iwlcore_free_geos - undo allocations in iwlcore_init_geos
  237. */
  238. void iwlcore_free_geos(struct iwl_priv *priv)
  239. {
  240. kfree(priv->ieee_channels);
  241. kfree(priv->ieee_rates);
  242. clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
  243. }
  244. EXPORT_SYMBOL(iwlcore_free_geos);
  245. static bool iwl_is_channel_extension(struct iwl_priv *priv,
  246. enum ieee80211_band band,
  247. u16 channel, u8 extension_chan_offset)
  248. {
  249. const struct iwl_channel_info *ch_info;
  250. ch_info = iwl_get_channel_info(priv, band, channel);
  251. if (!is_channel_valid(ch_info))
  252. return false;
  253. if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
  254. return !(ch_info->ht40_extension_channel &
  255. IEEE80211_CHAN_NO_HT40PLUS);
  256. else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
  257. return !(ch_info->ht40_extension_channel &
  258. IEEE80211_CHAN_NO_HT40MINUS);
  259. return false;
  260. }
  261. bool iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
  262. struct iwl_rxon_context *ctx,
  263. struct ieee80211_sta_ht_cap *ht_cap)
  264. {
  265. if (!ctx->ht.enabled || !ctx->ht.is_40mhz)
  266. return false;
  267. /*
  268. * We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
  269. * the bit will not set if it is pure 40MHz case
  270. */
  271. if (ht_cap && !ht_cap->ht_supported)
  272. return false;
  273. #ifdef CONFIG_IWLWIFI_DEBUGFS
  274. if (priv->disable_ht40)
  275. return false;
  276. #endif
  277. return iwl_is_channel_extension(priv, priv->band,
  278. le16_to_cpu(ctx->staging.channel),
  279. ctx->ht.extension_chan_offset);
  280. }
  281. EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
  282. static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
  283. {
  284. u16 new_val;
  285. u16 beacon_factor;
  286. /*
  287. * If mac80211 hasn't given us a beacon interval, program
  288. * the default into the device (not checking this here
  289. * would cause the adjustment below to return the maximum
  290. * value, which may break PAN.)
  291. */
  292. if (!beacon_val)
  293. return DEFAULT_BEACON_INTERVAL;
  294. /*
  295. * If the beacon interval we obtained from the peer
  296. * is too large, we'll have to wake up more often
  297. * (and in IBSS case, we'll beacon too much)
  298. *
  299. * For example, if max_beacon_val is 4096, and the
  300. * requested beacon interval is 7000, we'll have to
  301. * use 3500 to be able to wake up on the beacons.
  302. *
  303. * This could badly influence beacon detection stats.
  304. */
  305. beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
  306. new_val = beacon_val / beacon_factor;
  307. if (!new_val)
  308. new_val = max_beacon_val;
  309. return new_val;
  310. }
  311. int iwl_send_rxon_timing(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
  312. {
  313. u64 tsf;
  314. s32 interval_tm, rem;
  315. struct ieee80211_conf *conf = NULL;
  316. u16 beacon_int;
  317. struct ieee80211_vif *vif = ctx->vif;
  318. conf = ieee80211_get_hw_conf(priv->hw);
  319. lockdep_assert_held(&priv->mutex);
  320. memset(&ctx->timing, 0, sizeof(struct iwl_rxon_time_cmd));
  321. ctx->timing.timestamp = cpu_to_le64(priv->timestamp);
  322. ctx->timing.listen_interval = cpu_to_le16(conf->listen_interval);
  323. beacon_int = vif ? vif->bss_conf.beacon_int : 0;
  324. /*
  325. * TODO: For IBSS we need to get atim_window from mac80211,
  326. * for now just always use 0
  327. */
  328. ctx->timing.atim_window = 0;
  329. if (ctx->ctxid == IWL_RXON_CTX_PAN &&
  330. (!ctx->vif || ctx->vif->type != NL80211_IFTYPE_STATION) &&
  331. iwl_is_associated(priv, IWL_RXON_CTX_BSS) &&
  332. priv->contexts[IWL_RXON_CTX_BSS].vif &&
  333. priv->contexts[IWL_RXON_CTX_BSS].vif->bss_conf.beacon_int) {
  334. ctx->timing.beacon_interval =
  335. priv->contexts[IWL_RXON_CTX_BSS].timing.beacon_interval;
  336. beacon_int = le16_to_cpu(ctx->timing.beacon_interval);
  337. } else if (ctx->ctxid == IWL_RXON_CTX_BSS &&
  338. iwl_is_associated(priv, IWL_RXON_CTX_PAN) &&
  339. priv->contexts[IWL_RXON_CTX_PAN].vif &&
  340. priv->contexts[IWL_RXON_CTX_PAN].vif->bss_conf.beacon_int &&
  341. (!iwl_is_associated_ctx(ctx) || !ctx->vif ||
  342. !ctx->vif->bss_conf.beacon_int)) {
  343. ctx->timing.beacon_interval =
  344. priv->contexts[IWL_RXON_CTX_PAN].timing.beacon_interval;
  345. beacon_int = le16_to_cpu(ctx->timing.beacon_interval);
  346. } else {
  347. beacon_int = iwl_adjust_beacon_interval(beacon_int,
  348. priv->hw_params.max_beacon_itrvl * TIME_UNIT);
  349. ctx->timing.beacon_interval = cpu_to_le16(beacon_int);
  350. }
  351. tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
  352. interval_tm = beacon_int * TIME_UNIT;
  353. rem = do_div(tsf, interval_tm);
  354. ctx->timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
  355. ctx->timing.dtim_period = vif ? (vif->bss_conf.dtim_period ?: 1) : 1;
  356. IWL_DEBUG_ASSOC(priv,
  357. "beacon interval %d beacon timer %d beacon tim %d\n",
  358. le16_to_cpu(ctx->timing.beacon_interval),
  359. le32_to_cpu(ctx->timing.beacon_init_val),
  360. le16_to_cpu(ctx->timing.atim_window));
  361. return iwl_send_cmd_pdu(priv, ctx->rxon_timing_cmd,
  362. sizeof(ctx->timing), &ctx->timing);
  363. }
  364. EXPORT_SYMBOL(iwl_send_rxon_timing);
  365. void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, struct iwl_rxon_context *ctx,
  366. int hw_decrypt)
  367. {
  368. struct iwl_rxon_cmd *rxon = &ctx->staging;
  369. if (hw_decrypt)
  370. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  371. else
  372. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  373. }
  374. EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
  375. /* validate RXON structure is valid */
  376. int iwl_check_rxon_cmd(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
  377. {
  378. struct iwl_rxon_cmd *rxon = &ctx->staging;
  379. bool error = false;
  380. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  381. if (rxon->flags & RXON_FLG_TGJ_NARROW_BAND_MSK) {
  382. IWL_WARN(priv, "check 2.4G: wrong narrow\n");
  383. error = true;
  384. }
  385. if (rxon->flags & RXON_FLG_RADAR_DETECT_MSK) {
  386. IWL_WARN(priv, "check 2.4G: wrong radar\n");
  387. error = true;
  388. }
  389. } else {
  390. if (!(rxon->flags & RXON_FLG_SHORT_SLOT_MSK)) {
  391. IWL_WARN(priv, "check 5.2G: not short slot!\n");
  392. error = true;
  393. }
  394. if (rxon->flags & RXON_FLG_CCK_MSK) {
  395. IWL_WARN(priv, "check 5.2G: CCK!\n");
  396. error = true;
  397. }
  398. }
  399. if ((rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1) {
  400. IWL_WARN(priv, "mac/bssid mcast!\n");
  401. error = true;
  402. }
  403. /* make sure basic rates 6Mbps and 1Mbps are supported */
  404. if ((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0 &&
  405. (rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0) {
  406. IWL_WARN(priv, "neither 1 nor 6 are basic\n");
  407. error = true;
  408. }
  409. if (le16_to_cpu(rxon->assoc_id) > 2007) {
  410. IWL_WARN(priv, "aid > 2007\n");
  411. error = true;
  412. }
  413. if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  414. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) {
  415. IWL_WARN(priv, "CCK and short slot\n");
  416. error = true;
  417. }
  418. if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  419. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) {
  420. IWL_WARN(priv, "CCK and auto detect");
  421. error = true;
  422. }
  423. if ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  424. RXON_FLG_TGG_PROTECT_MSK)) ==
  425. RXON_FLG_TGG_PROTECT_MSK) {
  426. IWL_WARN(priv, "TGg but no auto-detect\n");
  427. error = true;
  428. }
  429. if (error)
  430. IWL_WARN(priv, "Tuning to channel %d\n",
  431. le16_to_cpu(rxon->channel));
  432. if (error) {
  433. IWL_ERR(priv, "Invalid RXON\n");
  434. return -EINVAL;
  435. }
  436. return 0;
  437. }
  438. EXPORT_SYMBOL(iwl_check_rxon_cmd);
  439. /**
  440. * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  441. * @priv: staging_rxon is compared to active_rxon
  442. *
  443. * If the RXON structure is changing enough to require a new tune,
  444. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  445. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  446. */
  447. int iwl_full_rxon_required(struct iwl_priv *priv,
  448. struct iwl_rxon_context *ctx)
  449. {
  450. const struct iwl_rxon_cmd *staging = &ctx->staging;
  451. const struct iwl_rxon_cmd *active = &ctx->active;
  452. #define CHK(cond) \
  453. if ((cond)) { \
  454. IWL_DEBUG_INFO(priv, "need full RXON - " #cond "\n"); \
  455. return 1; \
  456. }
  457. #define CHK_NEQ(c1, c2) \
  458. if ((c1) != (c2)) { \
  459. IWL_DEBUG_INFO(priv, "need full RXON - " \
  460. #c1 " != " #c2 " - %d != %d\n", \
  461. (c1), (c2)); \
  462. return 1; \
  463. }
  464. /* These items are only settable from the full RXON command */
  465. CHK(!iwl_is_associated_ctx(ctx));
  466. CHK(compare_ether_addr(staging->bssid_addr, active->bssid_addr));
  467. CHK(compare_ether_addr(staging->node_addr, active->node_addr));
  468. CHK(compare_ether_addr(staging->wlap_bssid_addr,
  469. active->wlap_bssid_addr));
  470. CHK_NEQ(staging->dev_type, active->dev_type);
  471. CHK_NEQ(staging->channel, active->channel);
  472. CHK_NEQ(staging->air_propagation, active->air_propagation);
  473. CHK_NEQ(staging->ofdm_ht_single_stream_basic_rates,
  474. active->ofdm_ht_single_stream_basic_rates);
  475. CHK_NEQ(staging->ofdm_ht_dual_stream_basic_rates,
  476. active->ofdm_ht_dual_stream_basic_rates);
  477. CHK_NEQ(staging->ofdm_ht_triple_stream_basic_rates,
  478. active->ofdm_ht_triple_stream_basic_rates);
  479. CHK_NEQ(staging->assoc_id, active->assoc_id);
  480. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  481. * be updated with the RXON_ASSOC command -- however only some
  482. * flag transitions are allowed using RXON_ASSOC */
  483. /* Check if we are not switching bands */
  484. CHK_NEQ(staging->flags & RXON_FLG_BAND_24G_MSK,
  485. active->flags & RXON_FLG_BAND_24G_MSK);
  486. /* Check if we are switching association toggle */
  487. CHK_NEQ(staging->filter_flags & RXON_FILTER_ASSOC_MSK,
  488. active->filter_flags & RXON_FILTER_ASSOC_MSK);
  489. #undef CHK
  490. #undef CHK_NEQ
  491. return 0;
  492. }
  493. EXPORT_SYMBOL(iwl_full_rxon_required);
  494. u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv,
  495. struct iwl_rxon_context *ctx)
  496. {
  497. /*
  498. * Assign the lowest rate -- should really get this from
  499. * the beacon skb from mac80211.
  500. */
  501. if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK)
  502. return IWL_RATE_1M_PLCP;
  503. else
  504. return IWL_RATE_6M_PLCP;
  505. }
  506. EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
  507. static void _iwl_set_rxon_ht(struct iwl_priv *priv,
  508. struct iwl_ht_config *ht_conf,
  509. struct iwl_rxon_context *ctx)
  510. {
  511. struct iwl_rxon_cmd *rxon = &ctx->staging;
  512. if (!ctx->ht.enabled) {
  513. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  514. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
  515. RXON_FLG_HT40_PROT_MSK |
  516. RXON_FLG_HT_PROT_MSK);
  517. return;
  518. }
  519. /* FIXME: if the definition of ht.protection changed, the "translation"
  520. * will be needed for rxon->flags
  521. */
  522. rxon->flags |= cpu_to_le32(ctx->ht.protection << RXON_FLG_HT_OPERATING_MODE_POS);
  523. /* Set up channel bandwidth:
  524. * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
  525. /* clear the HT channel mode before set the mode */
  526. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  527. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  528. if (iwl_is_ht40_tx_allowed(priv, ctx, NULL)) {
  529. /* pure ht40 */
  530. if (ctx->ht.protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
  531. rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
  532. /* Note: control channel is opposite of extension channel */
  533. switch (ctx->ht.extension_chan_offset) {
  534. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  535. rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  536. break;
  537. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  538. rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  539. break;
  540. }
  541. } else {
  542. /* Note: control channel is opposite of extension channel */
  543. switch (ctx->ht.extension_chan_offset) {
  544. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  545. rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  546. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  547. break;
  548. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  549. rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  550. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  551. break;
  552. case IEEE80211_HT_PARAM_CHA_SEC_NONE:
  553. default:
  554. /* channel location only valid if in Mixed mode */
  555. IWL_ERR(priv, "invalid extension channel offset\n");
  556. break;
  557. }
  558. }
  559. } else {
  560. rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
  561. }
  562. if (priv->cfg->ops->hcmd->set_rxon_chain)
  563. priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
  564. IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
  565. "extension channel offset 0x%x\n",
  566. le32_to_cpu(rxon->flags), ctx->ht.protection,
  567. ctx->ht.extension_chan_offset);
  568. }
  569. void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
  570. {
  571. struct iwl_rxon_context *ctx;
  572. for_each_context(priv, ctx)
  573. _iwl_set_rxon_ht(priv, ht_conf, ctx);
  574. }
  575. EXPORT_SYMBOL(iwl_set_rxon_ht);
  576. /* Return valid, unused, channel for a passive scan to reset the RF */
  577. u8 iwl_get_single_channel_number(struct iwl_priv *priv,
  578. enum ieee80211_band band)
  579. {
  580. const struct iwl_channel_info *ch_info;
  581. int i;
  582. u8 channel = 0;
  583. u8 min, max;
  584. struct iwl_rxon_context *ctx;
  585. if (band == IEEE80211_BAND_5GHZ) {
  586. min = 14;
  587. max = priv->channel_count;
  588. } else {
  589. min = 0;
  590. max = 14;
  591. }
  592. for (i = min; i < max; i++) {
  593. bool busy = false;
  594. for_each_context(priv, ctx) {
  595. busy = priv->channel_info[i].channel ==
  596. le16_to_cpu(ctx->staging.channel);
  597. if (busy)
  598. break;
  599. }
  600. if (busy)
  601. continue;
  602. channel = priv->channel_info[i].channel;
  603. ch_info = iwl_get_channel_info(priv, band, channel);
  604. if (is_channel_valid(ch_info))
  605. break;
  606. }
  607. return channel;
  608. }
  609. EXPORT_SYMBOL(iwl_get_single_channel_number);
  610. /**
  611. * iwl_set_rxon_channel - Set the band and channel values in staging RXON
  612. * @ch: requested channel as a pointer to struct ieee80211_channel
  613. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  614. * in the staging RXON flag structure based on the ch->band
  615. */
  616. int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch,
  617. struct iwl_rxon_context *ctx)
  618. {
  619. enum ieee80211_band band = ch->band;
  620. u16 channel = ch->hw_value;
  621. if ((le16_to_cpu(ctx->staging.channel) == channel) &&
  622. (priv->band == band))
  623. return 0;
  624. ctx->staging.channel = cpu_to_le16(channel);
  625. if (band == IEEE80211_BAND_5GHZ)
  626. ctx->staging.flags &= ~RXON_FLG_BAND_24G_MSK;
  627. else
  628. ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
  629. priv->band = band;
  630. IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
  631. return 0;
  632. }
  633. EXPORT_SYMBOL(iwl_set_rxon_channel);
  634. void iwl_set_flags_for_band(struct iwl_priv *priv,
  635. struct iwl_rxon_context *ctx,
  636. enum ieee80211_band band,
  637. struct ieee80211_vif *vif)
  638. {
  639. if (band == IEEE80211_BAND_5GHZ) {
  640. ctx->staging.flags &=
  641. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  642. | RXON_FLG_CCK_MSK);
  643. ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  644. } else {
  645. /* Copied from iwl_post_associate() */
  646. if (vif && vif->bss_conf.use_short_slot)
  647. ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  648. else
  649. ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  650. ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
  651. ctx->staging.flags |= RXON_FLG_AUTO_DETECT_MSK;
  652. ctx->staging.flags &= ~RXON_FLG_CCK_MSK;
  653. }
  654. }
  655. EXPORT_SYMBOL(iwl_set_flags_for_band);
  656. /*
  657. * initialize rxon structure with default values from eeprom
  658. */
  659. void iwl_connection_init_rx_config(struct iwl_priv *priv,
  660. struct iwl_rxon_context *ctx)
  661. {
  662. const struct iwl_channel_info *ch_info;
  663. memset(&ctx->staging, 0, sizeof(ctx->staging));
  664. if (!ctx->vif) {
  665. ctx->staging.dev_type = ctx->unused_devtype;
  666. } else switch (ctx->vif->type) {
  667. case NL80211_IFTYPE_AP:
  668. ctx->staging.dev_type = ctx->ap_devtype;
  669. break;
  670. case NL80211_IFTYPE_STATION:
  671. ctx->staging.dev_type = ctx->station_devtype;
  672. ctx->staging.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  673. break;
  674. case NL80211_IFTYPE_ADHOC:
  675. ctx->staging.dev_type = ctx->ibss_devtype;
  676. ctx->staging.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  677. ctx->staging.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  678. RXON_FILTER_ACCEPT_GRP_MSK;
  679. break;
  680. default:
  681. IWL_ERR(priv, "Unsupported interface type %d\n",
  682. ctx->vif->type);
  683. break;
  684. }
  685. #if 0
  686. /* TODO: Figure out when short_preamble would be set and cache from
  687. * that */
  688. if (!hw_to_local(priv->hw)->short_preamble)
  689. ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  690. else
  691. ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  692. #endif
  693. ch_info = iwl_get_channel_info(priv, priv->band,
  694. le16_to_cpu(ctx->active.channel));
  695. if (!ch_info)
  696. ch_info = &priv->channel_info[0];
  697. ctx->staging.channel = cpu_to_le16(ch_info->channel);
  698. priv->band = ch_info->band;
  699. iwl_set_flags_for_band(priv, ctx, priv->band, ctx->vif);
  700. ctx->staging.ofdm_basic_rates =
  701. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  702. ctx->staging.cck_basic_rates =
  703. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  704. /* clear both MIX and PURE40 mode flag */
  705. ctx->staging.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
  706. RXON_FLG_CHANNEL_MODE_PURE_40);
  707. if (ctx->vif)
  708. memcpy(ctx->staging.node_addr, ctx->vif->addr, ETH_ALEN);
  709. ctx->staging.ofdm_ht_single_stream_basic_rates = 0xff;
  710. ctx->staging.ofdm_ht_dual_stream_basic_rates = 0xff;
  711. ctx->staging.ofdm_ht_triple_stream_basic_rates = 0xff;
  712. }
  713. EXPORT_SYMBOL(iwl_connection_init_rx_config);
  714. void iwl_set_rate(struct iwl_priv *priv)
  715. {
  716. const struct ieee80211_supported_band *hw = NULL;
  717. struct ieee80211_rate *rate;
  718. struct iwl_rxon_context *ctx;
  719. int i;
  720. hw = iwl_get_hw_mode(priv, priv->band);
  721. if (!hw) {
  722. IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
  723. return;
  724. }
  725. priv->active_rate = 0;
  726. for (i = 0; i < hw->n_bitrates; i++) {
  727. rate = &(hw->bitrates[i]);
  728. if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
  729. priv->active_rate |= (1 << rate->hw_value);
  730. }
  731. IWL_DEBUG_RATE(priv, "Set active_rate = %0x\n", priv->active_rate);
  732. for_each_context(priv, ctx) {
  733. ctx->staging.cck_basic_rates =
  734. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  735. ctx->staging.ofdm_basic_rates =
  736. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  737. }
  738. }
  739. EXPORT_SYMBOL(iwl_set_rate);
  740. void iwl_chswitch_done(struct iwl_priv *priv, bool is_success)
  741. {
  742. /*
  743. * MULTI-FIXME
  744. * See iwl_mac_channel_switch.
  745. */
  746. struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
  747. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  748. return;
  749. if (priv->switch_rxon.switch_in_progress) {
  750. ieee80211_chswitch_done(ctx->vif, is_success);
  751. mutex_lock(&priv->mutex);
  752. priv->switch_rxon.switch_in_progress = false;
  753. mutex_unlock(&priv->mutex);
  754. }
  755. }
  756. EXPORT_SYMBOL(iwl_chswitch_done);
  757. void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
  758. {
  759. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  760. struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
  761. /*
  762. * MULTI-FIXME
  763. * See iwl_mac_channel_switch.
  764. */
  765. struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
  766. struct iwl_rxon_cmd *rxon = (void *)&ctx->active;
  767. if (priv->switch_rxon.switch_in_progress) {
  768. if (!le32_to_cpu(csa->status) &&
  769. (csa->channel == priv->switch_rxon.channel)) {
  770. rxon->channel = csa->channel;
  771. ctx->staging.channel = csa->channel;
  772. IWL_DEBUG_11H(priv, "CSA notif: channel %d\n",
  773. le16_to_cpu(csa->channel));
  774. iwl_chswitch_done(priv, true);
  775. } else {
  776. IWL_ERR(priv, "CSA notif (fail) : channel %d\n",
  777. le16_to_cpu(csa->channel));
  778. iwl_chswitch_done(priv, false);
  779. }
  780. }
  781. }
  782. EXPORT_SYMBOL(iwl_rx_csa);
  783. #ifdef CONFIG_IWLWIFI_DEBUG
  784. void iwl_print_rx_config_cmd(struct iwl_priv *priv,
  785. struct iwl_rxon_context *ctx)
  786. {
  787. struct iwl_rxon_cmd *rxon = &ctx->staging;
  788. IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
  789. iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  790. IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  791. IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  792. IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
  793. le32_to_cpu(rxon->filter_flags));
  794. IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
  795. IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
  796. rxon->ofdm_basic_rates);
  797. IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  798. IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
  799. IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
  800. IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  801. }
  802. EXPORT_SYMBOL(iwl_print_rx_config_cmd);
  803. #endif
  804. /**
  805. * iwl_irq_handle_error - called for HW or SW error interrupt from card
  806. */
  807. void iwl_irq_handle_error(struct iwl_priv *priv)
  808. {
  809. /* Set the FW error flag -- cleared on iwl_down */
  810. set_bit(STATUS_FW_ERROR, &priv->status);
  811. /* Cancel currently queued command. */
  812. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  813. /* W/A for WiFi/WiMAX coex and WiMAX own the RF */
  814. if (priv->cfg->internal_wimax_coex &&
  815. (!(iwl_read_prph(priv, APMG_CLK_CTRL_REG) &
  816. APMS_CLK_VAL_MRB_FUNC_MODE) ||
  817. (iwl_read_prph(priv, APMG_PS_CTRL_REG) &
  818. APMG_PS_CTRL_VAL_RESET_REQ))) {
  819. wake_up_interruptible(&priv->wait_command_queue);
  820. /*
  821. *Keep the restart process from trying to send host
  822. * commands by clearing the INIT status bit
  823. */
  824. clear_bit(STATUS_READY, &priv->status);
  825. IWL_ERR(priv, "RF is used by WiMAX\n");
  826. return;
  827. }
  828. IWL_ERR(priv, "Loaded firmware version: %s\n",
  829. priv->hw->wiphy->fw_version);
  830. priv->cfg->ops->lib->dump_nic_error_log(priv);
  831. if (priv->cfg->ops->lib->dump_csr)
  832. priv->cfg->ops->lib->dump_csr(priv);
  833. if (priv->cfg->ops->lib->dump_fh)
  834. priv->cfg->ops->lib->dump_fh(priv, NULL, false);
  835. priv->cfg->ops->lib->dump_nic_event_log(priv, false, NULL, false);
  836. #ifdef CONFIG_IWLWIFI_DEBUG
  837. if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS)
  838. iwl_print_rx_config_cmd(priv,
  839. &priv->contexts[IWL_RXON_CTX_BSS]);
  840. #endif
  841. wake_up_interruptible(&priv->wait_command_queue);
  842. /* Keep the restart process from trying to send host
  843. * commands by clearing the INIT status bit */
  844. clear_bit(STATUS_READY, &priv->status);
  845. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  846. IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
  847. "Restarting adapter due to uCode error.\n");
  848. if (priv->cfg->mod_params->restart_fw)
  849. queue_work(priv->workqueue, &priv->restart);
  850. }
  851. }
  852. EXPORT_SYMBOL(iwl_irq_handle_error);
  853. static int iwl_apm_stop_master(struct iwl_priv *priv)
  854. {
  855. int ret = 0;
  856. /* stop device's busmaster DMA activity */
  857. iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
  858. ret = iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
  859. CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
  860. if (ret)
  861. IWL_WARN(priv, "Master Disable Timed Out, 100 usec\n");
  862. IWL_DEBUG_INFO(priv, "stop master\n");
  863. return ret;
  864. }
  865. void iwl_apm_stop(struct iwl_priv *priv)
  866. {
  867. IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n");
  868. /* Stop device's DMA activity */
  869. iwl_apm_stop_master(priv);
  870. /* Reset the entire device */
  871. iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  872. udelay(10);
  873. /*
  874. * Clear "initialization complete" bit to move adapter from
  875. * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
  876. */
  877. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  878. }
  879. EXPORT_SYMBOL(iwl_apm_stop);
  880. /*
  881. * Start up NIC's basic functionality after it has been reset
  882. * (e.g. after platform boot, or shutdown via iwl_apm_stop())
  883. * NOTE: This does not load uCode nor start the embedded processor
  884. */
  885. int iwl_apm_init(struct iwl_priv *priv)
  886. {
  887. int ret = 0;
  888. u16 lctl;
  889. IWL_DEBUG_INFO(priv, "Init card's basic functions\n");
  890. /*
  891. * Use "set_bit" below rather than "write", to preserve any hardware
  892. * bits already set by default after reset.
  893. */
  894. /* Disable L0S exit timer (platform NMI Work/Around) */
  895. iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  896. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  897. /*
  898. * Disable L0s without affecting L1;
  899. * don't wait for ICH L0s (ICH bug W/A)
  900. */
  901. iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  902. CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
  903. /* Set FH wait threshold to maximum (HW error during stress W/A) */
  904. iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
  905. /*
  906. * Enable HAP INTA (interrupt from management bus) to
  907. * wake device's PCI Express link L1a -> L0s
  908. * NOTE: This is no-op for 3945 (non-existant bit)
  909. */
  910. iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
  911. CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
  912. /*
  913. * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
  914. * Check if BIOS (or OS) enabled L1-ASPM on this device.
  915. * If so (likely), disable L0S, so device moves directly L0->L1;
  916. * costs negligible amount of power savings.
  917. * If not (unlikely), enable L0S, so there is at least some
  918. * power savings, even without L1.
  919. */
  920. if (priv->cfg->base_params->set_l0s) {
  921. lctl = iwl_pcie_link_ctl(priv);
  922. if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
  923. PCI_CFG_LINK_CTRL_VAL_L1_EN) {
  924. /* L1-ASPM enabled; disable(!) L0S */
  925. iwl_set_bit(priv, CSR_GIO_REG,
  926. CSR_GIO_REG_VAL_L0S_ENABLED);
  927. IWL_DEBUG_POWER(priv, "L1 Enabled; Disabling L0S\n");
  928. } else {
  929. /* L1-ASPM disabled; enable(!) L0S */
  930. iwl_clear_bit(priv, CSR_GIO_REG,
  931. CSR_GIO_REG_VAL_L0S_ENABLED);
  932. IWL_DEBUG_POWER(priv, "L1 Disabled; Enabling L0S\n");
  933. }
  934. }
  935. /* Configure analog phase-lock-loop before activating to D0A */
  936. if (priv->cfg->base_params->pll_cfg_val)
  937. iwl_set_bit(priv, CSR_ANA_PLL_CFG,
  938. priv->cfg->base_params->pll_cfg_val);
  939. /*
  940. * Set "initialization complete" bit to move adapter from
  941. * D0U* --> D0A* (powered-up active) state.
  942. */
  943. iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  944. /*
  945. * Wait for clock stabilization; once stabilized, access to
  946. * device-internal resources is supported, e.g. iwl_write_prph()
  947. * and accesses to uCode SRAM.
  948. */
  949. ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
  950. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  951. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  952. if (ret < 0) {
  953. IWL_DEBUG_INFO(priv, "Failed to init the card\n");
  954. goto out;
  955. }
  956. /*
  957. * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
  958. * BSM (Boostrap State Machine) is only in 3945 and 4965;
  959. * later devices (i.e. 5000 and later) have non-volatile SRAM,
  960. * and don't need BSM to restore data after power-saving sleep.
  961. *
  962. * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
  963. * do not disable clocks. This preserves any hardware bits already
  964. * set by default in "CLK_CTRL_REG" after reset.
  965. */
  966. if (priv->cfg->base_params->use_bsm)
  967. iwl_write_prph(priv, APMG_CLK_EN_REG,
  968. APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
  969. else
  970. iwl_write_prph(priv, APMG_CLK_EN_REG,
  971. APMG_CLK_VAL_DMA_CLK_RQT);
  972. udelay(20);
  973. /* Disable L1-Active */
  974. iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
  975. APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
  976. out:
  977. return ret;
  978. }
  979. EXPORT_SYMBOL(iwl_apm_init);
  980. int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
  981. {
  982. int ret;
  983. s8 prev_tx_power;
  984. lockdep_assert_held(&priv->mutex);
  985. if (priv->tx_power_user_lmt == tx_power && !force)
  986. return 0;
  987. if (!priv->cfg->ops->lib->send_tx_power)
  988. return -EOPNOTSUPP;
  989. if (tx_power < IWLAGN_TX_POWER_TARGET_POWER_MIN) {
  990. IWL_WARN(priv,
  991. "Requested user TXPOWER %d below lower limit %d.\n",
  992. tx_power,
  993. IWLAGN_TX_POWER_TARGET_POWER_MIN);
  994. return -EINVAL;
  995. }
  996. if (tx_power > priv->tx_power_device_lmt) {
  997. IWL_WARN(priv,
  998. "Requested user TXPOWER %d above upper limit %d.\n",
  999. tx_power, priv->tx_power_device_lmt);
  1000. return -EINVAL;
  1001. }
  1002. if (!iwl_is_ready_rf(priv))
  1003. return -EIO;
  1004. /* scan complete use tx_power_next, need to be updated */
  1005. priv->tx_power_next = tx_power;
  1006. if (test_bit(STATUS_SCANNING, &priv->status) && !force) {
  1007. IWL_DEBUG_INFO(priv, "Deferring tx power set while scanning\n");
  1008. return 0;
  1009. }
  1010. prev_tx_power = priv->tx_power_user_lmt;
  1011. priv->tx_power_user_lmt = tx_power;
  1012. ret = priv->cfg->ops->lib->send_tx_power(priv);
  1013. /* if fail to set tx_power, restore the orig. tx power */
  1014. if (ret) {
  1015. priv->tx_power_user_lmt = prev_tx_power;
  1016. priv->tx_power_next = prev_tx_power;
  1017. }
  1018. return ret;
  1019. }
  1020. EXPORT_SYMBOL(iwl_set_tx_power);
  1021. void iwl_send_bt_config(struct iwl_priv *priv)
  1022. {
  1023. struct iwl_bt_cmd bt_cmd = {
  1024. .lead_time = BT_LEAD_TIME_DEF,
  1025. .max_kill = BT_MAX_KILL_DEF,
  1026. .kill_ack_mask = 0,
  1027. .kill_cts_mask = 0,
  1028. };
  1029. if (!bt_coex_active)
  1030. bt_cmd.flags = BT_COEX_DISABLE;
  1031. else
  1032. bt_cmd.flags = BT_COEX_ENABLE;
  1033. priv->bt_enable_flag = bt_cmd.flags;
  1034. IWL_DEBUG_INFO(priv, "BT coex %s\n",
  1035. (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
  1036. if (iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  1037. sizeof(struct iwl_bt_cmd), &bt_cmd))
  1038. IWL_ERR(priv, "failed to send BT Coex Config\n");
  1039. }
  1040. EXPORT_SYMBOL(iwl_send_bt_config);
  1041. int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)
  1042. {
  1043. struct iwl_statistics_cmd statistics_cmd = {
  1044. .configuration_flags =
  1045. clear ? IWL_STATS_CONF_CLEAR_STATS : 0,
  1046. };
  1047. if (flags & CMD_ASYNC)
  1048. return iwl_send_cmd_pdu_async(priv, REPLY_STATISTICS_CMD,
  1049. sizeof(struct iwl_statistics_cmd),
  1050. &statistics_cmd, NULL);
  1051. else
  1052. return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
  1053. sizeof(struct iwl_statistics_cmd),
  1054. &statistics_cmd);
  1055. }
  1056. EXPORT_SYMBOL(iwl_send_statistics_request);
  1057. void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
  1058. struct iwl_rx_mem_buffer *rxb)
  1059. {
  1060. #ifdef CONFIG_IWLWIFI_DEBUG
  1061. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  1062. struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
  1063. IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
  1064. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  1065. #endif
  1066. }
  1067. EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
  1068. void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
  1069. struct iwl_rx_mem_buffer *rxb)
  1070. {
  1071. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  1072. u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
  1073. IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
  1074. "notification for %s:\n", len,
  1075. get_cmd_string(pkt->hdr.cmd));
  1076. iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
  1077. }
  1078. EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
  1079. void iwl_rx_reply_error(struct iwl_priv *priv,
  1080. struct iwl_rx_mem_buffer *rxb)
  1081. {
  1082. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  1083. IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
  1084. "seq 0x%04X ser 0x%08X\n",
  1085. le32_to_cpu(pkt->u.err_resp.error_type),
  1086. get_cmd_string(pkt->u.err_resp.cmd_id),
  1087. pkt->u.err_resp.cmd_id,
  1088. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  1089. le32_to_cpu(pkt->u.err_resp.error_info));
  1090. }
  1091. EXPORT_SYMBOL(iwl_rx_reply_error);
  1092. void iwl_clear_isr_stats(struct iwl_priv *priv)
  1093. {
  1094. memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
  1095. }
  1096. int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
  1097. const struct ieee80211_tx_queue_params *params)
  1098. {
  1099. struct iwl_priv *priv = hw->priv;
  1100. struct iwl_rxon_context *ctx;
  1101. unsigned long flags;
  1102. int q;
  1103. IWL_DEBUG_MAC80211(priv, "enter\n");
  1104. if (!iwl_is_ready_rf(priv)) {
  1105. IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
  1106. return -EIO;
  1107. }
  1108. if (queue >= AC_NUM) {
  1109. IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
  1110. return 0;
  1111. }
  1112. q = AC_NUM - 1 - queue;
  1113. spin_lock_irqsave(&priv->lock, flags);
  1114. /*
  1115. * MULTI-FIXME
  1116. * This may need to be done per interface in nl80211/cfg80211/mac80211.
  1117. */
  1118. for_each_context(priv, ctx) {
  1119. ctx->qos_data.def_qos_parm.ac[q].cw_min =
  1120. cpu_to_le16(params->cw_min);
  1121. ctx->qos_data.def_qos_parm.ac[q].cw_max =
  1122. cpu_to_le16(params->cw_max);
  1123. ctx->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  1124. ctx->qos_data.def_qos_parm.ac[q].edca_txop =
  1125. cpu_to_le16((params->txop * 32));
  1126. ctx->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  1127. }
  1128. spin_unlock_irqrestore(&priv->lock, flags);
  1129. IWL_DEBUG_MAC80211(priv, "leave\n");
  1130. return 0;
  1131. }
  1132. EXPORT_SYMBOL(iwl_mac_conf_tx);
  1133. int iwl_mac_tx_last_beacon(struct ieee80211_hw *hw)
  1134. {
  1135. struct iwl_priv *priv = hw->priv;
  1136. return priv->ibss_manager == IWL_IBSS_MANAGER;
  1137. }
  1138. EXPORT_SYMBOL_GPL(iwl_mac_tx_last_beacon);
  1139. static int iwl_set_mode(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
  1140. {
  1141. iwl_connection_init_rx_config(priv, ctx);
  1142. if (priv->cfg->ops->hcmd->set_rxon_chain)
  1143. priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
  1144. return iwlcore_commit_rxon(priv, ctx);
  1145. }
  1146. static int iwl_setup_interface(struct iwl_priv *priv,
  1147. struct iwl_rxon_context *ctx)
  1148. {
  1149. struct ieee80211_vif *vif = ctx->vif;
  1150. int err;
  1151. lockdep_assert_held(&priv->mutex);
  1152. /*
  1153. * This variable will be correct only when there's just
  1154. * a single context, but all code using it is for hardware
  1155. * that supports only one context.
  1156. */
  1157. priv->iw_mode = vif->type;
  1158. ctx->is_active = true;
  1159. err = iwl_set_mode(priv, ctx);
  1160. if (err) {
  1161. if (!ctx->always_active)
  1162. ctx->is_active = false;
  1163. return err;
  1164. }
  1165. if (priv->cfg->bt_params && priv->cfg->bt_params->advanced_bt_coexist &&
  1166. vif->type == NL80211_IFTYPE_ADHOC) {
  1167. /*
  1168. * pretend to have high BT traffic as long as we
  1169. * are operating in IBSS mode, as this will cause
  1170. * the rate scaling etc. to behave as intended.
  1171. */
  1172. priv->bt_traffic_load = IWL_BT_COEX_TRAFFIC_LOAD_HIGH;
  1173. }
  1174. return 0;
  1175. }
  1176. int iwl_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  1177. {
  1178. struct iwl_priv *priv = hw->priv;
  1179. struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
  1180. struct iwl_rxon_context *tmp, *ctx = NULL;
  1181. int err;
  1182. enum nl80211_iftype viftype = ieee80211_vif_type_p2p(vif);
  1183. IWL_DEBUG_MAC80211(priv, "enter: type %d, addr %pM\n",
  1184. viftype, vif->addr);
  1185. mutex_lock(&priv->mutex);
  1186. if (!iwl_is_ready_rf(priv)) {
  1187. IWL_WARN(priv, "Try to add interface when device not ready\n");
  1188. err = -EINVAL;
  1189. goto out;
  1190. }
  1191. for_each_context(priv, tmp) {
  1192. u32 possible_modes =
  1193. tmp->interface_modes | tmp->exclusive_interface_modes;
  1194. if (tmp->vif) {
  1195. /* check if this busy context is exclusive */
  1196. if (tmp->exclusive_interface_modes &
  1197. BIT(tmp->vif->type)) {
  1198. err = -EINVAL;
  1199. goto out;
  1200. }
  1201. continue;
  1202. }
  1203. if (!(possible_modes & BIT(viftype)))
  1204. continue;
  1205. /* have maybe usable context w/o interface */
  1206. ctx = tmp;
  1207. break;
  1208. }
  1209. if (!ctx) {
  1210. err = -EOPNOTSUPP;
  1211. goto out;
  1212. }
  1213. vif_priv->ctx = ctx;
  1214. ctx->vif = vif;
  1215. err = iwl_setup_interface(priv, ctx);
  1216. if (!err)
  1217. goto out;
  1218. ctx->vif = NULL;
  1219. priv->iw_mode = NL80211_IFTYPE_STATION;
  1220. out:
  1221. mutex_unlock(&priv->mutex);
  1222. IWL_DEBUG_MAC80211(priv, "leave\n");
  1223. return err;
  1224. }
  1225. EXPORT_SYMBOL(iwl_mac_add_interface);
  1226. static void iwl_teardown_interface(struct iwl_priv *priv,
  1227. struct ieee80211_vif *vif,
  1228. bool mode_change)
  1229. {
  1230. struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
  1231. lockdep_assert_held(&priv->mutex);
  1232. if (priv->scan_vif == vif) {
  1233. iwl_scan_cancel_timeout(priv, 200);
  1234. iwl_force_scan_end(priv);
  1235. }
  1236. if (!mode_change) {
  1237. iwl_set_mode(priv, ctx);
  1238. if (!ctx->always_active)
  1239. ctx->is_active = false;
  1240. }
  1241. /*
  1242. * When removing the IBSS interface, overwrite the
  1243. * BT traffic load with the stored one from the last
  1244. * notification, if any. If this is a device that
  1245. * doesn't implement this, this has no effect since
  1246. * both values are the same and zero.
  1247. */
  1248. if (vif->type == NL80211_IFTYPE_ADHOC)
  1249. priv->bt_traffic_load = priv->last_bt_traffic_load;
  1250. }
  1251. void iwl_mac_remove_interface(struct ieee80211_hw *hw,
  1252. struct ieee80211_vif *vif)
  1253. {
  1254. struct iwl_priv *priv = hw->priv;
  1255. struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
  1256. IWL_DEBUG_MAC80211(priv, "enter\n");
  1257. mutex_lock(&priv->mutex);
  1258. WARN_ON(ctx->vif != vif);
  1259. ctx->vif = NULL;
  1260. iwl_teardown_interface(priv, vif, false);
  1261. memset(priv->bssid, 0, ETH_ALEN);
  1262. mutex_unlock(&priv->mutex);
  1263. IWL_DEBUG_MAC80211(priv, "leave\n");
  1264. }
  1265. EXPORT_SYMBOL(iwl_mac_remove_interface);
  1266. int iwl_alloc_txq_mem(struct iwl_priv *priv)
  1267. {
  1268. if (!priv->txq)
  1269. priv->txq = kzalloc(
  1270. sizeof(struct iwl_tx_queue) *
  1271. priv->cfg->base_params->num_of_queues,
  1272. GFP_KERNEL);
  1273. if (!priv->txq) {
  1274. IWL_ERR(priv, "Not enough memory for txq\n");
  1275. return -ENOMEM;
  1276. }
  1277. return 0;
  1278. }
  1279. EXPORT_SYMBOL(iwl_alloc_txq_mem);
  1280. void iwl_free_txq_mem(struct iwl_priv *priv)
  1281. {
  1282. kfree(priv->txq);
  1283. priv->txq = NULL;
  1284. }
  1285. EXPORT_SYMBOL(iwl_free_txq_mem);
  1286. #ifdef CONFIG_IWLWIFI_DEBUGFS
  1287. #define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
  1288. void iwl_reset_traffic_log(struct iwl_priv *priv)
  1289. {
  1290. priv->tx_traffic_idx = 0;
  1291. priv->rx_traffic_idx = 0;
  1292. if (priv->tx_traffic)
  1293. memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
  1294. if (priv->rx_traffic)
  1295. memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
  1296. }
  1297. int iwl_alloc_traffic_mem(struct iwl_priv *priv)
  1298. {
  1299. u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
  1300. if (iwl_debug_level & IWL_DL_TX) {
  1301. if (!priv->tx_traffic) {
  1302. priv->tx_traffic =
  1303. kzalloc(traffic_size, GFP_KERNEL);
  1304. if (!priv->tx_traffic)
  1305. return -ENOMEM;
  1306. }
  1307. }
  1308. if (iwl_debug_level & IWL_DL_RX) {
  1309. if (!priv->rx_traffic) {
  1310. priv->rx_traffic =
  1311. kzalloc(traffic_size, GFP_KERNEL);
  1312. if (!priv->rx_traffic)
  1313. return -ENOMEM;
  1314. }
  1315. }
  1316. iwl_reset_traffic_log(priv);
  1317. return 0;
  1318. }
  1319. EXPORT_SYMBOL(iwl_alloc_traffic_mem);
  1320. void iwl_free_traffic_mem(struct iwl_priv *priv)
  1321. {
  1322. kfree(priv->tx_traffic);
  1323. priv->tx_traffic = NULL;
  1324. kfree(priv->rx_traffic);
  1325. priv->rx_traffic = NULL;
  1326. }
  1327. EXPORT_SYMBOL(iwl_free_traffic_mem);
  1328. void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
  1329. u16 length, struct ieee80211_hdr *header)
  1330. {
  1331. __le16 fc;
  1332. u16 len;
  1333. if (likely(!(iwl_debug_level & IWL_DL_TX)))
  1334. return;
  1335. if (!priv->tx_traffic)
  1336. return;
  1337. fc = header->frame_control;
  1338. if (ieee80211_is_data(fc)) {
  1339. len = (length > IWL_TRAFFIC_ENTRY_SIZE)
  1340. ? IWL_TRAFFIC_ENTRY_SIZE : length;
  1341. memcpy((priv->tx_traffic +
  1342. (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
  1343. header, len);
  1344. priv->tx_traffic_idx =
  1345. (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
  1346. }
  1347. }
  1348. EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame);
  1349. void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
  1350. u16 length, struct ieee80211_hdr *header)
  1351. {
  1352. __le16 fc;
  1353. u16 len;
  1354. if (likely(!(iwl_debug_level & IWL_DL_RX)))
  1355. return;
  1356. if (!priv->rx_traffic)
  1357. return;
  1358. fc = header->frame_control;
  1359. if (ieee80211_is_data(fc)) {
  1360. len = (length > IWL_TRAFFIC_ENTRY_SIZE)
  1361. ? IWL_TRAFFIC_ENTRY_SIZE : length;
  1362. memcpy((priv->rx_traffic +
  1363. (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
  1364. header, len);
  1365. priv->rx_traffic_idx =
  1366. (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
  1367. }
  1368. }
  1369. EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame);
  1370. const char *get_mgmt_string(int cmd)
  1371. {
  1372. switch (cmd) {
  1373. IWL_CMD(MANAGEMENT_ASSOC_REQ);
  1374. IWL_CMD(MANAGEMENT_ASSOC_RESP);
  1375. IWL_CMD(MANAGEMENT_REASSOC_REQ);
  1376. IWL_CMD(MANAGEMENT_REASSOC_RESP);
  1377. IWL_CMD(MANAGEMENT_PROBE_REQ);
  1378. IWL_CMD(MANAGEMENT_PROBE_RESP);
  1379. IWL_CMD(MANAGEMENT_BEACON);
  1380. IWL_CMD(MANAGEMENT_ATIM);
  1381. IWL_CMD(MANAGEMENT_DISASSOC);
  1382. IWL_CMD(MANAGEMENT_AUTH);
  1383. IWL_CMD(MANAGEMENT_DEAUTH);
  1384. IWL_CMD(MANAGEMENT_ACTION);
  1385. default:
  1386. return "UNKNOWN";
  1387. }
  1388. }
  1389. const char *get_ctrl_string(int cmd)
  1390. {
  1391. switch (cmd) {
  1392. IWL_CMD(CONTROL_BACK_REQ);
  1393. IWL_CMD(CONTROL_BACK);
  1394. IWL_CMD(CONTROL_PSPOLL);
  1395. IWL_CMD(CONTROL_RTS);
  1396. IWL_CMD(CONTROL_CTS);
  1397. IWL_CMD(CONTROL_ACK);
  1398. IWL_CMD(CONTROL_CFEND);
  1399. IWL_CMD(CONTROL_CFENDACK);
  1400. default:
  1401. return "UNKNOWN";
  1402. }
  1403. }
  1404. void iwl_clear_traffic_stats(struct iwl_priv *priv)
  1405. {
  1406. memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
  1407. memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
  1408. }
  1409. /*
  1410. * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
  1411. * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
  1412. * Use debugFs to display the rx/rx_statistics
  1413. * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
  1414. * information will be recorded, but DATA pkt still will be recorded
  1415. * for the reason of iwl_led.c need to control the led blinking based on
  1416. * number of tx and rx data.
  1417. *
  1418. */
  1419. void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
  1420. {
  1421. struct traffic_stats *stats;
  1422. if (is_tx)
  1423. stats = &priv->tx_stats;
  1424. else
  1425. stats = &priv->rx_stats;
  1426. if (ieee80211_is_mgmt(fc)) {
  1427. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  1428. case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
  1429. stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
  1430. break;
  1431. case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
  1432. stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
  1433. break;
  1434. case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
  1435. stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
  1436. break;
  1437. case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
  1438. stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
  1439. break;
  1440. case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
  1441. stats->mgmt[MANAGEMENT_PROBE_REQ]++;
  1442. break;
  1443. case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
  1444. stats->mgmt[MANAGEMENT_PROBE_RESP]++;
  1445. break;
  1446. case cpu_to_le16(IEEE80211_STYPE_BEACON):
  1447. stats->mgmt[MANAGEMENT_BEACON]++;
  1448. break;
  1449. case cpu_to_le16(IEEE80211_STYPE_ATIM):
  1450. stats->mgmt[MANAGEMENT_ATIM]++;
  1451. break;
  1452. case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
  1453. stats->mgmt[MANAGEMENT_DISASSOC]++;
  1454. break;
  1455. case cpu_to_le16(IEEE80211_STYPE_AUTH):
  1456. stats->mgmt[MANAGEMENT_AUTH]++;
  1457. break;
  1458. case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
  1459. stats->mgmt[MANAGEMENT_DEAUTH]++;
  1460. break;
  1461. case cpu_to_le16(IEEE80211_STYPE_ACTION):
  1462. stats->mgmt[MANAGEMENT_ACTION]++;
  1463. break;
  1464. }
  1465. } else if (ieee80211_is_ctl(fc)) {
  1466. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  1467. case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
  1468. stats->ctrl[CONTROL_BACK_REQ]++;
  1469. break;
  1470. case cpu_to_le16(IEEE80211_STYPE_BACK):
  1471. stats->ctrl[CONTROL_BACK]++;
  1472. break;
  1473. case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
  1474. stats->ctrl[CONTROL_PSPOLL]++;
  1475. break;
  1476. case cpu_to_le16(IEEE80211_STYPE_RTS):
  1477. stats->ctrl[CONTROL_RTS]++;
  1478. break;
  1479. case cpu_to_le16(IEEE80211_STYPE_CTS):
  1480. stats->ctrl[CONTROL_CTS]++;
  1481. break;
  1482. case cpu_to_le16(IEEE80211_STYPE_ACK):
  1483. stats->ctrl[CONTROL_ACK]++;
  1484. break;
  1485. case cpu_to_le16(IEEE80211_STYPE_CFEND):
  1486. stats->ctrl[CONTROL_CFEND]++;
  1487. break;
  1488. case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
  1489. stats->ctrl[CONTROL_CFENDACK]++;
  1490. break;
  1491. }
  1492. } else {
  1493. /* data */
  1494. stats->data_cnt++;
  1495. stats->data_bytes += len;
  1496. }
  1497. }
  1498. EXPORT_SYMBOL(iwl_update_stats);
  1499. #endif
  1500. static void iwl_force_rf_reset(struct iwl_priv *priv)
  1501. {
  1502. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1503. return;
  1504. if (!iwl_is_any_associated(priv)) {
  1505. IWL_DEBUG_SCAN(priv, "force reset rejected: not associated\n");
  1506. return;
  1507. }
  1508. /*
  1509. * There is no easy and better way to force reset the radio,
  1510. * the only known method is switching channel which will force to
  1511. * reset and tune the radio.
  1512. * Use internal short scan (single channel) operation to should
  1513. * achieve this objective.
  1514. * Driver should reset the radio when number of consecutive missed
  1515. * beacon, or any other uCode error condition detected.
  1516. */
  1517. IWL_DEBUG_INFO(priv, "perform radio reset.\n");
  1518. iwl_internal_short_hw_scan(priv);
  1519. }
  1520. int iwl_force_reset(struct iwl_priv *priv, int mode, bool external)
  1521. {
  1522. struct iwl_force_reset *force_reset;
  1523. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1524. return -EINVAL;
  1525. if (mode >= IWL_MAX_FORCE_RESET) {
  1526. IWL_DEBUG_INFO(priv, "invalid reset request.\n");
  1527. return -EINVAL;
  1528. }
  1529. force_reset = &priv->force_reset[mode];
  1530. force_reset->reset_request_count++;
  1531. if (!external) {
  1532. if (force_reset->last_force_reset_jiffies &&
  1533. time_after(force_reset->last_force_reset_jiffies +
  1534. force_reset->reset_duration, jiffies)) {
  1535. IWL_DEBUG_INFO(priv, "force reset rejected\n");
  1536. force_reset->reset_reject_count++;
  1537. return -EAGAIN;
  1538. }
  1539. }
  1540. force_reset->reset_success_count++;
  1541. force_reset->last_force_reset_jiffies = jiffies;
  1542. IWL_DEBUG_INFO(priv, "perform force reset (%d)\n", mode);
  1543. switch (mode) {
  1544. case IWL_RF_RESET:
  1545. iwl_force_rf_reset(priv);
  1546. break;
  1547. case IWL_FW_RESET:
  1548. /*
  1549. * if the request is from external(ex: debugfs),
  1550. * then always perform the request in regardless the module
  1551. * parameter setting
  1552. * if the request is from internal (uCode error or driver
  1553. * detect failure), then fw_restart module parameter
  1554. * need to be check before performing firmware reload
  1555. */
  1556. if (!external && !priv->cfg->mod_params->restart_fw) {
  1557. IWL_DEBUG_INFO(priv, "Cancel firmware reload based on "
  1558. "module parameter setting\n");
  1559. break;
  1560. }
  1561. IWL_ERR(priv, "On demand firmware reload\n");
  1562. /* Set the FW error flag -- cleared on iwl_down */
  1563. set_bit(STATUS_FW_ERROR, &priv->status);
  1564. wake_up_interruptible(&priv->wait_command_queue);
  1565. /*
  1566. * Keep the restart process from trying to send host
  1567. * commands by clearing the INIT status bit
  1568. */
  1569. clear_bit(STATUS_READY, &priv->status);
  1570. queue_work(priv->workqueue, &priv->restart);
  1571. break;
  1572. }
  1573. return 0;
  1574. }
  1575. int iwl_mac_change_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  1576. enum nl80211_iftype newtype, bool newp2p)
  1577. {
  1578. struct iwl_priv *priv = hw->priv;
  1579. struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
  1580. struct iwl_rxon_context *tmp;
  1581. u32 interface_modes;
  1582. int err;
  1583. newtype = ieee80211_iftype_p2p(newtype, newp2p);
  1584. mutex_lock(&priv->mutex);
  1585. interface_modes = ctx->interface_modes | ctx->exclusive_interface_modes;
  1586. if (!(interface_modes & BIT(newtype))) {
  1587. err = -EBUSY;
  1588. goto out;
  1589. }
  1590. if (ctx->exclusive_interface_modes & BIT(newtype)) {
  1591. for_each_context(priv, tmp) {
  1592. if (ctx == tmp)
  1593. continue;
  1594. if (!tmp->vif)
  1595. continue;
  1596. /*
  1597. * The current mode switch would be exclusive, but
  1598. * another context is active ... refuse the switch.
  1599. */
  1600. err = -EBUSY;
  1601. goto out;
  1602. }
  1603. }
  1604. /* success */
  1605. iwl_teardown_interface(priv, vif, true);
  1606. vif->type = newtype;
  1607. err = iwl_setup_interface(priv, ctx);
  1608. WARN_ON(err);
  1609. /*
  1610. * We've switched internally, but submitting to the
  1611. * device may have failed for some reason. Mask this
  1612. * error, because otherwise mac80211 will not switch
  1613. * (and set the interface type back) and we'll be
  1614. * out of sync with it.
  1615. */
  1616. err = 0;
  1617. out:
  1618. mutex_unlock(&priv->mutex);
  1619. return err;
  1620. }
  1621. EXPORT_SYMBOL(iwl_mac_change_interface);
  1622. /*
  1623. * On every watchdog tick we check (latest) time stamp. If it does not
  1624. * change during timeout period and queue is not empty we reset firmware.
  1625. */
  1626. static int iwl_check_stuck_queue(struct iwl_priv *priv, int cnt)
  1627. {
  1628. struct iwl_tx_queue *txq = &priv->txq[cnt];
  1629. struct iwl_queue *q = &txq->q;
  1630. unsigned long timeout;
  1631. int ret;
  1632. if (q->read_ptr == q->write_ptr) {
  1633. txq->time_stamp = jiffies;
  1634. return 0;
  1635. }
  1636. timeout = txq->time_stamp +
  1637. msecs_to_jiffies(priv->cfg->base_params->wd_timeout);
  1638. if (time_after(jiffies, timeout)) {
  1639. IWL_ERR(priv, "Queue %d stuck for %u ms.\n",
  1640. q->id, priv->cfg->base_params->wd_timeout);
  1641. ret = iwl_force_reset(priv, IWL_FW_RESET, false);
  1642. return (ret == -EAGAIN) ? 0 : 1;
  1643. }
  1644. return 0;
  1645. }
  1646. /*
  1647. * Making watchdog tick be a quarter of timeout assure we will
  1648. * discover the queue hung between timeout and 1.25*timeout
  1649. */
  1650. #define IWL_WD_TICK(timeout) ((timeout) / 4)
  1651. /*
  1652. * Watchdog timer callback, we check each tx queue for stuck, if if hung
  1653. * we reset the firmware. If everything is fine just rearm the timer.
  1654. */
  1655. void iwl_bg_watchdog(unsigned long data)
  1656. {
  1657. struct iwl_priv *priv = (struct iwl_priv *)data;
  1658. int cnt;
  1659. unsigned long timeout;
  1660. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1661. return;
  1662. timeout = priv->cfg->base_params->wd_timeout;
  1663. if (timeout == 0)
  1664. return;
  1665. /* monitor and check for stuck cmd queue */
  1666. if (iwl_check_stuck_queue(priv, priv->cmd_queue))
  1667. return;
  1668. /* monitor and check for other stuck queues */
  1669. if (iwl_is_any_associated(priv)) {
  1670. for (cnt = 0; cnt < priv->hw_params.max_txq_num; cnt++) {
  1671. /* skip as we already checked the command queue */
  1672. if (cnt == priv->cmd_queue)
  1673. continue;
  1674. if (iwl_check_stuck_queue(priv, cnt))
  1675. return;
  1676. }
  1677. }
  1678. mod_timer(&priv->watchdog, jiffies +
  1679. msecs_to_jiffies(IWL_WD_TICK(timeout)));
  1680. }
  1681. EXPORT_SYMBOL(iwl_bg_watchdog);
  1682. void iwl_setup_watchdog(struct iwl_priv *priv)
  1683. {
  1684. unsigned int timeout = priv->cfg->base_params->wd_timeout;
  1685. if (timeout)
  1686. mod_timer(&priv->watchdog,
  1687. jiffies + msecs_to_jiffies(IWL_WD_TICK(timeout)));
  1688. else
  1689. del_timer(&priv->watchdog);
  1690. }
  1691. EXPORT_SYMBOL(iwl_setup_watchdog);
  1692. /*
  1693. * extended beacon time format
  1694. * time in usec will be changed into a 32-bit value in extended:internal format
  1695. * the extended part is the beacon counts
  1696. * the internal part is the time in usec within one beacon interval
  1697. */
  1698. u32 iwl_usecs_to_beacons(struct iwl_priv *priv, u32 usec, u32 beacon_interval)
  1699. {
  1700. u32 quot;
  1701. u32 rem;
  1702. u32 interval = beacon_interval * TIME_UNIT;
  1703. if (!interval || !usec)
  1704. return 0;
  1705. quot = (usec / interval) &
  1706. (iwl_beacon_time_mask_high(priv,
  1707. priv->hw_params.beacon_time_tsf_bits) >>
  1708. priv->hw_params.beacon_time_tsf_bits);
  1709. rem = (usec % interval) & iwl_beacon_time_mask_low(priv,
  1710. priv->hw_params.beacon_time_tsf_bits);
  1711. return (quot << priv->hw_params.beacon_time_tsf_bits) + rem;
  1712. }
  1713. EXPORT_SYMBOL(iwl_usecs_to_beacons);
  1714. /* base is usually what we get from ucode with each received frame,
  1715. * the same as HW timer counter counting down
  1716. */
  1717. __le32 iwl_add_beacon_time(struct iwl_priv *priv, u32 base,
  1718. u32 addon, u32 beacon_interval)
  1719. {
  1720. u32 base_low = base & iwl_beacon_time_mask_low(priv,
  1721. priv->hw_params.beacon_time_tsf_bits);
  1722. u32 addon_low = addon & iwl_beacon_time_mask_low(priv,
  1723. priv->hw_params.beacon_time_tsf_bits);
  1724. u32 interval = beacon_interval * TIME_UNIT;
  1725. u32 res = (base & iwl_beacon_time_mask_high(priv,
  1726. priv->hw_params.beacon_time_tsf_bits)) +
  1727. (addon & iwl_beacon_time_mask_high(priv,
  1728. priv->hw_params.beacon_time_tsf_bits));
  1729. if (base_low > addon_low)
  1730. res += base_low - addon_low;
  1731. else if (base_low < addon_low) {
  1732. res += interval + base_low - addon_low;
  1733. res += (1 << priv->hw_params.beacon_time_tsf_bits);
  1734. } else
  1735. res += (1 << priv->hw_params.beacon_time_tsf_bits);
  1736. return cpu_to_le32(res);
  1737. }
  1738. EXPORT_SYMBOL(iwl_add_beacon_time);
  1739. #ifdef CONFIG_PM
  1740. int iwl_pci_suspend(struct device *device)
  1741. {
  1742. struct pci_dev *pdev = to_pci_dev(device);
  1743. struct iwl_priv *priv = pci_get_drvdata(pdev);
  1744. /*
  1745. * This function is called when system goes into suspend state
  1746. * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
  1747. * first but since iwl_mac_stop() has no knowledge of who the caller is,
  1748. * it will not call apm_ops.stop() to stop the DMA operation.
  1749. * Calling apm_ops.stop here to make sure we stop the DMA.
  1750. */
  1751. iwl_apm_stop(priv);
  1752. return 0;
  1753. }
  1754. EXPORT_SYMBOL(iwl_pci_suspend);
  1755. int iwl_pci_resume(struct device *device)
  1756. {
  1757. struct pci_dev *pdev = to_pci_dev(device);
  1758. struct iwl_priv *priv = pci_get_drvdata(pdev);
  1759. bool hw_rfkill = false;
  1760. /*
  1761. * We disable the RETRY_TIMEOUT register (0x41) to keep
  1762. * PCI Tx retries from interfering with C3 CPU state.
  1763. */
  1764. pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
  1765. iwl_enable_interrupts(priv);
  1766. if (!(iwl_read32(priv, CSR_GP_CNTRL) &
  1767. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  1768. hw_rfkill = true;
  1769. if (hw_rfkill)
  1770. set_bit(STATUS_RF_KILL_HW, &priv->status);
  1771. else
  1772. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  1773. wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rfkill);
  1774. return 0;
  1775. }
  1776. EXPORT_SYMBOL(iwl_pci_resume);
  1777. const struct dev_pm_ops iwl_pm_ops = {
  1778. .suspend = iwl_pci_suspend,
  1779. .resume = iwl_pci_resume,
  1780. .freeze = iwl_pci_suspend,
  1781. .thaw = iwl_pci_resume,
  1782. .poweroff = iwl_pci_suspend,
  1783. .restore = iwl_pci_resume,
  1784. };
  1785. EXPORT_SYMBOL(iwl_pm_ops);
  1786. #endif /* CONFIG_PM */