netxen_nic_init.c 35 KB

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  1. /*
  2. * Copyright (C) 2003 - 2006 NetXen, Inc.
  3. * All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License
  7. * as published by the Free Software Foundation; either version 2
  8. * of the License, or (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
  18. * MA 02111-1307, USA.
  19. *
  20. * The full GNU General Public License is included in this distribution
  21. * in the file called LICENSE.
  22. *
  23. * Contact Information:
  24. * info@netxen.com
  25. * NetXen,
  26. * 3965 Freedom Circle, Fourth floor,
  27. * Santa Clara, CA 95054
  28. *
  29. *
  30. * Source file for NIC routines to initialize the Phantom Hardware
  31. *
  32. */
  33. #include <linux/netdevice.h>
  34. #include <linux/delay.h>
  35. #include "netxen_nic.h"
  36. #include "netxen_nic_hw.h"
  37. #include "netxen_nic_phan_reg.h"
  38. struct crb_addr_pair {
  39. u32 addr;
  40. u32 data;
  41. };
  42. #define NETXEN_MAX_CRB_XFORM 60
  43. static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM];
  44. #define NETXEN_ADDR_ERROR (0xffffffff)
  45. #define crb_addr_transform(name) \
  46. crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \
  47. NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20
  48. #define NETXEN_NIC_XDMA_RESET 0x8000ff
  49. static void netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
  50. uint32_t ctx, uint32_t ringid);
  51. #if 0
  52. static void netxen_nic_locked_write_reg(struct netxen_adapter *adapter,
  53. unsigned long off, int *data)
  54. {
  55. void __iomem *addr = pci_base_offset(adapter, off);
  56. writel(*data, addr);
  57. }
  58. #endif /* 0 */
  59. static void crb_addr_transform_setup(void)
  60. {
  61. crb_addr_transform(XDMA);
  62. crb_addr_transform(TIMR);
  63. crb_addr_transform(SRE);
  64. crb_addr_transform(SQN3);
  65. crb_addr_transform(SQN2);
  66. crb_addr_transform(SQN1);
  67. crb_addr_transform(SQN0);
  68. crb_addr_transform(SQS3);
  69. crb_addr_transform(SQS2);
  70. crb_addr_transform(SQS1);
  71. crb_addr_transform(SQS0);
  72. crb_addr_transform(RPMX7);
  73. crb_addr_transform(RPMX6);
  74. crb_addr_transform(RPMX5);
  75. crb_addr_transform(RPMX4);
  76. crb_addr_transform(RPMX3);
  77. crb_addr_transform(RPMX2);
  78. crb_addr_transform(RPMX1);
  79. crb_addr_transform(RPMX0);
  80. crb_addr_transform(ROMUSB);
  81. crb_addr_transform(SN);
  82. crb_addr_transform(QMN);
  83. crb_addr_transform(QMS);
  84. crb_addr_transform(PGNI);
  85. crb_addr_transform(PGND);
  86. crb_addr_transform(PGN3);
  87. crb_addr_transform(PGN2);
  88. crb_addr_transform(PGN1);
  89. crb_addr_transform(PGN0);
  90. crb_addr_transform(PGSI);
  91. crb_addr_transform(PGSD);
  92. crb_addr_transform(PGS3);
  93. crb_addr_transform(PGS2);
  94. crb_addr_transform(PGS1);
  95. crb_addr_transform(PGS0);
  96. crb_addr_transform(PS);
  97. crb_addr_transform(PH);
  98. crb_addr_transform(NIU);
  99. crb_addr_transform(I2Q);
  100. crb_addr_transform(EG);
  101. crb_addr_transform(MN);
  102. crb_addr_transform(MS);
  103. crb_addr_transform(CAS2);
  104. crb_addr_transform(CAS1);
  105. crb_addr_transform(CAS0);
  106. crb_addr_transform(CAM);
  107. crb_addr_transform(C2C1);
  108. crb_addr_transform(C2C0);
  109. crb_addr_transform(SMB);
  110. }
  111. int netxen_init_firmware(struct netxen_adapter *adapter)
  112. {
  113. u32 state = 0, loops = 0, err = 0;
  114. /* Window 1 call */
  115. state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
  116. if (state == PHAN_INITIALIZE_ACK)
  117. return 0;
  118. while (state != PHAN_INITIALIZE_COMPLETE && loops < 2000) {
  119. udelay(100);
  120. /* Window 1 call */
  121. state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
  122. loops++;
  123. }
  124. if (loops >= 2000) {
  125. printk(KERN_ERR "Cmd Peg initialization not complete:%x.\n",
  126. state);
  127. err = -EIO;
  128. return err;
  129. }
  130. /* Window 1 call */
  131. writel(INTR_SCHEME_PERPORT,
  132. NETXEN_CRB_NORMALIZE(adapter, CRB_NIC_CAPABILITIES_HOST));
  133. writel(MSI_MODE_MULTIFUNC,
  134. NETXEN_CRB_NORMALIZE(adapter, CRB_NIC_MSI_MODE_HOST));
  135. writel(MPORT_MULTI_FUNCTION_MODE,
  136. NETXEN_CRB_NORMALIZE(adapter, CRB_MPORT_MODE));
  137. writel(PHAN_INITIALIZE_ACK,
  138. NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
  139. return err;
  140. }
  141. void netxen_initialize_adapter_sw(struct netxen_adapter *adapter)
  142. {
  143. int ctxid, ring;
  144. u32 i;
  145. u32 num_rx_bufs = 0;
  146. struct netxen_rcv_desc_ctx *rcv_desc;
  147. DPRINTK(INFO, "initializing some queues: %p\n", adapter);
  148. for (ctxid = 0; ctxid < MAX_RCV_CTX; ++ctxid) {
  149. for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
  150. struct netxen_rx_buffer *rx_buf;
  151. rcv_desc = &adapter->recv_ctx[ctxid].rcv_desc[ring];
  152. rcv_desc->begin_alloc = 0;
  153. rx_buf = rcv_desc->rx_buf_arr;
  154. num_rx_bufs = rcv_desc->max_rx_desc_count;
  155. /*
  156. * Now go through all of them, set reference handles
  157. * and put them in the queues.
  158. */
  159. for (i = 0; i < num_rx_bufs; i++) {
  160. rx_buf->ref_handle = i;
  161. rx_buf->state = NETXEN_BUFFER_FREE;
  162. DPRINTK(INFO, "Rx buf:ctx%d i(%d) rx_buf:"
  163. "%p\n", ctxid, i, rx_buf);
  164. rx_buf++;
  165. }
  166. }
  167. }
  168. }
  169. void netxen_initialize_adapter_ops(struct netxen_adapter *adapter)
  170. {
  171. switch (adapter->ahw.board_type) {
  172. case NETXEN_NIC_GBE:
  173. adapter->enable_phy_interrupts =
  174. netxen_niu_gbe_enable_phy_interrupts;
  175. adapter->disable_phy_interrupts =
  176. netxen_niu_gbe_disable_phy_interrupts;
  177. adapter->handle_phy_intr = netxen_nic_gbe_handle_phy_intr;
  178. adapter->macaddr_set = netxen_niu_macaddr_set;
  179. adapter->set_mtu = netxen_nic_set_mtu_gb;
  180. adapter->set_promisc = netxen_niu_set_promiscuous_mode;
  181. adapter->phy_read = netxen_niu_gbe_phy_read;
  182. adapter->phy_write = netxen_niu_gbe_phy_write;
  183. adapter->init_niu = netxen_nic_init_niu_gb;
  184. adapter->stop_port = netxen_niu_disable_gbe_port;
  185. break;
  186. case NETXEN_NIC_XGBE:
  187. adapter->enable_phy_interrupts =
  188. netxen_niu_xgbe_enable_phy_interrupts;
  189. adapter->disable_phy_interrupts =
  190. netxen_niu_xgbe_disable_phy_interrupts;
  191. adapter->handle_phy_intr = netxen_nic_xgbe_handle_phy_intr;
  192. adapter->macaddr_set = netxen_niu_xg_macaddr_set;
  193. adapter->set_mtu = netxen_nic_set_mtu_xgb;
  194. adapter->init_port = netxen_niu_xg_init_port;
  195. adapter->set_promisc = netxen_niu_xg_set_promiscuous_mode;
  196. adapter->stop_port = netxen_niu_disable_xg_port;
  197. break;
  198. default:
  199. break;
  200. }
  201. }
  202. /*
  203. * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB
  204. * address to external PCI CRB address.
  205. */
  206. static u32 netxen_decode_crb_addr(u32 addr)
  207. {
  208. int i;
  209. u32 base_addr, offset, pci_base;
  210. crb_addr_transform_setup();
  211. pci_base = NETXEN_ADDR_ERROR;
  212. base_addr = addr & 0xfff00000;
  213. offset = addr & 0x000fffff;
  214. for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) {
  215. if (crb_addr_xform[i] == base_addr) {
  216. pci_base = i << 20;
  217. break;
  218. }
  219. }
  220. if (pci_base == NETXEN_ADDR_ERROR)
  221. return pci_base;
  222. else
  223. return (pci_base + offset);
  224. }
  225. static long rom_max_timeout = 100;
  226. static long rom_lock_timeout = 10000;
  227. #if 0
  228. static long rom_write_timeout = 700;
  229. #endif
  230. static int rom_lock(struct netxen_adapter *adapter)
  231. {
  232. int iter;
  233. u32 done = 0;
  234. int timeout = 0;
  235. while (!done) {
  236. /* acquire semaphore2 from PCI HW block */
  237. netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_LOCK),
  238. &done);
  239. if (done == 1)
  240. break;
  241. if (timeout >= rom_lock_timeout)
  242. return -EIO;
  243. timeout++;
  244. /*
  245. * Yield CPU
  246. */
  247. if (!in_atomic())
  248. schedule();
  249. else {
  250. for (iter = 0; iter < 20; iter++)
  251. cpu_relax(); /*This a nop instr on i386 */
  252. }
  253. }
  254. netxen_nic_reg_write(adapter, NETXEN_ROM_LOCK_ID, ROM_LOCK_DRIVER);
  255. return 0;
  256. }
  257. static int netxen_wait_rom_done(struct netxen_adapter *adapter)
  258. {
  259. long timeout = 0;
  260. long done = 0;
  261. while (done == 0) {
  262. done = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_GLB_STATUS);
  263. done &= 2;
  264. timeout++;
  265. if (timeout >= rom_max_timeout) {
  266. printk("Timeout reached waiting for rom done");
  267. return -EIO;
  268. }
  269. }
  270. return 0;
  271. }
  272. #if 0
  273. static int netxen_rom_wren(struct netxen_adapter *adapter)
  274. {
  275. /* Set write enable latch in ROM status register */
  276. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
  277. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
  278. M25P_INSTR_WREN);
  279. if (netxen_wait_rom_done(adapter)) {
  280. return -1;
  281. }
  282. return 0;
  283. }
  284. static unsigned int netxen_rdcrbreg(struct netxen_adapter *adapter,
  285. unsigned int addr)
  286. {
  287. unsigned int data = 0xdeaddead;
  288. data = netxen_nic_reg_read(adapter, addr);
  289. return data;
  290. }
  291. static int netxen_do_rom_rdsr(struct netxen_adapter *adapter)
  292. {
  293. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
  294. M25P_INSTR_RDSR);
  295. if (netxen_wait_rom_done(adapter)) {
  296. return -1;
  297. }
  298. return netxen_rdcrbreg(adapter, NETXEN_ROMUSB_ROM_RDATA);
  299. }
  300. #endif
  301. static void netxen_rom_unlock(struct netxen_adapter *adapter)
  302. {
  303. u32 val;
  304. /* release semaphore2 */
  305. netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_UNLOCK), &val);
  306. }
  307. #if 0
  308. static int netxen_rom_wip_poll(struct netxen_adapter *adapter)
  309. {
  310. long timeout = 0;
  311. long wip = 1;
  312. int val;
  313. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
  314. while (wip != 0) {
  315. val = netxen_do_rom_rdsr(adapter);
  316. wip = val & 1;
  317. timeout++;
  318. if (timeout > rom_max_timeout) {
  319. return -1;
  320. }
  321. }
  322. return 0;
  323. }
  324. static int do_rom_fast_write(struct netxen_adapter *adapter, int addr,
  325. int data)
  326. {
  327. if (netxen_rom_wren(adapter)) {
  328. return -1;
  329. }
  330. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_WDATA, data);
  331. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
  332. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
  333. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
  334. M25P_INSTR_PP);
  335. if (netxen_wait_rom_done(adapter)) {
  336. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
  337. return -1;
  338. }
  339. return netxen_rom_wip_poll(adapter);
  340. }
  341. #endif
  342. static int do_rom_fast_read(struct netxen_adapter *adapter,
  343. int addr, int *valp)
  344. {
  345. cond_resched();
  346. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
  347. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
  348. udelay(100); /* prevent bursting on CRB */
  349. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
  350. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb);
  351. if (netxen_wait_rom_done(adapter)) {
  352. printk("Error waiting for rom done\n");
  353. return -EIO;
  354. }
  355. /* reset abyte_cnt and dummy_byte_cnt */
  356. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
  357. udelay(100); /* prevent bursting on CRB */
  358. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
  359. *valp = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_ROM_RDATA);
  360. return 0;
  361. }
  362. static int do_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
  363. u8 *bytes, size_t size)
  364. {
  365. int addridx;
  366. int ret = 0;
  367. for (addridx = addr; addridx < (addr + size); addridx += 4) {
  368. int v;
  369. ret = do_rom_fast_read(adapter, addridx, &v);
  370. if (ret != 0)
  371. break;
  372. *(__le32 *)bytes = cpu_to_le32(v);
  373. bytes += 4;
  374. }
  375. return ret;
  376. }
  377. int
  378. netxen_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
  379. u8 *bytes, size_t size)
  380. {
  381. int ret;
  382. ret = rom_lock(adapter);
  383. if (ret < 0)
  384. return ret;
  385. ret = do_rom_fast_read_words(adapter, addr, bytes, size);
  386. netxen_rom_unlock(adapter);
  387. return ret;
  388. }
  389. int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
  390. {
  391. int ret;
  392. if (rom_lock(adapter) != 0)
  393. return -EIO;
  394. ret = do_rom_fast_read(adapter, addr, valp);
  395. netxen_rom_unlock(adapter);
  396. return ret;
  397. }
  398. #if 0
  399. int netxen_rom_fast_write(struct netxen_adapter *adapter, int addr, int data)
  400. {
  401. int ret = 0;
  402. if (rom_lock(adapter) != 0) {
  403. return -1;
  404. }
  405. ret = do_rom_fast_write(adapter, addr, data);
  406. netxen_rom_unlock(adapter);
  407. return ret;
  408. }
  409. static int do_rom_fast_write_words(struct netxen_adapter *adapter,
  410. int addr, u8 *bytes, size_t size)
  411. {
  412. int addridx = addr;
  413. int ret = 0;
  414. while (addridx < (addr + size)) {
  415. int last_attempt = 0;
  416. int timeout = 0;
  417. int data;
  418. data = le32_to_cpu((*(__le32*)bytes));
  419. ret = do_rom_fast_write(adapter, addridx, data);
  420. if (ret < 0)
  421. return ret;
  422. while(1) {
  423. int data1;
  424. ret = do_rom_fast_read(adapter, addridx, &data1);
  425. if (ret < 0)
  426. return ret;
  427. if (data1 == data)
  428. break;
  429. if (timeout++ >= rom_write_timeout) {
  430. if (last_attempt++ < 4) {
  431. ret = do_rom_fast_write(adapter,
  432. addridx, data);
  433. if (ret < 0)
  434. return ret;
  435. }
  436. else {
  437. printk(KERN_INFO "Data write did not "
  438. "succeed at address 0x%x\n", addridx);
  439. break;
  440. }
  441. }
  442. }
  443. bytes += 4;
  444. addridx += 4;
  445. }
  446. return ret;
  447. }
  448. int netxen_rom_fast_write_words(struct netxen_adapter *adapter, int addr,
  449. u8 *bytes, size_t size)
  450. {
  451. int ret = 0;
  452. ret = rom_lock(adapter);
  453. if (ret < 0)
  454. return ret;
  455. ret = do_rom_fast_write_words(adapter, addr, bytes, size);
  456. netxen_rom_unlock(adapter);
  457. return ret;
  458. }
  459. static int netxen_rom_wrsr(struct netxen_adapter *adapter, int data)
  460. {
  461. int ret;
  462. ret = netxen_rom_wren(adapter);
  463. if (ret < 0)
  464. return ret;
  465. netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_ROM_WDATA, data);
  466. netxen_crb_writelit_adapter(adapter,
  467. NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0x1);
  468. ret = netxen_wait_rom_done(adapter);
  469. if (ret < 0)
  470. return ret;
  471. return netxen_rom_wip_poll(adapter);
  472. }
  473. static int netxen_rom_rdsr(struct netxen_adapter *adapter)
  474. {
  475. int ret;
  476. ret = rom_lock(adapter);
  477. if (ret < 0)
  478. return ret;
  479. ret = netxen_do_rom_rdsr(adapter);
  480. netxen_rom_unlock(adapter);
  481. return ret;
  482. }
  483. int netxen_backup_crbinit(struct netxen_adapter *adapter)
  484. {
  485. int ret = FLASH_SUCCESS;
  486. int val;
  487. char *buffer = kmalloc(NETXEN_FLASH_SECTOR_SIZE, GFP_KERNEL);
  488. if (!buffer)
  489. return -ENOMEM;
  490. /* unlock sector 63 */
  491. val = netxen_rom_rdsr(adapter);
  492. val = val & 0xe3;
  493. ret = netxen_rom_wrsr(adapter, val);
  494. if (ret != FLASH_SUCCESS)
  495. goto out_kfree;
  496. ret = netxen_rom_wip_poll(adapter);
  497. if (ret != FLASH_SUCCESS)
  498. goto out_kfree;
  499. /* copy sector 0 to sector 63 */
  500. ret = netxen_rom_fast_read_words(adapter, NETXEN_CRBINIT_START,
  501. buffer, NETXEN_FLASH_SECTOR_SIZE);
  502. if (ret != FLASH_SUCCESS)
  503. goto out_kfree;
  504. ret = netxen_rom_fast_write_words(adapter, NETXEN_FIXED_START,
  505. buffer, NETXEN_FLASH_SECTOR_SIZE);
  506. if (ret != FLASH_SUCCESS)
  507. goto out_kfree;
  508. /* lock sector 63 */
  509. val = netxen_rom_rdsr(adapter);
  510. if (!(val & 0x8)) {
  511. val |= (0x1 << 2);
  512. /* lock sector 63 */
  513. if (netxen_rom_wrsr(adapter, val) == 0) {
  514. ret = netxen_rom_wip_poll(adapter);
  515. if (ret != FLASH_SUCCESS)
  516. goto out_kfree;
  517. /* lock SR writes */
  518. ret = netxen_rom_wip_poll(adapter);
  519. if (ret != FLASH_SUCCESS)
  520. goto out_kfree;
  521. }
  522. }
  523. out_kfree:
  524. kfree(buffer);
  525. return ret;
  526. }
  527. static int netxen_do_rom_se(struct netxen_adapter *adapter, int addr)
  528. {
  529. netxen_rom_wren(adapter);
  530. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
  531. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
  532. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
  533. M25P_INSTR_SE);
  534. if (netxen_wait_rom_done(adapter)) {
  535. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
  536. return -1;
  537. }
  538. return netxen_rom_wip_poll(adapter);
  539. }
  540. static void check_erased_flash(struct netxen_adapter *adapter, int addr)
  541. {
  542. int i;
  543. int val;
  544. int count = 0, erased_errors = 0;
  545. int range;
  546. range = (addr == NETXEN_USER_START) ?
  547. NETXEN_FIXED_START : addr + NETXEN_FLASH_SECTOR_SIZE;
  548. for (i = addr; i < range; i += 4) {
  549. netxen_rom_fast_read(adapter, i, &val);
  550. if (val != 0xffffffff)
  551. erased_errors++;
  552. count++;
  553. }
  554. if (erased_errors)
  555. printk(KERN_INFO "0x%x out of 0x%x words fail to be erased "
  556. "for sector address: %x\n", erased_errors, count, addr);
  557. }
  558. int netxen_rom_se(struct netxen_adapter *adapter, int addr)
  559. {
  560. int ret = 0;
  561. if (rom_lock(adapter) != 0) {
  562. return -1;
  563. }
  564. ret = netxen_do_rom_se(adapter, addr);
  565. netxen_rom_unlock(adapter);
  566. msleep(30);
  567. check_erased_flash(adapter, addr);
  568. return ret;
  569. }
  570. static int netxen_flash_erase_sections(struct netxen_adapter *adapter,
  571. int start, int end)
  572. {
  573. int ret = FLASH_SUCCESS;
  574. int i;
  575. for (i = start; i < end; i++) {
  576. ret = netxen_rom_se(adapter, i * NETXEN_FLASH_SECTOR_SIZE);
  577. if (ret)
  578. break;
  579. ret = netxen_rom_wip_poll(adapter);
  580. if (ret < 0)
  581. return ret;
  582. }
  583. return ret;
  584. }
  585. int
  586. netxen_flash_erase_secondary(struct netxen_adapter *adapter)
  587. {
  588. int ret = FLASH_SUCCESS;
  589. int start, end;
  590. start = NETXEN_SECONDARY_START / NETXEN_FLASH_SECTOR_SIZE;
  591. end = NETXEN_USER_START / NETXEN_FLASH_SECTOR_SIZE;
  592. ret = netxen_flash_erase_sections(adapter, start, end);
  593. return ret;
  594. }
  595. int
  596. netxen_flash_erase_primary(struct netxen_adapter *adapter)
  597. {
  598. int ret = FLASH_SUCCESS;
  599. int start, end;
  600. start = NETXEN_PRIMARY_START / NETXEN_FLASH_SECTOR_SIZE;
  601. end = NETXEN_SECONDARY_START / NETXEN_FLASH_SECTOR_SIZE;
  602. ret = netxen_flash_erase_sections(adapter, start, end);
  603. return ret;
  604. }
  605. void netxen_halt_pegs(struct netxen_adapter *adapter)
  606. {
  607. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x3c, 1);
  608. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x3c, 1);
  609. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x3c, 1);
  610. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x3c, 1);
  611. }
  612. int netxen_flash_unlock(struct netxen_adapter *adapter)
  613. {
  614. int ret = 0;
  615. ret = netxen_rom_wrsr(adapter, 0);
  616. if (ret < 0)
  617. return ret;
  618. ret = netxen_rom_wren(adapter);
  619. if (ret < 0)
  620. return ret;
  621. return ret;
  622. }
  623. #endif /* 0 */
  624. #define NETXEN_BOARDTYPE 0x4008
  625. #define NETXEN_BOARDNUM 0x400c
  626. #define NETXEN_CHIPNUM 0x4010
  627. #define NETXEN_ROMBUS_RESET 0xFFFFFFFF
  628. int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose)
  629. {
  630. int addr, val;
  631. int n, i;
  632. int init_delay = 0;
  633. struct crb_addr_pair *buf;
  634. u32 off;
  635. /* resetall */
  636. netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
  637. NETXEN_ROMBUS_RESET);
  638. if (verbose) {
  639. int val;
  640. if (netxen_rom_fast_read(adapter, NETXEN_BOARDTYPE, &val) == 0)
  641. printk("P2 ROM board type: 0x%08x\n", val);
  642. else
  643. printk("Could not read board type\n");
  644. if (netxen_rom_fast_read(adapter, NETXEN_BOARDNUM, &val) == 0)
  645. printk("P2 ROM board num: 0x%08x\n", val);
  646. else
  647. printk("Could not read board number\n");
  648. if (netxen_rom_fast_read(adapter, NETXEN_CHIPNUM, &val) == 0)
  649. printk("P2 ROM chip num: 0x%08x\n", val);
  650. else
  651. printk("Could not read chip number\n");
  652. }
  653. if (netxen_rom_fast_read(adapter, 0, &n) == 0 && (n & 0x80000000)) {
  654. n &= ~0x80000000;
  655. if (n < 0x400) {
  656. if (verbose)
  657. printk("%s: %d CRB init values found"
  658. " in ROM.\n", netxen_nic_driver_name, n);
  659. } else {
  660. printk("%s:n=0x%x Error! NetXen card flash not"
  661. " initialized.\n", __FUNCTION__, n);
  662. return -EIO;
  663. }
  664. buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
  665. if (buf == NULL) {
  666. printk("%s: netxen_pinit_from_rom: Unable to calloc "
  667. "memory.\n", netxen_nic_driver_name);
  668. return -ENOMEM;
  669. }
  670. for (i = 0; i < n; i++) {
  671. if (netxen_rom_fast_read(adapter, 8 * i + 4, &val) != 0
  672. || netxen_rom_fast_read(adapter, 8 * i + 8,
  673. &addr) != 0)
  674. return -EIO;
  675. buf[i].addr = addr;
  676. buf[i].data = val;
  677. if (verbose)
  678. printk("%s: PCI: 0x%08x == 0x%08x\n",
  679. netxen_nic_driver_name, (unsigned int)
  680. netxen_decode_crb_addr(addr), val);
  681. }
  682. for (i = 0; i < n; i++) {
  683. off = netxen_decode_crb_addr(buf[i].addr);
  684. if (off == NETXEN_ADDR_ERROR) {
  685. printk(KERN_ERR"CRB init value out of range %x\n",
  686. buf[i].addr);
  687. continue;
  688. }
  689. off += NETXEN_PCI_CRBSPACE;
  690. /* skipping cold reboot MAGIC */
  691. if (off == NETXEN_CAM_RAM(0x1fc))
  692. continue;
  693. /* After writing this register, HW needs time for CRB */
  694. /* to quiet down (else crb_window returns 0xffffffff) */
  695. if (off == NETXEN_ROMUSB_GLB_SW_RESET) {
  696. init_delay = 1;
  697. /* hold xdma in reset also */
  698. buf[i].data = NETXEN_NIC_XDMA_RESET;
  699. }
  700. netxen_nic_hw_write_wx(adapter, off, &buf[i].data, 4);
  701. if (init_delay == 1) {
  702. msleep(1000);
  703. init_delay = 0;
  704. }
  705. msleep(1);
  706. }
  707. kfree(buf);
  708. /* disable_peg_cache_all */
  709. /* unreset_net_cache */
  710. netxen_nic_hw_read_wx(adapter, NETXEN_ROMUSB_GLB_SW_RESET, &val,
  711. 4);
  712. netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
  713. (val & 0xffffff0f));
  714. /* p2dn replyCount */
  715. netxen_crb_writelit_adapter(adapter,
  716. NETXEN_CRB_PEG_NET_D + 0xec, 0x1e);
  717. /* disable_peg_cache 0 */
  718. netxen_crb_writelit_adapter(adapter,
  719. NETXEN_CRB_PEG_NET_D + 0x4c, 8);
  720. /* disable_peg_cache 1 */
  721. netxen_crb_writelit_adapter(adapter,
  722. NETXEN_CRB_PEG_NET_I + 0x4c, 8);
  723. /* peg_clr_all */
  724. /* peg_clr 0 */
  725. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x8,
  726. 0);
  727. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0xc,
  728. 0);
  729. /* peg_clr 1 */
  730. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x8,
  731. 0);
  732. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0xc,
  733. 0);
  734. /* peg_clr 2 */
  735. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x8,
  736. 0);
  737. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0xc,
  738. 0);
  739. /* peg_clr 3 */
  740. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x8,
  741. 0);
  742. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0xc,
  743. 0);
  744. }
  745. return 0;
  746. }
  747. int netxen_initialize_adapter_offload(struct netxen_adapter *adapter)
  748. {
  749. uint64_t addr;
  750. uint32_t hi;
  751. uint32_t lo;
  752. adapter->dummy_dma.addr =
  753. pci_alloc_consistent(adapter->pdev,
  754. NETXEN_HOST_DUMMY_DMA_SIZE,
  755. &adapter->dummy_dma.phys_addr);
  756. if (adapter->dummy_dma.addr == NULL) {
  757. printk("%s: ERROR: Could not allocate dummy DMA memory\n",
  758. __FUNCTION__);
  759. return -ENOMEM;
  760. }
  761. addr = (uint64_t) adapter->dummy_dma.phys_addr;
  762. hi = (addr >> 32) & 0xffffffff;
  763. lo = addr & 0xffffffff;
  764. writel(hi, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI));
  765. writel(lo, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO));
  766. return 0;
  767. }
  768. void netxen_free_adapter_offload(struct netxen_adapter *adapter)
  769. {
  770. int i;
  771. if (adapter->dummy_dma.addr) {
  772. i = 100;
  773. do {
  774. if (dma_watchdog_shutdown_request(adapter) == 1)
  775. break;
  776. msleep(50);
  777. if (dma_watchdog_shutdown_poll_result(adapter) == 1)
  778. break;
  779. } while (--i);
  780. if (i) {
  781. pci_free_consistent(adapter->pdev,
  782. NETXEN_HOST_DUMMY_DMA_SIZE,
  783. adapter->dummy_dma.addr,
  784. adapter->dummy_dma.phys_addr);
  785. adapter->dummy_dma.addr = NULL;
  786. } else {
  787. printk(KERN_ERR "%s: dma_watchdog_shutdown failed\n",
  788. adapter->netdev->name);
  789. }
  790. }
  791. }
  792. int netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val)
  793. {
  794. u32 val = 0;
  795. int retries = 30;
  796. if (!pegtune_val) {
  797. do {
  798. val = readl(NETXEN_CRB_NORMALIZE
  799. (adapter, CRB_CMDPEG_STATE));
  800. pegtune_val = readl(NETXEN_CRB_NORMALIZE
  801. (adapter, NETXEN_ROMUSB_GLB_PEGTUNE_DONE));
  802. if (val == PHAN_INITIALIZE_COMPLETE ||
  803. val == PHAN_INITIALIZE_ACK)
  804. return 0;
  805. msleep(1000);
  806. } while (--retries);
  807. if (!retries) {
  808. printk(KERN_WARNING "netxen_phantom_init: init failed, "
  809. "pegtune_val=%x\n", pegtune_val);
  810. return -1;
  811. }
  812. }
  813. return 0;
  814. }
  815. static int netxen_nic_check_temp(struct netxen_adapter *adapter)
  816. {
  817. struct net_device *netdev = adapter->netdev;
  818. uint32_t temp, temp_state, temp_val;
  819. int rv = 0;
  820. temp = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_TEMP_STATE));
  821. temp_state = nx_get_temp_state(temp);
  822. temp_val = nx_get_temp_val(temp);
  823. if (temp_state == NX_TEMP_PANIC) {
  824. printk(KERN_ALERT
  825. "%s: Device temperature %d degrees C exceeds"
  826. " maximum allowed. Hardware has been shut down.\n",
  827. netxen_nic_driver_name, temp_val);
  828. netif_carrier_off(netdev);
  829. netif_stop_queue(netdev);
  830. rv = 1;
  831. } else if (temp_state == NX_TEMP_WARN) {
  832. if (adapter->temp == NX_TEMP_NORMAL) {
  833. printk(KERN_ALERT
  834. "%s: Device temperature %d degrees C "
  835. "exceeds operating range."
  836. " Immediate action needed.\n",
  837. netxen_nic_driver_name, temp_val);
  838. }
  839. } else {
  840. if (adapter->temp == NX_TEMP_WARN) {
  841. printk(KERN_INFO
  842. "%s: Device temperature is now %d degrees C"
  843. " in normal range.\n", netxen_nic_driver_name,
  844. temp_val);
  845. }
  846. }
  847. adapter->temp = temp_state;
  848. return rv;
  849. }
  850. void netxen_watchdog_task(struct work_struct *work)
  851. {
  852. struct netxen_adapter *adapter =
  853. container_of(work, struct netxen_adapter, watchdog_task);
  854. if ((adapter->portnum == 0) && netxen_nic_check_temp(adapter))
  855. return;
  856. if (adapter->handle_phy_intr)
  857. adapter->handle_phy_intr(adapter);
  858. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  859. }
  860. /*
  861. * netxen_process_rcv() send the received packet to the protocol stack.
  862. * and if the number of receives exceeds RX_BUFFERS_REFILL, then we
  863. * invoke the routine to send more rx buffers to the Phantom...
  864. */
  865. static void netxen_process_rcv(struct netxen_adapter *adapter, int ctxid,
  866. struct status_desc *desc)
  867. {
  868. struct pci_dev *pdev = adapter->pdev;
  869. struct net_device *netdev = adapter->netdev;
  870. u64 sts_data = le64_to_cpu(desc->status_desc_data);
  871. int index = netxen_get_sts_refhandle(sts_data);
  872. struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
  873. struct netxen_rx_buffer *buffer;
  874. struct sk_buff *skb;
  875. u32 length = netxen_get_sts_totallength(sts_data);
  876. u32 desc_ctx;
  877. struct netxen_rcv_desc_ctx *rcv_desc;
  878. int ret;
  879. desc_ctx = netxen_get_sts_type(sts_data);
  880. if (unlikely(desc_ctx >= NUM_RCV_DESC_RINGS)) {
  881. printk("%s: %s Bad Rcv descriptor ring\n",
  882. netxen_nic_driver_name, netdev->name);
  883. return;
  884. }
  885. rcv_desc = &recv_ctx->rcv_desc[desc_ctx];
  886. if (unlikely(index > rcv_desc->max_rx_desc_count)) {
  887. DPRINTK(ERR, "Got a buffer index:%x Max is %x\n",
  888. index, rcv_desc->max_rx_desc_count);
  889. return;
  890. }
  891. buffer = &rcv_desc->rx_buf_arr[index];
  892. if (desc_ctx == RCV_DESC_LRO_CTXID) {
  893. buffer->lro_current_frags++;
  894. if (netxen_get_sts_desc_lro_last_frag(desc)) {
  895. buffer->lro_expected_frags =
  896. netxen_get_sts_desc_lro_cnt(desc);
  897. buffer->lro_length = length;
  898. }
  899. if (buffer->lro_current_frags != buffer->lro_expected_frags) {
  900. if (buffer->lro_expected_frags != 0) {
  901. printk("LRO: (refhandle:%x) recv frag. "
  902. "wait for last. flags: %x expected:%d "
  903. "have:%d\n", index,
  904. netxen_get_sts_desc_lro_last_frag(desc),
  905. buffer->lro_expected_frags,
  906. buffer->lro_current_frags);
  907. }
  908. return;
  909. }
  910. }
  911. pci_unmap_single(pdev, buffer->dma, rcv_desc->dma_size,
  912. PCI_DMA_FROMDEVICE);
  913. skb = (struct sk_buff *)buffer->skb;
  914. if (likely(adapter->rx_csum &&
  915. netxen_get_sts_status(sts_data) == STATUS_CKSUM_OK)) {
  916. adapter->stats.csummed++;
  917. skb->ip_summed = CHECKSUM_UNNECESSARY;
  918. } else
  919. skb->ip_summed = CHECKSUM_NONE;
  920. skb->dev = netdev;
  921. if (desc_ctx == RCV_DESC_LRO_CTXID) {
  922. /* True length was only available on the last pkt */
  923. skb_put(skb, buffer->lro_length);
  924. } else {
  925. skb_put(skb, length);
  926. }
  927. skb->protocol = eth_type_trans(skb, netdev);
  928. ret = netif_receive_skb(skb);
  929. netdev->last_rx = jiffies;
  930. /*
  931. * We just consumed one buffer so post a buffer.
  932. */
  933. buffer->skb = NULL;
  934. buffer->state = NETXEN_BUFFER_FREE;
  935. buffer->lro_current_frags = 0;
  936. buffer->lro_expected_frags = 0;
  937. adapter->stats.no_rcv++;
  938. adapter->stats.rxbytes += length;
  939. }
  940. /* Process Receive status ring */
  941. u32 netxen_process_rcv_ring(struct netxen_adapter *adapter, int ctxid, int max)
  942. {
  943. struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
  944. struct status_desc *desc_head = recv_ctx->rcv_status_desc_head;
  945. struct status_desc *desc; /* used to read status desc here */
  946. u32 consumer = recv_ctx->status_rx_consumer;
  947. int count = 0, ring;
  948. while (count < max) {
  949. desc = &desc_head[consumer];
  950. if (!(netxen_get_sts_owner(desc) & STATUS_OWNER_HOST)) {
  951. DPRINTK(ERR, "desc %p ownedby %x\n", desc,
  952. netxen_get_sts_owner(desc));
  953. break;
  954. }
  955. netxen_process_rcv(adapter, ctxid, desc);
  956. netxen_set_sts_owner(desc, STATUS_OWNER_PHANTOM);
  957. consumer = (consumer + 1) & (adapter->max_rx_desc_count - 1);
  958. count++;
  959. }
  960. for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++)
  961. netxen_post_rx_buffers_nodb(adapter, ctxid, ring);
  962. /* update the consumer index in phantom */
  963. if (count) {
  964. recv_ctx->status_rx_consumer = consumer;
  965. /* Window = 1 */
  966. writel(consumer, NETXEN_CRB_NORMALIZE(adapter,
  967. recv_ctx->crb_sts_consumer));
  968. }
  969. return count;
  970. }
  971. /* Process Command status ring */
  972. int netxen_process_cmd_ring(struct netxen_adapter *adapter)
  973. {
  974. u32 last_consumer, consumer;
  975. int count = 0, i;
  976. struct netxen_cmd_buffer *buffer;
  977. struct pci_dev *pdev = adapter->pdev;
  978. struct net_device *netdev = adapter->netdev;
  979. struct netxen_skb_frag *frag;
  980. int done = 0;
  981. last_consumer = adapter->last_cmd_consumer;
  982. consumer = le32_to_cpu(*(adapter->cmd_consumer));
  983. while (last_consumer != consumer) {
  984. buffer = &adapter->cmd_buf_arr[last_consumer];
  985. if (buffer->skb) {
  986. frag = &buffer->frag_array[0];
  987. pci_unmap_single(pdev, frag->dma, frag->length,
  988. PCI_DMA_TODEVICE);
  989. frag->dma = 0ULL;
  990. for (i = 1; i < buffer->frag_count; i++) {
  991. frag++; /* Get the next frag */
  992. pci_unmap_page(pdev, frag->dma, frag->length,
  993. PCI_DMA_TODEVICE);
  994. frag->dma = 0ULL;
  995. }
  996. adapter->stats.xmitfinished++;
  997. dev_kfree_skb_any(buffer->skb);
  998. buffer->skb = NULL;
  999. }
  1000. last_consumer = get_next_index(last_consumer,
  1001. adapter->max_tx_desc_count);
  1002. if (++count >= MAX_STATUS_HANDLE)
  1003. break;
  1004. }
  1005. if (count) {
  1006. adapter->last_cmd_consumer = last_consumer;
  1007. smp_mb();
  1008. if (netif_queue_stopped(netdev) && netif_running(netdev)) {
  1009. netif_tx_lock(netdev);
  1010. netif_wake_queue(netdev);
  1011. smp_mb();
  1012. netif_tx_unlock(netdev);
  1013. }
  1014. }
  1015. /*
  1016. * If everything is freed up to consumer then check if the ring is full
  1017. * If the ring is full then check if more needs to be freed and
  1018. * schedule the call back again.
  1019. *
  1020. * This happens when there are 2 CPUs. One could be freeing and the
  1021. * other filling it. If the ring is full when we get out of here and
  1022. * the card has already interrupted the host then the host can miss the
  1023. * interrupt.
  1024. *
  1025. * There is still a possible race condition and the host could miss an
  1026. * interrupt. The card has to take care of this.
  1027. */
  1028. consumer = le32_to_cpu(*(adapter->cmd_consumer));
  1029. done = (last_consumer == consumer);
  1030. return (done);
  1031. }
  1032. /*
  1033. * netxen_post_rx_buffers puts buffer in the Phantom memory
  1034. */
  1035. void netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ctx, u32 ringid)
  1036. {
  1037. struct pci_dev *pdev = adapter->pdev;
  1038. struct sk_buff *skb;
  1039. struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
  1040. struct netxen_rcv_desc_ctx *rcv_desc = NULL;
  1041. uint producer;
  1042. struct rcv_desc *pdesc;
  1043. struct netxen_rx_buffer *buffer;
  1044. int count = 0;
  1045. int index = 0;
  1046. netxen_ctx_msg msg = 0;
  1047. dma_addr_t dma;
  1048. rcv_desc = &recv_ctx->rcv_desc[ringid];
  1049. producer = rcv_desc->producer;
  1050. index = rcv_desc->begin_alloc;
  1051. buffer = &rcv_desc->rx_buf_arr[index];
  1052. /* We can start writing rx descriptors into the phantom memory. */
  1053. while (buffer->state == NETXEN_BUFFER_FREE) {
  1054. skb = dev_alloc_skb(rcv_desc->skb_size);
  1055. if (unlikely(!skb)) {
  1056. /*
  1057. * TODO
  1058. * We need to schedule the posting of buffers to the pegs.
  1059. */
  1060. rcv_desc->begin_alloc = index;
  1061. DPRINTK(ERR, "netxen_post_rx_buffers: "
  1062. " allocated only %d buffers\n", count);
  1063. break;
  1064. }
  1065. count++; /* now there should be no failure */
  1066. pdesc = &rcv_desc->desc_head[producer];
  1067. #if defined(XGB_DEBUG)
  1068. *(unsigned long *)(skb->head) = 0xc0debabe;
  1069. if (skb_is_nonlinear(skb)) {
  1070. printk("Allocated SKB @%p is nonlinear\n");
  1071. }
  1072. #endif
  1073. skb_reserve(skb, 2);
  1074. /* This will be setup when we receive the
  1075. * buffer after it has been filled FSL TBD TBD
  1076. * skb->dev = netdev;
  1077. */
  1078. dma = pci_map_single(pdev, skb->data, rcv_desc->dma_size,
  1079. PCI_DMA_FROMDEVICE);
  1080. pdesc->addr_buffer = cpu_to_le64(dma);
  1081. buffer->skb = skb;
  1082. buffer->state = NETXEN_BUFFER_BUSY;
  1083. buffer->dma = dma;
  1084. /* make a rcv descriptor */
  1085. pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
  1086. pdesc->buffer_length = cpu_to_le32(rcv_desc->dma_size);
  1087. DPRINTK(INFO, "done writing descripter\n");
  1088. producer =
  1089. get_next_index(producer, rcv_desc->max_rx_desc_count);
  1090. index = get_next_index(index, rcv_desc->max_rx_desc_count);
  1091. buffer = &rcv_desc->rx_buf_arr[index];
  1092. }
  1093. /* if we did allocate buffers, then write the count to Phantom */
  1094. if (count) {
  1095. rcv_desc->begin_alloc = index;
  1096. rcv_desc->producer = producer;
  1097. /* Window = 1 */
  1098. writel((producer - 1) & (rcv_desc->max_rx_desc_count - 1),
  1099. NETXEN_CRB_NORMALIZE(adapter,
  1100. rcv_desc->crb_rcv_producer));
  1101. /*
  1102. * Write a doorbell msg to tell phanmon of change in
  1103. * receive ring producer
  1104. */
  1105. netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID);
  1106. netxen_set_msg_privid(msg);
  1107. netxen_set_msg_count(msg,
  1108. ((producer -
  1109. 1) & (rcv_desc->
  1110. max_rx_desc_count - 1)));
  1111. netxen_set_msg_ctxid(msg, adapter->portnum);
  1112. netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid));
  1113. writel(msg,
  1114. DB_NORMALIZE(adapter,
  1115. NETXEN_RCV_PRODUCER_OFFSET));
  1116. }
  1117. }
  1118. static void netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
  1119. uint32_t ctx, uint32_t ringid)
  1120. {
  1121. struct pci_dev *pdev = adapter->pdev;
  1122. struct sk_buff *skb;
  1123. struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
  1124. struct netxen_rcv_desc_ctx *rcv_desc = NULL;
  1125. u32 producer;
  1126. struct rcv_desc *pdesc;
  1127. struct netxen_rx_buffer *buffer;
  1128. int count = 0;
  1129. int index = 0;
  1130. rcv_desc = &recv_ctx->rcv_desc[ringid];
  1131. producer = rcv_desc->producer;
  1132. index = rcv_desc->begin_alloc;
  1133. buffer = &rcv_desc->rx_buf_arr[index];
  1134. /* We can start writing rx descriptors into the phantom memory. */
  1135. while (buffer->state == NETXEN_BUFFER_FREE) {
  1136. skb = dev_alloc_skb(rcv_desc->skb_size);
  1137. if (unlikely(!skb)) {
  1138. /*
  1139. * We need to schedule the posting of buffers to the pegs.
  1140. */
  1141. rcv_desc->begin_alloc = index;
  1142. DPRINTK(ERR, "netxen_post_rx_buffers_nodb: "
  1143. " allocated only %d buffers\n", count);
  1144. break;
  1145. }
  1146. count++; /* now there should be no failure */
  1147. pdesc = &rcv_desc->desc_head[producer];
  1148. skb_reserve(skb, 2);
  1149. /*
  1150. * This will be setup when we receive the
  1151. * buffer after it has been filled
  1152. * skb->dev = netdev;
  1153. */
  1154. buffer->skb = skb;
  1155. buffer->state = NETXEN_BUFFER_BUSY;
  1156. buffer->dma = pci_map_single(pdev, skb->data,
  1157. rcv_desc->dma_size,
  1158. PCI_DMA_FROMDEVICE);
  1159. /* make a rcv descriptor */
  1160. pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
  1161. pdesc->buffer_length = cpu_to_le32(rcv_desc->dma_size);
  1162. pdesc->addr_buffer = cpu_to_le64(buffer->dma);
  1163. producer =
  1164. get_next_index(producer, rcv_desc->max_rx_desc_count);
  1165. index = get_next_index(index, rcv_desc->max_rx_desc_count);
  1166. buffer = &rcv_desc->rx_buf_arr[index];
  1167. }
  1168. /* if we did allocate buffers, then write the count to Phantom */
  1169. if (count) {
  1170. rcv_desc->begin_alloc = index;
  1171. rcv_desc->producer = producer;
  1172. /* Window = 1 */
  1173. writel((producer - 1) & (rcv_desc->max_rx_desc_count - 1),
  1174. NETXEN_CRB_NORMALIZE(adapter,
  1175. rcv_desc->crb_rcv_producer));
  1176. wmb();
  1177. }
  1178. }
  1179. void netxen_nic_clear_stats(struct netxen_adapter *adapter)
  1180. {
  1181. memset(&adapter->stats, 0, sizeof(adapter->stats));
  1182. return;
  1183. }