fw.c 19 KB

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  1. /******************************************************************************
  2. *
  3. * This file is provided under a dual BSD/GPLv2 license. When using or
  4. * redistributing this file, you may do so under either license.
  5. *
  6. * GPL LICENSE SUMMARY
  7. *
  8. * Copyright(c) 2012 - 2013 Intel Corporation. All rights reserved.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of version 2 of the GNU General Public License as
  12. * published by the Free Software Foundation.
  13. *
  14. * This program is distributed in the hope that it will be useful, but
  15. * WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  17. * General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  22. * USA
  23. *
  24. * The full GNU General Public License is included in this distribution
  25. * in the file called LICENSE.GPL.
  26. *
  27. * Contact Information:
  28. * Intel Linux Wireless <ilw@linux.intel.com>
  29. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  30. *
  31. * BSD LICENSE
  32. *
  33. * Copyright(c) 2012 - 2013 Intel Corporation. All rights reserved.
  34. * All rights reserved.
  35. *
  36. * Redistribution and use in source and binary forms, with or without
  37. * modification, are permitted provided that the following conditions
  38. * are met:
  39. *
  40. * * Redistributions of source code must retain the above copyright
  41. * notice, this list of conditions and the following disclaimer.
  42. * * Redistributions in binary form must reproduce the above copyright
  43. * notice, this list of conditions and the following disclaimer in
  44. * the documentation and/or other materials provided with the
  45. * distribution.
  46. * * Neither the name Intel Corporation nor the names of its
  47. * contributors may be used to endorse or promote products derived
  48. * from this software without specific prior written permission.
  49. *
  50. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  51. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  52. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  53. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  54. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  55. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  56. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  57. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  58. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  59. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  60. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  61. *
  62. *****************************************************************************/
  63. #include <net/mac80211.h>
  64. #include "iwl-trans.h"
  65. #include "iwl-op-mode.h"
  66. #include "iwl-fw.h"
  67. #include "iwl-debug.h"
  68. #include "iwl-csr.h" /* for iwl_mvm_rx_card_state_notif */
  69. #include "iwl-io.h" /* for iwl_mvm_rx_card_state_notif */
  70. #include "iwl-eeprom-parse.h"
  71. #include "mvm.h"
  72. #include "iwl-phy-db.h"
  73. #define MVM_UCODE_ALIVE_TIMEOUT HZ
  74. #define MVM_UCODE_CALIB_TIMEOUT (2*HZ)
  75. #define UCODE_VALID_OK cpu_to_le32(0x1)
  76. /* Default calibration values for WkP - set to INIT image w/o running */
  77. static const u8 wkp_calib_values_bb_filter[] = { 0xbf, 0x00, 0x5f, 0x00, 0x2f,
  78. 0x00, 0x18, 0x00 };
  79. static const u8 wkp_calib_values_rx_dc[] = { 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
  80. 0x7f, 0x7f, 0x7f };
  81. static const u8 wkp_calib_values_tx_lo[] = { 0x00, 0x00, 0x00, 0x00 };
  82. static const u8 wkp_calib_values_tx_iq[] = { 0xff, 0x00, 0xff, 0x00, 0x00,
  83. 0x00 };
  84. static const u8 wkp_calib_values_rx_iq[] = { 0xff, 0x00, 0x00, 0x00 };
  85. static const u8 wkp_calib_values_rx_iq_skew[] = { 0x00, 0x00, 0x01, 0x00 };
  86. static const u8 wkp_calib_values_tx_iq_skew[] = { 0x01, 0x00, 0x00, 0x00 };
  87. static const u8 wkp_calib_values_xtal[] = { 0xd2, 0xd2 };
  88. struct iwl_calib_default_data {
  89. u16 size;
  90. void *data;
  91. };
  92. #define CALIB_SIZE_N_DATA(_buf) {.size = sizeof(_buf), .data = &_buf}
  93. static const struct iwl_calib_default_data wkp_calib_default_data[12] = {
  94. [5] = CALIB_SIZE_N_DATA(wkp_calib_values_rx_dc),
  95. [6] = CALIB_SIZE_N_DATA(wkp_calib_values_bb_filter),
  96. [7] = CALIB_SIZE_N_DATA(wkp_calib_values_tx_lo),
  97. [8] = CALIB_SIZE_N_DATA(wkp_calib_values_tx_iq),
  98. [9] = CALIB_SIZE_N_DATA(wkp_calib_values_tx_iq_skew),
  99. [10] = CALIB_SIZE_N_DATA(wkp_calib_values_rx_iq),
  100. [11] = CALIB_SIZE_N_DATA(wkp_calib_values_rx_iq_skew),
  101. };
  102. struct iwl_mvm_alive_data {
  103. bool valid;
  104. u32 scd_base_addr;
  105. };
  106. static inline const struct fw_img *
  107. iwl_get_ucode_image(struct iwl_mvm *mvm, enum iwl_ucode_type ucode_type)
  108. {
  109. if (ucode_type >= IWL_UCODE_TYPE_MAX)
  110. return NULL;
  111. return &mvm->fw->img[ucode_type];
  112. }
  113. static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant)
  114. {
  115. struct iwl_tx_ant_cfg_cmd tx_ant_cmd = {
  116. .valid = cpu_to_le32(valid_tx_ant),
  117. };
  118. IWL_DEBUG_HC(mvm, "select valid tx ant: %u\n", valid_tx_ant);
  119. return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, CMD_SYNC,
  120. sizeof(tx_ant_cmd), &tx_ant_cmd);
  121. }
  122. static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
  123. struct iwl_rx_packet *pkt, void *data)
  124. {
  125. struct iwl_mvm *mvm =
  126. container_of(notif_wait, struct iwl_mvm, notif_wait);
  127. struct iwl_mvm_alive_data *alive_data = data;
  128. struct mvm_alive_resp *palive;
  129. palive = (void *)pkt->data;
  130. mvm->error_event_table = le32_to_cpu(palive->error_event_table_ptr);
  131. mvm->log_event_table = le32_to_cpu(palive->log_event_table_ptr);
  132. alive_data->scd_base_addr = le32_to_cpu(palive->scd_base_ptr);
  133. alive_data->valid = le16_to_cpu(palive->status) == IWL_ALIVE_STATUS_OK;
  134. IWL_DEBUG_FW(mvm, "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n",
  135. le16_to_cpu(palive->status), palive->ver_type,
  136. palive->ver_subtype);
  137. return true;
  138. }
  139. static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait,
  140. struct iwl_rx_packet *pkt, void *data)
  141. {
  142. struct iwl_phy_db *phy_db = data;
  143. if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) {
  144. WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
  145. return true;
  146. }
  147. WARN_ON(iwl_phy_db_set_section(phy_db, pkt, GFP_ATOMIC));
  148. return false;
  149. }
  150. static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
  151. enum iwl_ucode_type ucode_type)
  152. {
  153. struct iwl_notification_wait alive_wait;
  154. struct iwl_mvm_alive_data alive_data;
  155. const struct fw_img *fw;
  156. int ret, i;
  157. enum iwl_ucode_type old_type = mvm->cur_ucode;
  158. static const u8 alive_cmd[] = { MVM_ALIVE };
  159. mvm->cur_ucode = ucode_type;
  160. fw = iwl_get_ucode_image(mvm, ucode_type);
  161. mvm->ucode_loaded = false;
  162. if (!fw)
  163. return -EINVAL;
  164. iwl_init_notification_wait(&mvm->notif_wait, &alive_wait,
  165. alive_cmd, ARRAY_SIZE(alive_cmd),
  166. iwl_alive_fn, &alive_data);
  167. ret = iwl_trans_start_fw(mvm->trans, fw, ucode_type == IWL_UCODE_INIT);
  168. if (ret) {
  169. mvm->cur_ucode = old_type;
  170. iwl_remove_notification(&mvm->notif_wait, &alive_wait);
  171. return ret;
  172. }
  173. /*
  174. * Some things may run in the background now, but we
  175. * just wait for the ALIVE notification here.
  176. */
  177. ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait,
  178. MVM_UCODE_ALIVE_TIMEOUT);
  179. if (ret) {
  180. mvm->cur_ucode = old_type;
  181. return ret;
  182. }
  183. if (!alive_data.valid) {
  184. IWL_ERR(mvm, "Loaded ucode is not valid!\n");
  185. mvm->cur_ucode = old_type;
  186. return -EIO;
  187. }
  188. iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr);
  189. /*
  190. * Note: all the queues are enabled as part of the interface
  191. * initialization, but in firmware restart scenarios they
  192. * could be stopped, so wake them up. In firmware restart,
  193. * mac80211 will have the queues stopped as well until the
  194. * reconfiguration completes. During normal startup, they
  195. * will be empty.
  196. */
  197. for (i = 0; i < IWL_MAX_HW_QUEUES; i++) {
  198. if (i < IWL_MVM_FIRST_AGG_QUEUE && i != IWL_MVM_CMD_QUEUE)
  199. mvm->queue_to_mac80211[i] = i;
  200. else
  201. mvm->queue_to_mac80211[i] = IWL_INVALID_MAC80211_QUEUE;
  202. atomic_set(&mvm->queue_stop_count[i], 0);
  203. }
  204. mvm->transport_queue_stop = 0;
  205. mvm->ucode_loaded = true;
  206. return 0;
  207. }
  208. static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm)
  209. {
  210. struct iwl_phy_cfg_cmd phy_cfg_cmd;
  211. enum iwl_ucode_type ucode_type = mvm->cur_ucode;
  212. /* Set parameters */
  213. phy_cfg_cmd.phy_cfg = cpu_to_le32(mvm->fw->phy_config);
  214. phy_cfg_cmd.calib_control.event_trigger =
  215. mvm->fw->default_calib[ucode_type].event_trigger;
  216. phy_cfg_cmd.calib_control.flow_trigger =
  217. mvm->fw->default_calib[ucode_type].flow_trigger;
  218. IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n",
  219. phy_cfg_cmd.phy_cfg);
  220. return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, CMD_SYNC,
  221. sizeof(phy_cfg_cmd), &phy_cfg_cmd);
  222. }
  223. /* Starting with the new PHY DB implementation - New calibs are enabled */
  224. /* Value - 0x405e7 */
  225. #define IWL_CALIB_DEFAULT_FLOW_INIT (IWL_CALIB_CFG_XTAL_IDX |\
  226. IWL_CALIB_CFG_TEMPERATURE_IDX |\
  227. IWL_CALIB_CFG_VOLTAGE_READ_IDX |\
  228. IWL_CALIB_CFG_DC_IDX |\
  229. IWL_CALIB_CFG_BB_FILTER_IDX |\
  230. IWL_CALIB_CFG_LO_LEAKAGE_IDX |\
  231. IWL_CALIB_CFG_TX_IQ_IDX |\
  232. IWL_CALIB_CFG_RX_IQ_IDX |\
  233. IWL_CALIB_CFG_AGC_IDX)
  234. #define IWL_CALIB_DEFAULT_EVENT_INIT 0x0
  235. /* Value 0x41567 */
  236. #define IWL_CALIB_DEFAULT_FLOW_RUN (IWL_CALIB_CFG_XTAL_IDX |\
  237. IWL_CALIB_CFG_TEMPERATURE_IDX |\
  238. IWL_CALIB_CFG_VOLTAGE_READ_IDX |\
  239. IWL_CALIB_CFG_BB_FILTER_IDX |\
  240. IWL_CALIB_CFG_DC_IDX |\
  241. IWL_CALIB_CFG_TX_IQ_IDX |\
  242. IWL_CALIB_CFG_RX_IQ_IDX |\
  243. IWL_CALIB_CFG_SENSITIVITY_IDX |\
  244. IWL_CALIB_CFG_AGC_IDX)
  245. #define IWL_CALIB_DEFAULT_EVENT_RUN (IWL_CALIB_CFG_XTAL_IDX |\
  246. IWL_CALIB_CFG_TEMPERATURE_IDX |\
  247. IWL_CALIB_CFG_VOLTAGE_READ_IDX |\
  248. IWL_CALIB_CFG_TX_PWR_IDX |\
  249. IWL_CALIB_CFG_DC_IDX |\
  250. IWL_CALIB_CFG_TX_IQ_IDX |\
  251. IWL_CALIB_CFG_SENSITIVITY_IDX)
  252. /*
  253. * Sets the calibrations trigger values that will be sent to the FW for runtime
  254. * and init calibrations.
  255. * The ones given in the FW TLV are not correct.
  256. */
  257. static void iwl_set_default_calib_trigger(struct iwl_mvm *mvm)
  258. {
  259. struct iwl_tlv_calib_ctrl default_calib;
  260. /*
  261. * WkP FW TLV calib bits are wrong, overwrite them.
  262. * This defines the dynamic calibrations which are implemented in the
  263. * uCode both for init(flow) calculation and event driven calibs.
  264. */
  265. /* Init Image */
  266. default_calib.event_trigger = cpu_to_le32(IWL_CALIB_DEFAULT_EVENT_INIT);
  267. default_calib.flow_trigger = cpu_to_le32(IWL_CALIB_DEFAULT_FLOW_INIT);
  268. if (default_calib.event_trigger !=
  269. mvm->fw->default_calib[IWL_UCODE_INIT].event_trigger)
  270. IWL_ERR(mvm,
  271. "Updating the event calib for INIT image: 0x%x -> 0x%x\n",
  272. mvm->fw->default_calib[IWL_UCODE_INIT].event_trigger,
  273. default_calib.event_trigger);
  274. if (default_calib.flow_trigger !=
  275. mvm->fw->default_calib[IWL_UCODE_INIT].flow_trigger)
  276. IWL_ERR(mvm,
  277. "Updating the flow calib for INIT image: 0x%x -> 0x%x\n",
  278. mvm->fw->default_calib[IWL_UCODE_INIT].flow_trigger,
  279. default_calib.flow_trigger);
  280. memcpy((void *)&mvm->fw->default_calib[IWL_UCODE_INIT],
  281. &default_calib, sizeof(struct iwl_tlv_calib_ctrl));
  282. IWL_ERR(mvm,
  283. "Setting uCode init calibrations event 0x%x, trigger 0x%x\n",
  284. default_calib.event_trigger,
  285. default_calib.flow_trigger);
  286. /* Run time image */
  287. default_calib.event_trigger = cpu_to_le32(IWL_CALIB_DEFAULT_EVENT_RUN);
  288. default_calib.flow_trigger = cpu_to_le32(IWL_CALIB_DEFAULT_FLOW_RUN);
  289. if (default_calib.event_trigger !=
  290. mvm->fw->default_calib[IWL_UCODE_REGULAR].event_trigger)
  291. IWL_ERR(mvm,
  292. "Updating the event calib for RT image: 0x%x -> 0x%x\n",
  293. mvm->fw->default_calib[IWL_UCODE_REGULAR].event_trigger,
  294. default_calib.event_trigger);
  295. if (default_calib.flow_trigger !=
  296. mvm->fw->default_calib[IWL_UCODE_REGULAR].flow_trigger)
  297. IWL_ERR(mvm,
  298. "Updating the flow calib for RT image: 0x%x -> 0x%x\n",
  299. mvm->fw->default_calib[IWL_UCODE_REGULAR].flow_trigger,
  300. default_calib.flow_trigger);
  301. memcpy((void *)&mvm->fw->default_calib[IWL_UCODE_REGULAR],
  302. &default_calib, sizeof(struct iwl_tlv_calib_ctrl));
  303. IWL_ERR(mvm,
  304. "Setting uCode runtime calibs event 0x%x, trigger 0x%x\n",
  305. default_calib.event_trigger,
  306. default_calib.flow_trigger);
  307. }
  308. static int iwl_set_default_calibrations(struct iwl_mvm *mvm)
  309. {
  310. u8 cmd_raw[16]; /* holds the variable size commands */
  311. struct iwl_set_calib_default_cmd *cmd =
  312. (struct iwl_set_calib_default_cmd *)cmd_raw;
  313. int ret, i;
  314. /* Setting default values for calibrations we don't run */
  315. for (i = 0; i < ARRAY_SIZE(wkp_calib_default_data); i++) {
  316. u16 cmd_len;
  317. if (wkp_calib_default_data[i].size == 0)
  318. continue;
  319. memset(cmd_raw, 0, sizeof(cmd_raw));
  320. cmd_len = wkp_calib_default_data[i].size + sizeof(cmd);
  321. cmd->calib_index = cpu_to_le16(i);
  322. cmd->length = cpu_to_le16(wkp_calib_default_data[i].size);
  323. if (WARN_ONCE(cmd_len > sizeof(cmd_raw),
  324. "Need to enlarge cmd_raw to %d\n", cmd_len))
  325. break;
  326. memcpy(cmd->data, wkp_calib_default_data[i].data,
  327. wkp_calib_default_data[i].size);
  328. ret = iwl_mvm_send_cmd_pdu(mvm, SET_CALIB_DEFAULT_CMD, 0,
  329. sizeof(*cmd) +
  330. wkp_calib_default_data[i].size,
  331. cmd);
  332. if (ret)
  333. return ret;
  334. }
  335. return 0;
  336. }
  337. int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm)
  338. {
  339. struct iwl_notification_wait calib_wait;
  340. static const u8 init_complete[] = {
  341. INIT_COMPLETE_NOTIF,
  342. CALIB_RES_NOTIF_PHY_DB
  343. };
  344. int ret;
  345. lockdep_assert_held(&mvm->mutex);
  346. if (mvm->init_ucode_run)
  347. return 0;
  348. iwl_init_notification_wait(&mvm->notif_wait,
  349. &calib_wait,
  350. init_complete,
  351. ARRAY_SIZE(init_complete),
  352. iwl_wait_phy_db_entry,
  353. mvm->phy_db);
  354. /* Will also start the device */
  355. ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT);
  356. if (ret) {
  357. IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret);
  358. goto error;
  359. }
  360. if (read_nvm) {
  361. /* Read nvm */
  362. ret = iwl_nvm_init(mvm);
  363. if (ret) {
  364. IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
  365. goto error;
  366. }
  367. }
  368. ret = iwl_nvm_check_version(mvm->nvm_data, mvm->trans);
  369. WARN_ON(ret);
  370. /* Send TX valid antennas before triggering calibrations */
  371. ret = iwl_send_tx_ant_cfg(mvm, mvm->nvm_data->valid_tx_ant);
  372. if (ret)
  373. goto error;
  374. /* Override the calibrations from TLV and the const of fw */
  375. iwl_set_default_calib_trigger(mvm);
  376. /* WkP doesn't have all calibrations, need to set default values */
  377. if (mvm->cfg->device_family == IWL_DEVICE_FAMILY_7000) {
  378. ret = iwl_set_default_calibrations(mvm);
  379. if (ret)
  380. goto error;
  381. }
  382. /*
  383. * Send phy configurations command to init uCode
  384. * to start the 16.0 uCode init image internal calibrations.
  385. */
  386. ret = iwl_send_phy_cfg_cmd(mvm);
  387. if (ret) {
  388. IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
  389. ret);
  390. goto error;
  391. }
  392. /*
  393. * Some things may run in the background now, but we
  394. * just wait for the calibration complete notification.
  395. */
  396. ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait,
  397. MVM_UCODE_CALIB_TIMEOUT);
  398. if (!ret)
  399. mvm->init_ucode_run = true;
  400. goto out;
  401. error:
  402. iwl_remove_notification(&mvm->notif_wait, &calib_wait);
  403. out:
  404. if (!iwlmvm_mod_params.init_dbg) {
  405. iwl_trans_stop_device(mvm->trans);
  406. } else if (!mvm->nvm_data) {
  407. /* we want to debug INIT and we have no NVM - fake */
  408. mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) +
  409. sizeof(struct ieee80211_channel) +
  410. sizeof(struct ieee80211_rate),
  411. GFP_KERNEL);
  412. if (!mvm->nvm_data)
  413. return -ENOMEM;
  414. mvm->nvm_data->valid_rx_ant = 1;
  415. mvm->nvm_data->valid_tx_ant = 1;
  416. mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels;
  417. mvm->nvm_data->bands[0].n_channels = 1;
  418. mvm->nvm_data->bands[0].n_bitrates = 1;
  419. mvm->nvm_data->bands[0].bitrates =
  420. (void *)mvm->nvm_data->channels + 1;
  421. mvm->nvm_data->bands[0].bitrates->hw_value = 10;
  422. }
  423. return ret;
  424. }
  425. #define UCODE_CALIB_TIMEOUT (2*HZ)
  426. int iwl_mvm_up(struct iwl_mvm *mvm)
  427. {
  428. int ret, i;
  429. lockdep_assert_held(&mvm->mutex);
  430. ret = iwl_trans_start_hw(mvm->trans);
  431. if (ret)
  432. return ret;
  433. /* If we were in RFKILL during module loading, load init ucode now */
  434. if (!mvm->init_ucode_run) {
  435. ret = iwl_run_init_mvm_ucode(mvm, false);
  436. if (ret && !iwlmvm_mod_params.init_dbg) {
  437. IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret);
  438. goto error;
  439. }
  440. }
  441. if (iwlmvm_mod_params.init_dbg)
  442. return 0;
  443. ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
  444. if (ret) {
  445. IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
  446. goto error;
  447. }
  448. ret = iwl_send_tx_ant_cfg(mvm, mvm->nvm_data->valid_tx_ant);
  449. if (ret)
  450. goto error;
  451. /* Send phy db control command and then phy db calibration*/
  452. ret = iwl_send_phy_db_data(mvm->phy_db);
  453. if (ret)
  454. goto error;
  455. ret = iwl_send_phy_cfg_cmd(mvm);
  456. if (ret)
  457. goto error;
  458. /* init the fw <-> mac80211 STA mapping */
  459. for (i = 0; i < IWL_MVM_STATION_COUNT; i++)
  460. RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
  461. /* Add auxiliary station for scanning */
  462. ret = iwl_mvm_add_aux_sta(mvm);
  463. if (ret)
  464. goto error;
  465. IWL_DEBUG_INFO(mvm, "RT uCode started.\n");
  466. return 0;
  467. error:
  468. iwl_trans_stop_device(mvm->trans);
  469. return ret;
  470. }
  471. int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm)
  472. {
  473. int ret, i;
  474. lockdep_assert_held(&mvm->mutex);
  475. ret = iwl_trans_start_hw(mvm->trans);
  476. if (ret)
  477. return ret;
  478. ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN);
  479. if (ret) {
  480. IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret);
  481. goto error;
  482. }
  483. ret = iwl_send_tx_ant_cfg(mvm, mvm->nvm_data->valid_tx_ant);
  484. if (ret)
  485. goto error;
  486. /* Send phy db control command and then phy db calibration*/
  487. ret = iwl_send_phy_db_data(mvm->phy_db);
  488. if (ret)
  489. goto error;
  490. ret = iwl_send_phy_cfg_cmd(mvm);
  491. if (ret)
  492. goto error;
  493. /* init the fw <-> mac80211 STA mapping */
  494. for (i = 0; i < IWL_MVM_STATION_COUNT; i++)
  495. RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
  496. /* Add auxiliary station for scanning */
  497. ret = iwl_mvm_add_aux_sta(mvm);
  498. if (ret)
  499. goto error;
  500. return 0;
  501. error:
  502. iwl_trans_stop_device(mvm->trans);
  503. return ret;
  504. }
  505. int iwl_mvm_rx_card_state_notif(struct iwl_mvm *mvm,
  506. struct iwl_rx_cmd_buffer *rxb,
  507. struct iwl_device_cmd *cmd)
  508. {
  509. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  510. struct iwl_card_state_notif *card_state_notif = (void *)pkt->data;
  511. u32 flags = le32_to_cpu(card_state_notif->flags);
  512. IWL_DEBUG_RF_KILL(mvm, "Card state received: HW:%s SW:%s CT:%s\n",
  513. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  514. (flags & SW_CARD_DISABLED) ? "Kill" : "On",
  515. (flags & CT_KILL_CARD_DISABLED) ?
  516. "Reached" : "Not reached");
  517. return 0;
  518. }
  519. int iwl_mvm_rx_radio_ver(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb,
  520. struct iwl_device_cmd *cmd)
  521. {
  522. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  523. struct iwl_radio_version_notif *radio_version = (void *)pkt->data;
  524. /* TODO: what to do with that? */
  525. IWL_DEBUG_INFO(mvm,
  526. "Radio version: flavor: 0x%08x, step 0x%08x, dash 0x%08x\n",
  527. le32_to_cpu(radio_version->radio_flavor),
  528. le32_to_cpu(radio_version->radio_step),
  529. le32_to_cpu(radio_version->radio_dash));
  530. return 0;
  531. }