intel_lvds.c 32 KB

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  1. /*
  2. * Copyright © 2006-2007 Intel Corporation
  3. * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors:
  25. * Eric Anholt <eric@anholt.net>
  26. * Dave Airlie <airlied@linux.ie>
  27. * Jesse Barnes <jesse.barnes@intel.com>
  28. */
  29. #include <acpi/button.h>
  30. #include <linux/dmi.h>
  31. #include <linux/i2c.h>
  32. #include <linux/slab.h>
  33. #include <drm/drmP.h>
  34. #include <drm/drm_crtc.h>
  35. #include <drm/drm_edid.h>
  36. #include "intel_drv.h"
  37. #include <drm/i915_drm.h>
  38. #include "i915_drv.h"
  39. #include <linux/acpi.h>
  40. /* Private structure for the integrated LVDS support */
  41. struct intel_lvds_connector {
  42. struct intel_connector base;
  43. struct notifier_block lid_notifier;
  44. struct drm_display_mode *fixed_mode;
  45. struct edid *edid;
  46. int fitting_mode;
  47. };
  48. struct intel_lvds_encoder {
  49. struct intel_encoder base;
  50. u32 pfit_control;
  51. u32 pfit_pgm_ratios;
  52. bool pfit_dirty;
  53. struct intel_lvds_connector *attached_connector;
  54. };
  55. static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
  56. {
  57. return container_of(encoder, struct intel_lvds_encoder, base.base);
  58. }
  59. static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
  60. {
  61. return container_of(connector, struct intel_lvds_connector, base.base);
  62. }
  63. static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
  64. enum pipe *pipe)
  65. {
  66. struct drm_device *dev = encoder->base.dev;
  67. struct drm_i915_private *dev_priv = dev->dev_private;
  68. u32 lvds_reg, tmp;
  69. if (HAS_PCH_SPLIT(dev)) {
  70. lvds_reg = PCH_LVDS;
  71. } else {
  72. lvds_reg = LVDS;
  73. }
  74. tmp = I915_READ(lvds_reg);
  75. if (!(tmp & LVDS_PORT_EN))
  76. return false;
  77. if (HAS_PCH_CPT(dev))
  78. *pipe = PORT_TO_PIPE_CPT(tmp);
  79. else
  80. *pipe = PORT_TO_PIPE(tmp);
  81. return true;
  82. }
  83. /**
  84. * Sets the power state for the panel.
  85. */
  86. static void intel_enable_lvds(struct intel_encoder *encoder)
  87. {
  88. struct drm_device *dev = encoder->base.dev;
  89. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  90. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
  91. struct drm_i915_private *dev_priv = dev->dev_private;
  92. u32 ctl_reg, lvds_reg, stat_reg;
  93. if (HAS_PCH_SPLIT(dev)) {
  94. ctl_reg = PCH_PP_CONTROL;
  95. lvds_reg = PCH_LVDS;
  96. stat_reg = PCH_PP_STATUS;
  97. } else {
  98. ctl_reg = PP_CONTROL;
  99. lvds_reg = LVDS;
  100. stat_reg = PP_STATUS;
  101. }
  102. I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
  103. if (lvds_encoder->pfit_dirty) {
  104. /*
  105. * Enable automatic panel scaling so that non-native modes
  106. * fill the screen. The panel fitter should only be
  107. * adjusted whilst the pipe is disabled, according to
  108. * register description and PRM.
  109. */
  110. DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
  111. lvds_encoder->pfit_control,
  112. lvds_encoder->pfit_pgm_ratios);
  113. I915_WRITE(PFIT_PGM_RATIOS, lvds_encoder->pfit_pgm_ratios);
  114. I915_WRITE(PFIT_CONTROL, lvds_encoder->pfit_control);
  115. lvds_encoder->pfit_dirty = false;
  116. }
  117. I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
  118. POSTING_READ(lvds_reg);
  119. if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
  120. DRM_ERROR("timed out waiting for panel to power on\n");
  121. intel_panel_enable_backlight(dev, intel_crtc->pipe);
  122. }
  123. static void intel_disable_lvds(struct intel_encoder *encoder)
  124. {
  125. struct drm_device *dev = encoder->base.dev;
  126. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  127. struct drm_i915_private *dev_priv = dev->dev_private;
  128. u32 ctl_reg, lvds_reg, stat_reg;
  129. if (HAS_PCH_SPLIT(dev)) {
  130. ctl_reg = PCH_PP_CONTROL;
  131. lvds_reg = PCH_LVDS;
  132. stat_reg = PCH_PP_STATUS;
  133. } else {
  134. ctl_reg = PP_CONTROL;
  135. lvds_reg = LVDS;
  136. stat_reg = PP_STATUS;
  137. }
  138. intel_panel_disable_backlight(dev);
  139. I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
  140. if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
  141. DRM_ERROR("timed out waiting for panel to power off\n");
  142. if (lvds_encoder->pfit_control) {
  143. I915_WRITE(PFIT_CONTROL, 0);
  144. lvds_encoder->pfit_dirty = true;
  145. }
  146. I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
  147. POSTING_READ(lvds_reg);
  148. }
  149. static int intel_lvds_mode_valid(struct drm_connector *connector,
  150. struct drm_display_mode *mode)
  151. {
  152. struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
  153. struct drm_display_mode *fixed_mode = lvds_connector->fixed_mode;
  154. if (mode->hdisplay > fixed_mode->hdisplay)
  155. return MODE_PANEL;
  156. if (mode->vdisplay > fixed_mode->vdisplay)
  157. return MODE_PANEL;
  158. return MODE_OK;
  159. }
  160. static void
  161. centre_horizontally(struct drm_display_mode *mode,
  162. int width)
  163. {
  164. u32 border, sync_pos, blank_width, sync_width;
  165. /* keep the hsync and hblank widths constant */
  166. sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
  167. blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
  168. sync_pos = (blank_width - sync_width + 1) / 2;
  169. border = (mode->hdisplay - width + 1) / 2;
  170. border += border & 1; /* make the border even */
  171. mode->crtc_hdisplay = width;
  172. mode->crtc_hblank_start = width + border;
  173. mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
  174. mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
  175. mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
  176. mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
  177. }
  178. static void
  179. centre_vertically(struct drm_display_mode *mode,
  180. int height)
  181. {
  182. u32 border, sync_pos, blank_width, sync_width;
  183. /* keep the vsync and vblank widths constant */
  184. sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
  185. blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
  186. sync_pos = (blank_width - sync_width + 1) / 2;
  187. border = (mode->vdisplay - height + 1) / 2;
  188. mode->crtc_vdisplay = height;
  189. mode->crtc_vblank_start = height + border;
  190. mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
  191. mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
  192. mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
  193. mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
  194. }
  195. static inline u32 panel_fitter_scaling(u32 source, u32 target)
  196. {
  197. /*
  198. * Floating point operation is not supported. So the FACTOR
  199. * is defined, which can avoid the floating point computation
  200. * when calculating the panel ratio.
  201. */
  202. #define ACCURACY 12
  203. #define FACTOR (1 << ACCURACY)
  204. u32 ratio = source * FACTOR / target;
  205. return (FACTOR * ratio + FACTOR/2) / FACTOR;
  206. }
  207. static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
  208. const struct drm_display_mode *mode,
  209. struct drm_display_mode *adjusted_mode)
  210. {
  211. struct drm_device *dev = encoder->dev;
  212. struct drm_i915_private *dev_priv = dev->dev_private;
  213. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(encoder);
  214. struct intel_lvds_connector *lvds_connector =
  215. lvds_encoder->attached_connector;
  216. struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
  217. u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
  218. int pipe;
  219. /* Should never happen!! */
  220. if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
  221. DRM_ERROR("Can't support LVDS on pipe A\n");
  222. return false;
  223. }
  224. if (intel_encoder_check_is_cloned(&lvds_encoder->base))
  225. return false;
  226. /*
  227. * We have timings from the BIOS for the panel, put them in
  228. * to the adjusted mode. The CRTC will be set up for this mode,
  229. * with the panel scaling set up to source from the H/VDisplay
  230. * of the original mode.
  231. */
  232. intel_fixed_panel_mode(lvds_connector->fixed_mode, adjusted_mode);
  233. if (HAS_PCH_SPLIT(dev)) {
  234. intel_pch_panel_fitting(dev, lvds_connector->fitting_mode,
  235. mode, adjusted_mode);
  236. return true;
  237. }
  238. /* Native modes don't need fitting */
  239. if (adjusted_mode->hdisplay == mode->hdisplay &&
  240. adjusted_mode->vdisplay == mode->vdisplay)
  241. goto out;
  242. /* 965+ wants fuzzy fitting */
  243. if (INTEL_INFO(dev)->gen >= 4)
  244. pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
  245. PFIT_FILTER_FUZZY);
  246. /*
  247. * Enable automatic panel scaling for non-native modes so that they fill
  248. * the screen. Should be enabled before the pipe is enabled, according
  249. * to register description and PRM.
  250. * Change the value here to see the borders for debugging
  251. */
  252. for_each_pipe(pipe)
  253. I915_WRITE(BCLRPAT(pipe), 0);
  254. drm_mode_set_crtcinfo(adjusted_mode, 0);
  255. switch (lvds_connector->fitting_mode) {
  256. case DRM_MODE_SCALE_CENTER:
  257. /*
  258. * For centered modes, we have to calculate border widths &
  259. * heights and modify the values programmed into the CRTC.
  260. */
  261. centre_horizontally(adjusted_mode, mode->hdisplay);
  262. centre_vertically(adjusted_mode, mode->vdisplay);
  263. border = LVDS_BORDER_ENABLE;
  264. break;
  265. case DRM_MODE_SCALE_ASPECT:
  266. /* Scale but preserve the aspect ratio */
  267. if (INTEL_INFO(dev)->gen >= 4) {
  268. u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
  269. u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
  270. /* 965+ is easy, it does everything in hw */
  271. if (scaled_width > scaled_height)
  272. pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR;
  273. else if (scaled_width < scaled_height)
  274. pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER;
  275. else if (adjusted_mode->hdisplay != mode->hdisplay)
  276. pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
  277. } else {
  278. u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
  279. u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
  280. /*
  281. * For earlier chips we have to calculate the scaling
  282. * ratio by hand and program it into the
  283. * PFIT_PGM_RATIO register
  284. */
  285. if (scaled_width > scaled_height) { /* pillar */
  286. centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
  287. border = LVDS_BORDER_ENABLE;
  288. if (mode->vdisplay != adjusted_mode->vdisplay) {
  289. u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
  290. pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  291. bits << PFIT_VERT_SCALE_SHIFT);
  292. pfit_control |= (PFIT_ENABLE |
  293. VERT_INTERP_BILINEAR |
  294. HORIZ_INTERP_BILINEAR);
  295. }
  296. } else if (scaled_width < scaled_height) { /* letter */
  297. centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
  298. border = LVDS_BORDER_ENABLE;
  299. if (mode->hdisplay != adjusted_mode->hdisplay) {
  300. u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
  301. pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  302. bits << PFIT_VERT_SCALE_SHIFT);
  303. pfit_control |= (PFIT_ENABLE |
  304. VERT_INTERP_BILINEAR |
  305. HORIZ_INTERP_BILINEAR);
  306. }
  307. } else
  308. /* Aspects match, Let hw scale both directions */
  309. pfit_control |= (PFIT_ENABLE |
  310. VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
  311. VERT_INTERP_BILINEAR |
  312. HORIZ_INTERP_BILINEAR);
  313. }
  314. break;
  315. case DRM_MODE_SCALE_FULLSCREEN:
  316. /*
  317. * Full scaling, even if it changes the aspect ratio.
  318. * Fortunately this is all done for us in hw.
  319. */
  320. if (mode->vdisplay != adjusted_mode->vdisplay ||
  321. mode->hdisplay != adjusted_mode->hdisplay) {
  322. pfit_control |= PFIT_ENABLE;
  323. if (INTEL_INFO(dev)->gen >= 4)
  324. pfit_control |= PFIT_SCALING_AUTO;
  325. else
  326. pfit_control |= (VERT_AUTO_SCALE |
  327. VERT_INTERP_BILINEAR |
  328. HORIZ_AUTO_SCALE |
  329. HORIZ_INTERP_BILINEAR);
  330. }
  331. break;
  332. default:
  333. break;
  334. }
  335. out:
  336. /* If not enabling scaling, be consistent and always use 0. */
  337. if ((pfit_control & PFIT_ENABLE) == 0) {
  338. pfit_control = 0;
  339. pfit_pgm_ratios = 0;
  340. }
  341. /* Make sure pre-965 set dither correctly */
  342. if (INTEL_INFO(dev)->gen < 4 && dev_priv->lvds_dither)
  343. pfit_control |= PANEL_8TO6_DITHER_ENABLE;
  344. if (pfit_control != lvds_encoder->pfit_control ||
  345. pfit_pgm_ratios != lvds_encoder->pfit_pgm_ratios) {
  346. lvds_encoder->pfit_control = pfit_control;
  347. lvds_encoder->pfit_pgm_ratios = pfit_pgm_ratios;
  348. lvds_encoder->pfit_dirty = true;
  349. }
  350. dev_priv->lvds_border_bits = border;
  351. /*
  352. * XXX: It would be nice to support lower refresh rates on the
  353. * panels to reduce power consumption, and perhaps match the
  354. * user's requested refresh rate.
  355. */
  356. return true;
  357. }
  358. static void intel_lvds_mode_set(struct drm_encoder *encoder,
  359. struct drm_display_mode *mode,
  360. struct drm_display_mode *adjusted_mode)
  361. {
  362. /*
  363. * The LVDS pin pair will already have been turned on in the
  364. * intel_crtc_mode_set since it has a large impact on the DPLL
  365. * settings.
  366. */
  367. }
  368. /**
  369. * Detect the LVDS connection.
  370. *
  371. * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
  372. * connected and closed means disconnected. We also send hotplug events as
  373. * needed, using lid status notification from the input layer.
  374. */
  375. static enum drm_connector_status
  376. intel_lvds_detect(struct drm_connector *connector, bool force)
  377. {
  378. struct drm_device *dev = connector->dev;
  379. enum drm_connector_status status;
  380. status = intel_panel_detect(dev);
  381. if (status != connector_status_unknown)
  382. return status;
  383. return connector_status_connected;
  384. }
  385. /**
  386. * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  387. */
  388. static int intel_lvds_get_modes(struct drm_connector *connector)
  389. {
  390. struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
  391. struct drm_device *dev = connector->dev;
  392. struct drm_display_mode *mode;
  393. if (lvds_connector->edid)
  394. return drm_add_edid_modes(connector, lvds_connector->edid);
  395. mode = drm_mode_duplicate(dev, lvds_connector->fixed_mode);
  396. if (mode == NULL)
  397. return 0;
  398. drm_mode_probed_add(connector, mode);
  399. return 1;
  400. }
  401. static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
  402. {
  403. DRM_INFO("Skipping forced modeset for %s\n", id->ident);
  404. return 1;
  405. }
  406. /* The GPU hangs up on these systems if modeset is performed on LID open */
  407. static const struct dmi_system_id intel_no_modeset_on_lid[] = {
  408. {
  409. .callback = intel_no_modeset_on_lid_dmi_callback,
  410. .ident = "Toshiba Tecra A11",
  411. .matches = {
  412. DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
  413. DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
  414. },
  415. },
  416. { } /* terminating entry */
  417. };
  418. /*
  419. * Lid events. Note the use of 'modeset_on_lid':
  420. * - we set it on lid close, and reset it on open
  421. * - we use it as a "only once" bit (ie we ignore
  422. * duplicate events where it was already properly
  423. * set/reset)
  424. * - the suspend/resume paths will also set it to
  425. * zero, since they restore the mode ("lid open").
  426. */
  427. static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
  428. void *unused)
  429. {
  430. struct intel_lvds_connector *lvds_connector =
  431. container_of(nb, struct intel_lvds_connector, lid_notifier);
  432. struct drm_connector *connector = &lvds_connector->base.base;
  433. struct drm_device *dev = connector->dev;
  434. struct drm_i915_private *dev_priv = dev->dev_private;
  435. if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
  436. return NOTIFY_OK;
  437. /*
  438. * check and update the status of LVDS connector after receiving
  439. * the LID nofication event.
  440. */
  441. connector->status = connector->funcs->detect(connector, false);
  442. /* Don't force modeset on machines where it causes a GPU lockup */
  443. if (dmi_check_system(intel_no_modeset_on_lid))
  444. return NOTIFY_OK;
  445. if (!acpi_lid_open()) {
  446. dev_priv->modeset_on_lid = 1;
  447. return NOTIFY_OK;
  448. }
  449. if (!dev_priv->modeset_on_lid)
  450. return NOTIFY_OK;
  451. dev_priv->modeset_on_lid = 0;
  452. mutex_lock(&dev->mode_config.mutex);
  453. intel_modeset_check_state(dev);
  454. mutex_unlock(&dev->mode_config.mutex);
  455. return NOTIFY_OK;
  456. }
  457. /**
  458. * intel_lvds_destroy - unregister and free LVDS structures
  459. * @connector: connector to free
  460. *
  461. * Unregister the DDC bus for this connector then free the driver private
  462. * structure.
  463. */
  464. static void intel_lvds_destroy(struct drm_connector *connector)
  465. {
  466. struct intel_lvds_connector *lvds_connector =
  467. to_lvds_connector(connector);
  468. if (lvds_connector->lid_notifier.notifier_call)
  469. acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
  470. intel_panel_destroy_backlight(connector->dev);
  471. drm_sysfs_connector_remove(connector);
  472. drm_connector_cleanup(connector);
  473. kfree(connector);
  474. }
  475. static int intel_lvds_set_property(struct drm_connector *connector,
  476. struct drm_property *property,
  477. uint64_t value)
  478. {
  479. struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
  480. struct drm_device *dev = connector->dev;
  481. if (property == dev->mode_config.scaling_mode_property) {
  482. struct drm_crtc *crtc;
  483. if (value == DRM_MODE_SCALE_NONE) {
  484. DRM_DEBUG_KMS("no scaling not supported\n");
  485. return -EINVAL;
  486. }
  487. if (lvds_connector->fitting_mode == value) {
  488. /* the LVDS scaling property is not changed */
  489. return 0;
  490. }
  491. lvds_connector->fitting_mode = value;
  492. crtc = intel_attached_encoder(connector)->base.crtc;
  493. if (crtc && crtc->enabled) {
  494. /*
  495. * If the CRTC is enabled, the display will be changed
  496. * according to the new panel fitting mode.
  497. */
  498. intel_set_mode(crtc, &crtc->mode,
  499. crtc->x, crtc->y, crtc->fb);
  500. }
  501. }
  502. return 0;
  503. }
  504. static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
  505. .mode_fixup = intel_lvds_mode_fixup,
  506. .mode_set = intel_lvds_mode_set,
  507. .disable = intel_encoder_noop,
  508. };
  509. static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
  510. .get_modes = intel_lvds_get_modes,
  511. .mode_valid = intel_lvds_mode_valid,
  512. .best_encoder = intel_best_encoder,
  513. };
  514. static const struct drm_connector_funcs intel_lvds_connector_funcs = {
  515. .dpms = intel_connector_dpms,
  516. .detect = intel_lvds_detect,
  517. .fill_modes = drm_helper_probe_single_connector_modes,
  518. .set_property = intel_lvds_set_property,
  519. .destroy = intel_lvds_destroy,
  520. };
  521. static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
  522. .destroy = intel_encoder_destroy,
  523. };
  524. static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
  525. {
  526. DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
  527. return 1;
  528. }
  529. /* These systems claim to have LVDS, but really don't */
  530. static const struct dmi_system_id intel_no_lvds[] = {
  531. {
  532. .callback = intel_no_lvds_dmi_callback,
  533. .ident = "Apple Mac Mini (Core series)",
  534. .matches = {
  535. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  536. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
  537. },
  538. },
  539. {
  540. .callback = intel_no_lvds_dmi_callback,
  541. .ident = "Apple Mac Mini (Core 2 series)",
  542. .matches = {
  543. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  544. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
  545. },
  546. },
  547. {
  548. .callback = intel_no_lvds_dmi_callback,
  549. .ident = "MSI IM-945GSE-A",
  550. .matches = {
  551. DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
  552. DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
  553. },
  554. },
  555. {
  556. .callback = intel_no_lvds_dmi_callback,
  557. .ident = "Dell Studio Hybrid",
  558. .matches = {
  559. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  560. DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
  561. },
  562. },
  563. {
  564. .callback = intel_no_lvds_dmi_callback,
  565. .ident = "Dell OptiPlex FX170",
  566. .matches = {
  567. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  568. DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
  569. },
  570. },
  571. {
  572. .callback = intel_no_lvds_dmi_callback,
  573. .ident = "AOpen Mini PC",
  574. .matches = {
  575. DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
  576. DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
  577. },
  578. },
  579. {
  580. .callback = intel_no_lvds_dmi_callback,
  581. .ident = "AOpen Mini PC MP915",
  582. .matches = {
  583. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  584. DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
  585. },
  586. },
  587. {
  588. .callback = intel_no_lvds_dmi_callback,
  589. .ident = "AOpen i915GMm-HFS",
  590. .matches = {
  591. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  592. DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
  593. },
  594. },
  595. {
  596. .callback = intel_no_lvds_dmi_callback,
  597. .ident = "AOpen i45GMx-I",
  598. .matches = {
  599. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  600. DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
  601. },
  602. },
  603. {
  604. .callback = intel_no_lvds_dmi_callback,
  605. .ident = "Aopen i945GTt-VFA",
  606. .matches = {
  607. DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
  608. },
  609. },
  610. {
  611. .callback = intel_no_lvds_dmi_callback,
  612. .ident = "Clientron U800",
  613. .matches = {
  614. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  615. DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
  616. },
  617. },
  618. {
  619. .callback = intel_no_lvds_dmi_callback,
  620. .ident = "Clientron E830",
  621. .matches = {
  622. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  623. DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
  624. },
  625. },
  626. {
  627. .callback = intel_no_lvds_dmi_callback,
  628. .ident = "Asus EeeBox PC EB1007",
  629. .matches = {
  630. DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
  631. DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
  632. },
  633. },
  634. {
  635. .callback = intel_no_lvds_dmi_callback,
  636. .ident = "Asus AT5NM10T-I",
  637. .matches = {
  638. DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
  639. DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
  640. },
  641. },
  642. {
  643. .callback = intel_no_lvds_dmi_callback,
  644. .ident = "Hewlett-Packard HP t5740e Thin Client",
  645. .matches = {
  646. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  647. DMI_MATCH(DMI_PRODUCT_NAME, "HP t5740e Thin Client"),
  648. },
  649. },
  650. {
  651. .callback = intel_no_lvds_dmi_callback,
  652. .ident = "Hewlett-Packard t5745",
  653. .matches = {
  654. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  655. DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
  656. },
  657. },
  658. {
  659. .callback = intel_no_lvds_dmi_callback,
  660. .ident = "Hewlett-Packard st5747",
  661. .matches = {
  662. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  663. DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
  664. },
  665. },
  666. {
  667. .callback = intel_no_lvds_dmi_callback,
  668. .ident = "MSI Wind Box DC500",
  669. .matches = {
  670. DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
  671. DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
  672. },
  673. },
  674. {
  675. .callback = intel_no_lvds_dmi_callback,
  676. .ident = "ZOTAC ZBOXSD-ID12/ID13",
  677. .matches = {
  678. DMI_MATCH(DMI_BOARD_VENDOR, "ZOTAC"),
  679. DMI_MATCH(DMI_BOARD_NAME, "ZBOXSD-ID12/ID13"),
  680. },
  681. },
  682. {
  683. .callback = intel_no_lvds_dmi_callback,
  684. .ident = "Gigabyte GA-D525TUD",
  685. .matches = {
  686. DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
  687. DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
  688. },
  689. },
  690. { } /* terminating entry */
  691. };
  692. /**
  693. * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
  694. * @dev: drm device
  695. * @connector: LVDS connector
  696. *
  697. * Find the reduced downclock for LVDS in EDID.
  698. */
  699. static void intel_find_lvds_downclock(struct drm_device *dev,
  700. struct drm_display_mode *fixed_mode,
  701. struct drm_connector *connector)
  702. {
  703. struct drm_i915_private *dev_priv = dev->dev_private;
  704. struct drm_display_mode *scan;
  705. int temp_downclock;
  706. temp_downclock = fixed_mode->clock;
  707. list_for_each_entry(scan, &connector->probed_modes, head) {
  708. /*
  709. * If one mode has the same resolution with the fixed_panel
  710. * mode while they have the different refresh rate, it means
  711. * that the reduced downclock is found for the LVDS. In such
  712. * case we can set the different FPx0/1 to dynamically select
  713. * between low and high frequency.
  714. */
  715. if (scan->hdisplay == fixed_mode->hdisplay &&
  716. scan->hsync_start == fixed_mode->hsync_start &&
  717. scan->hsync_end == fixed_mode->hsync_end &&
  718. scan->htotal == fixed_mode->htotal &&
  719. scan->vdisplay == fixed_mode->vdisplay &&
  720. scan->vsync_start == fixed_mode->vsync_start &&
  721. scan->vsync_end == fixed_mode->vsync_end &&
  722. scan->vtotal == fixed_mode->vtotal) {
  723. if (scan->clock < temp_downclock) {
  724. /*
  725. * The downclock is already found. But we
  726. * expect to find the lower downclock.
  727. */
  728. temp_downclock = scan->clock;
  729. }
  730. }
  731. }
  732. if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
  733. /* We found the downclock for LVDS. */
  734. dev_priv->lvds_downclock_avail = 1;
  735. dev_priv->lvds_downclock = temp_downclock;
  736. DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
  737. "Normal clock %dKhz, downclock %dKhz\n",
  738. fixed_mode->clock, temp_downclock);
  739. }
  740. }
  741. /*
  742. * Enumerate the child dev array parsed from VBT to check whether
  743. * the LVDS is present.
  744. * If it is present, return 1.
  745. * If it is not present, return false.
  746. * If no child dev is parsed from VBT, it assumes that the LVDS is present.
  747. */
  748. static bool lvds_is_present_in_vbt(struct drm_device *dev,
  749. u8 *i2c_pin)
  750. {
  751. struct drm_i915_private *dev_priv = dev->dev_private;
  752. int i;
  753. if (!dev_priv->child_dev_num)
  754. return true;
  755. for (i = 0; i < dev_priv->child_dev_num; i++) {
  756. struct child_device_config *child = dev_priv->child_dev + i;
  757. /* If the device type is not LFP, continue.
  758. * We have to check both the new identifiers as well as the
  759. * old for compatibility with some BIOSes.
  760. */
  761. if (child->device_type != DEVICE_TYPE_INT_LFP &&
  762. child->device_type != DEVICE_TYPE_LFP)
  763. continue;
  764. if (intel_gmbus_is_port_valid(child->i2c_pin))
  765. *i2c_pin = child->i2c_pin;
  766. /* However, we cannot trust the BIOS writers to populate
  767. * the VBT correctly. Since LVDS requires additional
  768. * information from AIM blocks, a non-zero addin offset is
  769. * a good indicator that the LVDS is actually present.
  770. */
  771. if (child->addin_offset)
  772. return true;
  773. /* But even then some BIOS writers perform some black magic
  774. * and instantiate the device without reference to any
  775. * additional data. Trust that if the VBT was written into
  776. * the OpRegion then they have validated the LVDS's existence.
  777. */
  778. if (dev_priv->opregion.vbt)
  779. return true;
  780. }
  781. return false;
  782. }
  783. static bool intel_lvds_supported(struct drm_device *dev)
  784. {
  785. /* With the introduction of the PCH we gained a dedicated
  786. * LVDS presence pin, use it. */
  787. if (HAS_PCH_SPLIT(dev))
  788. return true;
  789. /* Otherwise LVDS was only attached to mobile products,
  790. * except for the inglorious 830gm */
  791. return IS_MOBILE(dev) && !IS_I830(dev);
  792. }
  793. /**
  794. * intel_lvds_init - setup LVDS connectors on this device
  795. * @dev: drm device
  796. *
  797. * Create the connector, register the LVDS DDC bus, and try to figure out what
  798. * modes we can display on the LVDS panel (if present).
  799. */
  800. bool intel_lvds_init(struct drm_device *dev)
  801. {
  802. struct drm_i915_private *dev_priv = dev->dev_private;
  803. struct intel_lvds_encoder *lvds_encoder;
  804. struct intel_encoder *intel_encoder;
  805. struct intel_lvds_connector *lvds_connector;
  806. struct intel_connector *intel_connector;
  807. struct drm_connector *connector;
  808. struct drm_encoder *encoder;
  809. struct drm_display_mode *scan; /* *modes, *bios_mode; */
  810. struct drm_crtc *crtc;
  811. u32 lvds;
  812. int pipe;
  813. u8 pin;
  814. if (!intel_lvds_supported(dev))
  815. return false;
  816. /* Skip init on machines we know falsely report LVDS */
  817. if (dmi_check_system(intel_no_lvds))
  818. return false;
  819. pin = GMBUS_PORT_PANEL;
  820. if (!lvds_is_present_in_vbt(dev, &pin)) {
  821. DRM_DEBUG_KMS("LVDS is not present in VBT\n");
  822. return false;
  823. }
  824. if (HAS_PCH_SPLIT(dev)) {
  825. if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
  826. return false;
  827. if (dev_priv->edp.support) {
  828. DRM_DEBUG_KMS("disable LVDS for eDP support\n");
  829. return false;
  830. }
  831. }
  832. lvds_encoder = kzalloc(sizeof(struct intel_lvds_encoder), GFP_KERNEL);
  833. if (!lvds_encoder)
  834. return false;
  835. lvds_connector = kzalloc(sizeof(struct intel_lvds_connector), GFP_KERNEL);
  836. if (!lvds_connector) {
  837. kfree(lvds_encoder);
  838. return false;
  839. }
  840. lvds_encoder->attached_connector = lvds_connector;
  841. if (!HAS_PCH_SPLIT(dev)) {
  842. lvds_encoder->pfit_control = I915_READ(PFIT_CONTROL);
  843. }
  844. intel_encoder = &lvds_encoder->base;
  845. encoder = &intel_encoder->base;
  846. intel_connector = &lvds_connector->base;
  847. connector = &intel_connector->base;
  848. drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
  849. DRM_MODE_CONNECTOR_LVDS);
  850. drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
  851. DRM_MODE_ENCODER_LVDS);
  852. intel_encoder->enable = intel_enable_lvds;
  853. intel_encoder->disable = intel_disable_lvds;
  854. intel_encoder->get_hw_state = intel_lvds_get_hw_state;
  855. intel_connector->get_hw_state = intel_connector_get_hw_state;
  856. intel_connector_attach_encoder(intel_connector, intel_encoder);
  857. intel_encoder->type = INTEL_OUTPUT_LVDS;
  858. intel_encoder->cloneable = false;
  859. if (HAS_PCH_SPLIT(dev))
  860. intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
  861. else if (IS_GEN4(dev))
  862. intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
  863. else
  864. intel_encoder->crtc_mask = (1 << 1);
  865. drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
  866. drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
  867. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  868. connector->interlace_allowed = false;
  869. connector->doublescan_allowed = false;
  870. /* create the scaling mode property */
  871. drm_mode_create_scaling_mode_property(dev);
  872. /*
  873. * the initial panel fitting mode will be FULL_SCREEN.
  874. */
  875. drm_connector_attach_property(&intel_connector->base,
  876. dev->mode_config.scaling_mode_property,
  877. DRM_MODE_SCALE_ASPECT);
  878. lvds_connector->fitting_mode = DRM_MODE_SCALE_ASPECT;
  879. /*
  880. * LVDS discovery:
  881. * 1) check for EDID on DDC
  882. * 2) check for VBT data
  883. * 3) check to see if LVDS is already on
  884. * if none of the above, no panel
  885. * 4) make sure lid is open
  886. * if closed, act like it's not there for now
  887. */
  888. /*
  889. * Attempt to get the fixed panel mode from DDC. Assume that the
  890. * preferred mode is the right one.
  891. */
  892. lvds_connector->edid = drm_get_edid(connector,
  893. intel_gmbus_get_adapter(dev_priv, pin));
  894. if (lvds_connector->edid) {
  895. if (drm_add_edid_modes(connector, lvds_connector->edid)) {
  896. drm_mode_connector_update_edid_property(connector,
  897. lvds_connector->edid);
  898. } else {
  899. kfree(lvds_connector->edid);
  900. lvds_connector->edid = NULL;
  901. }
  902. }
  903. if (!lvds_connector->edid) {
  904. /* Didn't get an EDID, so
  905. * Set wide sync ranges so we get all modes
  906. * handed to valid_mode for checking
  907. */
  908. connector->display_info.min_vfreq = 0;
  909. connector->display_info.max_vfreq = 200;
  910. connector->display_info.min_hfreq = 0;
  911. connector->display_info.max_hfreq = 200;
  912. }
  913. list_for_each_entry(scan, &connector->probed_modes, head) {
  914. if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  915. lvds_connector->fixed_mode = drm_mode_duplicate(dev, scan);
  916. intel_find_lvds_downclock(dev,
  917. lvds_connector->fixed_mode,
  918. connector);
  919. goto out;
  920. }
  921. }
  922. /* Failed to get EDID, what about VBT? */
  923. if (dev_priv->lfp_lvds_vbt_mode) {
  924. lvds_connector->fixed_mode =
  925. drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
  926. if (lvds_connector->fixed_mode) {
  927. lvds_connector->fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  928. goto out;
  929. }
  930. }
  931. /*
  932. * If we didn't get EDID, try checking if the panel is already turned
  933. * on. If so, assume that whatever is currently programmed is the
  934. * correct mode.
  935. */
  936. /* Ironlake: FIXME if still fail, not try pipe mode now */
  937. if (HAS_PCH_SPLIT(dev))
  938. goto failed;
  939. lvds = I915_READ(LVDS);
  940. pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  941. crtc = intel_get_crtc_for_pipe(dev, pipe);
  942. if (crtc && (lvds & LVDS_PORT_EN)) {
  943. lvds_connector->fixed_mode = intel_crtc_mode_get(dev, crtc);
  944. if (lvds_connector->fixed_mode) {
  945. lvds_connector->fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  946. goto out;
  947. }
  948. }
  949. /* If we still don't have a mode after all that, give up. */
  950. if (!lvds_connector->fixed_mode)
  951. goto failed;
  952. out:
  953. /*
  954. * Unlock registers and just
  955. * leave them unlocked
  956. */
  957. if (HAS_PCH_SPLIT(dev)) {
  958. I915_WRITE(PCH_PP_CONTROL,
  959. I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
  960. } else {
  961. I915_WRITE(PP_CONTROL,
  962. I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
  963. }
  964. lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
  965. if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
  966. DRM_DEBUG_KMS("lid notifier registration failed\n");
  967. lvds_connector->lid_notifier.notifier_call = NULL;
  968. }
  969. drm_sysfs_connector_add(connector);
  970. intel_panel_setup_backlight(connector);
  971. return true;
  972. failed:
  973. DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
  974. drm_connector_cleanup(connector);
  975. drm_encoder_cleanup(encoder);
  976. kfree(lvds_encoder);
  977. kfree(lvds_connector);
  978. return false;
  979. }