board-dt-tegra30.c 3.4 KB

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  1. /*
  2. * arch/arm/mach-tegra/board-dt-tegra30.c
  3. *
  4. * NVIDIA Tegra30 device tree board support
  5. *
  6. * Copyright (C) 2011 NVIDIA Corporation
  7. *
  8. * Derived from:
  9. *
  10. * arch/arm/mach-tegra/board-dt-tegra20.c
  11. *
  12. * Copyright (C) 2010 Secret Lab Technologies, Ltd.
  13. * Copyright (C) 2010 Google, Inc.
  14. *
  15. * This software is licensed under the terms of the GNU General Public
  16. * License version 2, as published by the Free Software Foundation, and
  17. * may be copied, distributed, and modified under those terms.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. */
  25. #include <linux/clocksource.h>
  26. #include <linux/kernel.h>
  27. #include <linux/of.h>
  28. #include <linux/of_address.h>
  29. #include <linux/of_fdt.h>
  30. #include <linux/of_irq.h>
  31. #include <linux/of_platform.h>
  32. #include <asm/mach/arch.h>
  33. #include <asm/hardware/gic.h>
  34. #include "board.h"
  35. #include "common.h"
  36. #include "iomap.h"
  37. static struct of_dev_auxdata tegra30_auxdata_lookup[] __initdata = {
  38. OF_DEV_AUXDATA("nvidia,tegra20-sdhci", 0x78000000, "sdhci-tegra.0", NULL),
  39. OF_DEV_AUXDATA("nvidia,tegra20-sdhci", 0x78000200, "sdhci-tegra.1", NULL),
  40. OF_DEV_AUXDATA("nvidia,tegra20-sdhci", 0x78000400, "sdhci-tegra.2", NULL),
  41. OF_DEV_AUXDATA("nvidia,tegra20-sdhci", 0x78000600, "sdhci-tegra.3", NULL),
  42. OF_DEV_AUXDATA("nvidia,tegra20-i2c", 0x7000C000, "tegra-i2c.0", NULL),
  43. OF_DEV_AUXDATA("nvidia,tegra20-i2c", 0x7000C400, "tegra-i2c.1", NULL),
  44. OF_DEV_AUXDATA("nvidia,tegra20-i2c", 0x7000C500, "tegra-i2c.2", NULL),
  45. OF_DEV_AUXDATA("nvidia,tegra20-i2c", 0x7000C700, "tegra-i2c.3", NULL),
  46. OF_DEV_AUXDATA("nvidia,tegra20-i2c", 0x7000D000, "tegra-i2c.4", NULL),
  47. OF_DEV_AUXDATA("nvidia,tegra30-ahub", 0x70080000, "tegra30-ahub", NULL),
  48. OF_DEV_AUXDATA("nvidia,tegra30-apbdma", 0x6000a000, "tegra-apbdma", NULL),
  49. OF_DEV_AUXDATA("nvidia,tegra30-pwm", TEGRA_PWFM_BASE, "tegra-pwm", NULL),
  50. OF_DEV_AUXDATA("nvidia,tegra30-slink", 0x7000D400, "spi_tegra.0", NULL),
  51. OF_DEV_AUXDATA("nvidia,tegra30-slink", 0x7000D600, "spi_tegra.1", NULL),
  52. OF_DEV_AUXDATA("nvidia,tegra30-slink", 0x7000D800, "spi_tegra.2", NULL),
  53. OF_DEV_AUXDATA("nvidia,tegra30-slink", 0x7000DA00, "spi_tegra.3", NULL),
  54. OF_DEV_AUXDATA("nvidia,tegra30-slink", 0x7000DC00, "spi_tegra.4", NULL),
  55. OF_DEV_AUXDATA("nvidia,tegra30-slink", 0x7000DE00, "spi_tegra.5", NULL),
  56. OF_DEV_AUXDATA("nvidia,tegra30-host1x", 0x50000000, "host1x", NULL),
  57. OF_DEV_AUXDATA("nvidia,tegra30-dc", 0x54200000, "tegradc.0", NULL),
  58. OF_DEV_AUXDATA("nvidia,tegra30-dc", 0x54240000, "tegradc.1", NULL),
  59. OF_DEV_AUXDATA("nvidia,tegra30-hdmi", 0x54280000, "hdmi", NULL),
  60. OF_DEV_AUXDATA("nvidia,tegra30-dsi", 0x54300000, "dsi", NULL),
  61. OF_DEV_AUXDATA("nvidia,tegra30-tvo", 0x542c0000, "tvo", NULL),
  62. {}
  63. };
  64. static void __init tegra30_dt_init(void)
  65. {
  66. of_platform_populate(NULL, of_default_bus_match_table,
  67. tegra30_auxdata_lookup, NULL);
  68. }
  69. static const char *tegra30_dt_board_compat[] = {
  70. "nvidia,tegra30",
  71. NULL
  72. };
  73. DT_MACHINE_START(TEGRA30_DT, "NVIDIA Tegra30 (Flattened Device Tree)")
  74. .smp = smp_ops(tegra_smp_ops),
  75. .map_io = tegra_map_common_io,
  76. .init_early = tegra30_init_early,
  77. .init_irq = tegra_dt_init_irq,
  78. .handle_irq = gic_handle_irq,
  79. .init_time = clocksource_of_init,
  80. .init_machine = tegra30_dt_init,
  81. .init_late = tegra_init_late,
  82. .restart = tegra_assert_system_reset,
  83. .dt_compat = tegra30_dt_board_compat,
  84. MACHINE_END