drm_edid.c 45 KB

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  1. /*
  2. * Copyright (c) 2006 Luc Verhaegen (quirks list)
  3. * Copyright (c) 2007-2008 Intel Corporation
  4. * Jesse Barnes <jesse.barnes@intel.com>
  5. * Copyright 2010 Red Hat, Inc.
  6. *
  7. * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
  8. * FB layer.
  9. * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
  10. *
  11. * Permission is hereby granted, free of charge, to any person obtaining a
  12. * copy of this software and associated documentation files (the "Software"),
  13. * to deal in the Software without restriction, including without limitation
  14. * the rights to use, copy, modify, merge, publish, distribute, sub license,
  15. * and/or sell copies of the Software, and to permit persons to whom the
  16. * Software is furnished to do so, subject to the following conditions:
  17. *
  18. * The above copyright notice and this permission notice (including the
  19. * next paragraph) shall be included in all copies or substantial portions
  20. * of the Software.
  21. *
  22. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  23. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  24. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  25. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  26. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  27. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  28. * DEALINGS IN THE SOFTWARE.
  29. */
  30. #include <linux/kernel.h>
  31. #include <linux/i2c.h>
  32. #include <linux/i2c-algo-bit.h>
  33. #include "drmP.h"
  34. #include "drm_edid.h"
  35. /*
  36. * TODO:
  37. * - support EDID 1.4 (incl. CE blocks)
  38. */
  39. /*
  40. * EDID blocks out in the wild have a variety of bugs, try to collect
  41. * them here (note that userspace may work around broken monitors first,
  42. * but fixes should make their way here so that the kernel "just works"
  43. * on as many displays as possible).
  44. */
  45. /* First detailed mode wrong, use largest 60Hz mode */
  46. #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
  47. /* Reported 135MHz pixel clock is too high, needs adjustment */
  48. #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
  49. /* Prefer the largest mode at 75 Hz */
  50. #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
  51. /* Detail timing is in cm not mm */
  52. #define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
  53. /* Detailed timing descriptors have bogus size values, so just take the
  54. * maximum size and use that.
  55. */
  56. #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
  57. /* Monitor forgot to set the first detailed is preferred bit. */
  58. #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
  59. /* use +hsync +vsync for detailed mode */
  60. #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
  61. #define LEVEL_DMT 0
  62. #define LEVEL_GTF 1
  63. #define LEVEL_CVT 2
  64. static struct edid_quirk {
  65. char *vendor;
  66. int product_id;
  67. u32 quirks;
  68. } edid_quirk_list[] = {
  69. /* Acer AL1706 */
  70. { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
  71. /* Acer F51 */
  72. { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
  73. /* Unknown Acer */
  74. { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
  75. /* Belinea 10 15 55 */
  76. { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
  77. { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
  78. /* Envision Peripherals, Inc. EN-7100e */
  79. { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
  80. /* Funai Electronics PM36B */
  81. { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
  82. EDID_QUIRK_DETAILED_IN_CM },
  83. /* LG Philips LCD LP154W01-A5 */
  84. { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
  85. { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
  86. /* Philips 107p5 CRT */
  87. { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
  88. /* Proview AY765C */
  89. { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
  90. /* Samsung SyncMaster 205BW. Note: irony */
  91. { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
  92. /* Samsung SyncMaster 22[5-6]BW */
  93. { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
  94. { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
  95. };
  96. /*** DDC fetch and block validation ***/
  97. static const u8 edid_header[] = {
  98. 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
  99. };
  100. /*
  101. * Sanity check the EDID block (base or extension). Return 0 if the block
  102. * doesn't check out, or 1 if it's valid.
  103. */
  104. static bool
  105. drm_edid_block_valid(u8 *raw_edid)
  106. {
  107. int i;
  108. u8 csum = 0;
  109. struct edid *edid = (struct edid *)raw_edid;
  110. if (raw_edid[0] == 0x00) {
  111. int score = 0;
  112. for (i = 0; i < sizeof(edid_header); i++)
  113. if (raw_edid[i] == edid_header[i])
  114. score++;
  115. if (score == 8) ;
  116. else if (score >= 6) {
  117. DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
  118. memcpy(raw_edid, edid_header, sizeof(edid_header));
  119. } else {
  120. goto bad;
  121. }
  122. }
  123. for (i = 0; i < EDID_LENGTH; i++)
  124. csum += raw_edid[i];
  125. if (csum) {
  126. DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
  127. goto bad;
  128. }
  129. /* per-block-type checks */
  130. switch (raw_edid[0]) {
  131. case 0: /* base */
  132. if (edid->version != 1) {
  133. DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
  134. goto bad;
  135. }
  136. if (edid->revision > 4)
  137. DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
  138. break;
  139. default:
  140. break;
  141. }
  142. return 1;
  143. bad:
  144. if (raw_edid) {
  145. DRM_ERROR("Raw EDID:\n");
  146. print_hex_dump_bytes(KERN_ERR, DUMP_PREFIX_NONE, raw_edid, EDID_LENGTH);
  147. printk("\n");
  148. }
  149. return 0;
  150. }
  151. /**
  152. * drm_edid_is_valid - sanity check EDID data
  153. * @edid: EDID data
  154. *
  155. * Sanity-check an entire EDID record (including extensions)
  156. */
  157. bool drm_edid_is_valid(struct edid *edid)
  158. {
  159. int i;
  160. u8 *raw = (u8 *)edid;
  161. if (!edid)
  162. return false;
  163. for (i = 0; i <= edid->extensions; i++)
  164. if (!drm_edid_block_valid(raw + i * EDID_LENGTH))
  165. return false;
  166. return true;
  167. }
  168. EXPORT_SYMBOL(drm_edid_is_valid);
  169. #define DDC_ADDR 0x50
  170. #define DDC_SEGMENT_ADDR 0x30
  171. /**
  172. * Get EDID information via I2C.
  173. *
  174. * \param adapter : i2c device adaptor
  175. * \param buf : EDID data buffer to be filled
  176. * \param len : EDID data buffer length
  177. * \return 0 on success or -1 on failure.
  178. *
  179. * Try to fetch EDID information by calling i2c driver function.
  180. */
  181. static int
  182. drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf,
  183. int block, int len)
  184. {
  185. unsigned char start = block * EDID_LENGTH;
  186. struct i2c_msg msgs[] = {
  187. {
  188. .addr = DDC_ADDR,
  189. .flags = 0,
  190. .len = 1,
  191. .buf = &start,
  192. }, {
  193. .addr = DDC_ADDR,
  194. .flags = I2C_M_RD,
  195. .len = len,
  196. .buf = buf + start,
  197. }
  198. };
  199. if (i2c_transfer(adapter, msgs, 2) == 2)
  200. return 0;
  201. return -1;
  202. }
  203. static u8 *
  204. drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter)
  205. {
  206. int i, j = 0;
  207. u8 *block, *new;
  208. if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
  209. return NULL;
  210. /* base block fetch */
  211. for (i = 0; i < 4; i++) {
  212. if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH))
  213. goto out;
  214. if (drm_edid_block_valid(block))
  215. break;
  216. }
  217. if (i == 4)
  218. goto carp;
  219. /* if there's no extensions, we're done */
  220. if (block[0x7e] == 0)
  221. return block;
  222. new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL);
  223. if (!new)
  224. goto out;
  225. block = new;
  226. for (j = 1; j <= block[0x7e]; j++) {
  227. for (i = 0; i < 4; i++) {
  228. if (drm_do_probe_ddc_edid(adapter, block, j,
  229. EDID_LENGTH))
  230. goto out;
  231. if (drm_edid_block_valid(block + j * EDID_LENGTH))
  232. break;
  233. }
  234. if (i == 4)
  235. goto carp;
  236. }
  237. return block;
  238. carp:
  239. dev_warn(&connector->dev->pdev->dev, "%s: EDID block %d invalid.\n",
  240. drm_get_connector_name(connector), j);
  241. out:
  242. kfree(block);
  243. return NULL;
  244. }
  245. /**
  246. * Probe DDC presence.
  247. *
  248. * \param adapter : i2c device adaptor
  249. * \return 1 on success
  250. */
  251. static bool
  252. drm_probe_ddc(struct i2c_adapter *adapter)
  253. {
  254. unsigned char out;
  255. return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
  256. }
  257. /**
  258. * drm_get_edid - get EDID data, if available
  259. * @connector: connector we're probing
  260. * @adapter: i2c adapter to use for DDC
  261. *
  262. * Poke the given i2c channel to grab EDID data if possible. If found,
  263. * attach it to the connector.
  264. *
  265. * Return edid data or NULL if we couldn't find any.
  266. */
  267. struct edid *drm_get_edid(struct drm_connector *connector,
  268. struct i2c_adapter *adapter)
  269. {
  270. struct edid *edid = NULL;
  271. if (drm_probe_ddc(adapter))
  272. edid = (struct edid *)drm_do_get_edid(connector, adapter);
  273. connector->display_info.raw_edid = (char *)edid;
  274. return edid;
  275. }
  276. EXPORT_SYMBOL(drm_get_edid);
  277. /*** EDID parsing ***/
  278. /**
  279. * edid_vendor - match a string against EDID's obfuscated vendor field
  280. * @edid: EDID to match
  281. * @vendor: vendor string
  282. *
  283. * Returns true if @vendor is in @edid, false otherwise
  284. */
  285. static bool edid_vendor(struct edid *edid, char *vendor)
  286. {
  287. char edid_vendor[3];
  288. edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
  289. edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
  290. ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
  291. edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
  292. return !strncmp(edid_vendor, vendor, 3);
  293. }
  294. /**
  295. * edid_get_quirks - return quirk flags for a given EDID
  296. * @edid: EDID to process
  297. *
  298. * This tells subsequent routines what fixes they need to apply.
  299. */
  300. static u32 edid_get_quirks(struct edid *edid)
  301. {
  302. struct edid_quirk *quirk;
  303. int i;
  304. for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
  305. quirk = &edid_quirk_list[i];
  306. if (edid_vendor(edid, quirk->vendor) &&
  307. (EDID_PRODUCT_ID(edid) == quirk->product_id))
  308. return quirk->quirks;
  309. }
  310. return 0;
  311. }
  312. #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
  313. #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh))
  314. /**
  315. * edid_fixup_preferred - set preferred modes based on quirk list
  316. * @connector: has mode list to fix up
  317. * @quirks: quirks list
  318. *
  319. * Walk the mode list for @connector, clearing the preferred status
  320. * on existing modes and setting it anew for the right mode ala @quirks.
  321. */
  322. static void edid_fixup_preferred(struct drm_connector *connector,
  323. u32 quirks)
  324. {
  325. struct drm_display_mode *t, *cur_mode, *preferred_mode;
  326. int target_refresh = 0;
  327. if (list_empty(&connector->probed_modes))
  328. return;
  329. if (quirks & EDID_QUIRK_PREFER_LARGE_60)
  330. target_refresh = 60;
  331. if (quirks & EDID_QUIRK_PREFER_LARGE_75)
  332. target_refresh = 75;
  333. preferred_mode = list_first_entry(&connector->probed_modes,
  334. struct drm_display_mode, head);
  335. list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
  336. cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
  337. if (cur_mode == preferred_mode)
  338. continue;
  339. /* Largest mode is preferred */
  340. if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
  341. preferred_mode = cur_mode;
  342. /* At a given size, try to get closest to target refresh */
  343. if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
  344. MODE_REFRESH_DIFF(cur_mode, target_refresh) <
  345. MODE_REFRESH_DIFF(preferred_mode, target_refresh)) {
  346. preferred_mode = cur_mode;
  347. }
  348. }
  349. preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
  350. }
  351. /*
  352. * Add the Autogenerated from the DMT spec.
  353. * This table is copied from xfree86/modes/xf86EdidModes.c.
  354. * But the mode with Reduced blank feature is deleted.
  355. */
  356. static struct drm_display_mode drm_dmt_modes[] = {
  357. /* 640x350@85Hz */
  358. { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
  359. 736, 832, 0, 350, 382, 385, 445, 0,
  360. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
  361. /* 640x400@85Hz */
  362. { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
  363. 736, 832, 0, 400, 401, 404, 445, 0,
  364. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  365. /* 720x400@85Hz */
  366. { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
  367. 828, 936, 0, 400, 401, 404, 446, 0,
  368. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  369. /* 640x480@60Hz */
  370. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
  371. 752, 800, 0, 480, 489, 492, 525, 0,
  372. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  373. /* 640x480@72Hz */
  374. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
  375. 704, 832, 0, 480, 489, 492, 520, 0,
  376. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  377. /* 640x480@75Hz */
  378. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
  379. 720, 840, 0, 480, 481, 484, 500, 0,
  380. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  381. /* 640x480@85Hz */
  382. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
  383. 752, 832, 0, 480, 481, 484, 509, 0,
  384. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  385. /* 800x600@56Hz */
  386. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
  387. 896, 1024, 0, 600, 601, 603, 625, 0,
  388. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  389. /* 800x600@60Hz */
  390. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
  391. 968, 1056, 0, 600, 601, 605, 628, 0,
  392. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  393. /* 800x600@72Hz */
  394. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
  395. 976, 1040, 0, 600, 637, 643, 666, 0,
  396. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  397. /* 800x600@75Hz */
  398. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
  399. 896, 1056, 0, 600, 601, 604, 625, 0,
  400. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  401. /* 800x600@85Hz */
  402. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
  403. 896, 1048, 0, 600, 601, 604, 631, 0,
  404. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  405. /* 848x480@60Hz */
  406. { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
  407. 976, 1088, 0, 480, 486, 494, 517, 0,
  408. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  409. /* 1024x768@43Hz, interlace */
  410. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
  411. 1208, 1264, 0, 768, 768, 772, 817, 0,
  412. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
  413. DRM_MODE_FLAG_INTERLACE) },
  414. /* 1024x768@60Hz */
  415. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
  416. 1184, 1344, 0, 768, 771, 777, 806, 0,
  417. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  418. /* 1024x768@70Hz */
  419. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
  420. 1184, 1328, 0, 768, 771, 777, 806, 0,
  421. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  422. /* 1024x768@75Hz */
  423. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
  424. 1136, 1312, 0, 768, 769, 772, 800, 0,
  425. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  426. /* 1024x768@85Hz */
  427. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
  428. 1072, 1376, 0, 768, 769, 772, 808, 0,
  429. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  430. /* 1152x864@75Hz */
  431. { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
  432. 1344, 1600, 0, 864, 865, 868, 900, 0,
  433. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  434. /* 1280x768@60Hz */
  435. { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
  436. 1472, 1664, 0, 768, 771, 778, 798, 0,
  437. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  438. /* 1280x768@75Hz */
  439. { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
  440. 1488, 1696, 0, 768, 771, 778, 805, 0,
  441. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
  442. /* 1280x768@85Hz */
  443. { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
  444. 1496, 1712, 0, 768, 771, 778, 809, 0,
  445. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  446. /* 1280x800@60Hz */
  447. { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
  448. 1480, 1680, 0, 800, 803, 809, 831, 0,
  449. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
  450. /* 1280x800@75Hz */
  451. { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
  452. 1488, 1696, 0, 800, 803, 809, 838, 0,
  453. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  454. /* 1280x800@85Hz */
  455. { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
  456. 1496, 1712, 0, 800, 803, 809, 843, 0,
  457. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  458. /* 1280x960@60Hz */
  459. { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
  460. 1488, 1800, 0, 960, 961, 964, 1000, 0,
  461. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  462. /* 1280x960@85Hz */
  463. { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
  464. 1504, 1728, 0, 960, 961, 964, 1011, 0,
  465. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  466. /* 1280x1024@60Hz */
  467. { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
  468. 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
  469. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  470. /* 1280x1024@75Hz */
  471. { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
  472. 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
  473. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  474. /* 1280x1024@85Hz */
  475. { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
  476. 1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
  477. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  478. /* 1360x768@60Hz */
  479. { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
  480. 1536, 1792, 0, 768, 771, 777, 795, 0,
  481. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  482. /* 1440x1050@60Hz */
  483. { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
  484. 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
  485. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  486. /* 1440x1050@75Hz */
  487. { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
  488. 1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
  489. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  490. /* 1440x1050@85Hz */
  491. { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
  492. 1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
  493. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  494. /* 1440x900@60Hz */
  495. { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
  496. 1672, 1904, 0, 900, 903, 909, 934, 0,
  497. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  498. /* 1440x900@75Hz */
  499. { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
  500. 1688, 1936, 0, 900, 903, 909, 942, 0,
  501. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  502. /* 1440x900@85Hz */
  503. { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
  504. 1696, 1952, 0, 900, 903, 909, 948, 0,
  505. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  506. /* 1600x1200@60Hz */
  507. { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
  508. 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
  509. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  510. /* 1600x1200@65Hz */
  511. { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
  512. 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
  513. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  514. /* 1600x1200@70Hz */
  515. { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
  516. 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
  517. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  518. /* 1600x1200@75Hz */
  519. { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 2025000, 1600, 1664,
  520. 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
  521. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  522. /* 1600x1200@85Hz */
  523. { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
  524. 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
  525. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  526. /* 1680x1050@60Hz */
  527. { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
  528. 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
  529. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  530. /* 1680x1050@75Hz */
  531. { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
  532. 1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
  533. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  534. /* 1680x1050@85Hz */
  535. { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
  536. 1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
  537. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  538. /* 1792x1344@60Hz */
  539. { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
  540. 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
  541. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  542. /* 1729x1344@75Hz */
  543. { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
  544. 2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
  545. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  546. /* 1853x1392@60Hz */
  547. { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
  548. 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
  549. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  550. /* 1856x1392@75Hz */
  551. { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
  552. 2208, 2560, 0, 1392, 1395, 1399, 1500, 0,
  553. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  554. /* 1920x1200@60Hz */
  555. { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
  556. 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
  557. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  558. /* 1920x1200@75Hz */
  559. { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
  560. 2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
  561. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  562. /* 1920x1200@85Hz */
  563. { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
  564. 2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
  565. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  566. /* 1920x1440@60Hz */
  567. { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
  568. 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
  569. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  570. /* 1920x1440@75Hz */
  571. { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
  572. 2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
  573. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  574. /* 2560x1600@60Hz */
  575. { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
  576. 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
  577. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  578. /* 2560x1600@75HZ */
  579. { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
  580. 3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
  581. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  582. /* 2560x1600@85HZ */
  583. { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
  584. 3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
  585. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  586. };
  587. static const int drm_num_dmt_modes =
  588. sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
  589. static struct drm_display_mode *drm_find_dmt(struct drm_device *dev,
  590. int hsize, int vsize, int fresh)
  591. {
  592. int i;
  593. struct drm_display_mode *ptr, *mode;
  594. mode = NULL;
  595. for (i = 0; i < drm_num_dmt_modes; i++) {
  596. ptr = &drm_dmt_modes[i];
  597. if (hsize == ptr->hdisplay &&
  598. vsize == ptr->vdisplay &&
  599. fresh == drm_mode_vrefresh(ptr)) {
  600. /* get the expected default mode */
  601. mode = drm_mode_duplicate(dev, ptr);
  602. break;
  603. }
  604. }
  605. return mode;
  606. }
  607. /*
  608. * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
  609. * monitors fill with ascii space (0x20) instead.
  610. */
  611. static int
  612. bad_std_timing(u8 a, u8 b)
  613. {
  614. return (a == 0x00 && b == 0x00) ||
  615. (a == 0x01 && b == 0x01) ||
  616. (a == 0x20 && b == 0x20);
  617. }
  618. /**
  619. * drm_mode_std - convert standard mode info (width, height, refresh) into mode
  620. * @t: standard timing params
  621. * @timing_level: standard timing level
  622. *
  623. * Take the standard timing params (in this case width, aspect, and refresh)
  624. * and convert them into a real mode using CVT/GTF/DMT.
  625. *
  626. * Punts for now, but should eventually use the FB layer's CVT based mode
  627. * generation code.
  628. */
  629. struct drm_display_mode *drm_mode_std(struct drm_device *dev,
  630. struct std_timing *t,
  631. int revision,
  632. int timing_level)
  633. {
  634. struct drm_display_mode *mode;
  635. int hsize, vsize;
  636. int vrefresh_rate;
  637. unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
  638. >> EDID_TIMING_ASPECT_SHIFT;
  639. unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
  640. >> EDID_TIMING_VFREQ_SHIFT;
  641. if (bad_std_timing(t->hsize, t->vfreq_aspect))
  642. return NULL;
  643. /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
  644. hsize = t->hsize * 8 + 248;
  645. /* vrefresh_rate = vfreq + 60 */
  646. vrefresh_rate = vfreq + 60;
  647. /* the vdisplay is calculated based on the aspect ratio */
  648. if (aspect_ratio == 0) {
  649. if (revision < 3)
  650. vsize = hsize;
  651. else
  652. vsize = (hsize * 10) / 16;
  653. } else if (aspect_ratio == 1)
  654. vsize = (hsize * 3) / 4;
  655. else if (aspect_ratio == 2)
  656. vsize = (hsize * 4) / 5;
  657. else
  658. vsize = (hsize * 9) / 16;
  659. /* HDTV hack */
  660. if (hsize == 1360 && vsize == 765 && vrefresh_rate == 60) {
  661. mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
  662. false);
  663. mode->hdisplay = 1366;
  664. mode->vsync_start = mode->vsync_start - 1;
  665. mode->vsync_end = mode->vsync_end - 1;
  666. return mode;
  667. }
  668. mode = NULL;
  669. /* check whether it can be found in default mode table */
  670. mode = drm_find_dmt(dev, hsize, vsize, vrefresh_rate);
  671. if (mode)
  672. return mode;
  673. switch (timing_level) {
  674. case LEVEL_DMT:
  675. break;
  676. case LEVEL_GTF:
  677. mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
  678. break;
  679. case LEVEL_CVT:
  680. mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
  681. false);
  682. break;
  683. }
  684. return mode;
  685. }
  686. /*
  687. * EDID is delightfully ambiguous about how interlaced modes are to be
  688. * encoded. Our internal representation is of frame height, but some
  689. * HDTV detailed timings are encoded as field height.
  690. *
  691. * The format list here is from CEA, in frame size. Technically we
  692. * should be checking refresh rate too. Whatever.
  693. */
  694. static void
  695. drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
  696. struct detailed_pixel_timing *pt)
  697. {
  698. int i;
  699. static const struct {
  700. int w, h;
  701. } cea_interlaced[] = {
  702. { 1920, 1080 },
  703. { 720, 480 },
  704. { 1440, 480 },
  705. { 2880, 480 },
  706. { 720, 576 },
  707. { 1440, 576 },
  708. { 2880, 576 },
  709. };
  710. static const int n_sizes =
  711. sizeof(cea_interlaced)/sizeof(cea_interlaced[0]);
  712. if (!(pt->misc & DRM_EDID_PT_INTERLACED))
  713. return;
  714. for (i = 0; i < n_sizes; i++) {
  715. if ((mode->hdisplay == cea_interlaced[i].w) &&
  716. (mode->vdisplay == cea_interlaced[i].h / 2)) {
  717. mode->vdisplay *= 2;
  718. mode->vsync_start *= 2;
  719. mode->vsync_end *= 2;
  720. mode->vtotal *= 2;
  721. mode->vtotal |= 1;
  722. }
  723. }
  724. mode->flags |= DRM_MODE_FLAG_INTERLACE;
  725. }
  726. /**
  727. * drm_mode_detailed - create a new mode from an EDID detailed timing section
  728. * @dev: DRM device (needed to create new mode)
  729. * @edid: EDID block
  730. * @timing: EDID detailed timing info
  731. * @quirks: quirks to apply
  732. *
  733. * An EDID detailed timing block contains enough info for us to create and
  734. * return a new struct drm_display_mode.
  735. */
  736. static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
  737. struct edid *edid,
  738. struct detailed_timing *timing,
  739. u32 quirks)
  740. {
  741. struct drm_display_mode *mode;
  742. struct detailed_pixel_timing *pt = &timing->data.pixel_data;
  743. unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
  744. unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
  745. unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
  746. unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
  747. unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
  748. unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
  749. unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4;
  750. unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
  751. /* ignore tiny modes */
  752. if (hactive < 64 || vactive < 64)
  753. return NULL;
  754. if (pt->misc & DRM_EDID_PT_STEREO) {
  755. printk(KERN_WARNING "stereo mode not supported\n");
  756. return NULL;
  757. }
  758. if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
  759. printk(KERN_WARNING "composite sync not supported\n");
  760. }
  761. /* it is incorrect if hsync/vsync width is zero */
  762. if (!hsync_pulse_width || !vsync_pulse_width) {
  763. DRM_DEBUG_KMS("Incorrect Detailed timing. "
  764. "Wrong Hsync/Vsync pulse width\n");
  765. return NULL;
  766. }
  767. mode = drm_mode_create(dev);
  768. if (!mode)
  769. return NULL;
  770. mode->type = DRM_MODE_TYPE_DRIVER;
  771. if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
  772. timing->pixel_clock = cpu_to_le16(1088);
  773. mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
  774. mode->hdisplay = hactive;
  775. mode->hsync_start = mode->hdisplay + hsync_offset;
  776. mode->hsync_end = mode->hsync_start + hsync_pulse_width;
  777. mode->htotal = mode->hdisplay + hblank;
  778. mode->vdisplay = vactive;
  779. mode->vsync_start = mode->vdisplay + vsync_offset;
  780. mode->vsync_end = mode->vsync_start + vsync_pulse_width;
  781. mode->vtotal = mode->vdisplay + vblank;
  782. /* Some EDIDs have bogus h/vtotal values */
  783. if (mode->hsync_end > mode->htotal)
  784. mode->htotal = mode->hsync_end + 1;
  785. if (mode->vsync_end > mode->vtotal)
  786. mode->vtotal = mode->vsync_end + 1;
  787. drm_mode_set_name(mode);
  788. drm_mode_do_interlace_quirk(mode, pt);
  789. if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
  790. pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
  791. }
  792. mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
  793. DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
  794. mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
  795. DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
  796. mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
  797. mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
  798. if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
  799. mode->width_mm *= 10;
  800. mode->height_mm *= 10;
  801. }
  802. if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
  803. mode->width_mm = edid->width_cm * 10;
  804. mode->height_mm = edid->height_cm * 10;
  805. }
  806. return mode;
  807. }
  808. /*
  809. * Detailed mode info for the EDID "established modes" data to use.
  810. */
  811. static struct drm_display_mode edid_est_modes[] = {
  812. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
  813. 968, 1056, 0, 600, 601, 605, 628, 0,
  814. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
  815. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
  816. 896, 1024, 0, 600, 601, 603, 625, 0,
  817. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
  818. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
  819. 720, 840, 0, 480, 481, 484, 500, 0,
  820. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
  821. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
  822. 704, 832, 0, 480, 489, 491, 520, 0,
  823. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
  824. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
  825. 768, 864, 0, 480, 483, 486, 525, 0,
  826. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
  827. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656,
  828. 752, 800, 0, 480, 490, 492, 525, 0,
  829. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
  830. { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
  831. 846, 900, 0, 400, 421, 423, 449, 0,
  832. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
  833. { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
  834. 846, 900, 0, 400, 412, 414, 449, 0,
  835. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
  836. { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
  837. 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
  838. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
  839. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040,
  840. 1136, 1312, 0, 768, 769, 772, 800, 0,
  841. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
  842. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
  843. 1184, 1328, 0, 768, 771, 777, 806, 0,
  844. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
  845. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
  846. 1184, 1344, 0, 768, 771, 777, 806, 0,
  847. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
  848. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
  849. 1208, 1264, 0, 768, 768, 776, 817, 0,
  850. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
  851. { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
  852. 928, 1152, 0, 624, 625, 628, 667, 0,
  853. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
  854. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
  855. 896, 1056, 0, 600, 601, 604, 625, 0,
  856. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
  857. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
  858. 976, 1040, 0, 600, 637, 643, 666, 0,
  859. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
  860. { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
  861. 1344, 1600, 0, 864, 865, 868, 900, 0,
  862. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
  863. };
  864. #define EDID_EST_TIMINGS 16
  865. #define EDID_STD_TIMINGS 8
  866. #define EDID_DETAILED_TIMINGS 4
  867. /**
  868. * add_established_modes - get est. modes from EDID and add them
  869. * @edid: EDID block to scan
  870. *
  871. * Each EDID block contains a bitmap of the supported "established modes" list
  872. * (defined above). Tease them out and add them to the global modes list.
  873. */
  874. static int add_established_modes(struct drm_connector *connector, struct edid *edid)
  875. {
  876. struct drm_device *dev = connector->dev;
  877. unsigned long est_bits = edid->established_timings.t1 |
  878. (edid->established_timings.t2 << 8) |
  879. ((edid->established_timings.mfg_rsvd & 0x80) << 9);
  880. int i, modes = 0;
  881. for (i = 0; i <= EDID_EST_TIMINGS; i++)
  882. if (est_bits & (1<<i)) {
  883. struct drm_display_mode *newmode;
  884. newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
  885. if (newmode) {
  886. drm_mode_probed_add(connector, newmode);
  887. modes++;
  888. }
  889. }
  890. return modes;
  891. }
  892. /**
  893. * stanard_timing_level - get std. timing level(CVT/GTF/DMT)
  894. * @edid: EDID block to scan
  895. */
  896. static int standard_timing_level(struct edid *edid)
  897. {
  898. if (edid->revision >= 2) {
  899. if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
  900. return LEVEL_CVT;
  901. return LEVEL_GTF;
  902. }
  903. return LEVEL_DMT;
  904. }
  905. /**
  906. * add_standard_modes - get std. modes from EDID and add them
  907. * @edid: EDID block to scan
  908. *
  909. * Standard modes can be calculated using the CVT standard. Grab them from
  910. * @edid, calculate them, and add them to the list.
  911. */
  912. static int add_standard_modes(struct drm_connector *connector, struct edid *edid)
  913. {
  914. struct drm_device *dev = connector->dev;
  915. int i, modes = 0;
  916. int timing_level;
  917. timing_level = standard_timing_level(edid);
  918. for (i = 0; i < EDID_STD_TIMINGS; i++) {
  919. struct std_timing *t = &edid->standard_timings[i];
  920. struct drm_display_mode *newmode;
  921. /* If std timings bytes are 1, 1 it's empty */
  922. if (t->hsize == 1 && t->vfreq_aspect == 1)
  923. continue;
  924. newmode = drm_mode_std(dev, &edid->standard_timings[i],
  925. edid->revision, timing_level);
  926. if (newmode) {
  927. drm_mode_probed_add(connector, newmode);
  928. modes++;
  929. }
  930. }
  931. return modes;
  932. }
  933. /*
  934. * XXX fix this for:
  935. * - GTF secondary curve formula
  936. * - EDID 1.4 range offsets
  937. * - CVT extended bits
  938. */
  939. static bool
  940. mode_in_range(struct drm_display_mode *mode, struct detailed_timing *timing)
  941. {
  942. struct detailed_data_monitor_range *range;
  943. int hsync, vrefresh;
  944. range = &timing->data.other_data.data.range;
  945. hsync = drm_mode_hsync(mode);
  946. vrefresh = drm_mode_vrefresh(mode);
  947. if (hsync < range->min_hfreq_khz || hsync > range->max_hfreq_khz)
  948. return false;
  949. if (vrefresh < range->min_vfreq || vrefresh > range->max_vfreq)
  950. return false;
  951. if (range->pixel_clock_mhz && range->pixel_clock_mhz != 0xff) {
  952. /* be forgiving since it's in units of 10MHz */
  953. int max_clock = range->pixel_clock_mhz * 10 + 9;
  954. max_clock *= 1000;
  955. if (mode->clock > max_clock)
  956. return false;
  957. }
  958. return true;
  959. }
  960. /*
  961. * XXX If drm_dmt_modes ever regrows the CVT-R modes (and it will) this will
  962. * need to account for them.
  963. */
  964. static int drm_gtf_modes_for_range(struct drm_connector *connector,
  965. struct detailed_timing *timing)
  966. {
  967. int i, modes = 0;
  968. struct drm_display_mode *newmode;
  969. struct drm_device *dev = connector->dev;
  970. for (i = 0; i < drm_num_dmt_modes; i++) {
  971. if (mode_in_range(drm_dmt_modes + i, timing)) {
  972. newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
  973. if (newmode) {
  974. drm_mode_probed_add(connector, newmode);
  975. modes++;
  976. }
  977. }
  978. }
  979. return modes;
  980. }
  981. static int drm_cvt_modes(struct drm_connector *connector,
  982. struct detailed_timing *timing)
  983. {
  984. int i, j, modes = 0;
  985. struct drm_display_mode *newmode;
  986. struct drm_device *dev = connector->dev;
  987. struct cvt_timing *cvt;
  988. const int rates[] = { 60, 85, 75, 60, 50 };
  989. const u8 empty[3] = { 0, 0, 0 };
  990. for (i = 0; i < 4; i++) {
  991. int uninitialized_var(width), height;
  992. cvt = &(timing->data.other_data.data.cvt[i]);
  993. if (!memcmp(cvt->code, empty, 3))
  994. continue;
  995. height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
  996. switch (cvt->code[1] & 0x0c) {
  997. case 0x00:
  998. width = height * 4 / 3;
  999. break;
  1000. case 0x04:
  1001. width = height * 16 / 9;
  1002. break;
  1003. case 0x08:
  1004. width = height * 16 / 10;
  1005. break;
  1006. case 0x0c:
  1007. width = height * 15 / 9;
  1008. break;
  1009. }
  1010. for (j = 1; j < 5; j++) {
  1011. if (cvt->code[2] & (1 << j)) {
  1012. newmode = drm_cvt_mode(dev, width, height,
  1013. rates[j], j == 0,
  1014. false, false);
  1015. if (newmode) {
  1016. drm_mode_probed_add(connector, newmode);
  1017. modes++;
  1018. }
  1019. }
  1020. }
  1021. }
  1022. return modes;
  1023. }
  1024. static int add_detailed_modes(struct drm_connector *connector,
  1025. struct detailed_timing *timing,
  1026. struct edid *edid, u32 quirks, int preferred)
  1027. {
  1028. int i, modes = 0;
  1029. struct detailed_non_pixel *data = &timing->data.other_data;
  1030. int timing_level = standard_timing_level(edid);
  1031. int gtf = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF);
  1032. struct drm_display_mode *newmode;
  1033. struct drm_device *dev = connector->dev;
  1034. if (timing->pixel_clock) {
  1035. newmode = drm_mode_detailed(dev, edid, timing, quirks);
  1036. if (!newmode)
  1037. return 0;
  1038. if (preferred)
  1039. newmode->type |= DRM_MODE_TYPE_PREFERRED;
  1040. drm_mode_probed_add(connector, newmode);
  1041. return 1;
  1042. }
  1043. /* other timing types */
  1044. switch (data->type) {
  1045. case EDID_DETAIL_MONITOR_RANGE:
  1046. if (gtf)
  1047. modes += drm_gtf_modes_for_range(connector, timing);
  1048. break;
  1049. case EDID_DETAIL_STD_MODES:
  1050. /* Six modes per detailed section */
  1051. for (i = 0; i < 6; i++) {
  1052. struct std_timing *std;
  1053. struct drm_display_mode *newmode;
  1054. std = &data->data.timings[i];
  1055. newmode = drm_mode_std(dev, std, edid->revision,
  1056. timing_level);
  1057. if (newmode) {
  1058. drm_mode_probed_add(connector, newmode);
  1059. modes++;
  1060. }
  1061. }
  1062. break;
  1063. case EDID_DETAIL_CVT_3BYTE:
  1064. modes += drm_cvt_modes(connector, timing);
  1065. break;
  1066. default:
  1067. break;
  1068. }
  1069. return modes;
  1070. }
  1071. /**
  1072. * add_detailed_info - get detailed mode info from EDID data
  1073. * @connector: attached connector
  1074. * @edid: EDID block to scan
  1075. * @quirks: quirks to apply
  1076. *
  1077. * Some of the detailed timing sections may contain mode information. Grab
  1078. * it and add it to the list.
  1079. */
  1080. static int add_detailed_info(struct drm_connector *connector,
  1081. struct edid *edid, u32 quirks)
  1082. {
  1083. int i, modes = 0;
  1084. for (i = 0; i < EDID_DETAILED_TIMINGS; i++) {
  1085. struct detailed_timing *timing = &edid->detailed_timings[i];
  1086. int preferred = (i == 0) && (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
  1087. /* In 1.0, only timings are allowed */
  1088. if (!timing->pixel_clock && edid->version == 1 &&
  1089. edid->revision == 0)
  1090. continue;
  1091. modes += add_detailed_modes(connector, timing, edid, quirks,
  1092. preferred);
  1093. }
  1094. return modes;
  1095. }
  1096. /**
  1097. * add_detailed_mode_eedid - get detailed mode info from addtional timing
  1098. * EDID block
  1099. * @connector: attached connector
  1100. * @edid: EDID block to scan(It is only to get addtional timing EDID block)
  1101. * @quirks: quirks to apply
  1102. *
  1103. * Some of the detailed timing sections may contain mode information. Grab
  1104. * it and add it to the list.
  1105. */
  1106. static int add_detailed_info_eedid(struct drm_connector *connector,
  1107. struct edid *edid, u32 quirks)
  1108. {
  1109. int i, modes = 0;
  1110. char *edid_ext = NULL;
  1111. struct detailed_timing *timing;
  1112. int edid_ext_num;
  1113. int start_offset, end_offset;
  1114. int timing_level;
  1115. if (edid->version == 1 && edid->revision < 3) {
  1116. /* If the EDID version is less than 1.3, there is no
  1117. * extension EDID.
  1118. */
  1119. return 0;
  1120. }
  1121. if (!edid->extensions) {
  1122. /* if there is no extension EDID, it is unnecessary to
  1123. * parse the E-EDID to get detailed info
  1124. */
  1125. return 0;
  1126. }
  1127. /* Chose real EDID extension number */
  1128. edid_ext_num = edid->extensions > DRM_MAX_EDID_EXT_NUM ?
  1129. DRM_MAX_EDID_EXT_NUM : edid->extensions;
  1130. /* Find CEA extension */
  1131. for (i = 0; i < edid_ext_num; i++) {
  1132. edid_ext = (char *)edid + EDID_LENGTH * (i + 1);
  1133. /* This block is CEA extension */
  1134. if (edid_ext[0] == 0x02)
  1135. break;
  1136. }
  1137. if (i == edid_ext_num) {
  1138. /* if there is no additional timing EDID block, return */
  1139. return 0;
  1140. }
  1141. /* Get the start offset of detailed timing block */
  1142. start_offset = edid_ext[2];
  1143. if (start_offset == 0) {
  1144. /* If the start_offset is zero, it means that neither detailed
  1145. * info nor data block exist. In such case it is also
  1146. * unnecessary to parse the detailed timing info.
  1147. */
  1148. return 0;
  1149. }
  1150. timing_level = standard_timing_level(edid);
  1151. end_offset = EDID_LENGTH;
  1152. end_offset -= sizeof(struct detailed_timing);
  1153. for (i = start_offset; i < end_offset;
  1154. i += sizeof(struct detailed_timing)) {
  1155. timing = (struct detailed_timing *)(edid_ext + i);
  1156. modes += add_detailed_modes(connector, timing, edid, quirks, 0);
  1157. }
  1158. return modes;
  1159. }
  1160. #define HDMI_IDENTIFIER 0x000C03
  1161. #define VENDOR_BLOCK 0x03
  1162. /**
  1163. * drm_detect_hdmi_monitor - detect whether monitor is hdmi.
  1164. * @edid: monitor EDID information
  1165. *
  1166. * Parse the CEA extension according to CEA-861-B.
  1167. * Return true if HDMI, false if not or unknown.
  1168. */
  1169. bool drm_detect_hdmi_monitor(struct edid *edid)
  1170. {
  1171. char *edid_ext = NULL;
  1172. int i, hdmi_id, edid_ext_num;
  1173. int start_offset, end_offset;
  1174. bool is_hdmi = false;
  1175. /* No EDID or EDID extensions */
  1176. if (edid == NULL || edid->extensions == 0)
  1177. goto end;
  1178. /* Chose real EDID extension number */
  1179. edid_ext_num = edid->extensions > DRM_MAX_EDID_EXT_NUM ?
  1180. DRM_MAX_EDID_EXT_NUM : edid->extensions;
  1181. /* Find CEA extension */
  1182. for (i = 0; i < edid_ext_num; i++) {
  1183. edid_ext = (char *)edid + EDID_LENGTH * (i + 1);
  1184. /* This block is CEA extension */
  1185. if (edid_ext[0] == 0x02)
  1186. break;
  1187. }
  1188. if (i == edid_ext_num)
  1189. goto end;
  1190. /* Data block offset in CEA extension block */
  1191. start_offset = 4;
  1192. end_offset = edid_ext[2];
  1193. /*
  1194. * Because HDMI identifier is in Vendor Specific Block,
  1195. * search it from all data blocks of CEA extension.
  1196. */
  1197. for (i = start_offset; i < end_offset;
  1198. /* Increased by data block len */
  1199. i += ((edid_ext[i] & 0x1f) + 1)) {
  1200. /* Find vendor specific block */
  1201. if ((edid_ext[i] >> 5) == VENDOR_BLOCK) {
  1202. hdmi_id = edid_ext[i + 1] | (edid_ext[i + 2] << 8) |
  1203. edid_ext[i + 3] << 16;
  1204. /* Find HDMI identifier */
  1205. if (hdmi_id == HDMI_IDENTIFIER)
  1206. is_hdmi = true;
  1207. break;
  1208. }
  1209. }
  1210. end:
  1211. return is_hdmi;
  1212. }
  1213. EXPORT_SYMBOL(drm_detect_hdmi_monitor);
  1214. /**
  1215. * drm_add_edid_modes - add modes from EDID data, if available
  1216. * @connector: connector we're probing
  1217. * @edid: edid data
  1218. *
  1219. * Add the specified modes to the connector's mode list.
  1220. *
  1221. * Return number of modes added or 0 if we couldn't find any.
  1222. */
  1223. int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
  1224. {
  1225. int num_modes = 0;
  1226. u32 quirks;
  1227. if (edid == NULL) {
  1228. return 0;
  1229. }
  1230. if (!drm_edid_is_valid(edid)) {
  1231. dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n",
  1232. drm_get_connector_name(connector));
  1233. return 0;
  1234. }
  1235. quirks = edid_get_quirks(edid);
  1236. num_modes += add_established_modes(connector, edid);
  1237. num_modes += add_standard_modes(connector, edid);
  1238. num_modes += add_detailed_info(connector, edid, quirks);
  1239. num_modes += add_detailed_info_eedid(connector, edid, quirks);
  1240. if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
  1241. edid_fixup_preferred(connector, quirks);
  1242. connector->display_info.serration_vsync = (edid->input & DRM_EDID_INPUT_SERRATION_VSYNC) ? 1 : 0;
  1243. connector->display_info.sync_on_green = (edid->input & DRM_EDID_INPUT_SYNC_ON_GREEN) ? 1 : 0;
  1244. connector->display_info.composite_sync = (edid->input & DRM_EDID_INPUT_COMPOSITE_SYNC) ? 1 : 0;
  1245. connector->display_info.separate_syncs = (edid->input & DRM_EDID_INPUT_SEPARATE_SYNCS) ? 1 : 0;
  1246. connector->display_info.blank_to_black = (edid->input & DRM_EDID_INPUT_BLANK_TO_BLACK) ? 1 : 0;
  1247. connector->display_info.video_level = (edid->input & DRM_EDID_INPUT_VIDEO_LEVEL) >> 5;
  1248. connector->display_info.digital = (edid->input & DRM_EDID_INPUT_DIGITAL) ? 1 : 0;
  1249. connector->display_info.width_mm = edid->width_cm * 10;
  1250. connector->display_info.height_mm = edid->height_cm * 10;
  1251. connector->display_info.gamma = edid->gamma;
  1252. connector->display_info.gtf_supported = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF) ? 1 : 0;
  1253. connector->display_info.standard_color = (edid->features & DRM_EDID_FEATURE_STANDARD_COLOR) ? 1 : 0;
  1254. connector->display_info.display_type = (edid->features & DRM_EDID_FEATURE_DISPLAY_TYPE) >> 3;
  1255. connector->display_info.active_off_supported = (edid->features & DRM_EDID_FEATURE_PM_ACTIVE_OFF) ? 1 : 0;
  1256. connector->display_info.suspend_supported = (edid->features & DRM_EDID_FEATURE_PM_SUSPEND) ? 1 : 0;
  1257. connector->display_info.standby_supported = (edid->features & DRM_EDID_FEATURE_PM_STANDBY) ? 1 : 0;
  1258. connector->display_info.gamma = edid->gamma;
  1259. return num_modes;
  1260. }
  1261. EXPORT_SYMBOL(drm_add_edid_modes);
  1262. /**
  1263. * drm_add_modes_noedid - add modes for the connectors without EDID
  1264. * @connector: connector we're probing
  1265. * @hdisplay: the horizontal display limit
  1266. * @vdisplay: the vertical display limit
  1267. *
  1268. * Add the specified modes to the connector's mode list. Only when the
  1269. * hdisplay/vdisplay is not beyond the given limit, it will be added.
  1270. *
  1271. * Return number of modes added or 0 if we couldn't find any.
  1272. */
  1273. int drm_add_modes_noedid(struct drm_connector *connector,
  1274. int hdisplay, int vdisplay)
  1275. {
  1276. int i, count, num_modes = 0;
  1277. struct drm_display_mode *mode, *ptr;
  1278. struct drm_device *dev = connector->dev;
  1279. count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
  1280. if (hdisplay < 0)
  1281. hdisplay = 0;
  1282. if (vdisplay < 0)
  1283. vdisplay = 0;
  1284. for (i = 0; i < count; i++) {
  1285. ptr = &drm_dmt_modes[i];
  1286. if (hdisplay && vdisplay) {
  1287. /*
  1288. * Only when two are valid, they will be used to check
  1289. * whether the mode should be added to the mode list of
  1290. * the connector.
  1291. */
  1292. if (ptr->hdisplay > hdisplay ||
  1293. ptr->vdisplay > vdisplay)
  1294. continue;
  1295. }
  1296. if (drm_mode_vrefresh(ptr) > 61)
  1297. continue;
  1298. mode = drm_mode_duplicate(dev, ptr);
  1299. if (mode) {
  1300. drm_mode_probed_add(connector, mode);
  1301. num_modes++;
  1302. }
  1303. }
  1304. return num_modes;
  1305. }
  1306. EXPORT_SYMBOL(drm_add_modes_noedid);