i915_drv.c 16 KB

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  1. /* i915_drv.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*-
  2. */
  3. /*
  4. *
  5. * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
  6. * All Rights Reserved.
  7. *
  8. * Permission is hereby granted, free of charge, to any person obtaining a
  9. * copy of this software and associated documentation files (the
  10. * "Software"), to deal in the Software without restriction, including
  11. * without limitation the rights to use, copy, modify, merge, publish,
  12. * distribute, sub license, and/or sell copies of the Software, and to
  13. * permit persons to whom the Software is furnished to do so, subject to
  14. * the following conditions:
  15. *
  16. * The above copyright notice and this permission notice (including the
  17. * next paragraph) shall be included in all copies or substantial portions
  18. * of the Software.
  19. *
  20. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  21. * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  23. * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  24. * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  25. * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  26. * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27. *
  28. */
  29. #include <linux/device.h>
  30. #include "drmP.h"
  31. #include "drm.h"
  32. #include "i915_drm.h"
  33. #include "i915_drv.h"
  34. #include <linux/console.h>
  35. #include "drm_crtc_helper.h"
  36. static int i915_modeset = -1;
  37. module_param_named(modeset, i915_modeset, int, 0400);
  38. unsigned int i915_fbpercrtc = 0;
  39. module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400);
  40. unsigned int i915_powersave = 1;
  41. module_param_named(powersave, i915_powersave, int, 0400);
  42. unsigned int i915_lvds_downclock = 0;
  43. module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400);
  44. static struct drm_driver driver;
  45. #define INTEL_VGA_DEVICE(id, info) { \
  46. .class = PCI_CLASS_DISPLAY_VGA << 8, \
  47. .class_mask = 0xffff00, \
  48. .vendor = 0x8086, \
  49. .device = id, \
  50. .subvendor = PCI_ANY_ID, \
  51. .subdevice = PCI_ANY_ID, \
  52. .driver_data = (unsigned long) info }
  53. const static struct intel_device_info intel_i830_info = {
  54. .is_i8xx = 1, .is_mobile = 1, .cursor_needs_physical = 1,
  55. };
  56. const static struct intel_device_info intel_845g_info = {
  57. .is_i8xx = 1,
  58. };
  59. const static struct intel_device_info intel_i85x_info = {
  60. .is_i8xx = 1, .is_mobile = 1, .cursor_needs_physical = 1,
  61. };
  62. const static struct intel_device_info intel_i865g_info = {
  63. .is_i8xx = 1,
  64. };
  65. const static struct intel_device_info intel_i915g_info = {
  66. .is_i915g = 1, .is_i9xx = 1, .cursor_needs_physical = 1,
  67. };
  68. const static struct intel_device_info intel_i915gm_info = {
  69. .is_i9xx = 1, .is_mobile = 1, .has_fbc = 1,
  70. .cursor_needs_physical = 1,
  71. };
  72. const static struct intel_device_info intel_i945g_info = {
  73. .is_i9xx = 1, .has_hotplug = 1, .cursor_needs_physical = 1,
  74. };
  75. const static struct intel_device_info intel_i945gm_info = {
  76. .is_i945gm = 1, .is_i9xx = 1, .is_mobile = 1, .has_fbc = 1,
  77. .has_hotplug = 1, .cursor_needs_physical = 1,
  78. };
  79. const static struct intel_device_info intel_i965g_info = {
  80. .is_i965g = 1, .is_i9xx = 1, .has_hotplug = 1,
  81. };
  82. const static struct intel_device_info intel_i965gm_info = {
  83. .is_i965g = 1, .is_mobile = 1, .is_i965gm = 1, .is_i9xx = 1,
  84. .is_mobile = 1, .has_fbc = 1, .has_rc6 = 1,
  85. .has_hotplug = 1,
  86. };
  87. const static struct intel_device_info intel_g33_info = {
  88. .is_g33 = 1, .is_i9xx = 1, .need_gfx_hws = 1,
  89. .has_hotplug = 1,
  90. };
  91. const static struct intel_device_info intel_g45_info = {
  92. .is_i965g = 1, .is_g4x = 1, .is_i9xx = 1, .need_gfx_hws = 1,
  93. .has_pipe_cxsr = 1,
  94. .has_hotplug = 1,
  95. };
  96. const static struct intel_device_info intel_gm45_info = {
  97. .is_i965g = 1, .is_mobile = 1, .is_g4x = 1, .is_i9xx = 1,
  98. .is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1,
  99. .has_pipe_cxsr = 1,
  100. .has_hotplug = 1,
  101. };
  102. const static struct intel_device_info intel_pineview_info = {
  103. .is_g33 = 1, .is_pineview = 1, .is_mobile = 1, .is_i9xx = 1,
  104. .need_gfx_hws = 1,
  105. .has_hotplug = 1,
  106. };
  107. const static struct intel_device_info intel_ironlake_d_info = {
  108. .is_ironlake = 1, .is_i965g = 1, .is_i9xx = 1, .need_gfx_hws = 1,
  109. .has_pipe_cxsr = 1,
  110. .has_hotplug = 1,
  111. };
  112. const static struct intel_device_info intel_ironlake_m_info = {
  113. .is_ironlake = 1, .is_mobile = 1, .is_i965g = 1, .is_i9xx = 1,
  114. .need_gfx_hws = 1, .has_rc6 = 1,
  115. .has_hotplug = 1,
  116. };
  117. const static struct pci_device_id pciidlist[] = {
  118. INTEL_VGA_DEVICE(0x3577, &intel_i830_info),
  119. INTEL_VGA_DEVICE(0x2562, &intel_845g_info),
  120. INTEL_VGA_DEVICE(0x3582, &intel_i85x_info),
  121. INTEL_VGA_DEVICE(0x35e8, &intel_i85x_info),
  122. INTEL_VGA_DEVICE(0x2572, &intel_i865g_info),
  123. INTEL_VGA_DEVICE(0x2582, &intel_i915g_info),
  124. INTEL_VGA_DEVICE(0x258a, &intel_i915g_info),
  125. INTEL_VGA_DEVICE(0x2592, &intel_i915gm_info),
  126. INTEL_VGA_DEVICE(0x2772, &intel_i945g_info),
  127. INTEL_VGA_DEVICE(0x27a2, &intel_i945gm_info),
  128. INTEL_VGA_DEVICE(0x27ae, &intel_i945gm_info),
  129. INTEL_VGA_DEVICE(0x2972, &intel_i965g_info),
  130. INTEL_VGA_DEVICE(0x2982, &intel_i965g_info),
  131. INTEL_VGA_DEVICE(0x2992, &intel_i965g_info),
  132. INTEL_VGA_DEVICE(0x29a2, &intel_i965g_info),
  133. INTEL_VGA_DEVICE(0x29b2, &intel_g33_info),
  134. INTEL_VGA_DEVICE(0x29c2, &intel_g33_info),
  135. INTEL_VGA_DEVICE(0x29d2, &intel_g33_info),
  136. INTEL_VGA_DEVICE(0x2a02, &intel_i965gm_info),
  137. INTEL_VGA_DEVICE(0x2a12, &intel_i965gm_info),
  138. INTEL_VGA_DEVICE(0x2a42, &intel_gm45_info),
  139. INTEL_VGA_DEVICE(0x2e02, &intel_g45_info),
  140. INTEL_VGA_DEVICE(0x2e12, &intel_g45_info),
  141. INTEL_VGA_DEVICE(0x2e22, &intel_g45_info),
  142. INTEL_VGA_DEVICE(0x2e32, &intel_g45_info),
  143. INTEL_VGA_DEVICE(0x2e42, &intel_g45_info),
  144. INTEL_VGA_DEVICE(0xa001, &intel_pineview_info),
  145. INTEL_VGA_DEVICE(0xa011, &intel_pineview_info),
  146. INTEL_VGA_DEVICE(0x0042, &intel_ironlake_d_info),
  147. INTEL_VGA_DEVICE(0x0046, &intel_ironlake_m_info),
  148. {0, 0, 0}
  149. };
  150. #if defined(CONFIG_DRM_I915_KMS)
  151. MODULE_DEVICE_TABLE(pci, pciidlist);
  152. #endif
  153. static int i915_drm_freeze(struct drm_device *dev)
  154. {
  155. struct drm_i915_private *dev_priv = dev->dev_private;
  156. pci_save_state(dev->pdev);
  157. /* If KMS is active, we do the leavevt stuff here */
  158. if (drm_core_check_feature(dev, DRIVER_MODESET)) {
  159. int error = i915_gem_idle(dev);
  160. if (error) {
  161. dev_err(&dev->pdev->dev,
  162. "GEM idle failed, resume might fail\n");
  163. return error;
  164. }
  165. drm_irq_uninstall(dev);
  166. }
  167. i915_save_state(dev);
  168. intel_opregion_free(dev, 1);
  169. /* Modeset on resume, not lid events */
  170. dev_priv->modeset_on_lid = 0;
  171. return 0;
  172. }
  173. static int i915_suspend(struct drm_device *dev, pm_message_t state)
  174. {
  175. int error;
  176. if (!dev || !dev->dev_private) {
  177. DRM_ERROR("dev: %p\n", dev);
  178. DRM_ERROR("DRM not initialized, aborting suspend.\n");
  179. return -ENODEV;
  180. }
  181. if (state.event == PM_EVENT_PRETHAW)
  182. return 0;
  183. error = i915_drm_freeze(dev);
  184. if (error)
  185. return error;
  186. if (state.event == PM_EVENT_SUSPEND) {
  187. /* Shut down the device */
  188. pci_disable_device(dev->pdev);
  189. pci_set_power_state(dev->pdev, PCI_D3hot);
  190. }
  191. return 0;
  192. }
  193. static int i915_drm_thaw(struct drm_device *dev)
  194. {
  195. struct drm_i915_private *dev_priv = dev->dev_private;
  196. int error = 0;
  197. i915_restore_state(dev);
  198. intel_opregion_init(dev, 1);
  199. /* KMS EnterVT equivalent */
  200. if (drm_core_check_feature(dev, DRIVER_MODESET)) {
  201. mutex_lock(&dev->struct_mutex);
  202. dev_priv->mm.suspended = 0;
  203. error = i915_gem_init_ringbuffer(dev);
  204. mutex_unlock(&dev->struct_mutex);
  205. drm_irq_install(dev);
  206. /* Resume the modeset for every activated CRTC */
  207. drm_helper_resume_force_mode(dev);
  208. }
  209. dev_priv->modeset_on_lid = 0;
  210. return error;
  211. }
  212. static int i915_resume(struct drm_device *dev)
  213. {
  214. if (pci_enable_device(dev->pdev))
  215. return -EIO;
  216. pci_set_master(dev->pdev);
  217. return i915_drm_thaw(dev);
  218. }
  219. /**
  220. * i965_reset - reset chip after a hang
  221. * @dev: drm device to reset
  222. * @flags: reset domains
  223. *
  224. * Reset the chip. Useful if a hang is detected. Returns zero on successful
  225. * reset or otherwise an error code.
  226. *
  227. * Procedure is fairly simple:
  228. * - reset the chip using the reset reg
  229. * - re-init context state
  230. * - re-init hardware status page
  231. * - re-init ring buffer
  232. * - re-init interrupt state
  233. * - re-init display
  234. */
  235. int i965_reset(struct drm_device *dev, u8 flags)
  236. {
  237. drm_i915_private_t *dev_priv = dev->dev_private;
  238. unsigned long timeout;
  239. u8 gdrst;
  240. /*
  241. * We really should only reset the display subsystem if we actually
  242. * need to
  243. */
  244. bool need_display = true;
  245. mutex_lock(&dev->struct_mutex);
  246. /*
  247. * Clear request list
  248. */
  249. i915_gem_retire_requests(dev);
  250. if (need_display)
  251. i915_save_display(dev);
  252. if (IS_I965G(dev) || IS_G4X(dev)) {
  253. /*
  254. * Set the domains we want to reset, then the reset bit (bit 0).
  255. * Clear the reset bit after a while and wait for hardware status
  256. * bit (bit 1) to be set
  257. */
  258. pci_read_config_byte(dev->pdev, GDRST, &gdrst);
  259. pci_write_config_byte(dev->pdev, GDRST, gdrst | flags | ((flags == GDRST_FULL) ? 0x1 : 0x0));
  260. udelay(50);
  261. pci_write_config_byte(dev->pdev, GDRST, gdrst & 0xfe);
  262. /* ...we don't want to loop forever though, 500ms should be plenty */
  263. timeout = jiffies + msecs_to_jiffies(500);
  264. do {
  265. udelay(100);
  266. pci_read_config_byte(dev->pdev, GDRST, &gdrst);
  267. } while ((gdrst & 0x1) && time_after(timeout, jiffies));
  268. if (gdrst & 0x1) {
  269. WARN(true, "i915: Failed to reset chip\n");
  270. mutex_unlock(&dev->struct_mutex);
  271. return -EIO;
  272. }
  273. } else {
  274. DRM_ERROR("Error occurred. Don't know how to reset this chip.\n");
  275. return -ENODEV;
  276. }
  277. /* Ok, now get things going again... */
  278. /*
  279. * Everything depends on having the GTT running, so we need to start
  280. * there. Fortunately we don't need to do this unless we reset the
  281. * chip at a PCI level.
  282. *
  283. * Next we need to restore the context, but we don't use those
  284. * yet either...
  285. *
  286. * Ring buffer needs to be re-initialized in the KMS case, or if X
  287. * was running at the time of the reset (i.e. we weren't VT
  288. * switched away).
  289. */
  290. if (drm_core_check_feature(dev, DRIVER_MODESET) ||
  291. !dev_priv->mm.suspended) {
  292. drm_i915_ring_buffer_t *ring = &dev_priv->ring;
  293. struct drm_gem_object *obj = ring->ring_obj;
  294. struct drm_i915_gem_object *obj_priv = obj->driver_private;
  295. dev_priv->mm.suspended = 0;
  296. /* Stop the ring if it's running. */
  297. I915_WRITE(PRB0_CTL, 0);
  298. I915_WRITE(PRB0_TAIL, 0);
  299. I915_WRITE(PRB0_HEAD, 0);
  300. /* Initialize the ring. */
  301. I915_WRITE(PRB0_START, obj_priv->gtt_offset);
  302. I915_WRITE(PRB0_CTL,
  303. ((obj->size - 4096) & RING_NR_PAGES) |
  304. RING_NO_REPORT |
  305. RING_VALID);
  306. if (!drm_core_check_feature(dev, DRIVER_MODESET))
  307. i915_kernel_lost_context(dev);
  308. else {
  309. ring->head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
  310. ring->tail = I915_READ(PRB0_TAIL) & TAIL_ADDR;
  311. ring->space = ring->head - (ring->tail + 8);
  312. if (ring->space < 0)
  313. ring->space += ring->Size;
  314. }
  315. mutex_unlock(&dev->struct_mutex);
  316. drm_irq_uninstall(dev);
  317. drm_irq_install(dev);
  318. mutex_lock(&dev->struct_mutex);
  319. }
  320. /*
  321. * Display needs restore too...
  322. */
  323. if (need_display)
  324. i915_restore_display(dev);
  325. mutex_unlock(&dev->struct_mutex);
  326. return 0;
  327. }
  328. static int __devinit
  329. i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  330. {
  331. return drm_get_dev(pdev, ent, &driver);
  332. }
  333. static void
  334. i915_pci_remove(struct pci_dev *pdev)
  335. {
  336. struct drm_device *dev = pci_get_drvdata(pdev);
  337. drm_put_dev(dev);
  338. }
  339. static int i915_pm_suspend(struct device *dev)
  340. {
  341. struct pci_dev *pdev = to_pci_dev(dev);
  342. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  343. int error;
  344. if (!drm_dev || !drm_dev->dev_private) {
  345. dev_err(dev, "DRM not initialized, aborting suspend.\n");
  346. return -ENODEV;
  347. }
  348. error = i915_drm_freeze(drm_dev);
  349. if (error)
  350. return error;
  351. pci_disable_device(pdev);
  352. pci_set_power_state(pdev, PCI_D3hot);
  353. return 0;
  354. }
  355. static int i915_pm_resume(struct device *dev)
  356. {
  357. struct pci_dev *pdev = to_pci_dev(dev);
  358. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  359. return i915_resume(drm_dev);
  360. }
  361. static int i915_pm_freeze(struct device *dev)
  362. {
  363. struct pci_dev *pdev = to_pci_dev(dev);
  364. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  365. if (!drm_dev || !drm_dev->dev_private) {
  366. dev_err(dev, "DRM not initialized, aborting suspend.\n");
  367. return -ENODEV;
  368. }
  369. return i915_drm_freeze(drm_dev);
  370. }
  371. static int i915_pm_thaw(struct device *dev)
  372. {
  373. struct pci_dev *pdev = to_pci_dev(dev);
  374. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  375. return i915_drm_thaw(drm_dev);
  376. }
  377. static int i915_pm_poweroff(struct device *dev)
  378. {
  379. struct pci_dev *pdev = to_pci_dev(dev);
  380. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  381. return i915_drm_freeze(drm_dev);
  382. }
  383. const struct dev_pm_ops i915_pm_ops = {
  384. .suspend = i915_pm_suspend,
  385. .resume = i915_pm_resume,
  386. .freeze = i915_pm_freeze,
  387. .thaw = i915_pm_thaw,
  388. .poweroff = i915_pm_poweroff,
  389. .restore = i915_pm_resume,
  390. };
  391. static struct vm_operations_struct i915_gem_vm_ops = {
  392. .fault = i915_gem_fault,
  393. .open = drm_gem_vm_open,
  394. .close = drm_gem_vm_close,
  395. };
  396. static struct drm_driver driver = {
  397. /* don't use mtrr's here, the Xserver or user space app should
  398. * deal with them for intel hardware.
  399. */
  400. .driver_features =
  401. DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | /* DRIVER_USE_MTRR |*/
  402. DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM,
  403. .load = i915_driver_load,
  404. .unload = i915_driver_unload,
  405. .open = i915_driver_open,
  406. .lastclose = i915_driver_lastclose,
  407. .preclose = i915_driver_preclose,
  408. .postclose = i915_driver_postclose,
  409. /* Used in place of i915_pm_ops for non-DRIVER_MODESET */
  410. .suspend = i915_suspend,
  411. .resume = i915_resume,
  412. .device_is_agp = i915_driver_device_is_agp,
  413. .enable_vblank = i915_enable_vblank,
  414. .disable_vblank = i915_disable_vblank,
  415. .irq_preinstall = i915_driver_irq_preinstall,
  416. .irq_postinstall = i915_driver_irq_postinstall,
  417. .irq_uninstall = i915_driver_irq_uninstall,
  418. .irq_handler = i915_driver_irq_handler,
  419. .reclaim_buffers = drm_core_reclaim_buffers,
  420. .get_map_ofs = drm_core_get_map_ofs,
  421. .get_reg_ofs = drm_core_get_reg_ofs,
  422. .master_create = i915_master_create,
  423. .master_destroy = i915_master_destroy,
  424. #if defined(CONFIG_DEBUG_FS)
  425. .debugfs_init = i915_debugfs_init,
  426. .debugfs_cleanup = i915_debugfs_cleanup,
  427. #endif
  428. .gem_init_object = i915_gem_init_object,
  429. .gem_free_object = i915_gem_free_object,
  430. .gem_vm_ops = &i915_gem_vm_ops,
  431. .ioctls = i915_ioctls,
  432. .fops = {
  433. .owner = THIS_MODULE,
  434. .open = drm_open,
  435. .release = drm_release,
  436. .unlocked_ioctl = drm_ioctl,
  437. .mmap = drm_gem_mmap,
  438. .poll = drm_poll,
  439. .fasync = drm_fasync,
  440. .read = drm_read,
  441. #ifdef CONFIG_COMPAT
  442. .compat_ioctl = i915_compat_ioctl,
  443. #endif
  444. },
  445. .pci_driver = {
  446. .name = DRIVER_NAME,
  447. .id_table = pciidlist,
  448. .probe = i915_pci_probe,
  449. .remove = i915_pci_remove,
  450. .driver.pm = &i915_pm_ops,
  451. },
  452. .name = DRIVER_NAME,
  453. .desc = DRIVER_DESC,
  454. .date = DRIVER_DATE,
  455. .major = DRIVER_MAJOR,
  456. .minor = DRIVER_MINOR,
  457. .patchlevel = DRIVER_PATCHLEVEL,
  458. };
  459. static int __init i915_init(void)
  460. {
  461. driver.num_ioctls = i915_max_ioctl;
  462. i915_gem_shrinker_init();
  463. /*
  464. * If CONFIG_DRM_I915_KMS is set, default to KMS unless
  465. * explicitly disabled with the module pararmeter.
  466. *
  467. * Otherwise, just follow the parameter (defaulting to off).
  468. *
  469. * Allow optional vga_text_mode_force boot option to override
  470. * the default behavior.
  471. */
  472. #if defined(CONFIG_DRM_I915_KMS)
  473. if (i915_modeset != 0)
  474. driver.driver_features |= DRIVER_MODESET;
  475. #endif
  476. if (i915_modeset == 1)
  477. driver.driver_features |= DRIVER_MODESET;
  478. #ifdef CONFIG_VGA_CONSOLE
  479. if (vgacon_text_force() && i915_modeset == -1)
  480. driver.driver_features &= ~DRIVER_MODESET;
  481. #endif
  482. return drm_init(&driver);
  483. }
  484. static void __exit i915_exit(void)
  485. {
  486. i915_gem_shrinker_exit();
  487. drm_exit(&driver);
  488. }
  489. module_init(i915_init);
  490. module_exit(i915_exit);
  491. MODULE_AUTHOR(DRIVER_AUTHOR);
  492. MODULE_DESCRIPTION(DRIVER_DESC);
  493. MODULE_LICENSE("GPL and additional rights");