i915_debugfs.c 47 KB

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  1. /*
  2. * Copyright © 2008 Intel Corporation
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21. * IN THE SOFTWARE.
  22. *
  23. * Authors:
  24. * Eric Anholt <eric@anholt.net>
  25. * Keith Packard <keithp@keithp.com>
  26. *
  27. */
  28. #include <linux/seq_file.h>
  29. #include <linux/debugfs.h>
  30. #include <linux/slab.h>
  31. #include "drmP.h"
  32. #include "drm.h"
  33. #include "intel_drv.h"
  34. #include "intel_ringbuffer.h"
  35. #include "i915_drm.h"
  36. #include "i915_drv.h"
  37. #define DRM_I915_RING_DEBUG 1
  38. #if defined(CONFIG_DEBUG_FS)
  39. enum {
  40. ACTIVE_LIST,
  41. FLUSHING_LIST,
  42. INACTIVE_LIST,
  43. PINNED_LIST,
  44. DEFERRED_FREE_LIST,
  45. };
  46. static const char *yesno(int v)
  47. {
  48. return v ? "yes" : "no";
  49. }
  50. static int i915_capabilities(struct seq_file *m, void *data)
  51. {
  52. struct drm_info_node *node = (struct drm_info_node *) m->private;
  53. struct drm_device *dev = node->minor->dev;
  54. const struct intel_device_info *info = INTEL_INFO(dev);
  55. seq_printf(m, "gen: %d\n", info->gen);
  56. #define B(x) seq_printf(m, #x ": %s\n", yesno(info->x))
  57. B(is_mobile);
  58. B(is_i85x);
  59. B(is_i915g);
  60. B(is_i945gm);
  61. B(is_g33);
  62. B(need_gfx_hws);
  63. B(is_g4x);
  64. B(is_pineview);
  65. B(is_broadwater);
  66. B(is_crestline);
  67. B(has_fbc);
  68. B(has_pipe_cxsr);
  69. B(has_hotplug);
  70. B(cursor_needs_physical);
  71. B(has_overlay);
  72. B(overlay_needs_physical);
  73. B(supports_tv);
  74. B(has_bsd_ring);
  75. B(has_blt_ring);
  76. #undef B
  77. return 0;
  78. }
  79. static const char *get_pin_flag(struct drm_i915_gem_object *obj)
  80. {
  81. if (obj->user_pin_count > 0)
  82. return "P";
  83. else if (obj->pin_count > 0)
  84. return "p";
  85. else
  86. return " ";
  87. }
  88. static const char *get_tiling_flag(struct drm_i915_gem_object *obj)
  89. {
  90. switch (obj->tiling_mode) {
  91. default:
  92. case I915_TILING_NONE: return " ";
  93. case I915_TILING_X: return "X";
  94. case I915_TILING_Y: return "Y";
  95. }
  96. }
  97. static const char *cache_level_str(int type)
  98. {
  99. switch (type) {
  100. case I915_CACHE_NONE: return " uncached";
  101. case I915_CACHE_LLC: return " snooped (LLC)";
  102. case I915_CACHE_LLC_MLC: return " snooped (LLC+MLC)";
  103. default: return "";
  104. }
  105. }
  106. static void
  107. describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
  108. {
  109. seq_printf(m, "%p: %s%s %8zd %04x %04x %d %d%s%s%s",
  110. &obj->base,
  111. get_pin_flag(obj),
  112. get_tiling_flag(obj),
  113. obj->base.size,
  114. obj->base.read_domains,
  115. obj->base.write_domain,
  116. obj->last_rendering_seqno,
  117. obj->last_fenced_seqno,
  118. cache_level_str(obj->cache_level),
  119. obj->dirty ? " dirty" : "",
  120. obj->madv == I915_MADV_DONTNEED ? " purgeable" : "");
  121. if (obj->base.name)
  122. seq_printf(m, " (name: %d)", obj->base.name);
  123. if (obj->fence_reg != I915_FENCE_REG_NONE)
  124. seq_printf(m, " (fence: %d)", obj->fence_reg);
  125. if (obj->gtt_space != NULL)
  126. seq_printf(m, " (gtt offset: %08x, size: %08x)",
  127. obj->gtt_offset, (unsigned int)obj->gtt_space->size);
  128. if (obj->pin_mappable || obj->fault_mappable) {
  129. char s[3], *t = s;
  130. if (obj->pin_mappable)
  131. *t++ = 'p';
  132. if (obj->fault_mappable)
  133. *t++ = 'f';
  134. *t = '\0';
  135. seq_printf(m, " (%s mappable)", s);
  136. }
  137. if (obj->ring != NULL)
  138. seq_printf(m, " (%s)", obj->ring->name);
  139. }
  140. static int i915_gem_object_list_info(struct seq_file *m, void *data)
  141. {
  142. struct drm_info_node *node = (struct drm_info_node *) m->private;
  143. uintptr_t list = (uintptr_t) node->info_ent->data;
  144. struct list_head *head;
  145. struct drm_device *dev = node->minor->dev;
  146. drm_i915_private_t *dev_priv = dev->dev_private;
  147. struct drm_i915_gem_object *obj;
  148. size_t total_obj_size, total_gtt_size;
  149. int count, ret;
  150. ret = mutex_lock_interruptible(&dev->struct_mutex);
  151. if (ret)
  152. return ret;
  153. switch (list) {
  154. case ACTIVE_LIST:
  155. seq_printf(m, "Active:\n");
  156. head = &dev_priv->mm.active_list;
  157. break;
  158. case INACTIVE_LIST:
  159. seq_printf(m, "Inactive:\n");
  160. head = &dev_priv->mm.inactive_list;
  161. break;
  162. case PINNED_LIST:
  163. seq_printf(m, "Pinned:\n");
  164. head = &dev_priv->mm.pinned_list;
  165. break;
  166. case FLUSHING_LIST:
  167. seq_printf(m, "Flushing:\n");
  168. head = &dev_priv->mm.flushing_list;
  169. break;
  170. case DEFERRED_FREE_LIST:
  171. seq_printf(m, "Deferred free:\n");
  172. head = &dev_priv->mm.deferred_free_list;
  173. break;
  174. default:
  175. mutex_unlock(&dev->struct_mutex);
  176. return -EINVAL;
  177. }
  178. total_obj_size = total_gtt_size = count = 0;
  179. list_for_each_entry(obj, head, mm_list) {
  180. seq_printf(m, " ");
  181. describe_obj(m, obj);
  182. seq_printf(m, "\n");
  183. total_obj_size += obj->base.size;
  184. total_gtt_size += obj->gtt_space->size;
  185. count++;
  186. }
  187. mutex_unlock(&dev->struct_mutex);
  188. seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
  189. count, total_obj_size, total_gtt_size);
  190. return 0;
  191. }
  192. #define count_objects(list, member) do { \
  193. list_for_each_entry(obj, list, member) { \
  194. size += obj->gtt_space->size; \
  195. ++count; \
  196. if (obj->map_and_fenceable) { \
  197. mappable_size += obj->gtt_space->size; \
  198. ++mappable_count; \
  199. } \
  200. } \
  201. } while (0)
  202. static int i915_gem_object_info(struct seq_file *m, void* data)
  203. {
  204. struct drm_info_node *node = (struct drm_info_node *) m->private;
  205. struct drm_device *dev = node->minor->dev;
  206. struct drm_i915_private *dev_priv = dev->dev_private;
  207. u32 count, mappable_count;
  208. size_t size, mappable_size;
  209. struct drm_i915_gem_object *obj;
  210. int ret;
  211. ret = mutex_lock_interruptible(&dev->struct_mutex);
  212. if (ret)
  213. return ret;
  214. seq_printf(m, "%u objects, %zu bytes\n",
  215. dev_priv->mm.object_count,
  216. dev_priv->mm.object_memory);
  217. size = count = mappable_size = mappable_count = 0;
  218. count_objects(&dev_priv->mm.gtt_list, gtt_list);
  219. seq_printf(m, "%u [%u] objects, %zu [%zu] bytes in gtt\n",
  220. count, mappable_count, size, mappable_size);
  221. size = count = mappable_size = mappable_count = 0;
  222. count_objects(&dev_priv->mm.active_list, mm_list);
  223. count_objects(&dev_priv->mm.flushing_list, mm_list);
  224. seq_printf(m, " %u [%u] active objects, %zu [%zu] bytes\n",
  225. count, mappable_count, size, mappable_size);
  226. size = count = mappable_size = mappable_count = 0;
  227. count_objects(&dev_priv->mm.pinned_list, mm_list);
  228. seq_printf(m, " %u [%u] pinned objects, %zu [%zu] bytes\n",
  229. count, mappable_count, size, mappable_size);
  230. size = count = mappable_size = mappable_count = 0;
  231. count_objects(&dev_priv->mm.inactive_list, mm_list);
  232. seq_printf(m, " %u [%u] inactive objects, %zu [%zu] bytes\n",
  233. count, mappable_count, size, mappable_size);
  234. size = count = mappable_size = mappable_count = 0;
  235. count_objects(&dev_priv->mm.deferred_free_list, mm_list);
  236. seq_printf(m, " %u [%u] freed objects, %zu [%zu] bytes\n",
  237. count, mappable_count, size, mappable_size);
  238. size = count = mappable_size = mappable_count = 0;
  239. list_for_each_entry(obj, &dev_priv->mm.gtt_list, gtt_list) {
  240. if (obj->fault_mappable) {
  241. size += obj->gtt_space->size;
  242. ++count;
  243. }
  244. if (obj->pin_mappable) {
  245. mappable_size += obj->gtt_space->size;
  246. ++mappable_count;
  247. }
  248. }
  249. seq_printf(m, "%u pinned mappable objects, %zu bytes\n",
  250. mappable_count, mappable_size);
  251. seq_printf(m, "%u fault mappable objects, %zu bytes\n",
  252. count, size);
  253. seq_printf(m, "%zu [%zu] gtt total\n",
  254. dev_priv->mm.gtt_total, dev_priv->mm.mappable_gtt_total);
  255. mutex_unlock(&dev->struct_mutex);
  256. return 0;
  257. }
  258. static int i915_gem_gtt_info(struct seq_file *m, void* data)
  259. {
  260. struct drm_info_node *node = (struct drm_info_node *) m->private;
  261. struct drm_device *dev = node->minor->dev;
  262. struct drm_i915_private *dev_priv = dev->dev_private;
  263. struct drm_i915_gem_object *obj;
  264. size_t total_obj_size, total_gtt_size;
  265. int count, ret;
  266. ret = mutex_lock_interruptible(&dev->struct_mutex);
  267. if (ret)
  268. return ret;
  269. total_obj_size = total_gtt_size = count = 0;
  270. list_for_each_entry(obj, &dev_priv->mm.gtt_list, gtt_list) {
  271. seq_printf(m, " ");
  272. describe_obj(m, obj);
  273. seq_printf(m, "\n");
  274. total_obj_size += obj->base.size;
  275. total_gtt_size += obj->gtt_space->size;
  276. count++;
  277. }
  278. mutex_unlock(&dev->struct_mutex);
  279. seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
  280. count, total_obj_size, total_gtt_size);
  281. return 0;
  282. }
  283. static int i915_gem_pageflip_info(struct seq_file *m, void *data)
  284. {
  285. struct drm_info_node *node = (struct drm_info_node *) m->private;
  286. struct drm_device *dev = node->minor->dev;
  287. unsigned long flags;
  288. struct intel_crtc *crtc;
  289. list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
  290. const char pipe = pipe_name(crtc->pipe);
  291. const char plane = plane_name(crtc->plane);
  292. struct intel_unpin_work *work;
  293. spin_lock_irqsave(&dev->event_lock, flags);
  294. work = crtc->unpin_work;
  295. if (work == NULL) {
  296. seq_printf(m, "No flip due on pipe %c (plane %c)\n",
  297. pipe, plane);
  298. } else {
  299. if (!work->pending) {
  300. seq_printf(m, "Flip queued on pipe %c (plane %c)\n",
  301. pipe, plane);
  302. } else {
  303. seq_printf(m, "Flip pending (waiting for vsync) on pipe %c (plane %c)\n",
  304. pipe, plane);
  305. }
  306. if (work->enable_stall_check)
  307. seq_printf(m, "Stall check enabled, ");
  308. else
  309. seq_printf(m, "Stall check waiting for page flip ioctl, ");
  310. seq_printf(m, "%d prepares\n", work->pending);
  311. if (work->old_fb_obj) {
  312. struct drm_i915_gem_object *obj = work->old_fb_obj;
  313. if (obj)
  314. seq_printf(m, "Old framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
  315. }
  316. if (work->pending_flip_obj) {
  317. struct drm_i915_gem_object *obj = work->pending_flip_obj;
  318. if (obj)
  319. seq_printf(m, "New framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
  320. }
  321. }
  322. spin_unlock_irqrestore(&dev->event_lock, flags);
  323. }
  324. return 0;
  325. }
  326. static int i915_gem_request_info(struct seq_file *m, void *data)
  327. {
  328. struct drm_info_node *node = (struct drm_info_node *) m->private;
  329. struct drm_device *dev = node->minor->dev;
  330. drm_i915_private_t *dev_priv = dev->dev_private;
  331. struct drm_i915_gem_request *gem_request;
  332. int ret, count;
  333. ret = mutex_lock_interruptible(&dev->struct_mutex);
  334. if (ret)
  335. return ret;
  336. count = 0;
  337. if (!list_empty(&dev_priv->ring[RCS].request_list)) {
  338. seq_printf(m, "Render requests:\n");
  339. list_for_each_entry(gem_request,
  340. &dev_priv->ring[RCS].request_list,
  341. list) {
  342. seq_printf(m, " %d @ %d\n",
  343. gem_request->seqno,
  344. (int) (jiffies - gem_request->emitted_jiffies));
  345. }
  346. count++;
  347. }
  348. if (!list_empty(&dev_priv->ring[VCS].request_list)) {
  349. seq_printf(m, "BSD requests:\n");
  350. list_for_each_entry(gem_request,
  351. &dev_priv->ring[VCS].request_list,
  352. list) {
  353. seq_printf(m, " %d @ %d\n",
  354. gem_request->seqno,
  355. (int) (jiffies - gem_request->emitted_jiffies));
  356. }
  357. count++;
  358. }
  359. if (!list_empty(&dev_priv->ring[BCS].request_list)) {
  360. seq_printf(m, "BLT requests:\n");
  361. list_for_each_entry(gem_request,
  362. &dev_priv->ring[BCS].request_list,
  363. list) {
  364. seq_printf(m, " %d @ %d\n",
  365. gem_request->seqno,
  366. (int) (jiffies - gem_request->emitted_jiffies));
  367. }
  368. count++;
  369. }
  370. mutex_unlock(&dev->struct_mutex);
  371. if (count == 0)
  372. seq_printf(m, "No requests\n");
  373. return 0;
  374. }
  375. static void i915_ring_seqno_info(struct seq_file *m,
  376. struct intel_ring_buffer *ring)
  377. {
  378. if (ring->get_seqno) {
  379. seq_printf(m, "Current sequence (%s): %d\n",
  380. ring->name, ring->get_seqno(ring));
  381. seq_printf(m, "Waiter sequence (%s): %d\n",
  382. ring->name, ring->waiting_seqno);
  383. seq_printf(m, "IRQ sequence (%s): %d\n",
  384. ring->name, ring->irq_seqno);
  385. }
  386. }
  387. static int i915_gem_seqno_info(struct seq_file *m, void *data)
  388. {
  389. struct drm_info_node *node = (struct drm_info_node *) m->private;
  390. struct drm_device *dev = node->minor->dev;
  391. drm_i915_private_t *dev_priv = dev->dev_private;
  392. int ret, i;
  393. ret = mutex_lock_interruptible(&dev->struct_mutex);
  394. if (ret)
  395. return ret;
  396. for (i = 0; i < I915_NUM_RINGS; i++)
  397. i915_ring_seqno_info(m, &dev_priv->ring[i]);
  398. mutex_unlock(&dev->struct_mutex);
  399. return 0;
  400. }
  401. static int i915_interrupt_info(struct seq_file *m, void *data)
  402. {
  403. struct drm_info_node *node = (struct drm_info_node *) m->private;
  404. struct drm_device *dev = node->minor->dev;
  405. drm_i915_private_t *dev_priv = dev->dev_private;
  406. int ret, i, pipe;
  407. ret = mutex_lock_interruptible(&dev->struct_mutex);
  408. if (ret)
  409. return ret;
  410. if (!HAS_PCH_SPLIT(dev)) {
  411. seq_printf(m, "Interrupt enable: %08x\n",
  412. I915_READ(IER));
  413. seq_printf(m, "Interrupt identity: %08x\n",
  414. I915_READ(IIR));
  415. seq_printf(m, "Interrupt mask: %08x\n",
  416. I915_READ(IMR));
  417. for_each_pipe(pipe)
  418. seq_printf(m, "Pipe %c stat: %08x\n",
  419. pipe_name(pipe),
  420. I915_READ(PIPESTAT(pipe)));
  421. } else {
  422. seq_printf(m, "North Display Interrupt enable: %08x\n",
  423. I915_READ(DEIER));
  424. seq_printf(m, "North Display Interrupt identity: %08x\n",
  425. I915_READ(DEIIR));
  426. seq_printf(m, "North Display Interrupt mask: %08x\n",
  427. I915_READ(DEIMR));
  428. seq_printf(m, "South Display Interrupt enable: %08x\n",
  429. I915_READ(SDEIER));
  430. seq_printf(m, "South Display Interrupt identity: %08x\n",
  431. I915_READ(SDEIIR));
  432. seq_printf(m, "South Display Interrupt mask: %08x\n",
  433. I915_READ(SDEIMR));
  434. seq_printf(m, "Graphics Interrupt enable: %08x\n",
  435. I915_READ(GTIER));
  436. seq_printf(m, "Graphics Interrupt identity: %08x\n",
  437. I915_READ(GTIIR));
  438. seq_printf(m, "Graphics Interrupt mask: %08x\n",
  439. I915_READ(GTIMR));
  440. }
  441. seq_printf(m, "Interrupts received: %d\n",
  442. atomic_read(&dev_priv->irq_received));
  443. for (i = 0; i < I915_NUM_RINGS; i++) {
  444. if (IS_GEN6(dev) || IS_GEN7(dev)) {
  445. seq_printf(m, "Graphics Interrupt mask (%s): %08x\n",
  446. dev_priv->ring[i].name,
  447. I915_READ_IMR(&dev_priv->ring[i]));
  448. }
  449. i915_ring_seqno_info(m, &dev_priv->ring[i]);
  450. }
  451. mutex_unlock(&dev->struct_mutex);
  452. return 0;
  453. }
  454. static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
  455. {
  456. struct drm_info_node *node = (struct drm_info_node *) m->private;
  457. struct drm_device *dev = node->minor->dev;
  458. drm_i915_private_t *dev_priv = dev->dev_private;
  459. int i, ret;
  460. ret = mutex_lock_interruptible(&dev->struct_mutex);
  461. if (ret)
  462. return ret;
  463. seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
  464. seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
  465. for (i = 0; i < dev_priv->num_fence_regs; i++) {
  466. struct drm_i915_gem_object *obj = dev_priv->fence_regs[i].obj;
  467. seq_printf(m, "Fenced object[%2d] = ", i);
  468. if (obj == NULL)
  469. seq_printf(m, "unused");
  470. else
  471. describe_obj(m, obj);
  472. seq_printf(m, "\n");
  473. }
  474. mutex_unlock(&dev->struct_mutex);
  475. return 0;
  476. }
  477. static int i915_hws_info(struct seq_file *m, void *data)
  478. {
  479. struct drm_info_node *node = (struct drm_info_node *) m->private;
  480. struct drm_device *dev = node->minor->dev;
  481. drm_i915_private_t *dev_priv = dev->dev_private;
  482. struct intel_ring_buffer *ring;
  483. const volatile u32 __iomem *hws;
  484. int i;
  485. ring = &dev_priv->ring[(uintptr_t)node->info_ent->data];
  486. hws = (volatile u32 __iomem *)ring->status_page.page_addr;
  487. if (hws == NULL)
  488. return 0;
  489. for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
  490. seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
  491. i * 4,
  492. hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
  493. }
  494. return 0;
  495. }
  496. static void i915_dump_object(struct seq_file *m,
  497. struct io_mapping *mapping,
  498. struct drm_i915_gem_object *obj)
  499. {
  500. int page, page_count, i;
  501. page_count = obj->base.size / PAGE_SIZE;
  502. for (page = 0; page < page_count; page++) {
  503. u32 *mem = io_mapping_map_wc(mapping,
  504. obj->gtt_offset + page * PAGE_SIZE);
  505. for (i = 0; i < PAGE_SIZE; i += 4)
  506. seq_printf(m, "%08x : %08x\n", i, mem[i / 4]);
  507. io_mapping_unmap(mem);
  508. }
  509. }
  510. static int i915_batchbuffer_info(struct seq_file *m, void *data)
  511. {
  512. struct drm_info_node *node = (struct drm_info_node *) m->private;
  513. struct drm_device *dev = node->minor->dev;
  514. drm_i915_private_t *dev_priv = dev->dev_private;
  515. struct drm_i915_gem_object *obj;
  516. int ret;
  517. ret = mutex_lock_interruptible(&dev->struct_mutex);
  518. if (ret)
  519. return ret;
  520. list_for_each_entry(obj, &dev_priv->mm.active_list, mm_list) {
  521. if (obj->base.read_domains & I915_GEM_DOMAIN_COMMAND) {
  522. seq_printf(m, "--- gtt_offset = 0x%08x\n", obj->gtt_offset);
  523. i915_dump_object(m, dev_priv->mm.gtt_mapping, obj);
  524. }
  525. }
  526. mutex_unlock(&dev->struct_mutex);
  527. return 0;
  528. }
  529. static int i915_ringbuffer_data(struct seq_file *m, void *data)
  530. {
  531. struct drm_info_node *node = (struct drm_info_node *) m->private;
  532. struct drm_device *dev = node->minor->dev;
  533. drm_i915_private_t *dev_priv = dev->dev_private;
  534. struct intel_ring_buffer *ring;
  535. int ret;
  536. ret = mutex_lock_interruptible(&dev->struct_mutex);
  537. if (ret)
  538. return ret;
  539. ring = &dev_priv->ring[(uintptr_t)node->info_ent->data];
  540. if (!ring->obj) {
  541. seq_printf(m, "No ringbuffer setup\n");
  542. } else {
  543. const u8 __iomem *virt = ring->virtual_start;
  544. uint32_t off;
  545. for (off = 0; off < ring->size; off += 4) {
  546. uint32_t *ptr = (uint32_t *)(virt + off);
  547. seq_printf(m, "%08x : %08x\n", off, *ptr);
  548. }
  549. }
  550. mutex_unlock(&dev->struct_mutex);
  551. return 0;
  552. }
  553. static int i915_ringbuffer_info(struct seq_file *m, void *data)
  554. {
  555. struct drm_info_node *node = (struct drm_info_node *) m->private;
  556. struct drm_device *dev = node->minor->dev;
  557. drm_i915_private_t *dev_priv = dev->dev_private;
  558. struct intel_ring_buffer *ring;
  559. int ret;
  560. ring = &dev_priv->ring[(uintptr_t)node->info_ent->data];
  561. if (ring->size == 0)
  562. return 0;
  563. ret = mutex_lock_interruptible(&dev->struct_mutex);
  564. if (ret)
  565. return ret;
  566. seq_printf(m, "Ring %s:\n", ring->name);
  567. seq_printf(m, " Head : %08x\n", I915_READ_HEAD(ring) & HEAD_ADDR);
  568. seq_printf(m, " Tail : %08x\n", I915_READ_TAIL(ring) & TAIL_ADDR);
  569. seq_printf(m, " Size : %08x\n", ring->size);
  570. seq_printf(m, " Active : %08x\n", intel_ring_get_active_head(ring));
  571. seq_printf(m, " NOPID : %08x\n", I915_READ_NOPID(ring));
  572. if (IS_GEN6(dev)) {
  573. seq_printf(m, " Sync 0 : %08x\n", I915_READ_SYNC_0(ring));
  574. seq_printf(m, " Sync 1 : %08x\n", I915_READ_SYNC_1(ring));
  575. }
  576. seq_printf(m, " Control : %08x\n", I915_READ_CTL(ring));
  577. seq_printf(m, " Start : %08x\n", I915_READ_START(ring));
  578. mutex_unlock(&dev->struct_mutex);
  579. return 0;
  580. }
  581. static const char *ring_str(int ring)
  582. {
  583. switch (ring) {
  584. case RING_RENDER: return " render";
  585. case RING_BSD: return " bsd";
  586. case RING_BLT: return " blt";
  587. default: return "";
  588. }
  589. }
  590. static const char *pin_flag(int pinned)
  591. {
  592. if (pinned > 0)
  593. return " P";
  594. else if (pinned < 0)
  595. return " p";
  596. else
  597. return "";
  598. }
  599. static const char *tiling_flag(int tiling)
  600. {
  601. switch (tiling) {
  602. default:
  603. case I915_TILING_NONE: return "";
  604. case I915_TILING_X: return " X";
  605. case I915_TILING_Y: return " Y";
  606. }
  607. }
  608. static const char *dirty_flag(int dirty)
  609. {
  610. return dirty ? " dirty" : "";
  611. }
  612. static const char *purgeable_flag(int purgeable)
  613. {
  614. return purgeable ? " purgeable" : "";
  615. }
  616. static void print_error_buffers(struct seq_file *m,
  617. const char *name,
  618. struct drm_i915_error_buffer *err,
  619. int count)
  620. {
  621. seq_printf(m, "%s [%d]:\n", name, count);
  622. while (count--) {
  623. seq_printf(m, " %08x %8u %04x %04x %08x%s%s%s%s%s%s",
  624. err->gtt_offset,
  625. err->size,
  626. err->read_domains,
  627. err->write_domain,
  628. err->seqno,
  629. pin_flag(err->pinned),
  630. tiling_flag(err->tiling),
  631. dirty_flag(err->dirty),
  632. purgeable_flag(err->purgeable),
  633. ring_str(err->ring),
  634. cache_level_str(err->cache_level));
  635. if (err->name)
  636. seq_printf(m, " (name: %d)", err->name);
  637. if (err->fence_reg != I915_FENCE_REG_NONE)
  638. seq_printf(m, " (fence: %d)", err->fence_reg);
  639. seq_printf(m, "\n");
  640. err++;
  641. }
  642. }
  643. static int i915_error_state(struct seq_file *m, void *unused)
  644. {
  645. struct drm_info_node *node = (struct drm_info_node *) m->private;
  646. struct drm_device *dev = node->minor->dev;
  647. drm_i915_private_t *dev_priv = dev->dev_private;
  648. struct drm_i915_error_state *error;
  649. unsigned long flags;
  650. int i, page, offset, elt;
  651. spin_lock_irqsave(&dev_priv->error_lock, flags);
  652. if (!dev_priv->first_error) {
  653. seq_printf(m, "no error state collected\n");
  654. goto out;
  655. }
  656. error = dev_priv->first_error;
  657. seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
  658. error->time.tv_usec);
  659. seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
  660. seq_printf(m, "EIR: 0x%08x\n", error->eir);
  661. seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
  662. if (INTEL_INFO(dev)->gen >= 6) {
  663. seq_printf(m, "ERROR: 0x%08x\n", error->error);
  664. seq_printf(m, "Blitter command stream:\n");
  665. seq_printf(m, " ACTHD: 0x%08x\n", error->bcs_acthd);
  666. seq_printf(m, " IPEIR: 0x%08x\n", error->bcs_ipeir);
  667. seq_printf(m, " IPEHR: 0x%08x\n", error->bcs_ipehr);
  668. seq_printf(m, " INSTDONE: 0x%08x\n", error->bcs_instdone);
  669. seq_printf(m, " seqno: 0x%08x\n", error->bcs_seqno);
  670. seq_printf(m, "Video (BSD) command stream:\n");
  671. seq_printf(m, " ACTHD: 0x%08x\n", error->vcs_acthd);
  672. seq_printf(m, " IPEIR: 0x%08x\n", error->vcs_ipeir);
  673. seq_printf(m, " IPEHR: 0x%08x\n", error->vcs_ipehr);
  674. seq_printf(m, " INSTDONE: 0x%08x\n", error->vcs_instdone);
  675. seq_printf(m, " seqno: 0x%08x\n", error->vcs_seqno);
  676. }
  677. seq_printf(m, "Render command stream:\n");
  678. seq_printf(m, " ACTHD: 0x%08x\n", error->acthd);
  679. seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir);
  680. seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr);
  681. seq_printf(m, " INSTDONE: 0x%08x\n", error->instdone);
  682. if (INTEL_INFO(dev)->gen >= 4) {
  683. seq_printf(m, " INSTDONE1: 0x%08x\n", error->instdone1);
  684. seq_printf(m, " INSTPS: 0x%08x\n", error->instps);
  685. }
  686. seq_printf(m, " INSTPM: 0x%08x\n", error->instpm);
  687. seq_printf(m, " seqno: 0x%08x\n", error->seqno);
  688. for (i = 0; i < dev_priv->num_fence_regs; i++)
  689. seq_printf(m, " fence[%d] = %08llx\n", i, error->fence[i]);
  690. if (error->active_bo)
  691. print_error_buffers(m, "Active",
  692. error->active_bo,
  693. error->active_bo_count);
  694. if (error->pinned_bo)
  695. print_error_buffers(m, "Pinned",
  696. error->pinned_bo,
  697. error->pinned_bo_count);
  698. for (i = 0; i < ARRAY_SIZE(error->batchbuffer); i++) {
  699. if (error->batchbuffer[i]) {
  700. struct drm_i915_error_object *obj = error->batchbuffer[i];
  701. seq_printf(m, "%s --- gtt_offset = 0x%08x\n",
  702. dev_priv->ring[i].name,
  703. obj->gtt_offset);
  704. offset = 0;
  705. for (page = 0; page < obj->page_count; page++) {
  706. for (elt = 0; elt < PAGE_SIZE/4; elt++) {
  707. seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
  708. offset += 4;
  709. }
  710. }
  711. }
  712. }
  713. for (i = 0; i < ARRAY_SIZE(error->ringbuffer); i++) {
  714. if (error->ringbuffer[i]) {
  715. struct drm_i915_error_object *obj = error->ringbuffer[i];
  716. seq_printf(m, "%s --- ringbuffer = 0x%08x\n",
  717. dev_priv->ring[i].name,
  718. obj->gtt_offset);
  719. offset = 0;
  720. for (page = 0; page < obj->page_count; page++) {
  721. for (elt = 0; elt < PAGE_SIZE/4; elt++) {
  722. seq_printf(m, "%08x : %08x\n",
  723. offset,
  724. obj->pages[page][elt]);
  725. offset += 4;
  726. }
  727. }
  728. }
  729. }
  730. if (error->overlay)
  731. intel_overlay_print_error_state(m, error->overlay);
  732. if (error->display)
  733. intel_display_print_error_state(m, dev, error->display);
  734. out:
  735. spin_unlock_irqrestore(&dev_priv->error_lock, flags);
  736. return 0;
  737. }
  738. static int i915_rstdby_delays(struct seq_file *m, void *unused)
  739. {
  740. struct drm_info_node *node = (struct drm_info_node *) m->private;
  741. struct drm_device *dev = node->minor->dev;
  742. drm_i915_private_t *dev_priv = dev->dev_private;
  743. u16 crstanddelay;
  744. int ret;
  745. ret = mutex_lock_interruptible(&dev->struct_mutex);
  746. if (ret)
  747. return ret;
  748. crstanddelay = I915_READ16(CRSTANDVID);
  749. mutex_unlock(&dev->struct_mutex);
  750. seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));
  751. return 0;
  752. }
  753. static int i915_cur_delayinfo(struct seq_file *m, void *unused)
  754. {
  755. struct drm_info_node *node = (struct drm_info_node *) m->private;
  756. struct drm_device *dev = node->minor->dev;
  757. drm_i915_private_t *dev_priv = dev->dev_private;
  758. int ret;
  759. if (IS_GEN5(dev)) {
  760. u16 rgvswctl = I915_READ16(MEMSWCTL);
  761. u16 rgvstat = I915_READ16(MEMSTAT_ILK);
  762. seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
  763. seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f);
  764. seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
  765. MEMSTAT_VID_SHIFT);
  766. seq_printf(m, "Current P-state: %d\n",
  767. (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
  768. } else if (IS_GEN6(dev) || IS_GEN7(dev)) {
  769. u32 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS);
  770. u32 rp_state_limits = I915_READ(GEN6_RP_STATE_LIMITS);
  771. u32 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);
  772. u32 rpstat;
  773. u32 rpupei, rpcurup, rpprevup;
  774. u32 rpdownei, rpcurdown, rpprevdown;
  775. int max_freq;
  776. /* RPSTAT1 is in the GT power well */
  777. ret = mutex_lock_interruptible(&dev->struct_mutex);
  778. if (ret)
  779. return ret;
  780. gen6_gt_force_wake_get(dev_priv);
  781. rpstat = I915_READ(GEN6_RPSTAT1);
  782. rpupei = I915_READ(GEN6_RP_CUR_UP_EI);
  783. rpcurup = I915_READ(GEN6_RP_CUR_UP);
  784. rpprevup = I915_READ(GEN6_RP_PREV_UP);
  785. rpdownei = I915_READ(GEN6_RP_CUR_DOWN_EI);
  786. rpcurdown = I915_READ(GEN6_RP_CUR_DOWN);
  787. rpprevdown = I915_READ(GEN6_RP_PREV_DOWN);
  788. gen6_gt_force_wake_put(dev_priv);
  789. mutex_unlock(&dev->struct_mutex);
  790. seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status);
  791. seq_printf(m, "RPSTAT1: 0x%08x\n", rpstat);
  792. seq_printf(m, "Render p-state ratio: %d\n",
  793. (gt_perf_status & 0xff00) >> 8);
  794. seq_printf(m, "Render p-state VID: %d\n",
  795. gt_perf_status & 0xff);
  796. seq_printf(m, "Render p-state limit: %d\n",
  797. rp_state_limits & 0xff);
  798. seq_printf(m, "CAGF: %dMHz\n", ((rpstat & GEN6_CAGF_MASK) >>
  799. GEN6_CAGF_SHIFT) * 50);
  800. seq_printf(m, "RP CUR UP EI: %dus\n", rpupei &
  801. GEN6_CURICONT_MASK);
  802. seq_printf(m, "RP CUR UP: %dus\n", rpcurup &
  803. GEN6_CURBSYTAVG_MASK);
  804. seq_printf(m, "RP PREV UP: %dus\n", rpprevup &
  805. GEN6_CURBSYTAVG_MASK);
  806. seq_printf(m, "RP CUR DOWN EI: %dus\n", rpdownei &
  807. GEN6_CURIAVG_MASK);
  808. seq_printf(m, "RP CUR DOWN: %dus\n", rpcurdown &
  809. GEN6_CURBSYTAVG_MASK);
  810. seq_printf(m, "RP PREV DOWN: %dus\n", rpprevdown &
  811. GEN6_CURBSYTAVG_MASK);
  812. max_freq = (rp_state_cap & 0xff0000) >> 16;
  813. seq_printf(m, "Lowest (RPN) frequency: %dMHz\n",
  814. max_freq * 50);
  815. max_freq = (rp_state_cap & 0xff00) >> 8;
  816. seq_printf(m, "Nominal (RP1) frequency: %dMHz\n",
  817. max_freq * 50);
  818. max_freq = rp_state_cap & 0xff;
  819. seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n",
  820. max_freq * 50);
  821. } else {
  822. seq_printf(m, "no P-state info available\n");
  823. }
  824. return 0;
  825. }
  826. static int i915_delayfreq_table(struct seq_file *m, void *unused)
  827. {
  828. struct drm_info_node *node = (struct drm_info_node *) m->private;
  829. struct drm_device *dev = node->minor->dev;
  830. drm_i915_private_t *dev_priv = dev->dev_private;
  831. u32 delayfreq;
  832. int ret, i;
  833. ret = mutex_lock_interruptible(&dev->struct_mutex);
  834. if (ret)
  835. return ret;
  836. for (i = 0; i < 16; i++) {
  837. delayfreq = I915_READ(PXVFREQ_BASE + i * 4);
  838. seq_printf(m, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i, delayfreq,
  839. (delayfreq & PXVFREQ_PX_MASK) >> PXVFREQ_PX_SHIFT);
  840. }
  841. mutex_unlock(&dev->struct_mutex);
  842. return 0;
  843. }
  844. static inline int MAP_TO_MV(int map)
  845. {
  846. return 1250 - (map * 25);
  847. }
  848. static int i915_inttoext_table(struct seq_file *m, void *unused)
  849. {
  850. struct drm_info_node *node = (struct drm_info_node *) m->private;
  851. struct drm_device *dev = node->minor->dev;
  852. drm_i915_private_t *dev_priv = dev->dev_private;
  853. u32 inttoext;
  854. int ret, i;
  855. ret = mutex_lock_interruptible(&dev->struct_mutex);
  856. if (ret)
  857. return ret;
  858. for (i = 1; i <= 32; i++) {
  859. inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);
  860. seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);
  861. }
  862. mutex_unlock(&dev->struct_mutex);
  863. return 0;
  864. }
  865. static int i915_drpc_info(struct seq_file *m, void *unused)
  866. {
  867. struct drm_info_node *node = (struct drm_info_node *) m->private;
  868. struct drm_device *dev = node->minor->dev;
  869. drm_i915_private_t *dev_priv = dev->dev_private;
  870. u32 rgvmodectl, rstdbyctl;
  871. u16 crstandvid;
  872. int ret;
  873. ret = mutex_lock_interruptible(&dev->struct_mutex);
  874. if (ret)
  875. return ret;
  876. rgvmodectl = I915_READ(MEMMODECTL);
  877. rstdbyctl = I915_READ(RSTDBYCTL);
  878. crstandvid = I915_READ16(CRSTANDVID);
  879. mutex_unlock(&dev->struct_mutex);
  880. seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
  881. "yes" : "no");
  882. seq_printf(m, "Boost freq: %d\n",
  883. (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
  884. MEMMODE_BOOST_FREQ_SHIFT);
  885. seq_printf(m, "HW control enabled: %s\n",
  886. rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
  887. seq_printf(m, "SW control enabled: %s\n",
  888. rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
  889. seq_printf(m, "Gated voltage change: %s\n",
  890. rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
  891. seq_printf(m, "Starting frequency: P%d\n",
  892. (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
  893. seq_printf(m, "Max P-state: P%d\n",
  894. (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);
  895. seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
  896. seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f));
  897. seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));
  898. seq_printf(m, "Render standby enabled: %s\n",
  899. (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes");
  900. seq_printf(m, "Current RS state: ");
  901. switch (rstdbyctl & RSX_STATUS_MASK) {
  902. case RSX_STATUS_ON:
  903. seq_printf(m, "on\n");
  904. break;
  905. case RSX_STATUS_RC1:
  906. seq_printf(m, "RC1\n");
  907. break;
  908. case RSX_STATUS_RC1E:
  909. seq_printf(m, "RC1E\n");
  910. break;
  911. case RSX_STATUS_RS1:
  912. seq_printf(m, "RS1\n");
  913. break;
  914. case RSX_STATUS_RS2:
  915. seq_printf(m, "RS2 (RC6)\n");
  916. break;
  917. case RSX_STATUS_RS3:
  918. seq_printf(m, "RC3 (RC6+)\n");
  919. break;
  920. default:
  921. seq_printf(m, "unknown\n");
  922. break;
  923. }
  924. return 0;
  925. }
  926. static int i915_fbc_status(struct seq_file *m, void *unused)
  927. {
  928. struct drm_info_node *node = (struct drm_info_node *) m->private;
  929. struct drm_device *dev = node->minor->dev;
  930. drm_i915_private_t *dev_priv = dev->dev_private;
  931. if (!I915_HAS_FBC(dev)) {
  932. seq_printf(m, "FBC unsupported on this chipset\n");
  933. return 0;
  934. }
  935. if (intel_fbc_enabled(dev)) {
  936. seq_printf(m, "FBC enabled\n");
  937. } else {
  938. seq_printf(m, "FBC disabled: ");
  939. switch (dev_priv->no_fbc_reason) {
  940. case FBC_NO_OUTPUT:
  941. seq_printf(m, "no outputs");
  942. break;
  943. case FBC_STOLEN_TOO_SMALL:
  944. seq_printf(m, "not enough stolen memory");
  945. break;
  946. case FBC_UNSUPPORTED_MODE:
  947. seq_printf(m, "mode not supported");
  948. break;
  949. case FBC_MODE_TOO_LARGE:
  950. seq_printf(m, "mode too large");
  951. break;
  952. case FBC_BAD_PLANE:
  953. seq_printf(m, "FBC unsupported on plane");
  954. break;
  955. case FBC_NOT_TILED:
  956. seq_printf(m, "scanout buffer not tiled");
  957. break;
  958. case FBC_MULTIPLE_PIPES:
  959. seq_printf(m, "multiple pipes are enabled");
  960. break;
  961. case FBC_MODULE_PARAM:
  962. seq_printf(m, "disabled per module param (default off)");
  963. break;
  964. default:
  965. seq_printf(m, "unknown reason");
  966. }
  967. seq_printf(m, "\n");
  968. }
  969. return 0;
  970. }
  971. static int i915_sr_status(struct seq_file *m, void *unused)
  972. {
  973. struct drm_info_node *node = (struct drm_info_node *) m->private;
  974. struct drm_device *dev = node->minor->dev;
  975. drm_i915_private_t *dev_priv = dev->dev_private;
  976. bool sr_enabled = false;
  977. if (HAS_PCH_SPLIT(dev))
  978. sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
  979. else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev))
  980. sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
  981. else if (IS_I915GM(dev))
  982. sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
  983. else if (IS_PINEVIEW(dev))
  984. sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
  985. seq_printf(m, "self-refresh: %s\n",
  986. sr_enabled ? "enabled" : "disabled");
  987. return 0;
  988. }
  989. static int i915_emon_status(struct seq_file *m, void *unused)
  990. {
  991. struct drm_info_node *node = (struct drm_info_node *) m->private;
  992. struct drm_device *dev = node->minor->dev;
  993. drm_i915_private_t *dev_priv = dev->dev_private;
  994. unsigned long temp, chipset, gfx;
  995. int ret;
  996. ret = mutex_lock_interruptible(&dev->struct_mutex);
  997. if (ret)
  998. return ret;
  999. temp = i915_mch_val(dev_priv);
  1000. chipset = i915_chipset_val(dev_priv);
  1001. gfx = i915_gfx_val(dev_priv);
  1002. mutex_unlock(&dev->struct_mutex);
  1003. seq_printf(m, "GMCH temp: %ld\n", temp);
  1004. seq_printf(m, "Chipset power: %ld\n", chipset);
  1005. seq_printf(m, "GFX power: %ld\n", gfx);
  1006. seq_printf(m, "Total power: %ld\n", chipset + gfx);
  1007. return 0;
  1008. }
  1009. static int i915_ring_freq_table(struct seq_file *m, void *unused)
  1010. {
  1011. struct drm_info_node *node = (struct drm_info_node *) m->private;
  1012. struct drm_device *dev = node->minor->dev;
  1013. drm_i915_private_t *dev_priv = dev->dev_private;
  1014. int ret;
  1015. int gpu_freq, ia_freq;
  1016. if (!(IS_GEN6(dev) || IS_GEN7(dev))) {
  1017. seq_printf(m, "unsupported on this chipset\n");
  1018. return 0;
  1019. }
  1020. ret = mutex_lock_interruptible(&dev->struct_mutex);
  1021. if (ret)
  1022. return ret;
  1023. seq_printf(m, "GPU freq (MHz)\tEffective CPU freq (MHz)\n");
  1024. for (gpu_freq = dev_priv->min_delay; gpu_freq <= dev_priv->max_delay;
  1025. gpu_freq++) {
  1026. I915_WRITE(GEN6_PCODE_DATA, gpu_freq);
  1027. I915_WRITE(GEN6_PCODE_MAILBOX, GEN6_PCODE_READY |
  1028. GEN6_PCODE_READ_MIN_FREQ_TABLE);
  1029. if (wait_for((I915_READ(GEN6_PCODE_MAILBOX) &
  1030. GEN6_PCODE_READY) == 0, 10)) {
  1031. DRM_ERROR("pcode read of freq table timed out\n");
  1032. continue;
  1033. }
  1034. ia_freq = I915_READ(GEN6_PCODE_DATA);
  1035. seq_printf(m, "%d\t\t%d\n", gpu_freq * 50, ia_freq * 100);
  1036. }
  1037. mutex_unlock(&dev->struct_mutex);
  1038. return 0;
  1039. }
  1040. static int i915_gfxec(struct seq_file *m, void *unused)
  1041. {
  1042. struct drm_info_node *node = (struct drm_info_node *) m->private;
  1043. struct drm_device *dev = node->minor->dev;
  1044. drm_i915_private_t *dev_priv = dev->dev_private;
  1045. int ret;
  1046. ret = mutex_lock_interruptible(&dev->struct_mutex);
  1047. if (ret)
  1048. return ret;
  1049. seq_printf(m, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4));
  1050. mutex_unlock(&dev->struct_mutex);
  1051. return 0;
  1052. }
  1053. static int i915_opregion(struct seq_file *m, void *unused)
  1054. {
  1055. struct drm_info_node *node = (struct drm_info_node *) m->private;
  1056. struct drm_device *dev = node->minor->dev;
  1057. drm_i915_private_t *dev_priv = dev->dev_private;
  1058. struct intel_opregion *opregion = &dev_priv->opregion;
  1059. int ret;
  1060. ret = mutex_lock_interruptible(&dev->struct_mutex);
  1061. if (ret)
  1062. return ret;
  1063. if (opregion->header)
  1064. seq_write(m, opregion->header, OPREGION_SIZE);
  1065. mutex_unlock(&dev->struct_mutex);
  1066. return 0;
  1067. }
  1068. static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
  1069. {
  1070. struct drm_info_node *node = (struct drm_info_node *) m->private;
  1071. struct drm_device *dev = node->minor->dev;
  1072. drm_i915_private_t *dev_priv = dev->dev_private;
  1073. struct intel_fbdev *ifbdev;
  1074. struct intel_framebuffer *fb;
  1075. int ret;
  1076. ret = mutex_lock_interruptible(&dev->mode_config.mutex);
  1077. if (ret)
  1078. return ret;
  1079. ifbdev = dev_priv->fbdev;
  1080. fb = to_intel_framebuffer(ifbdev->helper.fb);
  1081. seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, obj ",
  1082. fb->base.width,
  1083. fb->base.height,
  1084. fb->base.depth,
  1085. fb->base.bits_per_pixel);
  1086. describe_obj(m, fb->obj);
  1087. seq_printf(m, "\n");
  1088. list_for_each_entry(fb, &dev->mode_config.fb_list, base.head) {
  1089. if (&fb->base == ifbdev->helper.fb)
  1090. continue;
  1091. seq_printf(m, "user size: %d x %d, depth %d, %d bpp, obj ",
  1092. fb->base.width,
  1093. fb->base.height,
  1094. fb->base.depth,
  1095. fb->base.bits_per_pixel);
  1096. describe_obj(m, fb->obj);
  1097. seq_printf(m, "\n");
  1098. }
  1099. mutex_unlock(&dev->mode_config.mutex);
  1100. return 0;
  1101. }
  1102. static int i915_context_status(struct seq_file *m, void *unused)
  1103. {
  1104. struct drm_info_node *node = (struct drm_info_node *) m->private;
  1105. struct drm_device *dev = node->minor->dev;
  1106. drm_i915_private_t *dev_priv = dev->dev_private;
  1107. int ret;
  1108. ret = mutex_lock_interruptible(&dev->mode_config.mutex);
  1109. if (ret)
  1110. return ret;
  1111. if (dev_priv->pwrctx) {
  1112. seq_printf(m, "power context ");
  1113. describe_obj(m, dev_priv->pwrctx);
  1114. seq_printf(m, "\n");
  1115. }
  1116. if (dev_priv->renderctx) {
  1117. seq_printf(m, "render context ");
  1118. describe_obj(m, dev_priv->renderctx);
  1119. seq_printf(m, "\n");
  1120. }
  1121. mutex_unlock(&dev->mode_config.mutex);
  1122. return 0;
  1123. }
  1124. static int i915_gen6_forcewake_count_info(struct seq_file *m, void *data)
  1125. {
  1126. struct drm_info_node *node = (struct drm_info_node *) m->private;
  1127. struct drm_device *dev = node->minor->dev;
  1128. struct drm_i915_private *dev_priv = dev->dev_private;
  1129. seq_printf(m, "forcewake count = %d\n",
  1130. atomic_read(&dev_priv->forcewake_count));
  1131. return 0;
  1132. }
  1133. static int
  1134. i915_wedged_open(struct inode *inode,
  1135. struct file *filp)
  1136. {
  1137. filp->private_data = inode->i_private;
  1138. return 0;
  1139. }
  1140. static ssize_t
  1141. i915_wedged_read(struct file *filp,
  1142. char __user *ubuf,
  1143. size_t max,
  1144. loff_t *ppos)
  1145. {
  1146. struct drm_device *dev = filp->private_data;
  1147. drm_i915_private_t *dev_priv = dev->dev_private;
  1148. char buf[80];
  1149. int len;
  1150. len = snprintf(buf, sizeof(buf),
  1151. "wedged : %d\n",
  1152. atomic_read(&dev_priv->mm.wedged));
  1153. if (len > sizeof(buf))
  1154. len = sizeof(buf);
  1155. return simple_read_from_buffer(ubuf, max, ppos, buf, len);
  1156. }
  1157. static ssize_t
  1158. i915_wedged_write(struct file *filp,
  1159. const char __user *ubuf,
  1160. size_t cnt,
  1161. loff_t *ppos)
  1162. {
  1163. struct drm_device *dev = filp->private_data;
  1164. char buf[20];
  1165. int val = 1;
  1166. if (cnt > 0) {
  1167. if (cnt > sizeof(buf) - 1)
  1168. return -EINVAL;
  1169. if (copy_from_user(buf, ubuf, cnt))
  1170. return -EFAULT;
  1171. buf[cnt] = 0;
  1172. val = simple_strtoul(buf, NULL, 0);
  1173. }
  1174. DRM_INFO("Manually setting wedged to %d\n", val);
  1175. i915_handle_error(dev, val);
  1176. return cnt;
  1177. }
  1178. static const struct file_operations i915_wedged_fops = {
  1179. .owner = THIS_MODULE,
  1180. .open = i915_wedged_open,
  1181. .read = i915_wedged_read,
  1182. .write = i915_wedged_write,
  1183. .llseek = default_llseek,
  1184. };
  1185. static int
  1186. i915_max_freq_open(struct inode *inode,
  1187. struct file *filp)
  1188. {
  1189. filp->private_data = inode->i_private;
  1190. return 0;
  1191. }
  1192. static ssize_t
  1193. i915_max_freq_read(struct file *filp,
  1194. char __user *ubuf,
  1195. size_t max,
  1196. loff_t *ppos)
  1197. {
  1198. struct drm_device *dev = filp->private_data;
  1199. drm_i915_private_t *dev_priv = dev->dev_private;
  1200. char buf[80];
  1201. int len;
  1202. len = snprintf(buf, sizeof(buf),
  1203. "max freq: %d\n", dev_priv->max_delay * 50);
  1204. if (len > sizeof(buf))
  1205. len = sizeof(buf);
  1206. return simple_read_from_buffer(ubuf, max, ppos, buf, len);
  1207. }
  1208. static ssize_t
  1209. i915_max_freq_write(struct file *filp,
  1210. const char __user *ubuf,
  1211. size_t cnt,
  1212. loff_t *ppos)
  1213. {
  1214. struct drm_device *dev = filp->private_data;
  1215. struct drm_i915_private *dev_priv = dev->dev_private;
  1216. char buf[20];
  1217. int val = 1;
  1218. if (cnt > 0) {
  1219. if (cnt > sizeof(buf) - 1)
  1220. return -EINVAL;
  1221. if (copy_from_user(buf, ubuf, cnt))
  1222. return -EFAULT;
  1223. buf[cnt] = 0;
  1224. val = simple_strtoul(buf, NULL, 0);
  1225. }
  1226. DRM_DEBUG_DRIVER("Manually setting max freq to %d\n", val);
  1227. /*
  1228. * Turbo will still be enabled, but won't go above the set value.
  1229. */
  1230. dev_priv->max_delay = val / 50;
  1231. gen6_set_rps(dev, val / 50);
  1232. return cnt;
  1233. }
  1234. static const struct file_operations i915_max_freq_fops = {
  1235. .owner = THIS_MODULE,
  1236. .open = i915_max_freq_open,
  1237. .read = i915_max_freq_read,
  1238. .write = i915_max_freq_write,
  1239. .llseek = default_llseek,
  1240. };
  1241. static int
  1242. i915_cache_sharing_open(struct inode *inode,
  1243. struct file *filp)
  1244. {
  1245. filp->private_data = inode->i_private;
  1246. return 0;
  1247. }
  1248. static ssize_t
  1249. i915_cache_sharing_read(struct file *filp,
  1250. char __user *ubuf,
  1251. size_t max,
  1252. loff_t *ppos)
  1253. {
  1254. struct drm_device *dev = filp->private_data;
  1255. drm_i915_private_t *dev_priv = dev->dev_private;
  1256. char buf[80];
  1257. u32 snpcr;
  1258. int len;
  1259. mutex_lock(&dev_priv->dev->struct_mutex);
  1260. snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
  1261. mutex_unlock(&dev_priv->dev->struct_mutex);
  1262. len = snprintf(buf, sizeof(buf),
  1263. "%d\n", (snpcr & GEN6_MBC_SNPCR_MASK) >>
  1264. GEN6_MBC_SNPCR_SHIFT);
  1265. if (len > sizeof(buf))
  1266. len = sizeof(buf);
  1267. return simple_read_from_buffer(ubuf, max, ppos, buf, len);
  1268. }
  1269. static ssize_t
  1270. i915_cache_sharing_write(struct file *filp,
  1271. const char __user *ubuf,
  1272. size_t cnt,
  1273. loff_t *ppos)
  1274. {
  1275. struct drm_device *dev = filp->private_data;
  1276. struct drm_i915_private *dev_priv = dev->dev_private;
  1277. char buf[20];
  1278. u32 snpcr;
  1279. int val = 1;
  1280. if (cnt > 0) {
  1281. if (cnt > sizeof(buf) - 1)
  1282. return -EINVAL;
  1283. if (copy_from_user(buf, ubuf, cnt))
  1284. return -EFAULT;
  1285. buf[cnt] = 0;
  1286. val = simple_strtoul(buf, NULL, 0);
  1287. }
  1288. if (val < 0 || val > 3)
  1289. return -EINVAL;
  1290. DRM_DEBUG_DRIVER("Manually setting uncore sharing to %d\n", val);
  1291. /* Update the cache sharing policy here as well */
  1292. snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
  1293. snpcr &= ~GEN6_MBC_SNPCR_MASK;
  1294. snpcr |= (val << GEN6_MBC_SNPCR_SHIFT);
  1295. I915_WRITE(GEN6_MBCUNIT_SNPCR, snpcr);
  1296. return cnt;
  1297. }
  1298. static const struct file_operations i915_cache_sharing_fops = {
  1299. .owner = THIS_MODULE,
  1300. .open = i915_cache_sharing_open,
  1301. .read = i915_cache_sharing_read,
  1302. .write = i915_cache_sharing_write,
  1303. .llseek = default_llseek,
  1304. };
  1305. /* As the drm_debugfs_init() routines are called before dev->dev_private is
  1306. * allocated we need to hook into the minor for release. */
  1307. static int
  1308. drm_add_fake_info_node(struct drm_minor *minor,
  1309. struct dentry *ent,
  1310. const void *key)
  1311. {
  1312. struct drm_info_node *node;
  1313. node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
  1314. if (node == NULL) {
  1315. debugfs_remove(ent);
  1316. return -ENOMEM;
  1317. }
  1318. node->minor = minor;
  1319. node->dent = ent;
  1320. node->info_ent = (void *) key;
  1321. list_add(&node->list, &minor->debugfs_nodes.list);
  1322. return 0;
  1323. }
  1324. static int i915_wedged_create(struct dentry *root, struct drm_minor *minor)
  1325. {
  1326. struct drm_device *dev = minor->dev;
  1327. struct dentry *ent;
  1328. ent = debugfs_create_file("i915_wedged",
  1329. S_IRUGO | S_IWUSR,
  1330. root, dev,
  1331. &i915_wedged_fops);
  1332. if (IS_ERR(ent))
  1333. return PTR_ERR(ent);
  1334. return drm_add_fake_info_node(minor, ent, &i915_wedged_fops);
  1335. }
  1336. static int i915_forcewake_open(struct inode *inode, struct file *file)
  1337. {
  1338. struct drm_device *dev = inode->i_private;
  1339. struct drm_i915_private *dev_priv = dev->dev_private;
  1340. int ret;
  1341. if (!IS_GEN6(dev))
  1342. return 0;
  1343. ret = mutex_lock_interruptible(&dev->struct_mutex);
  1344. if (ret)
  1345. return ret;
  1346. gen6_gt_force_wake_get(dev_priv);
  1347. mutex_unlock(&dev->struct_mutex);
  1348. return 0;
  1349. }
  1350. int i915_forcewake_release(struct inode *inode, struct file *file)
  1351. {
  1352. struct drm_device *dev = inode->i_private;
  1353. struct drm_i915_private *dev_priv = dev->dev_private;
  1354. if (!IS_GEN6(dev))
  1355. return 0;
  1356. /*
  1357. * It's bad that we can potentially hang userspace if struct_mutex gets
  1358. * forever stuck. However, if we cannot acquire this lock it means that
  1359. * almost certainly the driver has hung, is not unload-able. Therefore
  1360. * hanging here is probably a minor inconvenience not to be seen my
  1361. * almost every user.
  1362. */
  1363. mutex_lock(&dev->struct_mutex);
  1364. gen6_gt_force_wake_put(dev_priv);
  1365. mutex_unlock(&dev->struct_mutex);
  1366. return 0;
  1367. }
  1368. static const struct file_operations i915_forcewake_fops = {
  1369. .owner = THIS_MODULE,
  1370. .open = i915_forcewake_open,
  1371. .release = i915_forcewake_release,
  1372. };
  1373. static int i915_forcewake_create(struct dentry *root, struct drm_minor *minor)
  1374. {
  1375. struct drm_device *dev = minor->dev;
  1376. struct dentry *ent;
  1377. ent = debugfs_create_file("i915_forcewake_user",
  1378. S_IRUSR,
  1379. root, dev,
  1380. &i915_forcewake_fops);
  1381. if (IS_ERR(ent))
  1382. return PTR_ERR(ent);
  1383. return drm_add_fake_info_node(minor, ent, &i915_forcewake_fops);
  1384. }
  1385. static int i915_max_freq_create(struct dentry *root, struct drm_minor *minor)
  1386. {
  1387. struct drm_device *dev = minor->dev;
  1388. struct dentry *ent;
  1389. ent = debugfs_create_file("i915_max_freq",
  1390. S_IRUGO | S_IWUSR,
  1391. root, dev,
  1392. &i915_max_freq_fops);
  1393. if (IS_ERR(ent))
  1394. return PTR_ERR(ent);
  1395. return drm_add_fake_info_node(minor, ent, &i915_max_freq_fops);
  1396. }
  1397. static int i915_cache_sharing_create(struct dentry *root, struct drm_minor *minor)
  1398. {
  1399. struct drm_device *dev = minor->dev;
  1400. struct dentry *ent;
  1401. ent = debugfs_create_file("i915_cache_sharing",
  1402. S_IRUGO | S_IWUSR,
  1403. root, dev,
  1404. &i915_cache_sharing_fops);
  1405. if (IS_ERR(ent))
  1406. return PTR_ERR(ent);
  1407. return drm_add_fake_info_node(minor, ent, &i915_cache_sharing_fops);
  1408. }
  1409. static struct drm_info_list i915_debugfs_list[] = {
  1410. {"i915_capabilities", i915_capabilities, 0},
  1411. {"i915_gem_objects", i915_gem_object_info, 0},
  1412. {"i915_gem_gtt", i915_gem_gtt_info, 0},
  1413. {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
  1414. {"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST},
  1415. {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
  1416. {"i915_gem_pinned", i915_gem_object_list_info, 0, (void *) PINNED_LIST},
  1417. {"i915_gem_deferred_free", i915_gem_object_list_info, 0, (void *) DEFERRED_FREE_LIST},
  1418. {"i915_gem_pageflip", i915_gem_pageflip_info, 0},
  1419. {"i915_gem_request", i915_gem_request_info, 0},
  1420. {"i915_gem_seqno", i915_gem_seqno_info, 0},
  1421. {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
  1422. {"i915_gem_interrupt", i915_interrupt_info, 0},
  1423. {"i915_gem_hws", i915_hws_info, 0, (void *)RCS},
  1424. {"i915_gem_hws_blt", i915_hws_info, 0, (void *)BCS},
  1425. {"i915_gem_hws_bsd", i915_hws_info, 0, (void *)VCS},
  1426. {"i915_ringbuffer_data", i915_ringbuffer_data, 0, (void *)RCS},
  1427. {"i915_ringbuffer_info", i915_ringbuffer_info, 0, (void *)RCS},
  1428. {"i915_bsd_ringbuffer_data", i915_ringbuffer_data, 0, (void *)VCS},
  1429. {"i915_bsd_ringbuffer_info", i915_ringbuffer_info, 0, (void *)VCS},
  1430. {"i915_blt_ringbuffer_data", i915_ringbuffer_data, 0, (void *)BCS},
  1431. {"i915_blt_ringbuffer_info", i915_ringbuffer_info, 0, (void *)BCS},
  1432. {"i915_batchbuffers", i915_batchbuffer_info, 0},
  1433. {"i915_error_state", i915_error_state, 0},
  1434. {"i915_rstdby_delays", i915_rstdby_delays, 0},
  1435. {"i915_cur_delayinfo", i915_cur_delayinfo, 0},
  1436. {"i915_delayfreq_table", i915_delayfreq_table, 0},
  1437. {"i915_inttoext_table", i915_inttoext_table, 0},
  1438. {"i915_drpc_info", i915_drpc_info, 0},
  1439. {"i915_emon_status", i915_emon_status, 0},
  1440. {"i915_ring_freq_table", i915_ring_freq_table, 0},
  1441. {"i915_gfxec", i915_gfxec, 0},
  1442. {"i915_fbc_status", i915_fbc_status, 0},
  1443. {"i915_sr_status", i915_sr_status, 0},
  1444. {"i915_opregion", i915_opregion, 0},
  1445. {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
  1446. {"i915_context_status", i915_context_status, 0},
  1447. {"i915_gen6_forcewake_count", i915_gen6_forcewake_count_info, 0},
  1448. };
  1449. #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
  1450. int i915_debugfs_init(struct drm_minor *minor)
  1451. {
  1452. int ret;
  1453. ret = i915_wedged_create(minor->debugfs_root, minor);
  1454. if (ret)
  1455. return ret;
  1456. ret = i915_forcewake_create(minor->debugfs_root, minor);
  1457. if (ret)
  1458. return ret;
  1459. ret = i915_max_freq_create(minor->debugfs_root, minor);
  1460. if (ret)
  1461. return ret;
  1462. ret = i915_cache_sharing_create(minor->debugfs_root, minor);
  1463. if (ret)
  1464. return ret;
  1465. return drm_debugfs_create_files(i915_debugfs_list,
  1466. I915_DEBUGFS_ENTRIES,
  1467. minor->debugfs_root, minor);
  1468. }
  1469. void i915_debugfs_cleanup(struct drm_minor *minor)
  1470. {
  1471. drm_debugfs_remove_files(i915_debugfs_list,
  1472. I915_DEBUGFS_ENTRIES, minor);
  1473. drm_debugfs_remove_files((struct drm_info_list *) &i915_forcewake_fops,
  1474. 1, minor);
  1475. drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
  1476. 1, minor);
  1477. drm_debugfs_remove_files((struct drm_info_list *) &i915_max_freq_fops,
  1478. 1, minor);
  1479. drm_debugfs_remove_files((struct drm_info_list *) &i915_cache_sharing_fops,
  1480. 1, minor);
  1481. }
  1482. #endif /* CONFIG_DEBUG_FS */