nouveau_drm.c 19 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776
  1. /*
  2. * Copyright 2012 Red Hat Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Ben Skeggs
  23. */
  24. #include <linux/console.h>
  25. #include <linux/module.h>
  26. #include <linux/pci.h>
  27. #include <core/device.h>
  28. #include <core/client.h>
  29. #include <core/gpuobj.h>
  30. #include <core/class.h>
  31. #include <subdev/device.h>
  32. #include <subdev/vm.h>
  33. #include <engine/disp.h>
  34. #include "nouveau_drm.h"
  35. #include "nouveau_irq.h"
  36. #include "nouveau_dma.h"
  37. #include "nouveau_ttm.h"
  38. #include "nouveau_gem.h"
  39. #include "nouveau_agp.h"
  40. #include "nouveau_vga.h"
  41. #include "nouveau_pm.h"
  42. #include "nouveau_acpi.h"
  43. #include "nouveau_bios.h"
  44. #include "nouveau_ioctl.h"
  45. #include "nouveau_abi16.h"
  46. #include "nouveau_fbcon.h"
  47. #include "nouveau_fence.h"
  48. MODULE_PARM_DESC(config, "option string to pass to driver core");
  49. static char *nouveau_config;
  50. module_param_named(config, nouveau_config, charp, 0400);
  51. MODULE_PARM_DESC(debug, "debug string to pass to driver core");
  52. static char *nouveau_debug;
  53. module_param_named(debug, nouveau_debug, charp, 0400);
  54. MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
  55. static int nouveau_noaccel = 0;
  56. module_param_named(noaccel, nouveau_noaccel, int, 0400);
  57. MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
  58. "0 = disabled, 1 = enabled, 2 = headless)");
  59. int nouveau_modeset = -1;
  60. module_param_named(modeset, nouveau_modeset, int, 0400);
  61. static struct drm_driver driver;
  62. static int
  63. nouveau_drm_vblank_enable(struct drm_device *dev, int head)
  64. {
  65. struct nouveau_drm *drm = nouveau_drm(dev);
  66. struct nouveau_disp *pdisp = nouveau_disp(drm->device);
  67. nouveau_event_get(pdisp->vblank, head, &drm->vblank);
  68. return 0;
  69. }
  70. static void
  71. nouveau_drm_vblank_disable(struct drm_device *dev, int head)
  72. {
  73. struct nouveau_drm *drm = nouveau_drm(dev);
  74. struct nouveau_disp *pdisp = nouveau_disp(drm->device);
  75. nouveau_event_put(pdisp->vblank, head, &drm->vblank);
  76. }
  77. static int
  78. nouveau_drm_vblank_handler(struct nouveau_eventh *event, int head)
  79. {
  80. struct nouveau_drm *drm =
  81. container_of(event, struct nouveau_drm, vblank);
  82. drm_handle_vblank(drm->dev, head);
  83. return NVKM_EVENT_KEEP;
  84. }
  85. static u64
  86. nouveau_name(struct pci_dev *pdev)
  87. {
  88. u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
  89. name |= pdev->bus->number << 16;
  90. name |= PCI_SLOT(pdev->devfn) << 8;
  91. return name | PCI_FUNC(pdev->devfn);
  92. }
  93. static int
  94. nouveau_cli_create(struct pci_dev *pdev, const char *name,
  95. int size, void **pcli)
  96. {
  97. struct nouveau_cli *cli;
  98. int ret;
  99. *pcli = NULL;
  100. ret = nouveau_client_create_(name, nouveau_name(pdev), nouveau_config,
  101. nouveau_debug, size, pcli);
  102. cli = *pcli;
  103. if (ret) {
  104. if (cli)
  105. nouveau_client_destroy(&cli->base);
  106. *pcli = NULL;
  107. return ret;
  108. }
  109. mutex_init(&cli->mutex);
  110. return 0;
  111. }
  112. static void
  113. nouveau_cli_destroy(struct nouveau_cli *cli)
  114. {
  115. struct nouveau_object *client = nv_object(cli);
  116. nouveau_vm_ref(NULL, &cli->base.vm, NULL);
  117. nouveau_client_fini(&cli->base, false);
  118. atomic_set(&client->refcount, 1);
  119. nouveau_object_ref(NULL, &client);
  120. }
  121. static void
  122. nouveau_accel_fini(struct nouveau_drm *drm)
  123. {
  124. nouveau_gpuobj_ref(NULL, &drm->notify);
  125. nouveau_channel_del(&drm->channel);
  126. nouveau_channel_del(&drm->cechan);
  127. if (drm->fence)
  128. nouveau_fence(drm)->dtor(drm);
  129. }
  130. static void
  131. nouveau_accel_init(struct nouveau_drm *drm)
  132. {
  133. struct nouveau_device *device = nv_device(drm->device);
  134. struct nouveau_object *object;
  135. u32 arg0, arg1;
  136. int ret;
  137. if (nouveau_noaccel)
  138. return;
  139. /* initialise synchronisation routines */
  140. if (device->card_type < NV_10) ret = nv04_fence_create(drm);
  141. else if (device->chipset < 0x17) ret = nv10_fence_create(drm);
  142. else if (device->card_type < NV_50) ret = nv17_fence_create(drm);
  143. else if (device->chipset < 0x84) ret = nv50_fence_create(drm);
  144. else if (device->card_type < NV_C0) ret = nv84_fence_create(drm);
  145. else ret = nvc0_fence_create(drm);
  146. if (ret) {
  147. NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
  148. nouveau_accel_fini(drm);
  149. return;
  150. }
  151. if (device->card_type >= NV_E0) {
  152. ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE,
  153. NVDRM_CHAN + 1,
  154. NVE0_CHANNEL_IND_ENGINE_CE0 |
  155. NVE0_CHANNEL_IND_ENGINE_CE1, 0,
  156. &drm->cechan);
  157. if (ret)
  158. NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
  159. arg0 = NVE0_CHANNEL_IND_ENGINE_GR;
  160. arg1 = 1;
  161. } else {
  162. arg0 = NvDmaFB;
  163. arg1 = NvDmaTT;
  164. }
  165. ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE, NVDRM_CHAN,
  166. arg0, arg1, &drm->channel);
  167. if (ret) {
  168. NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
  169. nouveau_accel_fini(drm);
  170. return;
  171. }
  172. if (device->card_type < NV_C0) {
  173. ret = nouveau_gpuobj_new(drm->device, NULL, 32, 0, 0,
  174. &drm->notify);
  175. if (ret) {
  176. NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
  177. nouveau_accel_fini(drm);
  178. return;
  179. }
  180. ret = nouveau_object_new(nv_object(drm),
  181. drm->channel->handle, NvNotify0,
  182. 0x003d, &(struct nv_dma_class) {
  183. .flags = NV_DMA_TARGET_VRAM |
  184. NV_DMA_ACCESS_RDWR,
  185. .start = drm->notify->addr,
  186. .limit = drm->notify->addr + 31
  187. }, sizeof(struct nv_dma_class),
  188. &object);
  189. if (ret) {
  190. nouveau_accel_fini(drm);
  191. return;
  192. }
  193. }
  194. nouveau_bo_move_init(drm);
  195. }
  196. static int nouveau_drm_probe(struct pci_dev *pdev,
  197. const struct pci_device_id *pent)
  198. {
  199. struct nouveau_device *device;
  200. struct apertures_struct *aper;
  201. bool boot = false;
  202. int ret;
  203. /* remove conflicting drivers (vesafb, efifb etc) */
  204. aper = alloc_apertures(3);
  205. if (!aper)
  206. return -ENOMEM;
  207. aper->ranges[0].base = pci_resource_start(pdev, 1);
  208. aper->ranges[0].size = pci_resource_len(pdev, 1);
  209. aper->count = 1;
  210. if (pci_resource_len(pdev, 2)) {
  211. aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
  212. aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
  213. aper->count++;
  214. }
  215. if (pci_resource_len(pdev, 3)) {
  216. aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
  217. aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
  218. aper->count++;
  219. }
  220. #ifdef CONFIG_X86
  221. boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
  222. #endif
  223. remove_conflicting_framebuffers(aper, "nouveaufb", boot);
  224. kfree(aper);
  225. ret = nouveau_device_create(pdev, nouveau_name(pdev), pci_name(pdev),
  226. nouveau_config, nouveau_debug, &device);
  227. if (ret)
  228. return ret;
  229. pci_set_master(pdev);
  230. ret = drm_get_pci_dev(pdev, pent, &driver);
  231. if (ret) {
  232. nouveau_object_ref(NULL, (struct nouveau_object **)&device);
  233. return ret;
  234. }
  235. return 0;
  236. }
  237. static int
  238. nouveau_drm_load(struct drm_device *dev, unsigned long flags)
  239. {
  240. struct pci_dev *pdev = dev->pdev;
  241. struct nouveau_device *device;
  242. struct nouveau_drm *drm;
  243. int ret;
  244. ret = nouveau_cli_create(pdev, "DRM", sizeof(*drm), (void**)&drm);
  245. if (ret)
  246. return ret;
  247. dev->dev_private = drm;
  248. drm->dev = dev;
  249. drm->vblank.func = nouveau_drm_vblank_handler;
  250. INIT_LIST_HEAD(&drm->clients);
  251. spin_lock_init(&drm->tile.lock);
  252. /* make sure AGP controller is in a consistent state before we
  253. * (possibly) execute vbios init tables (see nouveau_agp.h)
  254. */
  255. if (drm_pci_device_is_agp(dev) && dev->agp) {
  256. /* dummy device object, doesn't init anything, but allows
  257. * agp code access to registers
  258. */
  259. ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT,
  260. NVDRM_DEVICE, 0x0080,
  261. &(struct nv_device_class) {
  262. .device = ~0,
  263. .disable =
  264. ~(NV_DEVICE_DISABLE_MMIO |
  265. NV_DEVICE_DISABLE_IDENTIFY),
  266. .debug0 = ~0,
  267. }, sizeof(struct nv_device_class),
  268. &drm->device);
  269. if (ret)
  270. goto fail_device;
  271. nouveau_agp_reset(drm);
  272. nouveau_object_del(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE);
  273. }
  274. ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE,
  275. 0x0080, &(struct nv_device_class) {
  276. .device = ~0,
  277. .disable = 0,
  278. .debug0 = 0,
  279. }, sizeof(struct nv_device_class),
  280. &drm->device);
  281. if (ret)
  282. goto fail_device;
  283. /* workaround an odd issue on nvc1 by disabling the device's
  284. * nosnoop capability. hopefully won't cause issues until a
  285. * better fix is found - assuming there is one...
  286. */
  287. device = nv_device(drm->device);
  288. if (nv_device(drm->device)->chipset == 0xc1)
  289. nv_mask(device, 0x00088080, 0x00000800, 0x00000000);
  290. nouveau_vga_init(drm);
  291. nouveau_agp_init(drm);
  292. if (device->card_type >= NV_50) {
  293. ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
  294. 0x1000, &drm->client.base.vm);
  295. if (ret)
  296. goto fail_device;
  297. }
  298. ret = nouveau_ttm_init(drm);
  299. if (ret)
  300. goto fail_ttm;
  301. ret = nouveau_bios_init(dev);
  302. if (ret)
  303. goto fail_bios;
  304. ret = nouveau_irq_init(dev);
  305. if (ret)
  306. goto fail_irq;
  307. ret = nouveau_display_create(dev);
  308. if (ret)
  309. goto fail_dispctor;
  310. if (dev->mode_config.num_crtc) {
  311. ret = nouveau_display_init(dev);
  312. if (ret)
  313. goto fail_dispinit;
  314. }
  315. nouveau_pm_init(dev);
  316. nouveau_accel_init(drm);
  317. nouveau_fbcon_init(dev);
  318. return 0;
  319. fail_dispinit:
  320. nouveau_display_destroy(dev);
  321. fail_dispctor:
  322. nouveau_irq_fini(dev);
  323. fail_irq:
  324. nouveau_bios_takedown(dev);
  325. fail_bios:
  326. nouveau_ttm_fini(drm);
  327. fail_ttm:
  328. nouveau_agp_fini(drm);
  329. nouveau_vga_fini(drm);
  330. fail_device:
  331. nouveau_cli_destroy(&drm->client);
  332. return ret;
  333. }
  334. static int
  335. nouveau_drm_unload(struct drm_device *dev)
  336. {
  337. struct nouveau_drm *drm = nouveau_drm(dev);
  338. nouveau_fbcon_fini(dev);
  339. nouveau_accel_fini(drm);
  340. nouveau_pm_fini(dev);
  341. if (dev->mode_config.num_crtc)
  342. nouveau_display_fini(dev);
  343. nouveau_display_destroy(dev);
  344. nouveau_irq_fini(dev);
  345. nouveau_bios_takedown(dev);
  346. nouveau_ttm_fini(drm);
  347. nouveau_agp_fini(drm);
  348. nouveau_vga_fini(drm);
  349. nouveau_cli_destroy(&drm->client);
  350. return 0;
  351. }
  352. static void
  353. nouveau_drm_remove(struct pci_dev *pdev)
  354. {
  355. struct drm_device *dev = pci_get_drvdata(pdev);
  356. struct nouveau_drm *drm = nouveau_drm(dev);
  357. struct nouveau_object *device;
  358. device = drm->client.base.device;
  359. drm_put_dev(dev);
  360. nouveau_object_ref(NULL, &device);
  361. nouveau_object_debug();
  362. }
  363. static int
  364. nouveau_do_suspend(struct drm_device *dev)
  365. {
  366. struct nouveau_drm *drm = nouveau_drm(dev);
  367. struct nouveau_cli *cli;
  368. int ret;
  369. if (dev->mode_config.num_crtc) {
  370. NV_INFO(drm, "suspending fbcon...\n");
  371. nouveau_fbcon_set_suspend(dev, 1);
  372. NV_INFO(drm, "suspending display...\n");
  373. ret = nouveau_display_suspend(dev);
  374. if (ret)
  375. return ret;
  376. }
  377. NV_INFO(drm, "evicting buffers...\n");
  378. ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
  379. if (drm->fence && nouveau_fence(drm)->suspend) {
  380. if (!nouveau_fence(drm)->suspend(drm))
  381. return -ENOMEM;
  382. }
  383. NV_INFO(drm, "suspending client object trees...\n");
  384. list_for_each_entry(cli, &drm->clients, head) {
  385. ret = nouveau_client_fini(&cli->base, true);
  386. if (ret)
  387. goto fail_client;
  388. }
  389. ret = nouveau_client_fini(&drm->client.base, true);
  390. if (ret)
  391. goto fail_client;
  392. nouveau_agp_fini(drm);
  393. return 0;
  394. fail_client:
  395. list_for_each_entry_continue_reverse(cli, &drm->clients, head) {
  396. nouveau_client_init(&cli->base);
  397. }
  398. if (dev->mode_config.num_crtc) {
  399. NV_INFO(drm, "resuming display...\n");
  400. nouveau_display_resume(dev);
  401. }
  402. return ret;
  403. }
  404. int nouveau_pmops_suspend(struct device *dev)
  405. {
  406. struct pci_dev *pdev = to_pci_dev(dev);
  407. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  408. int ret;
  409. if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF)
  410. return 0;
  411. ret = nouveau_do_suspend(drm_dev);
  412. if (ret)
  413. return ret;
  414. pci_save_state(pdev);
  415. pci_disable_device(pdev);
  416. pci_set_power_state(pdev, PCI_D3hot);
  417. return 0;
  418. }
  419. static int
  420. nouveau_do_resume(struct drm_device *dev)
  421. {
  422. struct nouveau_drm *drm = nouveau_drm(dev);
  423. struct nouveau_cli *cli;
  424. NV_INFO(drm, "re-enabling device...\n");
  425. nouveau_agp_reset(drm);
  426. NV_INFO(drm, "resuming client object trees...\n");
  427. nouveau_client_init(&drm->client.base);
  428. nouveau_agp_init(drm);
  429. list_for_each_entry(cli, &drm->clients, head) {
  430. nouveau_client_init(&cli->base);
  431. }
  432. if (drm->fence && nouveau_fence(drm)->resume)
  433. nouveau_fence(drm)->resume(drm);
  434. nouveau_run_vbios_init(dev);
  435. nouveau_irq_postinstall(dev);
  436. nouveau_pm_resume(dev);
  437. if (dev->mode_config.num_crtc) {
  438. NV_INFO(drm, "resuming display...\n");
  439. nouveau_display_resume(dev);
  440. }
  441. return 0;
  442. }
  443. int nouveau_pmops_resume(struct device *dev)
  444. {
  445. struct pci_dev *pdev = to_pci_dev(dev);
  446. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  447. int ret;
  448. if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF)
  449. return 0;
  450. pci_set_power_state(pdev, PCI_D0);
  451. pci_restore_state(pdev);
  452. ret = pci_enable_device(pdev);
  453. if (ret)
  454. return ret;
  455. pci_set_master(pdev);
  456. return nouveau_do_resume(drm_dev);
  457. }
  458. static int nouveau_pmops_freeze(struct device *dev)
  459. {
  460. struct pci_dev *pdev = to_pci_dev(dev);
  461. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  462. return nouveau_do_suspend(drm_dev);
  463. }
  464. static int nouveau_pmops_thaw(struct device *dev)
  465. {
  466. struct pci_dev *pdev = to_pci_dev(dev);
  467. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  468. return nouveau_do_resume(drm_dev);
  469. }
  470. static int
  471. nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
  472. {
  473. struct pci_dev *pdev = dev->pdev;
  474. struct nouveau_drm *drm = nouveau_drm(dev);
  475. struct nouveau_cli *cli;
  476. char name[32], tmpname[TASK_COMM_LEN];
  477. int ret;
  478. get_task_comm(tmpname, current);
  479. snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
  480. ret = nouveau_cli_create(pdev, name, sizeof(*cli), (void **)&cli);
  481. if (ret)
  482. return ret;
  483. if (nv_device(drm->device)->card_type >= NV_50) {
  484. ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
  485. 0x1000, &cli->base.vm);
  486. if (ret) {
  487. nouveau_cli_destroy(cli);
  488. return ret;
  489. }
  490. }
  491. fpriv->driver_priv = cli;
  492. mutex_lock(&drm->client.mutex);
  493. list_add(&cli->head, &drm->clients);
  494. mutex_unlock(&drm->client.mutex);
  495. return 0;
  496. }
  497. static void
  498. nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv)
  499. {
  500. struct nouveau_cli *cli = nouveau_cli(fpriv);
  501. struct nouveau_drm *drm = nouveau_drm(dev);
  502. if (cli->abi16)
  503. nouveau_abi16_fini(cli->abi16);
  504. mutex_lock(&drm->client.mutex);
  505. list_del(&cli->head);
  506. mutex_unlock(&drm->client.mutex);
  507. }
  508. static void
  509. nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
  510. {
  511. struct nouveau_cli *cli = nouveau_cli(fpriv);
  512. nouveau_cli_destroy(cli);
  513. }
  514. static struct drm_ioctl_desc
  515. nouveau_ioctls[] = {
  516. DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH),
  517. DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
  518. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED|DRM_AUTH),
  519. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED|DRM_AUTH),
  520. DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED|DRM_AUTH),
  521. DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED|DRM_AUTH),
  522. DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED|DRM_AUTH),
  523. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED|DRM_AUTH),
  524. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED|DRM_AUTH),
  525. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED|DRM_AUTH),
  526. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED|DRM_AUTH),
  527. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED|DRM_AUTH),
  528. };
  529. static const struct file_operations
  530. nouveau_driver_fops = {
  531. .owner = THIS_MODULE,
  532. .open = drm_open,
  533. .release = drm_release,
  534. .unlocked_ioctl = drm_ioctl,
  535. .mmap = nouveau_ttm_mmap,
  536. .poll = drm_poll,
  537. .fasync = drm_fasync,
  538. .read = drm_read,
  539. #if defined(CONFIG_COMPAT)
  540. .compat_ioctl = nouveau_compat_ioctl,
  541. #endif
  542. .llseek = noop_llseek,
  543. };
  544. static struct drm_driver
  545. driver = {
  546. .driver_features =
  547. DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
  548. DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
  549. DRIVER_MODESET | DRIVER_PRIME,
  550. .load = nouveau_drm_load,
  551. .unload = nouveau_drm_unload,
  552. .open = nouveau_drm_open,
  553. .preclose = nouveau_drm_preclose,
  554. .postclose = nouveau_drm_postclose,
  555. .lastclose = nouveau_vga_lastclose,
  556. .irq_preinstall = nouveau_irq_preinstall,
  557. .irq_postinstall = nouveau_irq_postinstall,
  558. .irq_uninstall = nouveau_irq_uninstall,
  559. .irq_handler = nouveau_irq_handler,
  560. .get_vblank_counter = drm_vblank_count,
  561. .enable_vblank = nouveau_drm_vblank_enable,
  562. .disable_vblank = nouveau_drm_vblank_disable,
  563. .ioctls = nouveau_ioctls,
  564. .fops = &nouveau_driver_fops,
  565. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  566. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  567. .gem_prime_export = nouveau_gem_prime_export,
  568. .gem_prime_import = nouveau_gem_prime_import,
  569. .gem_init_object = nouveau_gem_object_new,
  570. .gem_free_object = nouveau_gem_object_del,
  571. .gem_open_object = nouveau_gem_object_open,
  572. .gem_close_object = nouveau_gem_object_close,
  573. .dumb_create = nouveau_display_dumb_create,
  574. .dumb_map_offset = nouveau_display_dumb_map_offset,
  575. .dumb_destroy = nouveau_display_dumb_destroy,
  576. .name = DRIVER_NAME,
  577. .desc = DRIVER_DESC,
  578. #ifdef GIT_REVISION
  579. .date = GIT_REVISION,
  580. #else
  581. .date = DRIVER_DATE,
  582. #endif
  583. .major = DRIVER_MAJOR,
  584. .minor = DRIVER_MINOR,
  585. .patchlevel = DRIVER_PATCHLEVEL,
  586. };
  587. static struct pci_device_id
  588. nouveau_drm_pci_table[] = {
  589. {
  590. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
  591. .class = PCI_BASE_CLASS_DISPLAY << 16,
  592. .class_mask = 0xff << 16,
  593. },
  594. {
  595. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
  596. .class = PCI_BASE_CLASS_DISPLAY << 16,
  597. .class_mask = 0xff << 16,
  598. },
  599. {}
  600. };
  601. static const struct dev_pm_ops nouveau_pm_ops = {
  602. .suspend = nouveau_pmops_suspend,
  603. .resume = nouveau_pmops_resume,
  604. .freeze = nouveau_pmops_freeze,
  605. .thaw = nouveau_pmops_thaw,
  606. .poweroff = nouveau_pmops_freeze,
  607. .restore = nouveau_pmops_resume,
  608. };
  609. static struct pci_driver
  610. nouveau_drm_pci_driver = {
  611. .name = "nouveau",
  612. .id_table = nouveau_drm_pci_table,
  613. .probe = nouveau_drm_probe,
  614. .remove = nouveau_drm_remove,
  615. .driver.pm = &nouveau_pm_ops,
  616. };
  617. static int __init
  618. nouveau_drm_init(void)
  619. {
  620. driver.num_ioctls = ARRAY_SIZE(nouveau_ioctls);
  621. if (nouveau_modeset == -1) {
  622. #ifdef CONFIG_VGA_CONSOLE
  623. if (vgacon_text_force())
  624. nouveau_modeset = 0;
  625. #endif
  626. }
  627. if (!nouveau_modeset)
  628. return 0;
  629. nouveau_register_dsm_handler();
  630. return drm_pci_init(&driver, &nouveau_drm_pci_driver);
  631. }
  632. static void __exit
  633. nouveau_drm_exit(void)
  634. {
  635. if (!nouveau_modeset)
  636. return;
  637. drm_pci_exit(&driver, &nouveau_drm_pci_driver);
  638. nouveau_unregister_dsm_handler();
  639. }
  640. module_init(nouveau_drm_init);
  641. module_exit(nouveau_drm_exit);
  642. MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
  643. MODULE_AUTHOR(DRIVER_AUTHOR);
  644. MODULE_DESCRIPTION(DRIVER_DESC);
  645. MODULE_LICENSE("GPL and additional rights");