cx88-dvb.c 37 KB

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  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * MPEG Transport Stream (DVB) routines
  5. *
  6. * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
  7. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/device.h>
  26. #include <linux/fs.h>
  27. #include <linux/kthread.h>
  28. #include <linux/file.h>
  29. #include <linux/suspend.h>
  30. #include "cx88.h"
  31. #include "dvb-pll.h"
  32. #include <media/v4l2-common.h>
  33. #include "mt352.h"
  34. #include "mt352_priv.h"
  35. #include "cx88-vp3054-i2c.h"
  36. #include "zl10353.h"
  37. #include "cx22702.h"
  38. #include "or51132.h"
  39. #include "lgdt330x.h"
  40. #include "s5h1409.h"
  41. #include "xc5000.h"
  42. #include "nxt200x.h"
  43. #include "cx24123.h"
  44. #include "isl6421.h"
  45. #include "tuner-simple.h"
  46. #include "tda9887.h"
  47. #include "s5h1411.h"
  48. #include "stv0299.h"
  49. #include "z0194a.h"
  50. #include "stv0288.h"
  51. #include "stb6000.h"
  52. #include "cx24116.h"
  53. MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
  54. MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
  55. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  56. MODULE_LICENSE("GPL");
  57. static unsigned int debug;
  58. module_param(debug, int, 0644);
  59. MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
  60. DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  61. #define dprintk(level,fmt, arg...) if (debug >= level) \
  62. printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
  63. /* ------------------------------------------------------------------ */
  64. static int dvb_buf_setup(struct videobuf_queue *q,
  65. unsigned int *count, unsigned int *size)
  66. {
  67. struct cx8802_dev *dev = q->priv_data;
  68. dev->ts_packet_size = 188 * 4;
  69. dev->ts_packet_count = 32;
  70. *size = dev->ts_packet_size * dev->ts_packet_count;
  71. *count = 32;
  72. return 0;
  73. }
  74. static int dvb_buf_prepare(struct videobuf_queue *q,
  75. struct videobuf_buffer *vb, enum v4l2_field field)
  76. {
  77. struct cx8802_dev *dev = q->priv_data;
  78. return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
  79. }
  80. static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  81. {
  82. struct cx8802_dev *dev = q->priv_data;
  83. cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
  84. }
  85. static void dvb_buf_release(struct videobuf_queue *q,
  86. struct videobuf_buffer *vb)
  87. {
  88. cx88_free_buffer(q, (struct cx88_buffer*)vb);
  89. }
  90. static struct videobuf_queue_ops dvb_qops = {
  91. .buf_setup = dvb_buf_setup,
  92. .buf_prepare = dvb_buf_prepare,
  93. .buf_queue = dvb_buf_queue,
  94. .buf_release = dvb_buf_release,
  95. };
  96. /* ------------------------------------------------------------------ */
  97. static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
  98. {
  99. struct cx8802_dev *dev= fe->dvb->priv;
  100. struct cx8802_driver *drv = NULL;
  101. int ret = 0;
  102. int fe_id;
  103. fe_id = videobuf_dvb_find_frontend(&dev->frontends, fe);
  104. if (!fe_id) {
  105. printk(KERN_ERR "%s() No frontend found\n", __func__);
  106. return -EINVAL;
  107. }
  108. drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
  109. if (drv) {
  110. if (acquire){
  111. dev->frontends.active_fe_id = fe_id;
  112. ret = drv->request_acquire(drv);
  113. } else {
  114. ret = drv->request_release(drv);
  115. dev->frontends.active_fe_id = 0;
  116. }
  117. }
  118. return ret;
  119. }
  120. /* ------------------------------------------------------------------ */
  121. static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
  122. {
  123. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
  124. static u8 reset [] = { RESET, 0x80 };
  125. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  126. static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
  127. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  128. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  129. mt352_write(fe, clock_config, sizeof(clock_config));
  130. udelay(200);
  131. mt352_write(fe, reset, sizeof(reset));
  132. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  133. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  134. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  135. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  136. return 0;
  137. }
  138. static int dvico_dual_demod_init(struct dvb_frontend *fe)
  139. {
  140. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
  141. static u8 reset [] = { RESET, 0x80 };
  142. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  143. static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
  144. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  145. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  146. mt352_write(fe, clock_config, sizeof(clock_config));
  147. udelay(200);
  148. mt352_write(fe, reset, sizeof(reset));
  149. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  150. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  151. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  152. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  153. return 0;
  154. }
  155. static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
  156. {
  157. static u8 clock_config [] = { 0x89, 0x38, 0x39 };
  158. static u8 reset [] = { 0x50, 0x80 };
  159. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  160. static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
  161. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  162. static u8 dntv_extra[] = { 0xB5, 0x7A };
  163. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  164. mt352_write(fe, clock_config, sizeof(clock_config));
  165. udelay(2000);
  166. mt352_write(fe, reset, sizeof(reset));
  167. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  168. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  169. udelay(2000);
  170. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  171. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  172. return 0;
  173. }
  174. static struct mt352_config dvico_fusionhdtv = {
  175. .demod_address = 0x0f,
  176. .demod_init = dvico_fusionhdtv_demod_init,
  177. };
  178. static struct mt352_config dntv_live_dvbt_config = {
  179. .demod_address = 0x0f,
  180. .demod_init = dntv_live_dvbt_demod_init,
  181. };
  182. static struct mt352_config dvico_fusionhdtv_dual = {
  183. .demod_address = 0x0f,
  184. .demod_init = dvico_dual_demod_init,
  185. };
  186. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  187. static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
  188. {
  189. static u8 clock_config [] = { 0x89, 0x38, 0x38 };
  190. static u8 reset [] = { 0x50, 0x80 };
  191. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  192. static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
  193. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  194. static u8 dntv_extra[] = { 0xB5, 0x7A };
  195. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  196. mt352_write(fe, clock_config, sizeof(clock_config));
  197. udelay(2000);
  198. mt352_write(fe, reset, sizeof(reset));
  199. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  200. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  201. udelay(2000);
  202. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  203. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  204. return 0;
  205. }
  206. static struct mt352_config dntv_live_dvbt_pro_config = {
  207. .demod_address = 0x0f,
  208. .no_tuner = 1,
  209. .demod_init = dntv_live_dvbt_pro_demod_init,
  210. };
  211. #endif
  212. static struct zl10353_config dvico_fusionhdtv_hybrid = {
  213. .demod_address = 0x0f,
  214. .no_tuner = 1,
  215. };
  216. static struct zl10353_config dvico_fusionhdtv_xc3028 = {
  217. .demod_address = 0x0f,
  218. .if2 = 45600,
  219. .no_tuner = 1,
  220. };
  221. static struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
  222. .demod_address = 0x0f,
  223. .if2 = 4560,
  224. .no_tuner = 1,
  225. .demod_init = dvico_fusionhdtv_demod_init,
  226. };
  227. static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
  228. .demod_address = 0x0f,
  229. };
  230. static struct cx22702_config connexant_refboard_config = {
  231. .demod_address = 0x43,
  232. .output_mode = CX22702_SERIAL_OUTPUT,
  233. };
  234. static struct cx22702_config hauppauge_hvr_config = {
  235. .demod_address = 0x63,
  236. .output_mode = CX22702_SERIAL_OUTPUT,
  237. };
  238. static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  239. {
  240. struct cx8802_dev *dev= fe->dvb->priv;
  241. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  242. return 0;
  243. }
  244. static struct or51132_config pchdtv_hd3000 = {
  245. .demod_address = 0x15,
  246. .set_ts_params = or51132_set_ts_param,
  247. };
  248. static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
  249. {
  250. struct cx8802_dev *dev= fe->dvb->priv;
  251. struct cx88_core *core = dev->core;
  252. dprintk(1, "%s: index = %d\n", __func__, index);
  253. if (index == 0)
  254. cx_clear(MO_GP0_IO, 8);
  255. else
  256. cx_set(MO_GP0_IO, 8);
  257. return 0;
  258. }
  259. static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  260. {
  261. struct cx8802_dev *dev= fe->dvb->priv;
  262. if (is_punctured)
  263. dev->ts_gen_cntrl |= 0x04;
  264. else
  265. dev->ts_gen_cntrl &= ~0x04;
  266. return 0;
  267. }
  268. static struct lgdt330x_config fusionhdtv_3_gold = {
  269. .demod_address = 0x0e,
  270. .demod_chip = LGDT3302,
  271. .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
  272. .set_ts_params = lgdt330x_set_ts_param,
  273. };
  274. static struct lgdt330x_config fusionhdtv_5_gold = {
  275. .demod_address = 0x0e,
  276. .demod_chip = LGDT3303,
  277. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  278. .set_ts_params = lgdt330x_set_ts_param,
  279. };
  280. static struct lgdt330x_config pchdtv_hd5500 = {
  281. .demod_address = 0x59,
  282. .demod_chip = LGDT3303,
  283. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  284. .set_ts_params = lgdt330x_set_ts_param,
  285. };
  286. static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  287. {
  288. struct cx8802_dev *dev= fe->dvb->priv;
  289. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  290. return 0;
  291. }
  292. static struct nxt200x_config ati_hdtvwonder = {
  293. .demod_address = 0x0a,
  294. .set_ts_params = nxt200x_set_ts_param,
  295. };
  296. static int cx24123_set_ts_param(struct dvb_frontend* fe,
  297. int is_punctured)
  298. {
  299. struct cx8802_dev *dev= fe->dvb->priv;
  300. dev->ts_gen_cntrl = 0x02;
  301. return 0;
  302. }
  303. static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
  304. fe_sec_voltage_t voltage)
  305. {
  306. struct cx8802_dev *dev= fe->dvb->priv;
  307. struct cx88_core *core = dev->core;
  308. if (voltage == SEC_VOLTAGE_OFF)
  309. cx_write(MO_GP0_IO, 0x000006fb);
  310. else
  311. cx_write(MO_GP0_IO, 0x000006f9);
  312. if (core->prev_set_voltage)
  313. return core->prev_set_voltage(fe, voltage);
  314. return 0;
  315. }
  316. static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
  317. fe_sec_voltage_t voltage)
  318. {
  319. struct cx8802_dev *dev= fe->dvb->priv;
  320. struct cx88_core *core = dev->core;
  321. if (voltage == SEC_VOLTAGE_OFF) {
  322. dprintk(1,"LNB Voltage OFF\n");
  323. cx_write(MO_GP0_IO, 0x0000efff);
  324. }
  325. if (core->prev_set_voltage)
  326. return core->prev_set_voltage(fe, voltage);
  327. return 0;
  328. }
  329. static int tevii_dvbs_set_voltage(struct dvb_frontend *fe,
  330. fe_sec_voltage_t voltage)
  331. {
  332. struct cx8802_dev *dev= fe->dvb->priv;
  333. struct cx88_core *core = dev->core;
  334. switch (voltage) {
  335. case SEC_VOLTAGE_13:
  336. printk("LNB Voltage SEC_VOLTAGE_13\n");
  337. cx_write(MO_GP0_IO, 0x00006040);
  338. break;
  339. case SEC_VOLTAGE_18:
  340. printk("LNB Voltage SEC_VOLTAGE_18\n");
  341. cx_write(MO_GP0_IO, 0x00006060);
  342. break;
  343. case SEC_VOLTAGE_OFF:
  344. printk("LNB Voltage SEC_VOLTAGE_off\n");
  345. break;
  346. }
  347. if (core->prev_set_voltage)
  348. return core->prev_set_voltage(fe, voltage);
  349. return 0;
  350. }
  351. static struct cx24123_config geniatech_dvbs_config = {
  352. .demod_address = 0x55,
  353. .set_ts_params = cx24123_set_ts_param,
  354. };
  355. static struct cx24123_config hauppauge_novas_config = {
  356. .demod_address = 0x55,
  357. .set_ts_params = cx24123_set_ts_param,
  358. };
  359. static struct cx24123_config kworld_dvbs_100_config = {
  360. .demod_address = 0x15,
  361. .set_ts_params = cx24123_set_ts_param,
  362. .lnb_polarity = 1,
  363. };
  364. static struct s5h1409_config pinnacle_pctv_hd_800i_config = {
  365. .demod_address = 0x32 >> 1,
  366. .output_mode = S5H1409_PARALLEL_OUTPUT,
  367. .gpio = S5H1409_GPIO_ON,
  368. .qam_if = 44000,
  369. .inversion = S5H1409_INVERSION_OFF,
  370. .status_mode = S5H1409_DEMODLOCKING,
  371. .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
  372. };
  373. static struct s5h1409_config dvico_hdtv5_pci_nano_config = {
  374. .demod_address = 0x32 >> 1,
  375. .output_mode = S5H1409_SERIAL_OUTPUT,
  376. .gpio = S5H1409_GPIO_OFF,
  377. .inversion = S5H1409_INVERSION_OFF,
  378. .status_mode = S5H1409_DEMODLOCKING,
  379. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  380. };
  381. static struct s5h1409_config kworld_atsc_120_config = {
  382. .demod_address = 0x32 >> 1,
  383. .output_mode = S5H1409_SERIAL_OUTPUT,
  384. .gpio = S5H1409_GPIO_OFF,
  385. .inversion = S5H1409_INVERSION_OFF,
  386. .status_mode = S5H1409_DEMODLOCKING,
  387. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  388. };
  389. static struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
  390. .i2c_address = 0x64,
  391. .if_khz = 5380,
  392. };
  393. static struct zl10353_config cx88_pinnacle_hybrid_pctv = {
  394. .demod_address = (0x1e >> 1),
  395. .no_tuner = 1,
  396. .if2 = 45600,
  397. };
  398. static struct zl10353_config cx88_geniatech_x8000_mt = {
  399. .demod_address = (0x1e >> 1),
  400. .no_tuner = 1,
  401. };
  402. static struct s5h1411_config dvico_fusionhdtv7_config = {
  403. .output_mode = S5H1411_SERIAL_OUTPUT,
  404. .gpio = S5H1411_GPIO_ON,
  405. .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  406. .qam_if = S5H1411_IF_44000,
  407. .vsb_if = S5H1411_IF_44000,
  408. .inversion = S5H1411_INVERSION_OFF,
  409. .status_mode = S5H1411_DEMODLOCKING
  410. };
  411. static struct xc5000_config dvico_fusionhdtv7_tuner_config = {
  412. .i2c_address = 0xc2 >> 1,
  413. .if_khz = 5380,
  414. };
  415. static int attach_xc3028(u8 addr, struct cx8802_dev *dev)
  416. {
  417. struct dvb_frontend *fe;
  418. struct videobuf_dvb_frontend *fe0 = NULL;
  419. struct xc2028_ctrl ctl;
  420. struct xc2028_config cfg = {
  421. .i2c_adap = &dev->core->i2c_adap,
  422. .i2c_addr = addr,
  423. .ctrl = &ctl,
  424. };
  425. /* Get the first frontend */
  426. fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
  427. if (!fe0)
  428. return -EINVAL;
  429. if (!fe0->dvb.frontend) {
  430. printk(KERN_ERR "%s/2: dvb frontend not attached. "
  431. "Can't attach xc3028\n",
  432. dev->core->name);
  433. return -EINVAL;
  434. }
  435. /*
  436. * Some xc3028 devices may be hidden by an I2C gate. This is known
  437. * to happen with some s5h1409-based devices.
  438. * Now that I2C gate is open, sets up xc3028 configuration
  439. */
  440. cx88_setup_xc3028(dev->core, &ctl);
  441. fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg);
  442. if (!fe) {
  443. printk(KERN_ERR "%s/2: xc3028 attach failed\n",
  444. dev->core->name);
  445. dvb_frontend_detach(fe0->dvb.frontend);
  446. dvb_unregister_frontend(fe0->dvb.frontend);
  447. fe0->dvb.frontend = NULL;
  448. return -EINVAL;
  449. }
  450. printk(KERN_INFO "%s/2: xc3028 attached\n",
  451. dev->core->name);
  452. return 0;
  453. }
  454. static int cx24116_set_ts_param(struct dvb_frontend *fe,
  455. int is_punctured)
  456. {
  457. struct cx8802_dev *dev = fe->dvb->priv;
  458. dev->ts_gen_cntrl = 0x2;
  459. return 0;
  460. }
  461. static int cx24116_reset_device(struct dvb_frontend *fe)
  462. {
  463. struct cx8802_dev *dev = fe->dvb->priv;
  464. struct cx88_core *core = dev->core;
  465. /* Reset the part */
  466. /* Put the cx24116 into reset */
  467. cx_write(MO_SRST_IO, 0);
  468. msleep(10);
  469. /* Take the cx24116 out of reset */
  470. cx_write(MO_SRST_IO, 1);
  471. msleep(10);
  472. return 0;
  473. }
  474. static struct cx24116_config hauppauge_hvr4000_config = {
  475. .demod_address = 0x05,
  476. .set_ts_params = cx24116_set_ts_param,
  477. .reset_device = cx24116_reset_device,
  478. };
  479. static struct cx24116_config tevii_s460_config = {
  480. .demod_address = 0x55,
  481. .set_ts_params = cx24116_set_ts_param,
  482. .reset_device = cx24116_reset_device,
  483. };
  484. static struct stv0299_config tevii_tuner_sharp_config = {
  485. .demod_address = 0x68,
  486. .inittab = sharp_z0194a_inittab,
  487. .mclk = 88000000UL,
  488. .invert = 1,
  489. .skip_reinit = 0,
  490. .lock_output = 1,
  491. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  492. .min_delay_ms = 100,
  493. .set_symbol_rate = sharp_z0194a_set_symbol_rate,
  494. .set_ts_params = cx24116_set_ts_param,
  495. };
  496. static struct stv0288_config tevii_tuner_earda_config = {
  497. .demod_address = 0x68,
  498. .min_delay_ms = 100,
  499. .set_ts_params = cx24116_set_ts_param,
  500. };
  501. static int dvb_register(struct cx8802_dev *dev)
  502. {
  503. struct cx88_core *core = dev->core;
  504. struct videobuf_dvb_frontend *fe0, *fe1 = NULL;
  505. int mfe_shared = 0; /* bus not shared by default */
  506. if (0 != core->i2c_rc) {
  507. printk(KERN_ERR "%s/2: no i2c-bus available, cannot attach dvb drivers\n", core->name);
  508. goto frontend_detach;
  509. }
  510. /* Get the first frontend */
  511. fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
  512. if (!fe0)
  513. goto frontend_detach;
  514. /* multi-frontend gate control is undefined or defaults to fe0 */
  515. dev->frontends.gate = 0;
  516. /* init frontend(s) */
  517. switch (core->boardnr) {
  518. case CX88_BOARD_HAUPPAUGE_DVB_T1:
  519. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  520. &connexant_refboard_config,
  521. &core->i2c_adap);
  522. if (fe0->dvb.frontend != NULL) {
  523. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  524. 0x61, &core->i2c_adap,
  525. DVB_PLL_THOMSON_DTT759X))
  526. goto frontend_detach;
  527. }
  528. break;
  529. case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
  530. case CX88_BOARD_CONEXANT_DVB_T1:
  531. case CX88_BOARD_KWORLD_DVB_T_CX22702:
  532. case CX88_BOARD_WINFAST_DTV1000:
  533. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  534. &connexant_refboard_config,
  535. &core->i2c_adap);
  536. if (fe0->dvb.frontend != NULL) {
  537. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  538. 0x60, &core->i2c_adap,
  539. DVB_PLL_THOMSON_DTT7579))
  540. goto frontend_detach;
  541. }
  542. break;
  543. case CX88_BOARD_WINFAST_DTV2000H:
  544. case CX88_BOARD_HAUPPAUGE_HVR1100:
  545. case CX88_BOARD_HAUPPAUGE_HVR1100LP:
  546. case CX88_BOARD_HAUPPAUGE_HVR1300:
  547. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  548. &hauppauge_hvr_config,
  549. &core->i2c_adap);
  550. if (fe0->dvb.frontend != NULL) {
  551. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  552. &core->i2c_adap, 0x61,
  553. TUNER_PHILIPS_FMD1216ME_MK3))
  554. goto frontend_detach;
  555. }
  556. break;
  557. case CX88_BOARD_HAUPPAUGE_HVR3000:
  558. /* MFE frontend 1 */
  559. mfe_shared = 1;
  560. dev->frontends.gate = 2;
  561. /* DVB-S init */
  562. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  563. &hauppauge_novas_config,
  564. &dev->core->i2c_adap);
  565. if (fe0->dvb.frontend) {
  566. if (!dvb_attach(isl6421_attach,
  567. fe0->dvb.frontend,
  568. &dev->core->i2c_adap,
  569. 0x08, ISL6421_DCL, 0x00))
  570. goto frontend_detach;
  571. }
  572. /* MFE frontend 2 */
  573. fe1 = videobuf_dvb_get_frontend(&dev->frontends, 2);
  574. if (!fe1)
  575. goto frontend_detach;
  576. /* DVB-T init */
  577. fe1->dvb.frontend = dvb_attach(cx22702_attach,
  578. &hauppauge_hvr_config,
  579. &dev->core->i2c_adap);
  580. if (fe1->dvb.frontend) {
  581. fe1->dvb.frontend->id = 1;
  582. if (!dvb_attach(simple_tuner_attach,
  583. fe1->dvb.frontend,
  584. &dev->core->i2c_adap,
  585. 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
  586. goto frontend_detach;
  587. }
  588. break;
  589. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
  590. fe0->dvb.frontend = dvb_attach(mt352_attach,
  591. &dvico_fusionhdtv,
  592. &core->i2c_adap);
  593. if (fe0->dvb.frontend != NULL) {
  594. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  595. 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
  596. goto frontend_detach;
  597. break;
  598. }
  599. /* ZL10353 replaces MT352 on later cards */
  600. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  601. &dvico_fusionhdtv_plus_v1_1,
  602. &core->i2c_adap);
  603. if (fe0->dvb.frontend != NULL) {
  604. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  605. 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
  606. goto frontend_detach;
  607. }
  608. break;
  609. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
  610. /* The tin box says DEE1601, but it seems to be DTT7579
  611. * compatible, with a slightly different MT352 AGC gain. */
  612. fe0->dvb.frontend = dvb_attach(mt352_attach,
  613. &dvico_fusionhdtv_dual,
  614. &core->i2c_adap);
  615. if (fe0->dvb.frontend != NULL) {
  616. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  617. 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
  618. goto frontend_detach;
  619. break;
  620. }
  621. /* ZL10353 replaces MT352 on later cards */
  622. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  623. &dvico_fusionhdtv_plus_v1_1,
  624. &core->i2c_adap);
  625. if (fe0->dvb.frontend != NULL) {
  626. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  627. 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
  628. goto frontend_detach;
  629. }
  630. break;
  631. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
  632. fe0->dvb.frontend = dvb_attach(mt352_attach,
  633. &dvico_fusionhdtv,
  634. &core->i2c_adap);
  635. if (fe0->dvb.frontend != NULL) {
  636. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  637. 0x61, NULL, DVB_PLL_LG_Z201))
  638. goto frontend_detach;
  639. }
  640. break;
  641. case CX88_BOARD_KWORLD_DVB_T:
  642. case CX88_BOARD_DNTV_LIVE_DVB_T:
  643. case CX88_BOARD_ADSTECH_DVB_T_PCI:
  644. fe0->dvb.frontend = dvb_attach(mt352_attach,
  645. &dntv_live_dvbt_config,
  646. &core->i2c_adap);
  647. if (fe0->dvb.frontend != NULL) {
  648. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  649. 0x61, NULL, DVB_PLL_UNKNOWN_1))
  650. goto frontend_detach;
  651. }
  652. break;
  653. case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
  654. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  655. /* MT352 is on a secondary I2C bus made from some GPIO lines */
  656. fe0->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
  657. &dev->vp3054->adap);
  658. if (fe0->dvb.frontend != NULL) {
  659. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  660. &core->i2c_adap, 0x61,
  661. TUNER_PHILIPS_FMD1216ME_MK3))
  662. goto frontend_detach;
  663. }
  664. #else
  665. printk(KERN_ERR "%s/2: built without vp3054 support\n",
  666. core->name);
  667. #endif
  668. break;
  669. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
  670. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  671. &dvico_fusionhdtv_hybrid,
  672. &core->i2c_adap);
  673. if (fe0->dvb.frontend != NULL) {
  674. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  675. &core->i2c_adap, 0x61,
  676. TUNER_THOMSON_FE6600))
  677. goto frontend_detach;
  678. }
  679. break;
  680. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
  681. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  682. &dvico_fusionhdtv_xc3028,
  683. &core->i2c_adap);
  684. if (fe0->dvb.frontend == NULL)
  685. fe0->dvb.frontend = dvb_attach(mt352_attach,
  686. &dvico_fusionhdtv_mt352_xc3028,
  687. &core->i2c_adap);
  688. /*
  689. * On this board, the demod provides the I2C bus pullup.
  690. * We must not permit gate_ctrl to be performed, or
  691. * the xc3028 cannot communicate on the bus.
  692. */
  693. if (fe0->dvb.frontend)
  694. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  695. if (attach_xc3028(0x61, dev) < 0)
  696. goto frontend_detach;
  697. break;
  698. case CX88_BOARD_PCHDTV_HD3000:
  699. fe0->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
  700. &core->i2c_adap);
  701. if (fe0->dvb.frontend != NULL) {
  702. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  703. &core->i2c_adap, 0x61,
  704. TUNER_THOMSON_DTT761X))
  705. goto frontend_detach;
  706. }
  707. break;
  708. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
  709. dev->ts_gen_cntrl = 0x08;
  710. /* Do a hardware reset of chip before using it. */
  711. cx_clear(MO_GP0_IO, 1);
  712. mdelay(100);
  713. cx_set(MO_GP0_IO, 1);
  714. mdelay(200);
  715. /* Select RF connector callback */
  716. fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
  717. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  718. &fusionhdtv_3_gold,
  719. &core->i2c_adap);
  720. if (fe0->dvb.frontend != NULL) {
  721. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  722. &core->i2c_adap, 0x61,
  723. TUNER_MICROTUNE_4042FI5))
  724. goto frontend_detach;
  725. }
  726. break;
  727. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
  728. dev->ts_gen_cntrl = 0x08;
  729. /* Do a hardware reset of chip before using it. */
  730. cx_clear(MO_GP0_IO, 1);
  731. mdelay(100);
  732. cx_set(MO_GP0_IO, 9);
  733. mdelay(200);
  734. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  735. &fusionhdtv_3_gold,
  736. &core->i2c_adap);
  737. if (fe0->dvb.frontend != NULL) {
  738. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  739. &core->i2c_adap, 0x61,
  740. TUNER_THOMSON_DTT761X))
  741. goto frontend_detach;
  742. }
  743. break;
  744. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  745. dev->ts_gen_cntrl = 0x08;
  746. /* Do a hardware reset of chip before using it. */
  747. cx_clear(MO_GP0_IO, 1);
  748. mdelay(100);
  749. cx_set(MO_GP0_IO, 1);
  750. mdelay(200);
  751. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  752. &fusionhdtv_5_gold,
  753. &core->i2c_adap);
  754. if (fe0->dvb.frontend != NULL) {
  755. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  756. &core->i2c_adap, 0x61,
  757. TUNER_LG_TDVS_H06XF))
  758. goto frontend_detach;
  759. if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
  760. &core->i2c_adap, 0x43))
  761. goto frontend_detach;
  762. }
  763. break;
  764. case CX88_BOARD_PCHDTV_HD5500:
  765. dev->ts_gen_cntrl = 0x08;
  766. /* Do a hardware reset of chip before using it. */
  767. cx_clear(MO_GP0_IO, 1);
  768. mdelay(100);
  769. cx_set(MO_GP0_IO, 1);
  770. mdelay(200);
  771. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  772. &pchdtv_hd5500,
  773. &core->i2c_adap);
  774. if (fe0->dvb.frontend != NULL) {
  775. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  776. &core->i2c_adap, 0x61,
  777. TUNER_LG_TDVS_H06XF))
  778. goto frontend_detach;
  779. if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
  780. &core->i2c_adap, 0x43))
  781. goto frontend_detach;
  782. }
  783. break;
  784. case CX88_BOARD_ATI_HDTVWONDER:
  785. fe0->dvb.frontend = dvb_attach(nxt200x_attach,
  786. &ati_hdtvwonder,
  787. &core->i2c_adap);
  788. if (fe0->dvb.frontend != NULL) {
  789. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  790. &core->i2c_adap, 0x61,
  791. TUNER_PHILIPS_TUV1236D))
  792. goto frontend_detach;
  793. }
  794. break;
  795. case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
  796. case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
  797. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  798. &hauppauge_novas_config,
  799. &core->i2c_adap);
  800. if (fe0->dvb.frontend) {
  801. if (!dvb_attach(isl6421_attach, fe0->dvb.frontend,
  802. &core->i2c_adap, 0x08, ISL6421_DCL, 0x00))
  803. goto frontend_detach;
  804. }
  805. break;
  806. case CX88_BOARD_KWORLD_DVBS_100:
  807. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  808. &kworld_dvbs_100_config,
  809. &core->i2c_adap);
  810. if (fe0->dvb.frontend) {
  811. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  812. fe0->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
  813. }
  814. break;
  815. case CX88_BOARD_GENIATECH_DVBS:
  816. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  817. &geniatech_dvbs_config,
  818. &core->i2c_adap);
  819. if (fe0->dvb.frontend) {
  820. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  821. fe0->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
  822. }
  823. break;
  824. case CX88_BOARD_PINNACLE_PCTV_HD_800i:
  825. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  826. &pinnacle_pctv_hd_800i_config,
  827. &core->i2c_adap);
  828. if (fe0->dvb.frontend != NULL) {
  829. if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
  830. &core->i2c_adap,
  831. &pinnacle_pctv_hd_800i_tuner_config))
  832. goto frontend_detach;
  833. }
  834. break;
  835. case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
  836. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  837. &dvico_hdtv5_pci_nano_config,
  838. &core->i2c_adap);
  839. if (fe0->dvb.frontend != NULL) {
  840. struct dvb_frontend *fe;
  841. struct xc2028_config cfg = {
  842. .i2c_adap = &core->i2c_adap,
  843. .i2c_addr = 0x61,
  844. };
  845. static struct xc2028_ctrl ctl = {
  846. .fname = XC2028_DEFAULT_FIRMWARE,
  847. .max_len = 64,
  848. .scode_table = XC3028_FE_OREN538,
  849. };
  850. fe = dvb_attach(xc2028_attach,
  851. fe0->dvb.frontend, &cfg);
  852. if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
  853. fe->ops.tuner_ops.set_config(fe, &ctl);
  854. }
  855. break;
  856. case CX88_BOARD_PINNACLE_HYBRID_PCTV:
  857. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  858. &cx88_pinnacle_hybrid_pctv,
  859. &core->i2c_adap);
  860. if (fe0->dvb.frontend) {
  861. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  862. if (attach_xc3028(0x61, dev) < 0)
  863. goto frontend_detach;
  864. }
  865. break;
  866. case CX88_BOARD_GENIATECH_X8000_MT:
  867. dev->ts_gen_cntrl = 0x00;
  868. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  869. &cx88_geniatech_x8000_mt,
  870. &core->i2c_adap);
  871. if (attach_xc3028(0x61, dev) < 0)
  872. goto frontend_detach;
  873. break;
  874. case CX88_BOARD_KWORLD_ATSC_120:
  875. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  876. &kworld_atsc_120_config,
  877. &core->i2c_adap);
  878. if (attach_xc3028(0x61, dev) < 0)
  879. goto frontend_detach;
  880. break;
  881. case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD:
  882. fe0->dvb.frontend = dvb_attach(s5h1411_attach,
  883. &dvico_fusionhdtv7_config,
  884. &core->i2c_adap);
  885. if (fe0->dvb.frontend != NULL) {
  886. if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
  887. &core->i2c_adap,
  888. &dvico_fusionhdtv7_tuner_config))
  889. goto frontend_detach;
  890. }
  891. break;
  892. case CX88_BOARD_HAUPPAUGE_HVR4000:
  893. /* MFE frontend 1 */
  894. mfe_shared = 1;
  895. dev->frontends.gate = 2;
  896. /* DVB-S/S2 Init */
  897. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  898. &hauppauge_hvr4000_config,
  899. &dev->core->i2c_adap);
  900. if (fe0->dvb.frontend) {
  901. if (!dvb_attach(isl6421_attach,
  902. fe0->dvb.frontend,
  903. &dev->core->i2c_adap,
  904. 0x08, ISL6421_DCL, 0x00))
  905. goto frontend_detach;
  906. }
  907. /* MFE frontend 2 */
  908. fe1 = videobuf_dvb_get_frontend(&dev->frontends, 2);
  909. if (!fe1)
  910. goto frontend_detach;
  911. /* DVB-T Init */
  912. fe1->dvb.frontend = dvb_attach(cx22702_attach,
  913. &hauppauge_hvr_config,
  914. &dev->core->i2c_adap);
  915. if (fe1->dvb.frontend) {
  916. fe1->dvb.frontend->id = 1;
  917. if (!dvb_attach(simple_tuner_attach,
  918. fe1->dvb.frontend,
  919. &dev->core->i2c_adap,
  920. 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
  921. goto frontend_detach;
  922. }
  923. break;
  924. case CX88_BOARD_HAUPPAUGE_HVR4000LITE:
  925. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  926. &hauppauge_hvr4000_config,
  927. &dev->core->i2c_adap);
  928. if (fe0->dvb.frontend) {
  929. if (!dvb_attach(isl6421_attach,
  930. fe0->dvb.frontend,
  931. &dev->core->i2c_adap,
  932. 0x08, ISL6421_DCL, 0x00))
  933. goto frontend_detach;
  934. }
  935. break;
  936. case CX88_BOARD_PROF_6200:
  937. case CX88_BOARD_TBS_8910:
  938. case CX88_BOARD_TEVII_S420:
  939. fe0->dvb.frontend = dvb_attach(stv0299_attach,
  940. &tevii_tuner_sharp_config,
  941. &core->i2c_adap);
  942. if (fe0->dvb.frontend != NULL) {
  943. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60,
  944. &core->i2c_adap, DVB_PLL_OPERA1))
  945. goto frontend_detach;
  946. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  947. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  948. } else {
  949. fe0->dvb.frontend = dvb_attach(stv0288_attach,
  950. &tevii_tuner_earda_config,
  951. &core->i2c_adap);
  952. if (fe0->dvb.frontend != NULL) {
  953. if (!dvb_attach(stb6000_attach, fe0->dvb.frontend, 0x61,
  954. &core->i2c_adap))
  955. goto frontend_detach;
  956. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  957. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  958. }
  959. }
  960. break;
  961. case CX88_BOARD_TEVII_S460:
  962. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  963. &tevii_s460_config,
  964. &core->i2c_adap);
  965. if (fe0->dvb.frontend != NULL)
  966. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  967. break;
  968. case CX88_BOARD_OMICOM_SS4_PCI:
  969. case CX88_BOARD_TBS_8920:
  970. case CX88_BOARD_PROF_7300:
  971. case CX88_BOARD_SATTRADE_ST4200:
  972. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  973. &hauppauge_hvr4000_config,
  974. &core->i2c_adap);
  975. if (fe0->dvb.frontend != NULL)
  976. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  977. break;
  978. default:
  979. printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
  980. core->name);
  981. break;
  982. }
  983. if ( (NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend) ) {
  984. printk(KERN_ERR
  985. "%s/2: frontend initialization failed\n",
  986. core->name);
  987. goto frontend_detach;
  988. }
  989. /* define general-purpose callback pointer */
  990. fe0->dvb.frontend->callback = cx88_tuner_callback;
  991. /* Ensure all frontends negotiate bus access */
  992. fe0->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  993. if (fe1)
  994. fe1->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  995. /* Put the analog decoder in standby to keep it quiet */
  996. cx88_call_i2c_clients(core, TUNER_SET_STANDBY, NULL);
  997. /* register everything */
  998. return videobuf_dvb_register_bus(&dev->frontends, THIS_MODULE, dev,
  999. &dev->pci->dev, adapter_nr, mfe_shared);
  1000. frontend_detach:
  1001. videobuf_dvb_dealloc_frontends(&dev->frontends);
  1002. return -EINVAL;
  1003. }
  1004. /* ----------------------------------------------------------- */
  1005. /* CX8802 MPEG -> mini driver - We have been given the hardware */
  1006. static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
  1007. {
  1008. struct cx88_core *core = drv->core;
  1009. int err = 0;
  1010. dprintk( 1, "%s\n", __func__);
  1011. switch (core->boardnr) {
  1012. case CX88_BOARD_HAUPPAUGE_HVR1300:
  1013. /* We arrive here with either the cx23416 or the cx22702
  1014. * on the bus. Take the bus from the cx23416 and enable the
  1015. * cx22702 demod
  1016. */
  1017. cx_set(MO_GP0_IO, 0x00000080); /* cx22702 out of reset and enable */
  1018. cx_clear(MO_GP0_IO, 0x00000004);
  1019. udelay(1000);
  1020. break;
  1021. case CX88_BOARD_HAUPPAUGE_HVR3000:
  1022. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1023. if(core->dvbdev->frontends.active_fe_id == 1) {
  1024. /* DVB-S/S2 Enabled */
  1025. /* Toggle reset on cx22702 leaving i2c active */
  1026. cx_write(MO_GP0_IO, (core->board.input[0].gpio0 & 0x0000ff00) | 0x00000080);
  1027. udelay(1000);
  1028. cx_clear(MO_GP0_IO, 0x00000080);
  1029. udelay(50);
  1030. cx_set(MO_GP0_IO, 0x00000080); /* cx22702 out of reset */
  1031. cx_set(MO_GP0_IO, 0x00000004); /* tri-state the cx22702 pins */
  1032. udelay(1000);
  1033. cx_write(MO_SRST_IO, 1); /* Take the cx24116/cx24123 out of reset */
  1034. core->dvbdev->ts_gen_cntrl = 0x02; /* Parallel IO */
  1035. } else
  1036. if (core->dvbdev->frontends.active_fe_id == 2) {
  1037. /* DVB-T Enabled */
  1038. /* Put the cx24116/cx24123 into reset */
  1039. cx_write(MO_SRST_IO, 0);
  1040. /* cx22702 out of reset and enable it */
  1041. cx_set(MO_GP0_IO, 0x00000080);
  1042. cx_clear(MO_GP0_IO, 0x00000004);
  1043. core->dvbdev->ts_gen_cntrl = 0x0c; /* Serial IO */
  1044. udelay(1000);
  1045. }
  1046. break;
  1047. default:
  1048. err = -ENODEV;
  1049. }
  1050. return err;
  1051. }
  1052. /* CX8802 MPEG -> mini driver - We no longer have the hardware */
  1053. static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
  1054. {
  1055. struct cx88_core *core = drv->core;
  1056. int err = 0;
  1057. dprintk( 1, "%s\n", __func__);
  1058. switch (core->boardnr) {
  1059. case CX88_BOARD_HAUPPAUGE_HVR1300:
  1060. /* Do Nothing, leave the cx22702 on the bus. */
  1061. break;
  1062. case CX88_BOARD_HAUPPAUGE_HVR3000:
  1063. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1064. break;
  1065. default:
  1066. err = -ENODEV;
  1067. }
  1068. return err;
  1069. }
  1070. static int cx8802_dvb_probe(struct cx8802_driver *drv)
  1071. {
  1072. struct cx88_core *core = drv->core;
  1073. struct cx8802_dev *dev = drv->core->dvbdev;
  1074. int err;
  1075. dprintk( 1, "%s\n", __func__);
  1076. dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
  1077. core->boardnr,
  1078. core->name,
  1079. core->pci_bus,
  1080. core->pci_slot);
  1081. err = -ENODEV;
  1082. if (!(core->board.mpeg & CX88_MPEG_DVB))
  1083. goto fail_core;
  1084. /* If vp3054 isn't enabled, a stub will just return 0 */
  1085. err = vp3054_i2c_probe(dev);
  1086. if (0 != err)
  1087. goto fail_probe;
  1088. /* dvb stuff */
  1089. printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name);
  1090. dev->ts_gen_cntrl = 0x0c;
  1091. err = -ENODEV;
  1092. if (core->board.num_frontends) {
  1093. struct videobuf_dvb_frontend *fe;
  1094. int i;
  1095. for (i = 1; i <= core->board.num_frontends; i++) {
  1096. fe = videobuf_dvb_get_frontend(&core->dvbdev->frontends, i);
  1097. if (fe == NULL) {
  1098. printk(KERN_ERR "%s() failed to get frontend(%d)\n",
  1099. __func__, i);
  1100. goto fail_probe;
  1101. }
  1102. videobuf_queue_sg_init(&fe->dvb.dvbq, &dvb_qops,
  1103. &dev->pci->dev, &dev->slock,
  1104. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  1105. V4L2_FIELD_TOP,
  1106. sizeof(struct cx88_buffer),
  1107. dev);
  1108. /* init struct videobuf_dvb */
  1109. fe->dvb.name = dev->core->name;
  1110. }
  1111. } else {
  1112. /* no frontends allocated */
  1113. printk(KERN_ERR "%s/2 .num_frontends should be non-zero\n",
  1114. core->name);
  1115. goto fail_core;
  1116. }
  1117. err = dvb_register(dev);
  1118. if (err)
  1119. /* frontends/adapter de-allocated in dvb_register */
  1120. printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n",
  1121. core->name, err);
  1122. return err;
  1123. fail_probe:
  1124. videobuf_dvb_dealloc_frontends(&core->dvbdev->frontends);
  1125. fail_core:
  1126. return err;
  1127. }
  1128. static int cx8802_dvb_remove(struct cx8802_driver *drv)
  1129. {
  1130. struct cx88_core *core = drv->core;
  1131. struct cx8802_dev *dev = drv->core->dvbdev;
  1132. dprintk( 1, "%s\n", __func__);
  1133. videobuf_dvb_unregister_bus(&dev->frontends);
  1134. vp3054_i2c_remove(dev);
  1135. return 0;
  1136. }
  1137. static struct cx8802_driver cx8802_dvb_driver = {
  1138. .type_id = CX88_MPEG_DVB,
  1139. .hw_access = CX8802_DRVCTL_SHARED,
  1140. .probe = cx8802_dvb_probe,
  1141. .remove = cx8802_dvb_remove,
  1142. .advise_acquire = cx8802_dvb_advise_acquire,
  1143. .advise_release = cx8802_dvb_advise_release,
  1144. };
  1145. static int dvb_init(void)
  1146. {
  1147. printk(KERN_INFO "cx88/2: cx2388x dvb driver version %d.%d.%d loaded\n",
  1148. (CX88_VERSION_CODE >> 16) & 0xff,
  1149. (CX88_VERSION_CODE >> 8) & 0xff,
  1150. CX88_VERSION_CODE & 0xff);
  1151. #ifdef SNAPSHOT
  1152. printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
  1153. SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
  1154. #endif
  1155. return cx8802_register_driver(&cx8802_dvb_driver);
  1156. }
  1157. static void dvb_fini(void)
  1158. {
  1159. cx8802_unregister_driver(&cx8802_dvb_driver);
  1160. }
  1161. module_init(dvb_init);
  1162. module_exit(dvb_fini);
  1163. /*
  1164. * Local variables:
  1165. * c-basic-offset: 8
  1166. * compile-command: "make DVB=1"
  1167. * End:
  1168. */