debug.c 19 KB

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  1. /*
  2. * Copyright (c) 2007-2008 Bruno Randolf <bruno@thinktube.com>
  3. *
  4. * This file is free software: you may copy, redistribute and/or modify it
  5. * under the terms of the GNU General Public License as published by the
  6. * Free Software Foundation, either version 2 of the License, or (at your
  7. * option) any later version.
  8. *
  9. * This file is distributed in the hope that it will be useful, but
  10. * WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  12. * General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  16. *
  17. *
  18. * This file incorporates work covered by the following copyright and
  19. * permission notice:
  20. *
  21. * Copyright (c) 2002-2005 Sam Leffler, Errno Consulting
  22. * Copyright (c) 2004-2005 Atheros Communications, Inc.
  23. * Copyright (c) 2006 Devicescape Software, Inc.
  24. * Copyright (c) 2007 Jiri Slaby <jirislaby@gmail.com>
  25. * Copyright (c) 2007 Luis R. Rodriguez <mcgrof@winlab.rutgers.edu>
  26. *
  27. * All rights reserved.
  28. *
  29. * Redistribution and use in source and binary forms, with or without
  30. * modification, are permitted provided that the following conditions
  31. * are met:
  32. * 1. Redistributions of source code must retain the above copyright
  33. * notice, this list of conditions and the following disclaimer,
  34. * without modification.
  35. * 2. Redistributions in binary form must reproduce at minimum a disclaimer
  36. * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
  37. * redistribution must be conditioned upon including a substantially
  38. * similar Disclaimer requirement for further binary redistribution.
  39. * 3. Neither the names of the above-listed copyright holders nor the names
  40. * of any contributors may be used to endorse or promote products derived
  41. * from this software without specific prior written permission.
  42. *
  43. * Alternatively, this software may be distributed under the terms of the
  44. * GNU General Public License ("GPL") version 2 as published by the Free
  45. * Software Foundation.
  46. *
  47. * NO WARRANTY
  48. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  49. * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  50. * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
  51. * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
  52. * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
  53. * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  54. * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  55. * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
  56. * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  57. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  58. * THE POSSIBILITY OF SUCH DAMAGES.
  59. */
  60. #include "base.h"
  61. #include "debug.h"
  62. static unsigned int ath5k_debug;
  63. module_param_named(debug, ath5k_debug, uint, 0);
  64. #ifdef CONFIG_ATH5K_DEBUG
  65. #include <linux/seq_file.h>
  66. #include "reg.h"
  67. static struct dentry *ath5k_global_debugfs;
  68. static int ath5k_debugfs_open(struct inode *inode, struct file *file)
  69. {
  70. file->private_data = inode->i_private;
  71. return 0;
  72. }
  73. /* debugfs: registers */
  74. struct reg {
  75. const char *name;
  76. int addr;
  77. };
  78. #define REG_STRUCT_INIT(r) { #r, r }
  79. /* just a few random registers, might want to add more */
  80. static const struct reg regs[] = {
  81. REG_STRUCT_INIT(AR5K_CR),
  82. REG_STRUCT_INIT(AR5K_RXDP),
  83. REG_STRUCT_INIT(AR5K_CFG),
  84. REG_STRUCT_INIT(AR5K_IER),
  85. REG_STRUCT_INIT(AR5K_BCR),
  86. REG_STRUCT_INIT(AR5K_RTSD0),
  87. REG_STRUCT_INIT(AR5K_RTSD1),
  88. REG_STRUCT_INIT(AR5K_TXCFG),
  89. REG_STRUCT_INIT(AR5K_RXCFG),
  90. REG_STRUCT_INIT(AR5K_RXJLA),
  91. REG_STRUCT_INIT(AR5K_MIBC),
  92. REG_STRUCT_INIT(AR5K_TOPS),
  93. REG_STRUCT_INIT(AR5K_RXNOFRM),
  94. REG_STRUCT_INIT(AR5K_TXNOFRM),
  95. REG_STRUCT_INIT(AR5K_RPGTO),
  96. REG_STRUCT_INIT(AR5K_RFCNT),
  97. REG_STRUCT_INIT(AR5K_MISC),
  98. REG_STRUCT_INIT(AR5K_QCUDCU_CLKGT),
  99. REG_STRUCT_INIT(AR5K_ISR),
  100. REG_STRUCT_INIT(AR5K_PISR),
  101. REG_STRUCT_INIT(AR5K_SISR0),
  102. REG_STRUCT_INIT(AR5K_SISR1),
  103. REG_STRUCT_INIT(AR5K_SISR2),
  104. REG_STRUCT_INIT(AR5K_SISR3),
  105. REG_STRUCT_INIT(AR5K_SISR4),
  106. REG_STRUCT_INIT(AR5K_IMR),
  107. REG_STRUCT_INIT(AR5K_PIMR),
  108. REG_STRUCT_INIT(AR5K_SIMR0),
  109. REG_STRUCT_INIT(AR5K_SIMR1),
  110. REG_STRUCT_INIT(AR5K_SIMR2),
  111. REG_STRUCT_INIT(AR5K_SIMR3),
  112. REG_STRUCT_INIT(AR5K_SIMR4),
  113. REG_STRUCT_INIT(AR5K_DCM_ADDR),
  114. REG_STRUCT_INIT(AR5K_DCCFG),
  115. REG_STRUCT_INIT(AR5K_CCFG),
  116. REG_STRUCT_INIT(AR5K_CPC0),
  117. REG_STRUCT_INIT(AR5K_CPC1),
  118. REG_STRUCT_INIT(AR5K_CPC2),
  119. REG_STRUCT_INIT(AR5K_CPC3),
  120. REG_STRUCT_INIT(AR5K_CPCOVF),
  121. REG_STRUCT_INIT(AR5K_RESET_CTL),
  122. REG_STRUCT_INIT(AR5K_SLEEP_CTL),
  123. REG_STRUCT_INIT(AR5K_INTPEND),
  124. REG_STRUCT_INIT(AR5K_SFR),
  125. REG_STRUCT_INIT(AR5K_PCICFG),
  126. REG_STRUCT_INIT(AR5K_GPIOCR),
  127. REG_STRUCT_INIT(AR5K_GPIODO),
  128. REG_STRUCT_INIT(AR5K_SREV),
  129. };
  130. static void *reg_start(struct seq_file *seq, loff_t *pos)
  131. {
  132. return *pos < ARRAY_SIZE(regs) ? (void *)&regs[*pos] : NULL;
  133. }
  134. static void reg_stop(struct seq_file *seq, void *p)
  135. {
  136. /* nothing to do */
  137. }
  138. static void *reg_next(struct seq_file *seq, void *p, loff_t *pos)
  139. {
  140. ++*pos;
  141. return *pos < ARRAY_SIZE(regs) ? (void *)&regs[*pos] : NULL;
  142. }
  143. static int reg_show(struct seq_file *seq, void *p)
  144. {
  145. struct ath5k_softc *sc = seq->private;
  146. struct reg *r = p;
  147. seq_printf(seq, "%-25s0x%08x\n", r->name,
  148. ath5k_hw_reg_read(sc->ah, r->addr));
  149. return 0;
  150. }
  151. static const struct seq_operations register_seq_ops = {
  152. .start = reg_start,
  153. .next = reg_next,
  154. .stop = reg_stop,
  155. .show = reg_show
  156. };
  157. static int open_file_registers(struct inode *inode, struct file *file)
  158. {
  159. struct seq_file *s;
  160. int res;
  161. res = seq_open(file, &register_seq_ops);
  162. if (res == 0) {
  163. s = file->private_data;
  164. s->private = inode->i_private;
  165. }
  166. return res;
  167. }
  168. static const struct file_operations fops_registers = {
  169. .open = open_file_registers,
  170. .read = seq_read,
  171. .llseek = seq_lseek,
  172. .release = seq_release,
  173. .owner = THIS_MODULE,
  174. };
  175. /* debugfs: beacons */
  176. static ssize_t read_file_beacon(struct file *file, char __user *user_buf,
  177. size_t count, loff_t *ppos)
  178. {
  179. struct ath5k_softc *sc = file->private_data;
  180. struct ath5k_hw *ah = sc->ah;
  181. char buf[500];
  182. unsigned int len = 0;
  183. unsigned int v;
  184. u64 tsf;
  185. v = ath5k_hw_reg_read(sc->ah, AR5K_BEACON);
  186. len += snprintf(buf+len, sizeof(buf)-len,
  187. "%-24s0x%08x\tintval: %d\tTIM: 0x%x\n",
  188. "AR5K_BEACON", v, v & AR5K_BEACON_PERIOD,
  189. (v & AR5K_BEACON_TIM) >> AR5K_BEACON_TIM_S);
  190. len += snprintf(buf+len, sizeof(buf)-len, "%-24s0x%08x\n",
  191. "AR5K_LAST_TSTP", ath5k_hw_reg_read(sc->ah, AR5K_LAST_TSTP));
  192. len += snprintf(buf+len, sizeof(buf)-len, "%-24s0x%08x\n\n",
  193. "AR5K_BEACON_CNT", ath5k_hw_reg_read(sc->ah, AR5K_BEACON_CNT));
  194. v = ath5k_hw_reg_read(sc->ah, AR5K_TIMER0);
  195. len += snprintf(buf+len, sizeof(buf)-len, "%-24s0x%08x\tTU: %08x\n",
  196. "AR5K_TIMER0 (TBTT)", v, v);
  197. v = ath5k_hw_reg_read(sc->ah, AR5K_TIMER1);
  198. len += snprintf(buf+len, sizeof(buf)-len, "%-24s0x%08x\tTU: %08x\n",
  199. "AR5K_TIMER1 (DMA)", v, v >> 3);
  200. v = ath5k_hw_reg_read(sc->ah, AR5K_TIMER2);
  201. len += snprintf(buf+len, sizeof(buf)-len, "%-24s0x%08x\tTU: %08x\n",
  202. "AR5K_TIMER2 (SWBA)", v, v >> 3);
  203. v = ath5k_hw_reg_read(sc->ah, AR5K_TIMER3);
  204. len += snprintf(buf+len, sizeof(buf)-len, "%-24s0x%08x\tTU: %08x\n",
  205. "AR5K_TIMER3 (ATIM)", v, v);
  206. tsf = ath5k_hw_get_tsf64(sc->ah);
  207. len += snprintf(buf+len, sizeof(buf)-len,
  208. "TSF\t\t0x%016llx\tTU: %08x\n",
  209. (unsigned long long)tsf, TSF_TO_TU(tsf));
  210. return simple_read_from_buffer(user_buf, count, ppos, buf, len);
  211. }
  212. static ssize_t write_file_beacon(struct file *file,
  213. const char __user *userbuf,
  214. size_t count, loff_t *ppos)
  215. {
  216. struct ath5k_softc *sc = file->private_data;
  217. struct ath5k_hw *ah = sc->ah;
  218. char buf[20];
  219. if (copy_from_user(buf, userbuf, min(count, sizeof(buf))))
  220. return -EFAULT;
  221. if (strncmp(buf, "disable", 7) == 0) {
  222. AR5K_REG_DISABLE_BITS(ah, AR5K_BEACON, AR5K_BEACON_ENABLE);
  223. printk(KERN_INFO "debugfs disable beacons\n");
  224. } else if (strncmp(buf, "enable", 6) == 0) {
  225. AR5K_REG_ENABLE_BITS(ah, AR5K_BEACON, AR5K_BEACON_ENABLE);
  226. printk(KERN_INFO "debugfs enable beacons\n");
  227. }
  228. return count;
  229. }
  230. static const struct file_operations fops_beacon = {
  231. .read = read_file_beacon,
  232. .write = write_file_beacon,
  233. .open = ath5k_debugfs_open,
  234. .owner = THIS_MODULE,
  235. };
  236. /* debugfs: reset */
  237. static ssize_t write_file_reset(struct file *file,
  238. const char __user *userbuf,
  239. size_t count, loff_t *ppos)
  240. {
  241. struct ath5k_softc *sc = file->private_data;
  242. tasklet_schedule(&sc->restq);
  243. return count;
  244. }
  245. static const struct file_operations fops_reset = {
  246. .write = write_file_reset,
  247. .open = ath5k_debugfs_open,
  248. .owner = THIS_MODULE,
  249. };
  250. /* debugfs: debug level */
  251. static const struct {
  252. enum ath5k_debug_level level;
  253. const char *name;
  254. const char *desc;
  255. } dbg_info[] = {
  256. { ATH5K_DEBUG_RESET, "reset", "reset and initialization" },
  257. { ATH5K_DEBUG_INTR, "intr", "interrupt handling" },
  258. { ATH5K_DEBUG_MODE, "mode", "mode init/setup" },
  259. { ATH5K_DEBUG_XMIT, "xmit", "basic xmit operation" },
  260. { ATH5K_DEBUG_BEACON, "beacon", "beacon handling" },
  261. { ATH5K_DEBUG_CALIBRATE, "calib", "periodic calibration" },
  262. { ATH5K_DEBUG_TXPOWER, "txpower", "transmit power setting" },
  263. { ATH5K_DEBUG_LED, "led", "LED management" },
  264. { ATH5K_DEBUG_DUMP_RX, "dumprx", "print received skb content" },
  265. { ATH5K_DEBUG_DUMP_TX, "dumptx", "print transmit skb content" },
  266. { ATH5K_DEBUG_DUMPBANDS, "dumpbands", "dump bands" },
  267. { ATH5K_DEBUG_TRACE, "trace", "trace function calls" },
  268. { ATH5K_DEBUG_ANY, "all", "show all debug levels" },
  269. };
  270. static ssize_t read_file_debug(struct file *file, char __user *user_buf,
  271. size_t count, loff_t *ppos)
  272. {
  273. struct ath5k_softc *sc = file->private_data;
  274. char buf[700];
  275. unsigned int len = 0;
  276. unsigned int i;
  277. len += snprintf(buf+len, sizeof(buf)-len,
  278. "DEBUG LEVEL: 0x%08x\n\n", sc->debug.level);
  279. for (i = 0; i < ARRAY_SIZE(dbg_info) - 1; i++) {
  280. len += snprintf(buf+len, sizeof(buf)-len,
  281. "%10s %c 0x%08x - %s\n", dbg_info[i].name,
  282. sc->debug.level & dbg_info[i].level ? '+' : ' ',
  283. dbg_info[i].level, dbg_info[i].desc);
  284. }
  285. len += snprintf(buf+len, sizeof(buf)-len,
  286. "%10s %c 0x%08x - %s\n", dbg_info[i].name,
  287. sc->debug.level == dbg_info[i].level ? '+' : ' ',
  288. dbg_info[i].level, dbg_info[i].desc);
  289. return simple_read_from_buffer(user_buf, count, ppos, buf, len);
  290. }
  291. static ssize_t write_file_debug(struct file *file,
  292. const char __user *userbuf,
  293. size_t count, loff_t *ppos)
  294. {
  295. struct ath5k_softc *sc = file->private_data;
  296. unsigned int i;
  297. char buf[20];
  298. if (copy_from_user(buf, userbuf, min(count, sizeof(buf))))
  299. return -EFAULT;
  300. for (i = 0; i < ARRAY_SIZE(dbg_info); i++) {
  301. if (strncmp(buf, dbg_info[i].name,
  302. strlen(dbg_info[i].name)) == 0) {
  303. sc->debug.level ^= dbg_info[i].level; /* toggle bit */
  304. break;
  305. }
  306. }
  307. return count;
  308. }
  309. static const struct file_operations fops_debug = {
  310. .read = read_file_debug,
  311. .write = write_file_debug,
  312. .open = ath5k_debugfs_open,
  313. .owner = THIS_MODULE,
  314. };
  315. /* debugfs: antenna */
  316. static ssize_t read_file_antenna(struct file *file, char __user *user_buf,
  317. size_t count, loff_t *ppos)
  318. {
  319. struct ath5k_softc *sc = file->private_data;
  320. char buf[700];
  321. unsigned int len = 0;
  322. unsigned int i;
  323. unsigned int v;
  324. len += snprintf(buf+len, sizeof(buf)-len, "antenna mode\t%d\n",
  325. sc->ah->ah_ant_mode);
  326. len += snprintf(buf+len, sizeof(buf)-len, "default antenna\t%d\n",
  327. sc->ah->ah_def_ant);
  328. len += snprintf(buf+len, sizeof(buf)-len, "tx antenna\t%d\n",
  329. sc->ah->ah_tx_ant);
  330. len += snprintf(buf+len, sizeof(buf)-len, "\nANTENNA\t\tRX\tTX\n");
  331. for (i = 1; i < ARRAY_SIZE(sc->stats.antenna_rx); i++) {
  332. len += snprintf(buf+len, sizeof(buf)-len,
  333. "[antenna %d]\t%d\t%d\n",
  334. i, sc->stats.antenna_rx[i], sc->stats.antenna_tx[i]);
  335. }
  336. len += snprintf(buf+len, sizeof(buf)-len, "[invalid]\t%d\t%d\n",
  337. sc->stats.antenna_rx[0], sc->stats.antenna_tx[0]);
  338. v = ath5k_hw_reg_read(sc->ah, AR5K_DEFAULT_ANTENNA);
  339. len += snprintf(buf+len, sizeof(buf)-len,
  340. "\nAR5K_DEFAULT_ANTENNA\t0x%08x\n", v);
  341. v = ath5k_hw_reg_read(sc->ah, AR5K_STA_ID1);
  342. len += snprintf(buf+len, sizeof(buf)-len,
  343. "AR5K_STA_ID1_DEFAULT_ANTENNA\t%d\n",
  344. (v & AR5K_STA_ID1_DEFAULT_ANTENNA) != 0);
  345. len += snprintf(buf+len, sizeof(buf)-len,
  346. "AR5K_STA_ID1_DESC_ANTENNA\t%d\n",
  347. (v & AR5K_STA_ID1_DESC_ANTENNA) != 0);
  348. len += snprintf(buf+len, sizeof(buf)-len,
  349. "AR5K_STA_ID1_RTS_DEF_ANTENNA\t%d\n",
  350. (v & AR5K_STA_ID1_RTS_DEF_ANTENNA) != 0);
  351. len += snprintf(buf+len, sizeof(buf)-len,
  352. "AR5K_STA_ID1_SELFGEN_DEF_ANT\t%d\n",
  353. (v & AR5K_STA_ID1_SELFGEN_DEF_ANT) != 0);
  354. v = ath5k_hw_reg_read(sc->ah, AR5K_PHY_AGCCTL);
  355. len += snprintf(buf+len, sizeof(buf)-len,
  356. "\nAR5K_PHY_AGCCTL_OFDM_DIV_DIS\t%d\n",
  357. (v & AR5K_PHY_AGCCTL_OFDM_DIV_DIS) != 0);
  358. v = ath5k_hw_reg_read(sc->ah, AR5K_PHY_RESTART);
  359. len += snprintf(buf+len, sizeof(buf)-len,
  360. "AR5K_PHY_RESTART_DIV_GC\t\t%x\n",
  361. (v & AR5K_PHY_RESTART_DIV_GC) >> AR5K_PHY_RESTART_DIV_GC_S);
  362. v = ath5k_hw_reg_read(sc->ah, AR5K_PHY_FAST_ANT_DIV);
  363. len += snprintf(buf+len, sizeof(buf)-len,
  364. "AR5K_PHY_FAST_ANT_DIV_EN\t%d\n",
  365. (v & AR5K_PHY_FAST_ANT_DIV_EN) != 0);
  366. return simple_read_from_buffer(user_buf, count, ppos, buf, len);
  367. }
  368. static ssize_t write_file_antenna(struct file *file,
  369. const char __user *userbuf,
  370. size_t count, loff_t *ppos)
  371. {
  372. struct ath5k_softc *sc = file->private_data;
  373. unsigned int i;
  374. char buf[20];
  375. if (copy_from_user(buf, userbuf, min(count, sizeof(buf))))
  376. return -EFAULT;
  377. if (strncmp(buf, "diversity", 9) == 0) {
  378. ath5k_hw_set_antenna_mode(sc->ah, AR5K_ANTMODE_DEFAULT);
  379. printk(KERN_INFO "ath5k debug: enable diversity\n");
  380. } else if (strncmp(buf, "fixed-a", 7) == 0) {
  381. ath5k_hw_set_antenna_mode(sc->ah, AR5K_ANTMODE_FIXED_A);
  382. printk(KERN_INFO "ath5k debugfs: fixed antenna A\n");
  383. } else if (strncmp(buf, "fixed-b", 7) == 0) {
  384. ath5k_hw_set_antenna_mode(sc->ah, AR5K_ANTMODE_FIXED_B);
  385. printk(KERN_INFO "ath5k debug: fixed antenna B\n");
  386. } else if (strncmp(buf, "clear", 5) == 0) {
  387. for (i = 0; i < ARRAY_SIZE(sc->stats.antenna_rx); i++) {
  388. sc->stats.antenna_rx[i] = 0;
  389. sc->stats.antenna_tx[i] = 0;
  390. }
  391. printk(KERN_INFO "ath5k debug: cleared antenna stats\n");
  392. }
  393. return count;
  394. }
  395. static const struct file_operations fops_antenna = {
  396. .read = read_file_antenna,
  397. .write = write_file_antenna,
  398. .open = ath5k_debugfs_open,
  399. .owner = THIS_MODULE,
  400. };
  401. /* init */
  402. void
  403. ath5k_debug_init(void)
  404. {
  405. ath5k_global_debugfs = debugfs_create_dir("ath5k", NULL);
  406. }
  407. void
  408. ath5k_debug_init_device(struct ath5k_softc *sc)
  409. {
  410. sc->debug.level = ath5k_debug;
  411. sc->debug.debugfs_phydir = debugfs_create_dir(wiphy_name(sc->hw->wiphy),
  412. ath5k_global_debugfs);
  413. sc->debug.debugfs_debug = debugfs_create_file("debug",
  414. S_IWUSR | S_IRUSR,
  415. sc->debug.debugfs_phydir, sc, &fops_debug);
  416. sc->debug.debugfs_registers = debugfs_create_file("registers", S_IRUSR,
  417. sc->debug.debugfs_phydir, sc, &fops_registers);
  418. sc->debug.debugfs_beacon = debugfs_create_file("beacon",
  419. S_IWUSR | S_IRUSR,
  420. sc->debug.debugfs_phydir, sc, &fops_beacon);
  421. sc->debug.debugfs_reset = debugfs_create_file("reset", S_IWUSR,
  422. sc->debug.debugfs_phydir, sc, &fops_reset);
  423. sc->debug.debugfs_antenna = debugfs_create_file("antenna",
  424. S_IWUSR | S_IRUSR,
  425. sc->debug.debugfs_phydir, sc, &fops_antenna);
  426. }
  427. void
  428. ath5k_debug_finish(void)
  429. {
  430. debugfs_remove(ath5k_global_debugfs);
  431. }
  432. void
  433. ath5k_debug_finish_device(struct ath5k_softc *sc)
  434. {
  435. debugfs_remove(sc->debug.debugfs_debug);
  436. debugfs_remove(sc->debug.debugfs_registers);
  437. debugfs_remove(sc->debug.debugfs_beacon);
  438. debugfs_remove(sc->debug.debugfs_reset);
  439. debugfs_remove(sc->debug.debugfs_antenna);
  440. debugfs_remove(sc->debug.debugfs_phydir);
  441. }
  442. /* functions used in other places */
  443. void
  444. ath5k_debug_dump_bands(struct ath5k_softc *sc)
  445. {
  446. unsigned int b, i;
  447. if (likely(!(sc->debug.level & ATH5K_DEBUG_DUMPBANDS)))
  448. return;
  449. BUG_ON(!sc->sbands);
  450. for (b = 0; b < IEEE80211_NUM_BANDS; b++) {
  451. struct ieee80211_supported_band *band = &sc->sbands[b];
  452. char bname[6];
  453. switch (band->band) {
  454. case IEEE80211_BAND_2GHZ:
  455. strcpy(bname, "2 GHz");
  456. break;
  457. case IEEE80211_BAND_5GHZ:
  458. strcpy(bname, "5 GHz");
  459. break;
  460. default:
  461. printk(KERN_DEBUG "Band not supported: %d\n",
  462. band->band);
  463. return;
  464. }
  465. printk(KERN_DEBUG "Band %s: channels %d, rates %d\n", bname,
  466. band->n_channels, band->n_bitrates);
  467. printk(KERN_DEBUG " channels:\n");
  468. for (i = 0; i < band->n_channels; i++)
  469. printk(KERN_DEBUG " %3d %d %.4x %.4x\n",
  470. ieee80211_frequency_to_channel(
  471. band->channels[i].center_freq),
  472. band->channels[i].center_freq,
  473. band->channels[i].hw_value,
  474. band->channels[i].flags);
  475. printk(KERN_DEBUG " rates:\n");
  476. for (i = 0; i < band->n_bitrates; i++)
  477. printk(KERN_DEBUG " %4d %.4x %.4x %.4x\n",
  478. band->bitrates[i].bitrate,
  479. band->bitrates[i].hw_value,
  480. band->bitrates[i].flags,
  481. band->bitrates[i].hw_value_short);
  482. }
  483. }
  484. static inline void
  485. ath5k_debug_printrxbuf(struct ath5k_buf *bf, int done,
  486. struct ath5k_rx_status *rs)
  487. {
  488. struct ath5k_desc *ds = bf->desc;
  489. struct ath5k_hw_all_rx_desc *rd = &ds->ud.ds_rx;
  490. printk(KERN_DEBUG "R (%p %llx) %08x %08x %08x %08x %08x %08x %c\n",
  491. ds, (unsigned long long)bf->daddr,
  492. ds->ds_link, ds->ds_data,
  493. rd->rx_ctl.rx_control_0, rd->rx_ctl.rx_control_1,
  494. rd->u.rx_stat.rx_status_0, rd->u.rx_stat.rx_status_0,
  495. !done ? ' ' : (rs->rs_status == 0) ? '*' : '!');
  496. }
  497. void
  498. ath5k_debug_printrxbuffs(struct ath5k_softc *sc, struct ath5k_hw *ah)
  499. {
  500. struct ath5k_desc *ds;
  501. struct ath5k_buf *bf;
  502. struct ath5k_rx_status rs = {};
  503. int status;
  504. if (likely(!(sc->debug.level & ATH5K_DEBUG_RESET)))
  505. return;
  506. printk(KERN_DEBUG "rx queue %x, link %p\n",
  507. ath5k_hw_get_rxdp(ah), sc->rxlink);
  508. spin_lock_bh(&sc->rxbuflock);
  509. list_for_each_entry(bf, &sc->rxbuf, list) {
  510. ds = bf->desc;
  511. status = ah->ah_proc_rx_desc(ah, ds, &rs);
  512. if (!status)
  513. ath5k_debug_printrxbuf(bf, status == 0, &rs);
  514. }
  515. spin_unlock_bh(&sc->rxbuflock);
  516. }
  517. void
  518. ath5k_debug_dump_skb(struct ath5k_softc *sc,
  519. struct sk_buff *skb, const char *prefix, int tx)
  520. {
  521. char buf[16];
  522. if (likely(!((tx && (sc->debug.level & ATH5K_DEBUG_DUMP_TX)) ||
  523. (!tx && (sc->debug.level & ATH5K_DEBUG_DUMP_RX)))))
  524. return;
  525. snprintf(buf, sizeof(buf), "%s %s", wiphy_name(sc->hw->wiphy), prefix);
  526. print_hex_dump_bytes(buf, DUMP_PREFIX_NONE, skb->data,
  527. min(200U, skb->len));
  528. printk(KERN_DEBUG "\n");
  529. }
  530. void
  531. ath5k_debug_printtxbuf(struct ath5k_softc *sc, struct ath5k_buf *bf)
  532. {
  533. struct ath5k_desc *ds = bf->desc;
  534. struct ath5k_hw_5212_tx_desc *td = &ds->ud.ds_tx5212;
  535. struct ath5k_tx_status ts = {};
  536. int done;
  537. if (likely(!(sc->debug.level & ATH5K_DEBUG_RESET)))
  538. return;
  539. done = sc->ah->ah_proc_tx_desc(sc->ah, bf->desc, &ts);
  540. printk(KERN_DEBUG "T (%p %llx) %08x %08x %08x %08x %08x %08x %08x "
  541. "%08x %c\n", ds, (unsigned long long)bf->daddr, ds->ds_link,
  542. ds->ds_data, td->tx_ctl.tx_control_0, td->tx_ctl.tx_control_1,
  543. td->tx_ctl.tx_control_2, td->tx_ctl.tx_control_3,
  544. td->tx_stat.tx_status_0, td->tx_stat.tx_status_1,
  545. done ? ' ' : (ts.ts_status == 0) ? '*' : '!');
  546. }
  547. #endif /* ifdef CONFIG_ATH5K_DEBUG */