lpfc_sli.c 73 KB

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  1. /*******************************************************************
  2. * This file is part of the Emulex Linux Device Driver for *
  3. * Fibre Channel Host Bus Adapters. *
  4. * Copyright (C) 2004-2005 Emulex. All rights reserved. *
  5. * EMULEX and SLI are trademarks of Emulex. *
  6. * www.emulex.com *
  7. * Portions Copyright (C) 2004-2005 Christoph Hellwig *
  8. * *
  9. * This program is free software; you can redistribute it and/or *
  10. * modify it under the terms of version 2 of the GNU General *
  11. * Public License as published by the Free Software Foundation. *
  12. * This program is distributed in the hope that it will be useful. *
  13. * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
  14. * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
  15. * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
  16. * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
  17. * TO BE LEGALLY INVALID. See the GNU General Public License for *
  18. * more details, a copy of which can be found in the file COPYING *
  19. * included with this package. *
  20. *******************************************************************/
  21. #include <linux/blkdev.h>
  22. #include <linux/pci.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/delay.h>
  25. #include <scsi/scsi.h>
  26. #include <scsi/scsi_cmnd.h>
  27. #include <scsi/scsi_device.h>
  28. #include <scsi/scsi_host.h>
  29. #include <scsi/scsi_transport_fc.h>
  30. #include "lpfc_hw.h"
  31. #include "lpfc_sli.h"
  32. #include "lpfc_disc.h"
  33. #include "lpfc_scsi.h"
  34. #include "lpfc.h"
  35. #include "lpfc_crtn.h"
  36. #include "lpfc_logmsg.h"
  37. #include "lpfc_compat.h"
  38. /*
  39. * Define macro to log: Mailbox command x%x cannot issue Data
  40. * This allows multiple uses of lpfc_msgBlk0311
  41. * w/o perturbing log msg utility.
  42. */
  43. #define LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag) \
  44. lpfc_printf_log(phba, \
  45. KERN_INFO, \
  46. LOG_MBOX | LOG_SLI, \
  47. "%d:0311 Mailbox command x%x cannot issue " \
  48. "Data: x%x x%x x%x\n", \
  49. phba->brd_no, \
  50. mb->mbxCommand, \
  51. phba->hba_state, \
  52. psli->sli_flag, \
  53. flag);
  54. /* There are only four IOCB completion types. */
  55. typedef enum _lpfc_iocb_type {
  56. LPFC_UNKNOWN_IOCB,
  57. LPFC_UNSOL_IOCB,
  58. LPFC_SOL_IOCB,
  59. LPFC_ABORT_IOCB
  60. } lpfc_iocb_type;
  61. void
  62. lpfc_sli_release_iocbq(struct lpfc_hba * phba, struct lpfc_iocbq * iocbq)
  63. {
  64. size_t start_clean = (size_t)(&((struct lpfc_iocbq *)NULL)->iocb);
  65. /*
  66. * Clean all volatile data fields, preserve iotag and node struct.
  67. */
  68. memset((char*)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
  69. list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
  70. }
  71. /*
  72. * Translate the iocb command to an iocb command type used to decide the final
  73. * disposition of each completed IOCB.
  74. */
  75. static lpfc_iocb_type
  76. lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
  77. {
  78. lpfc_iocb_type type = LPFC_UNKNOWN_IOCB;
  79. if (iocb_cmnd > CMD_MAX_IOCB_CMD)
  80. return 0;
  81. switch (iocb_cmnd) {
  82. case CMD_XMIT_SEQUENCE_CR:
  83. case CMD_XMIT_SEQUENCE_CX:
  84. case CMD_XMIT_BCAST_CN:
  85. case CMD_XMIT_BCAST_CX:
  86. case CMD_ELS_REQUEST_CR:
  87. case CMD_ELS_REQUEST_CX:
  88. case CMD_CREATE_XRI_CR:
  89. case CMD_CREATE_XRI_CX:
  90. case CMD_GET_RPI_CN:
  91. case CMD_XMIT_ELS_RSP_CX:
  92. case CMD_GET_RPI_CR:
  93. case CMD_FCP_IWRITE_CR:
  94. case CMD_FCP_IWRITE_CX:
  95. case CMD_FCP_IREAD_CR:
  96. case CMD_FCP_IREAD_CX:
  97. case CMD_FCP_ICMND_CR:
  98. case CMD_FCP_ICMND_CX:
  99. case CMD_ADAPTER_MSG:
  100. case CMD_ADAPTER_DUMP:
  101. case CMD_XMIT_SEQUENCE64_CR:
  102. case CMD_XMIT_SEQUENCE64_CX:
  103. case CMD_XMIT_BCAST64_CN:
  104. case CMD_XMIT_BCAST64_CX:
  105. case CMD_ELS_REQUEST64_CR:
  106. case CMD_ELS_REQUEST64_CX:
  107. case CMD_FCP_IWRITE64_CR:
  108. case CMD_FCP_IWRITE64_CX:
  109. case CMD_FCP_IREAD64_CR:
  110. case CMD_FCP_IREAD64_CX:
  111. case CMD_FCP_ICMND64_CR:
  112. case CMD_FCP_ICMND64_CX:
  113. case CMD_GEN_REQUEST64_CR:
  114. case CMD_GEN_REQUEST64_CX:
  115. case CMD_XMIT_ELS_RSP64_CX:
  116. type = LPFC_SOL_IOCB;
  117. break;
  118. case CMD_ABORT_XRI_CN:
  119. case CMD_ABORT_XRI_CX:
  120. case CMD_CLOSE_XRI_CN:
  121. case CMD_CLOSE_XRI_CX:
  122. case CMD_XRI_ABORTED_CX:
  123. case CMD_ABORT_MXRI64_CN:
  124. type = LPFC_ABORT_IOCB;
  125. break;
  126. case CMD_RCV_SEQUENCE_CX:
  127. case CMD_RCV_ELS_REQ_CX:
  128. case CMD_RCV_SEQUENCE64_CX:
  129. case CMD_RCV_ELS_REQ64_CX:
  130. type = LPFC_UNSOL_IOCB;
  131. break;
  132. default:
  133. type = LPFC_UNKNOWN_IOCB;
  134. break;
  135. }
  136. return type;
  137. }
  138. static int
  139. lpfc_sli_ring_map(struct lpfc_hba * phba, LPFC_MBOXQ_t *pmb)
  140. {
  141. struct lpfc_sli *psli = &phba->sli;
  142. MAILBOX_t *pmbox = &pmb->mb;
  143. int i, rc;
  144. for (i = 0; i < psli->num_rings; i++) {
  145. phba->hba_state = LPFC_INIT_MBX_CMDS;
  146. lpfc_config_ring(phba, i, pmb);
  147. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  148. if (rc != MBX_SUCCESS) {
  149. lpfc_printf_log(phba,
  150. KERN_ERR,
  151. LOG_INIT,
  152. "%d:0446 Adapter failed to init, "
  153. "mbxCmd x%x CFG_RING, mbxStatus x%x, "
  154. "ring %d\n",
  155. phba->brd_no,
  156. pmbox->mbxCommand,
  157. pmbox->mbxStatus,
  158. i);
  159. phba->hba_state = LPFC_HBA_ERROR;
  160. return -ENXIO;
  161. }
  162. }
  163. return 0;
  164. }
  165. static int
  166. lpfc_sli_ringtxcmpl_put(struct lpfc_hba * phba,
  167. struct lpfc_sli_ring * pring, struct lpfc_iocbq * piocb)
  168. {
  169. uint16_t iotag;
  170. list_add_tail(&piocb->list, &pring->txcmplq);
  171. pring->txcmplq_cnt++;
  172. if (unlikely(pring->ringno == LPFC_ELS_RING))
  173. mod_timer(&phba->els_tmofunc,
  174. jiffies + HZ * (phba->fc_ratov << 1));
  175. if (pring->fast_lookup) {
  176. /* Setup fast lookup based on iotag for completion */
  177. iotag = piocb->iocb.ulpIoTag;
  178. if (iotag && (iotag < pring->fast_iotag))
  179. *(pring->fast_lookup + iotag) = piocb;
  180. else {
  181. /* Cmd ring <ringno> put: iotag <iotag> greater then
  182. configured max <fast_iotag> wd0 <icmd> */
  183. lpfc_printf_log(phba,
  184. KERN_ERR,
  185. LOG_SLI,
  186. "%d:0316 Cmd ring %d put: iotag x%x "
  187. "greater then configured max x%x "
  188. "wd0 x%x\n",
  189. phba->brd_no,
  190. pring->ringno, iotag,
  191. pring->fast_iotag,
  192. *(((uint32_t *)(&piocb->iocb)) + 7));
  193. }
  194. }
  195. return (0);
  196. }
  197. static struct lpfc_iocbq *
  198. lpfc_sli_ringtx_get(struct lpfc_hba * phba, struct lpfc_sli_ring * pring)
  199. {
  200. struct list_head *dlp;
  201. struct lpfc_iocbq *cmd_iocb;
  202. dlp = &pring->txq;
  203. cmd_iocb = NULL;
  204. list_remove_head((&pring->txq), cmd_iocb,
  205. struct lpfc_iocbq,
  206. list);
  207. if (cmd_iocb) {
  208. /* If the first ptr is not equal to the list header,
  209. * deque the IOCBQ_t and return it.
  210. */
  211. pring->txq_cnt--;
  212. }
  213. return (cmd_iocb);
  214. }
  215. static IOCB_t *
  216. lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  217. {
  218. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
  219. uint32_t max_cmd_idx = pring->numCiocb;
  220. IOCB_t *iocb = NULL;
  221. if ((pring->next_cmdidx == pring->cmdidx) &&
  222. (++pring->next_cmdidx >= max_cmd_idx))
  223. pring->next_cmdidx = 0;
  224. if (unlikely(pring->local_getidx == pring->next_cmdidx)) {
  225. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  226. if (unlikely(pring->local_getidx >= max_cmd_idx)) {
  227. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  228. "%d:0315 Ring %d issue: portCmdGet %d "
  229. "is bigger then cmd ring %d\n",
  230. phba->brd_no, pring->ringno,
  231. pring->local_getidx, max_cmd_idx);
  232. phba->hba_state = LPFC_HBA_ERROR;
  233. /*
  234. * All error attention handlers are posted to
  235. * worker thread
  236. */
  237. phba->work_ha |= HA_ERATT;
  238. phba->work_hs = HS_FFER3;
  239. if (phba->work_wait)
  240. wake_up(phba->work_wait);
  241. return NULL;
  242. }
  243. if (pring->local_getidx == pring->next_cmdidx)
  244. return NULL;
  245. }
  246. iocb = IOCB_ENTRY(pring->cmdringaddr, pring->cmdidx);
  247. return iocb;
  248. }
  249. uint16_t
  250. lpfc_sli_next_iotag(struct lpfc_hba * phba, struct lpfc_iocbq * iocbq)
  251. {
  252. struct lpfc_iocbq ** new_arr;
  253. struct lpfc_iocbq ** old_arr;
  254. size_t new_len;
  255. struct lpfc_sli *psli = &phba->sli;
  256. uint16_t iotag;
  257. spin_lock_irq(phba->host->host_lock);
  258. iotag = psli->last_iotag;
  259. if(++iotag < psli->iocbq_lookup_len) {
  260. psli->last_iotag = iotag;
  261. psli->iocbq_lookup[iotag] = iocbq;
  262. spin_unlock_irq(phba->host->host_lock);
  263. iocbq->iotag = iotag;
  264. return iotag;
  265. }
  266. else if (psli->iocbq_lookup_len < (0xffff
  267. - LPFC_IOCBQ_LOOKUP_INCREMENT)) {
  268. new_len = psli->iocbq_lookup_len + LPFC_IOCBQ_LOOKUP_INCREMENT;
  269. spin_unlock_irq(phba->host->host_lock);
  270. new_arr = kmalloc(new_len * sizeof (struct lpfc_iocbq *),
  271. GFP_KERNEL);
  272. if (new_arr) {
  273. memset((char *)new_arr, 0,
  274. new_len * sizeof (struct lpfc_iocbq *));
  275. spin_lock_irq(phba->host->host_lock);
  276. old_arr = psli->iocbq_lookup;
  277. if (new_len <= psli->iocbq_lookup_len) {
  278. /* highly unprobable case */
  279. kfree(new_arr);
  280. iotag = psli->last_iotag;
  281. if(++iotag < psli->iocbq_lookup_len) {
  282. psli->last_iotag = iotag;
  283. psli->iocbq_lookup[iotag] = iocbq;
  284. spin_unlock_irq(phba->host->host_lock);
  285. iocbq->iotag = iotag;
  286. return iotag;
  287. }
  288. spin_unlock_irq(phba->host->host_lock);
  289. return 0;
  290. }
  291. if (psli->iocbq_lookup)
  292. memcpy(new_arr, old_arr,
  293. ((psli->last_iotag + 1) *
  294. sizeof (struct lpfc_iocbq *)));
  295. psli->iocbq_lookup = new_arr;
  296. psli->iocbq_lookup_len = new_len;
  297. psli->last_iotag = iotag;
  298. psli->iocbq_lookup[iotag] = iocbq;
  299. spin_unlock_irq(phba->host->host_lock);
  300. iocbq->iotag = iotag;
  301. kfree(old_arr);
  302. return iotag;
  303. }
  304. }
  305. lpfc_printf_log(phba, KERN_ERR,LOG_SLI,
  306. "%d:0318 Failed to allocate IOTAG.last IOTAG is %d\n",
  307. phba->brd_no, psli->last_iotag);
  308. return 0;
  309. }
  310. static void
  311. lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  312. IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
  313. {
  314. /*
  315. * Set up an iotag
  316. */
  317. nextiocb->iocb.ulpIoTag = (nextiocb->iocb_cmpl) ? nextiocb->iotag : 0;
  318. /*
  319. * Issue iocb command to adapter
  320. */
  321. lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, sizeof (IOCB_t));
  322. wmb();
  323. pring->stats.iocb_cmd++;
  324. /*
  325. * If there is no completion routine to call, we can release the
  326. * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
  327. * that have no rsp ring completion, iocb_cmpl MUST be NULL.
  328. */
  329. if (nextiocb->iocb_cmpl)
  330. lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
  331. else
  332. lpfc_sli_release_iocbq(phba, nextiocb);
  333. /*
  334. * Let the HBA know what IOCB slot will be the next one the
  335. * driver will put a command into.
  336. */
  337. pring->cmdidx = pring->next_cmdidx;
  338. writel(pring->cmdidx, phba->MBslimaddr
  339. + (SLIMOFF + (pring->ringno * 2)) * 4);
  340. }
  341. static void
  342. lpfc_sli_update_full_ring(struct lpfc_hba * phba,
  343. struct lpfc_sli_ring *pring)
  344. {
  345. int ringno = pring->ringno;
  346. pring->flag |= LPFC_CALL_RING_AVAILABLE;
  347. wmb();
  348. /*
  349. * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
  350. * The HBA will tell us when an IOCB entry is available.
  351. */
  352. writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
  353. readl(phba->CAregaddr); /* flush */
  354. pring->stats.iocb_cmd_full++;
  355. }
  356. static void
  357. lpfc_sli_update_ring(struct lpfc_hba * phba,
  358. struct lpfc_sli_ring *pring)
  359. {
  360. int ringno = pring->ringno;
  361. /*
  362. * Tell the HBA that there is work to do in this ring.
  363. */
  364. wmb();
  365. writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
  366. readl(phba->CAregaddr); /* flush */
  367. }
  368. static void
  369. lpfc_sli_resume_iocb(struct lpfc_hba * phba, struct lpfc_sli_ring * pring)
  370. {
  371. IOCB_t *iocb;
  372. struct lpfc_iocbq *nextiocb;
  373. /*
  374. * Check to see if:
  375. * (a) there is anything on the txq to send
  376. * (b) link is up
  377. * (c) link attention events can be processed (fcp ring only)
  378. * (d) IOCB processing is not blocked by the outstanding mbox command.
  379. */
  380. if (pring->txq_cnt &&
  381. (phba->hba_state > LPFC_LINK_DOWN) &&
  382. (pring->ringno != phba->sli.fcp_ring ||
  383. phba->sli.sli_flag & LPFC_PROCESS_LA) &&
  384. !(pring->flag & LPFC_STOP_IOCB_MBX)) {
  385. while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
  386. (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
  387. lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
  388. if (iocb)
  389. lpfc_sli_update_ring(phba, pring);
  390. else
  391. lpfc_sli_update_full_ring(phba, pring);
  392. }
  393. return;
  394. }
  395. /* lpfc_sli_turn_on_ring is only called by lpfc_sli_handle_mb_event below */
  396. static void
  397. lpfc_sli_turn_on_ring(struct lpfc_hba * phba, int ringno)
  398. {
  399. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[ringno];
  400. /* If the ring is active, flag it */
  401. if (phba->sli.ring[ringno].cmdringaddr) {
  402. if (phba->sli.ring[ringno].flag & LPFC_STOP_IOCB_MBX) {
  403. phba->sli.ring[ringno].flag &= ~LPFC_STOP_IOCB_MBX;
  404. /*
  405. * Force update of the local copy of cmdGetInx
  406. */
  407. phba->sli.ring[ringno].local_getidx
  408. = le32_to_cpu(pgp->cmdGetInx);
  409. spin_lock_irq(phba->host->host_lock);
  410. lpfc_sli_resume_iocb(phba, &phba->sli.ring[ringno]);
  411. spin_unlock_irq(phba->host->host_lock);
  412. }
  413. }
  414. }
  415. static int
  416. lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
  417. {
  418. uint8_t ret;
  419. switch (mbxCommand) {
  420. case MBX_LOAD_SM:
  421. case MBX_READ_NV:
  422. case MBX_WRITE_NV:
  423. case MBX_RUN_BIU_DIAG:
  424. case MBX_INIT_LINK:
  425. case MBX_DOWN_LINK:
  426. case MBX_CONFIG_LINK:
  427. case MBX_CONFIG_RING:
  428. case MBX_RESET_RING:
  429. case MBX_READ_CONFIG:
  430. case MBX_READ_RCONFIG:
  431. case MBX_READ_SPARM:
  432. case MBX_READ_STATUS:
  433. case MBX_READ_RPI:
  434. case MBX_READ_XRI:
  435. case MBX_READ_REV:
  436. case MBX_READ_LNK_STAT:
  437. case MBX_REG_LOGIN:
  438. case MBX_UNREG_LOGIN:
  439. case MBX_READ_LA:
  440. case MBX_CLEAR_LA:
  441. case MBX_DUMP_MEMORY:
  442. case MBX_DUMP_CONTEXT:
  443. case MBX_RUN_DIAGS:
  444. case MBX_RESTART:
  445. case MBX_UPDATE_CFG:
  446. case MBX_DOWN_LOAD:
  447. case MBX_DEL_LD_ENTRY:
  448. case MBX_RUN_PROGRAM:
  449. case MBX_SET_MASK:
  450. case MBX_SET_SLIM:
  451. case MBX_UNREG_D_ID:
  452. case MBX_CONFIG_FARP:
  453. case MBX_LOAD_AREA:
  454. case MBX_RUN_BIU_DIAG64:
  455. case MBX_CONFIG_PORT:
  456. case MBX_READ_SPARM64:
  457. case MBX_READ_RPI64:
  458. case MBX_REG_LOGIN64:
  459. case MBX_READ_LA64:
  460. case MBX_FLASH_WR_ULA:
  461. case MBX_SET_DEBUG:
  462. case MBX_LOAD_EXP_ROM:
  463. ret = mbxCommand;
  464. break;
  465. default:
  466. ret = MBX_SHUTDOWN;
  467. break;
  468. }
  469. return (ret);
  470. }
  471. static void
  472. lpfc_sli_wake_mbox_wait(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
  473. {
  474. wait_queue_head_t *pdone_q;
  475. /*
  476. * If pdone_q is empty, the driver thread gave up waiting and
  477. * continued running.
  478. */
  479. pdone_q = (wait_queue_head_t *) pmboxq->context1;
  480. if (pdone_q)
  481. wake_up_interruptible(pdone_q);
  482. return;
  483. }
  484. void
  485. lpfc_sli_def_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
  486. {
  487. struct lpfc_dmabuf *mp;
  488. mp = (struct lpfc_dmabuf *) (pmb->context1);
  489. if (mp) {
  490. lpfc_mbuf_free(phba, mp->virt, mp->phys);
  491. kfree(mp);
  492. }
  493. mempool_free( pmb, phba->mbox_mem_pool);
  494. return;
  495. }
  496. int
  497. lpfc_sli_handle_mb_event(struct lpfc_hba * phba)
  498. {
  499. MAILBOX_t *mbox;
  500. MAILBOX_t *pmbox;
  501. LPFC_MBOXQ_t *pmb;
  502. struct lpfc_sli *psli;
  503. int i, rc;
  504. uint32_t process_next;
  505. psli = &phba->sli;
  506. /* We should only get here if we are in SLI2 mode */
  507. if (!(phba->sli.sli_flag & LPFC_SLI2_ACTIVE)) {
  508. return (1);
  509. }
  510. phba->sli.slistat.mbox_event++;
  511. /* Get a Mailbox buffer to setup mailbox commands for callback */
  512. if ((pmb = phba->sli.mbox_active)) {
  513. pmbox = &pmb->mb;
  514. mbox = &phba->slim2p->mbx;
  515. /* First check out the status word */
  516. lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof (uint32_t));
  517. /* Sanity check to ensure the host owns the mailbox */
  518. if (pmbox->mbxOwner != OWN_HOST) {
  519. /* Lets try for a while */
  520. for (i = 0; i < 10240; i++) {
  521. /* First copy command data */
  522. lpfc_sli_pcimem_bcopy(mbox, pmbox,
  523. sizeof (uint32_t));
  524. if (pmbox->mbxOwner == OWN_HOST)
  525. goto mbout;
  526. }
  527. /* Stray Mailbox Interrupt, mbxCommand <cmd> mbxStatus
  528. <status> */
  529. lpfc_printf_log(phba,
  530. KERN_ERR,
  531. LOG_MBOX | LOG_SLI,
  532. "%d:0304 Stray Mailbox Interrupt "
  533. "mbxCommand x%x mbxStatus x%x\n",
  534. phba->brd_no,
  535. pmbox->mbxCommand,
  536. pmbox->mbxStatus);
  537. spin_lock_irq(phba->host->host_lock);
  538. phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
  539. spin_unlock_irq(phba->host->host_lock);
  540. return (1);
  541. }
  542. mbout:
  543. del_timer_sync(&phba->sli.mbox_tmo);
  544. phba->work_hba_events &= ~WORKER_MBOX_TMO;
  545. /*
  546. * It is a fatal error if unknown mbox command completion.
  547. */
  548. if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
  549. MBX_SHUTDOWN) {
  550. /* Unknow mailbox command compl */
  551. lpfc_printf_log(phba,
  552. KERN_ERR,
  553. LOG_MBOX | LOG_SLI,
  554. "%d:0323 Unknown Mailbox command %x Cmpl\n",
  555. phba->brd_no,
  556. pmbox->mbxCommand);
  557. phba->hba_state = LPFC_HBA_ERROR;
  558. phba->work_hs = HS_FFER3;
  559. lpfc_handle_eratt(phba);
  560. return (0);
  561. }
  562. phba->sli.mbox_active = NULL;
  563. if (pmbox->mbxStatus) {
  564. phba->sli.slistat.mbox_stat_err++;
  565. if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
  566. /* Mbox cmd cmpl error - RETRYing */
  567. lpfc_printf_log(phba,
  568. KERN_INFO,
  569. LOG_MBOX | LOG_SLI,
  570. "%d:0305 Mbox cmd cmpl error - "
  571. "RETRYing Data: x%x x%x x%x x%x\n",
  572. phba->brd_no,
  573. pmbox->mbxCommand,
  574. pmbox->mbxStatus,
  575. pmbox->un.varWords[0],
  576. phba->hba_state);
  577. pmbox->mbxStatus = 0;
  578. pmbox->mbxOwner = OWN_HOST;
  579. spin_lock_irq(phba->host->host_lock);
  580. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  581. spin_unlock_irq(phba->host->host_lock);
  582. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  583. if (rc == MBX_SUCCESS)
  584. return (0);
  585. }
  586. }
  587. /* Mailbox cmd <cmd> Cmpl <cmpl> */
  588. lpfc_printf_log(phba,
  589. KERN_INFO,
  590. LOG_MBOX | LOG_SLI,
  591. "%d:0307 Mailbox cmd x%x Cmpl x%p "
  592. "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x\n",
  593. phba->brd_no,
  594. pmbox->mbxCommand,
  595. pmb->mbox_cmpl,
  596. *((uint32_t *) pmbox),
  597. pmbox->un.varWords[0],
  598. pmbox->un.varWords[1],
  599. pmbox->un.varWords[2],
  600. pmbox->un.varWords[3],
  601. pmbox->un.varWords[4],
  602. pmbox->un.varWords[5],
  603. pmbox->un.varWords[6],
  604. pmbox->un.varWords[7]);
  605. if (pmb->mbox_cmpl) {
  606. lpfc_sli_pcimem_bcopy(mbox, pmbox, MAILBOX_CMD_SIZE);
  607. pmb->mbox_cmpl(phba,pmb);
  608. }
  609. }
  610. do {
  611. process_next = 0; /* by default don't loop */
  612. spin_lock_irq(phba->host->host_lock);
  613. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  614. /* Process next mailbox command if there is one */
  615. if ((pmb = lpfc_mbox_get(phba))) {
  616. spin_unlock_irq(phba->host->host_lock);
  617. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  618. if (rc == MBX_NOT_FINISHED) {
  619. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  620. pmb->mbox_cmpl(phba,pmb);
  621. process_next = 1;
  622. continue; /* loop back */
  623. }
  624. } else {
  625. spin_unlock_irq(phba->host->host_lock);
  626. /* Turn on IOCB processing */
  627. for (i = 0; i < phba->sli.num_rings; i++) {
  628. lpfc_sli_turn_on_ring(phba, i);
  629. }
  630. /* Free any lpfc_dmabuf's waiting for mbox cmd cmpls */
  631. while (!list_empty(&phba->freebufList)) {
  632. struct lpfc_dmabuf *mp;
  633. mp = NULL;
  634. list_remove_head((&phba->freebufList),
  635. mp,
  636. struct lpfc_dmabuf,
  637. list);
  638. if (mp) {
  639. lpfc_mbuf_free(phba, mp->virt,
  640. mp->phys);
  641. kfree(mp);
  642. }
  643. }
  644. }
  645. } while (process_next);
  646. return (0);
  647. }
  648. static int
  649. lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  650. struct lpfc_iocbq *saveq)
  651. {
  652. IOCB_t * irsp;
  653. WORD5 * w5p;
  654. uint32_t Rctl, Type;
  655. uint32_t match, i;
  656. match = 0;
  657. irsp = &(saveq->iocb);
  658. if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX)
  659. || (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX)) {
  660. Rctl = FC_ELS_REQ;
  661. Type = FC_ELS_DATA;
  662. } else {
  663. w5p =
  664. (WORD5 *) & (saveq->iocb.un.
  665. ulpWord[5]);
  666. Rctl = w5p->hcsw.Rctl;
  667. Type = w5p->hcsw.Type;
  668. /* Firmware Workaround */
  669. if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) &&
  670. (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX)) {
  671. Rctl = FC_ELS_REQ;
  672. Type = FC_ELS_DATA;
  673. w5p->hcsw.Rctl = Rctl;
  674. w5p->hcsw.Type = Type;
  675. }
  676. }
  677. /* unSolicited Responses */
  678. if (pring->prt[0].profile) {
  679. (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring, saveq);
  680. match = 1;
  681. } else {
  682. /* We must search, based on rctl / type
  683. for the right routine */
  684. for (i = 0; i < pring->num_mask;
  685. i++) {
  686. if ((pring->prt[i].rctl ==
  687. Rctl)
  688. && (pring->prt[i].
  689. type == Type)) {
  690. (pring->prt[i].lpfc_sli_rcv_unsol_event)
  691. (phba, pring, saveq);
  692. match = 1;
  693. break;
  694. }
  695. }
  696. }
  697. if (match == 0) {
  698. /* Unexpected Rctl / Type received */
  699. /* Ring <ringno> handler: unexpected
  700. Rctl <Rctl> Type <Type> received */
  701. lpfc_printf_log(phba,
  702. KERN_WARNING,
  703. LOG_SLI,
  704. "%d:0313 Ring %d handler: unexpected Rctl x%x "
  705. "Type x%x received \n",
  706. phba->brd_no,
  707. pring->ringno,
  708. Rctl,
  709. Type);
  710. }
  711. return(1);
  712. }
  713. static struct lpfc_iocbq *
  714. lpfc_sli_iocbq_lookup(struct lpfc_hba * phba,
  715. struct lpfc_sli_ring * pring,
  716. struct lpfc_iocbq * prspiocb)
  717. {
  718. struct lpfc_iocbq *cmd_iocb = NULL;
  719. uint16_t iotag;
  720. iotag = prspiocb->iocb.ulpIoTag;
  721. if (iotag != 0 && iotag <= phba->sli.last_iotag) {
  722. cmd_iocb = phba->sli.iocbq_lookup[iotag];
  723. list_del(&cmd_iocb->list);
  724. pring->txcmplq_cnt--;
  725. return cmd_iocb;
  726. }
  727. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  728. "%d:0317 iotag x%x is out off "
  729. "range: max iotag x%x wd0 x%x\n",
  730. phba->brd_no, iotag,
  731. phba->sli.last_iotag,
  732. *(((uint32_t *) &prspiocb->iocb) + 7));
  733. return NULL;
  734. }
  735. static int
  736. lpfc_sli_process_sol_iocb(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
  737. struct lpfc_iocbq *saveq)
  738. {
  739. struct lpfc_iocbq * cmdiocbp;
  740. int rc = 1;
  741. unsigned long iflag;
  742. /* Based on the iotag field, get the cmd IOCB from the txcmplq */
  743. spin_lock_irqsave(phba->host->host_lock, iflag);
  744. cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring, saveq);
  745. if (cmdiocbp) {
  746. if (cmdiocbp->iocb_cmpl) {
  747. /*
  748. * Post all ELS completions to the worker thread.
  749. * All other are passed to the completion callback.
  750. */
  751. if (pring->ringno == LPFC_ELS_RING) {
  752. spin_unlock_irqrestore(phba->host->host_lock,
  753. iflag);
  754. (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
  755. spin_lock_irqsave(phba->host->host_lock, iflag);
  756. }
  757. else {
  758. if (cmdiocbp->iocb_flag & LPFC_IO_POLL)
  759. rc = 0;
  760. spin_unlock_irqrestore(phba->host->host_lock,
  761. iflag);
  762. (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
  763. spin_lock_irqsave(phba->host->host_lock, iflag);
  764. }
  765. } else
  766. lpfc_sli_release_iocbq(phba, cmdiocbp);
  767. } else {
  768. /*
  769. * Unknown initiating command based on the response iotag.
  770. * This could be the case on the ELS ring because of
  771. * lpfc_els_abort().
  772. */
  773. if (pring->ringno != LPFC_ELS_RING) {
  774. /*
  775. * Ring <ringno> handler: unexpected completion IoTag
  776. * <IoTag>
  777. */
  778. lpfc_printf_log(phba,
  779. KERN_WARNING,
  780. LOG_SLI,
  781. "%d:0322 Ring %d handler: unexpected "
  782. "completion IoTag x%x Data: x%x x%x x%x x%x\n",
  783. phba->brd_no,
  784. pring->ringno,
  785. saveq->iocb.ulpIoTag,
  786. saveq->iocb.ulpStatus,
  787. saveq->iocb.un.ulpWord[4],
  788. saveq->iocb.ulpCommand,
  789. saveq->iocb.ulpContext);
  790. }
  791. }
  792. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  793. return rc;
  794. }
  795. /*
  796. * This routine presumes LPFC_FCP_RING handling and doesn't bother
  797. * to check it explicitly.
  798. */
  799. static int
  800. lpfc_sli_handle_fast_ring_event(struct lpfc_hba * phba,
  801. struct lpfc_sli_ring * pring, uint32_t mask)
  802. {
  803. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
  804. IOCB_t *irsp = NULL;
  805. IOCB_t *entry = NULL;
  806. struct lpfc_iocbq *cmdiocbq = NULL;
  807. struct lpfc_iocbq rspiocbq;
  808. uint32_t status;
  809. uint32_t portRspPut, portRspMax;
  810. int rc = 1;
  811. lpfc_iocb_type type;
  812. unsigned long iflag;
  813. uint32_t rsp_cmpl = 0;
  814. void __iomem *to_slim;
  815. spin_lock_irqsave(phba->host->host_lock, iflag);
  816. pring->stats.iocb_event++;
  817. /*
  818. * The next available response entry should never exceed the maximum
  819. * entries. If it does, treat it as an adapter hardware error.
  820. */
  821. portRspMax = pring->numRiocb;
  822. portRspPut = le32_to_cpu(pgp->rspPutInx);
  823. if (unlikely(portRspPut >= portRspMax)) {
  824. /*
  825. * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
  826. * rsp ring <portRspMax>
  827. */
  828. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  829. "%d:0312 Ring %d handler: portRspPut %d "
  830. "is bigger then rsp ring %d\n",
  831. phba->brd_no, pring->ringno, portRspPut,
  832. portRspMax);
  833. phba->hba_state = LPFC_HBA_ERROR;
  834. /* All error attention handlers are posted to worker thread */
  835. phba->work_ha |= HA_ERATT;
  836. phba->work_hs = HS_FFER3;
  837. if (phba->work_wait)
  838. wake_up(phba->work_wait);
  839. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  840. return 1;
  841. }
  842. rmb();
  843. while (pring->rspidx != portRspPut) {
  844. /*
  845. * Fetch an entry off the ring and copy it into a local data
  846. * structure. The copy involves a byte-swap since the
  847. * network byte order and pci byte orders are different.
  848. */
  849. entry = (IOCB_t *) IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
  850. lpfc_sli_pcimem_bcopy((uint32_t *) entry,
  851. (uint32_t *) &rspiocbq.iocb,
  852. sizeof (IOCB_t));
  853. irsp = &rspiocbq.iocb;
  854. type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
  855. pring->stats.iocb_rsp++;
  856. rsp_cmpl++;
  857. if (unlikely(irsp->ulpStatus)) {
  858. /* Rsp ring <ringno> error: IOCB */
  859. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  860. "%d:0326 Rsp Ring %d error: IOCB Data: "
  861. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  862. phba->brd_no, pring->ringno,
  863. irsp->un.ulpWord[0], irsp->un.ulpWord[1],
  864. irsp->un.ulpWord[2], irsp->un.ulpWord[3],
  865. irsp->un.ulpWord[4], irsp->un.ulpWord[5],
  866. *(((uint32_t *) irsp) + 6),
  867. *(((uint32_t *) irsp) + 7));
  868. }
  869. switch (type) {
  870. case LPFC_ABORT_IOCB:
  871. case LPFC_SOL_IOCB:
  872. /*
  873. * Idle exchange closed via ABTS from port. No iocb
  874. * resources need to be recovered.
  875. */
  876. if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
  877. printk(KERN_INFO "%s: IOCB cmd 0x%x processed. "
  878. "Skipping completion\n", __FUNCTION__,
  879. irsp->ulpCommand);
  880. break;
  881. }
  882. cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
  883. &rspiocbq);
  884. if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
  885. spin_unlock_irqrestore(
  886. phba->host->host_lock, iflag);
  887. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  888. &rspiocbq);
  889. spin_lock_irqsave(phba->host->host_lock,
  890. iflag);
  891. }
  892. break;
  893. default:
  894. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  895. char adaptermsg[LPFC_MAX_ADPTMSG];
  896. memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
  897. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  898. MAX_MSG_DATA);
  899. dev_warn(&((phba->pcidev)->dev), "lpfc%d: %s",
  900. phba->brd_no, adaptermsg);
  901. } else {
  902. /* Unknown IOCB command */
  903. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  904. "%d:0321 Unknown IOCB command "
  905. "Data: x%x, x%x x%x x%x x%x\n",
  906. phba->brd_no, type, irsp->ulpCommand,
  907. irsp->ulpStatus, irsp->ulpIoTag,
  908. irsp->ulpContext);
  909. }
  910. break;
  911. }
  912. /*
  913. * The response IOCB has been processed. Update the ring
  914. * pointer in SLIM. If the port response put pointer has not
  915. * been updated, sync the pgp->rspPutInx and fetch the new port
  916. * response put pointer.
  917. */
  918. if (++pring->rspidx >= portRspMax)
  919. pring->rspidx = 0;
  920. to_slim = phba->MBslimaddr +
  921. (SLIMOFF + (pring->ringno * 2) + 1) * 4;
  922. writel(pring->rspidx, to_slim);
  923. if (pring->rspidx == portRspPut)
  924. portRspPut = le32_to_cpu(pgp->rspPutInx);
  925. }
  926. if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) {
  927. pring->stats.iocb_rsp_full++;
  928. status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
  929. writel(status, phba->CAregaddr);
  930. readl(phba->CAregaddr);
  931. }
  932. if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  933. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  934. pring->stats.iocb_cmd_empty++;
  935. /* Force update of the local copy of cmdGetInx */
  936. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  937. lpfc_sli_resume_iocb(phba, pring);
  938. if ((pring->lpfc_sli_cmd_available))
  939. (pring->lpfc_sli_cmd_available) (phba, pring);
  940. }
  941. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  942. return rc;
  943. }
  944. int
  945. lpfc_sli_handle_slow_ring_event(struct lpfc_hba * phba,
  946. struct lpfc_sli_ring * pring, uint32_t mask)
  947. {
  948. IOCB_t *entry;
  949. IOCB_t *irsp = NULL;
  950. struct lpfc_iocbq *rspiocbp = NULL;
  951. struct lpfc_iocbq *next_iocb;
  952. struct lpfc_iocbq *cmdiocbp;
  953. struct lpfc_iocbq *saveq;
  954. struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
  955. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
  956. uint8_t iocb_cmd_type;
  957. lpfc_iocb_type type;
  958. uint32_t status, free_saveq;
  959. uint32_t portRspPut, portRspMax;
  960. int rc = 1;
  961. unsigned long iflag;
  962. void __iomem *to_slim;
  963. spin_lock_irqsave(phba->host->host_lock, iflag);
  964. pring->stats.iocb_event++;
  965. /*
  966. * The next available response entry should never exceed the maximum
  967. * entries. If it does, treat it as an adapter hardware error.
  968. */
  969. portRspMax = pring->numRiocb;
  970. portRspPut = le32_to_cpu(pgp->rspPutInx);
  971. if (portRspPut >= portRspMax) {
  972. /*
  973. * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
  974. * rsp ring <portRspMax>
  975. */
  976. lpfc_printf_log(phba,
  977. KERN_ERR,
  978. LOG_SLI,
  979. "%d:0312 Ring %d handler: portRspPut %d "
  980. "is bigger then rsp ring %d\n",
  981. phba->brd_no,
  982. pring->ringno, portRspPut, portRspMax);
  983. phba->hba_state = LPFC_HBA_ERROR;
  984. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  985. phba->work_hs = HS_FFER3;
  986. lpfc_handle_eratt(phba);
  987. return 1;
  988. }
  989. rmb();
  990. lpfc_iocb_list = &phba->lpfc_iocb_list;
  991. while (pring->rspidx != portRspPut) {
  992. /*
  993. * Build a completion list and call the appropriate handler.
  994. * The process is to get the next available response iocb, get
  995. * a free iocb from the list, copy the response data into the
  996. * free iocb, insert to the continuation list, and update the
  997. * next response index to slim. This process makes response
  998. * iocb's in the ring available to DMA as fast as possible but
  999. * pays a penalty for a copy operation. Since the iocb is
  1000. * only 32 bytes, this penalty is considered small relative to
  1001. * the PCI reads for register values and a slim write. When
  1002. * the ulpLe field is set, the entire Command has been
  1003. * received.
  1004. */
  1005. entry = IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
  1006. list_remove_head(lpfc_iocb_list, rspiocbp, struct lpfc_iocbq,
  1007. list);
  1008. if (rspiocbp == NULL) {
  1009. printk(KERN_ERR "%s: out of buffers! Failing "
  1010. "completion.\n", __FUNCTION__);
  1011. break;
  1012. }
  1013. lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb, sizeof (IOCB_t));
  1014. irsp = &rspiocbp->iocb;
  1015. if (++pring->rspidx >= portRspMax)
  1016. pring->rspidx = 0;
  1017. to_slim = phba->MBslimaddr + (SLIMOFF + (pring->ringno * 2)
  1018. + 1) * 4;
  1019. writel(pring->rspidx, to_slim);
  1020. if (list_empty(&(pring->iocb_continueq))) {
  1021. list_add(&rspiocbp->list, &(pring->iocb_continueq));
  1022. } else {
  1023. list_add_tail(&rspiocbp->list,
  1024. &(pring->iocb_continueq));
  1025. }
  1026. pring->iocb_continueq_cnt++;
  1027. if (irsp->ulpLe) {
  1028. /*
  1029. * By default, the driver expects to free all resources
  1030. * associated with this iocb completion.
  1031. */
  1032. free_saveq = 1;
  1033. saveq = list_get_first(&pring->iocb_continueq,
  1034. struct lpfc_iocbq, list);
  1035. irsp = &(saveq->iocb);
  1036. list_del_init(&pring->iocb_continueq);
  1037. pring->iocb_continueq_cnt = 0;
  1038. pring->stats.iocb_rsp++;
  1039. if (irsp->ulpStatus) {
  1040. /* Rsp ring <ringno> error: IOCB */
  1041. lpfc_printf_log(phba,
  1042. KERN_WARNING,
  1043. LOG_SLI,
  1044. "%d:0328 Rsp Ring %d error: IOCB Data: "
  1045. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  1046. phba->brd_no,
  1047. pring->ringno,
  1048. irsp->un.ulpWord[0],
  1049. irsp->un.ulpWord[1],
  1050. irsp->un.ulpWord[2],
  1051. irsp->un.ulpWord[3],
  1052. irsp->un.ulpWord[4],
  1053. irsp->un.ulpWord[5],
  1054. *(((uint32_t *) irsp) + 6),
  1055. *(((uint32_t *) irsp) + 7));
  1056. }
  1057. /*
  1058. * Fetch the IOCB command type and call the correct
  1059. * completion routine. Solicited and Unsolicited
  1060. * IOCBs on the ELS ring get freed back to the
  1061. * lpfc_iocb_list by the discovery kernel thread.
  1062. */
  1063. iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK;
  1064. type = lpfc_sli_iocb_cmd_type(iocb_cmd_type);
  1065. if (type == LPFC_SOL_IOCB) {
  1066. spin_unlock_irqrestore(phba->host->host_lock,
  1067. iflag);
  1068. rc = lpfc_sli_process_sol_iocb(phba, pring,
  1069. saveq);
  1070. spin_lock_irqsave(phba->host->host_lock, iflag);
  1071. } else if (type == LPFC_UNSOL_IOCB) {
  1072. spin_unlock_irqrestore(phba->host->host_lock,
  1073. iflag);
  1074. rc = lpfc_sli_process_unsol_iocb(phba, pring,
  1075. saveq);
  1076. spin_lock_irqsave(phba->host->host_lock, iflag);
  1077. } else if (type == LPFC_ABORT_IOCB) {
  1078. if ((irsp->ulpCommand != CMD_XRI_ABORTED_CX) &&
  1079. ((cmdiocbp =
  1080. lpfc_sli_iocbq_lookup(phba, pring,
  1081. saveq)))) {
  1082. /* Call the specified completion
  1083. routine */
  1084. if (cmdiocbp->iocb_cmpl) {
  1085. spin_unlock_irqrestore(
  1086. phba->host->host_lock,
  1087. iflag);
  1088. (cmdiocbp->iocb_cmpl) (phba,
  1089. cmdiocbp, saveq);
  1090. spin_lock_irqsave(
  1091. phba->host->host_lock,
  1092. iflag);
  1093. } else
  1094. lpfc_sli_release_iocbq(phba,
  1095. cmdiocbp);
  1096. }
  1097. } else if (type == LPFC_UNKNOWN_IOCB) {
  1098. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  1099. char adaptermsg[LPFC_MAX_ADPTMSG];
  1100. memset(adaptermsg, 0,
  1101. LPFC_MAX_ADPTMSG);
  1102. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  1103. MAX_MSG_DATA);
  1104. dev_warn(&((phba->pcidev)->dev),
  1105. "lpfc%d: %s",
  1106. phba->brd_no, adaptermsg);
  1107. } else {
  1108. /* Unknown IOCB command */
  1109. lpfc_printf_log(phba,
  1110. KERN_ERR,
  1111. LOG_SLI,
  1112. "%d:0321 Unknown IOCB command "
  1113. "Data: x%x x%x x%x x%x\n",
  1114. phba->brd_no,
  1115. irsp->ulpCommand,
  1116. irsp->ulpStatus,
  1117. irsp->ulpIoTag,
  1118. irsp->ulpContext);
  1119. }
  1120. }
  1121. if (free_saveq) {
  1122. if (!list_empty(&saveq->list)) {
  1123. list_for_each_entry_safe(rspiocbp,
  1124. next_iocb,
  1125. &saveq->list,
  1126. list) {
  1127. lpfc_sli_release_iocbq(phba,
  1128. rspiocbp);
  1129. }
  1130. }
  1131. lpfc_sli_release_iocbq(phba, saveq);
  1132. }
  1133. }
  1134. /*
  1135. * If the port response put pointer has not been updated, sync
  1136. * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
  1137. * response put pointer.
  1138. */
  1139. if (pring->rspidx == portRspPut) {
  1140. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1141. }
  1142. } /* while (pring->rspidx != portRspPut) */
  1143. if ((rspiocbp != 0) && (mask & HA_R0RE_REQ)) {
  1144. /* At least one response entry has been freed */
  1145. pring->stats.iocb_rsp_full++;
  1146. /* SET RxRE_RSP in Chip Att register */
  1147. status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
  1148. writel(status, phba->CAregaddr);
  1149. readl(phba->CAregaddr); /* flush */
  1150. }
  1151. if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  1152. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  1153. pring->stats.iocb_cmd_empty++;
  1154. /* Force update of the local copy of cmdGetInx */
  1155. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  1156. lpfc_sli_resume_iocb(phba, pring);
  1157. if ((pring->lpfc_sli_cmd_available))
  1158. (pring->lpfc_sli_cmd_available) (phba, pring);
  1159. }
  1160. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1161. return rc;
  1162. }
  1163. int
  1164. lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  1165. {
  1166. struct lpfc_iocbq *iocb, *next_iocb;
  1167. IOCB_t *icmd = NULL, *cmd = NULL;
  1168. int errcnt;
  1169. errcnt = 0;
  1170. /* Error everything on txq and txcmplq
  1171. * First do the txq.
  1172. */
  1173. spin_lock_irq(phba->host->host_lock);
  1174. list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
  1175. list_del_init(&iocb->list);
  1176. if (iocb->iocb_cmpl) {
  1177. icmd = &iocb->iocb;
  1178. icmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  1179. icmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
  1180. spin_unlock_irq(phba->host->host_lock);
  1181. (iocb->iocb_cmpl) (phba, iocb, iocb);
  1182. spin_lock_irq(phba->host->host_lock);
  1183. } else
  1184. lpfc_sli_release_iocbq(phba, iocb);
  1185. }
  1186. pring->txq_cnt = 0;
  1187. INIT_LIST_HEAD(&(pring->txq));
  1188. /* Next issue ABTS for everything on the txcmplq */
  1189. list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list) {
  1190. cmd = &iocb->iocb;
  1191. /*
  1192. * Imediate abort of IOCB, deque and call compl
  1193. */
  1194. list_del_init(&iocb->list);
  1195. pring->txcmplq_cnt--;
  1196. if (iocb->iocb_cmpl) {
  1197. cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  1198. cmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
  1199. spin_unlock_irq(phba->host->host_lock);
  1200. (iocb->iocb_cmpl) (phba, iocb, iocb);
  1201. spin_lock_irq(phba->host->host_lock);
  1202. } else
  1203. lpfc_sli_release_iocbq(phba, iocb);
  1204. }
  1205. INIT_LIST_HEAD(&pring->txcmplq);
  1206. pring->txcmplq_cnt = 0;
  1207. spin_unlock_irq(phba->host->host_lock);
  1208. return errcnt;
  1209. }
  1210. /******************************************************************************
  1211. * lpfc_sli_send_reset
  1212. *
  1213. * Note: After returning from this function, the HBA cannot be accessed for
  1214. * 1 ms. Since we do not wish to delay in interrupt context, it is the
  1215. * responsibility of the caller to perform the mdelay(1) and flush via readl().
  1216. ******************************************************************************/
  1217. static int
  1218. lpfc_sli_send_reset(struct lpfc_hba * phba, uint16_t skip_post)
  1219. {
  1220. MAILBOX_t *swpmb;
  1221. volatile uint32_t word0;
  1222. void __iomem *to_slim;
  1223. unsigned long flags = 0;
  1224. spin_lock_irqsave(phba->host->host_lock, flags);
  1225. /* A board reset must use REAL SLIM. */
  1226. phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
  1227. word0 = 0;
  1228. swpmb = (MAILBOX_t *) & word0;
  1229. swpmb->mbxCommand = MBX_RESTART;
  1230. swpmb->mbxHc = 1;
  1231. to_slim = phba->MBslimaddr;
  1232. writel(*(uint32_t *) swpmb, to_slim);
  1233. readl(to_slim); /* flush */
  1234. /* Only skip post after fc_ffinit is completed */
  1235. if (skip_post) {
  1236. word0 = 1; /* This is really setting up word1 */
  1237. } else {
  1238. word0 = 0; /* This is really setting up word1 */
  1239. }
  1240. to_slim = phba->MBslimaddr + sizeof (uint32_t);
  1241. writel(*(uint32_t *) swpmb, to_slim);
  1242. readl(to_slim); /* flush */
  1243. /* Turn off parity checking and serr during the physical reset */
  1244. pci_read_config_word(phba->pcidev, PCI_COMMAND, &phba->pci_cfg_value);
  1245. pci_write_config_word(phba->pcidev, PCI_COMMAND,
  1246. (phba->pci_cfg_value &
  1247. ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
  1248. writel(HC_INITFF, phba->HCregaddr);
  1249. phba->hba_state = LPFC_INIT_START;
  1250. spin_unlock_irqrestore(phba->host->host_lock, flags);
  1251. return 0;
  1252. }
  1253. static int
  1254. lpfc_sli_brdreset(struct lpfc_hba * phba, uint16_t skip_post)
  1255. {
  1256. struct lpfc_sli_ring *pring;
  1257. int i;
  1258. struct lpfc_dmabuf *mp, *next_mp;
  1259. unsigned long flags = 0;
  1260. lpfc_sli_send_reset(phba, skip_post);
  1261. mdelay(1);
  1262. spin_lock_irqsave(phba->host->host_lock, flags);
  1263. /* Risk the write on flush case ie no delay after the readl */
  1264. readl(phba->HCregaddr); /* flush */
  1265. /* Now toggle INITFF bit set by lpfc_sli_send_reset */
  1266. writel(0, phba->HCregaddr);
  1267. readl(phba->HCregaddr); /* flush */
  1268. /* Restore PCI cmd register */
  1269. pci_write_config_word(phba->pcidev, PCI_COMMAND, phba->pci_cfg_value);
  1270. /* perform board reset */
  1271. phba->fc_eventTag = 0;
  1272. phba->fc_myDID = 0;
  1273. phba->fc_prevDID = Mask_DID;
  1274. /* Reset HBA */
  1275. lpfc_printf_log(phba,
  1276. KERN_INFO,
  1277. LOG_SLI,
  1278. "%d:0325 Reset HBA Data: x%x x%x x%x\n",
  1279. phba->brd_no,
  1280. phba->hba_state,
  1281. phba->sli.sli_flag,
  1282. skip_post);
  1283. /* Initialize relevant SLI info */
  1284. for (i = 0; i < phba->sli.num_rings; i++) {
  1285. pring = &phba->sli.ring[i];
  1286. pring->flag = 0;
  1287. pring->rspidx = 0;
  1288. pring->next_cmdidx = 0;
  1289. pring->local_getidx = 0;
  1290. pring->cmdidx = 0;
  1291. pring->missbufcnt = 0;
  1292. }
  1293. spin_unlock_irqrestore(phba->host->host_lock, flags);
  1294. if (skip_post) {
  1295. mdelay(100);
  1296. } else {
  1297. mdelay(2000);
  1298. }
  1299. spin_lock_irqsave(phba->host->host_lock, flags);
  1300. /* Cleanup preposted buffers on the ELS ring */
  1301. pring = &phba->sli.ring[LPFC_ELS_RING];
  1302. list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
  1303. list_del(&mp->list);
  1304. pring->postbufq_cnt--;
  1305. lpfc_mbuf_free(phba, mp->virt, mp->phys);
  1306. kfree(mp);
  1307. }
  1308. spin_unlock_irqrestore(phba->host->host_lock, flags);
  1309. for (i = 0; i < phba->sli.num_rings; i++)
  1310. lpfc_sli_abort_iocb_ring(phba, &phba->sli.ring[i]);
  1311. return 0;
  1312. }
  1313. static int
  1314. lpfc_sli_chipset_init(struct lpfc_hba *phba)
  1315. {
  1316. uint32_t status, i = 0;
  1317. /* Read the HBA Host Status Register */
  1318. status = readl(phba->HSregaddr);
  1319. /* Check status register to see what current state is */
  1320. i = 0;
  1321. while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
  1322. /* Check every 100ms for 5 retries, then every 500ms for 5, then
  1323. * every 2.5 sec for 5, then reset board and every 2.5 sec for
  1324. * 4.
  1325. */
  1326. if (i++ >= 20) {
  1327. /* Adapter failed to init, timeout, status reg
  1328. <status> */
  1329. lpfc_printf_log(phba,
  1330. KERN_ERR,
  1331. LOG_INIT,
  1332. "%d:0436 Adapter failed to init, "
  1333. "timeout, status reg x%x\n",
  1334. phba->brd_no,
  1335. status);
  1336. phba->hba_state = LPFC_HBA_ERROR;
  1337. return -ETIMEDOUT;
  1338. }
  1339. /* Check to see if any errors occurred during init */
  1340. if (status & HS_FFERM) {
  1341. /* ERROR: During chipset initialization */
  1342. /* Adapter failed to init, chipset, status reg
  1343. <status> */
  1344. lpfc_printf_log(phba,
  1345. KERN_ERR,
  1346. LOG_INIT,
  1347. "%d:0437 Adapter failed to init, "
  1348. "chipset, status reg x%x\n",
  1349. phba->brd_no,
  1350. status);
  1351. phba->hba_state = LPFC_HBA_ERROR;
  1352. return -EIO;
  1353. }
  1354. if (i <= 5) {
  1355. msleep(10);
  1356. } else if (i <= 10) {
  1357. msleep(500);
  1358. } else {
  1359. msleep(2500);
  1360. }
  1361. if (i == 15) {
  1362. lpfc_sli_brdreset(phba, 0);
  1363. }
  1364. /* Read the HBA Host Status Register */
  1365. status = readl(phba->HSregaddr);
  1366. }
  1367. /* Check to see if any errors occurred during init */
  1368. if (status & HS_FFERM) {
  1369. /* ERROR: During chipset initialization */
  1370. /* Adapter failed to init, chipset, status reg <status> */
  1371. lpfc_printf_log(phba,
  1372. KERN_ERR,
  1373. LOG_INIT,
  1374. "%d:0438 Adapter failed to init, chipset, "
  1375. "status reg x%x\n",
  1376. phba->brd_no,
  1377. status);
  1378. phba->hba_state = LPFC_HBA_ERROR;
  1379. return -EIO;
  1380. }
  1381. /* Clear all interrupt enable conditions */
  1382. writel(0, phba->HCregaddr);
  1383. readl(phba->HCregaddr); /* flush */
  1384. /* setup host attn register */
  1385. writel(0xffffffff, phba->HAregaddr);
  1386. readl(phba->HAregaddr); /* flush */
  1387. return 0;
  1388. }
  1389. int
  1390. lpfc_sli_hba_setup(struct lpfc_hba * phba)
  1391. {
  1392. LPFC_MBOXQ_t *pmb;
  1393. uint32_t resetcount = 0, rc = 0, done = 0;
  1394. pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  1395. if (!pmb) {
  1396. phba->hba_state = LPFC_HBA_ERROR;
  1397. return -ENOMEM;
  1398. }
  1399. while (resetcount < 2 && !done) {
  1400. phba->hba_state = 0;
  1401. lpfc_sli_brdreset(phba, 0);
  1402. msleep(2500);
  1403. rc = lpfc_sli_chipset_init(phba);
  1404. if (rc)
  1405. break;
  1406. resetcount++;
  1407. /* Call pre CONFIG_PORT mailbox command initialization. A value of 0
  1408. * means the call was successful. Any other nonzero value is a failure,
  1409. * but if ERESTART is returned, the driver may reset the HBA and try
  1410. * again.
  1411. */
  1412. rc = lpfc_config_port_prep(phba);
  1413. if (rc == -ERESTART) {
  1414. phba->hba_state = 0;
  1415. continue;
  1416. } else if (rc) {
  1417. break;
  1418. }
  1419. phba->hba_state = LPFC_INIT_MBX_CMDS;
  1420. lpfc_config_port(phba, pmb);
  1421. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  1422. if (rc == MBX_SUCCESS)
  1423. done = 1;
  1424. else {
  1425. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  1426. "%d:0442 Adapter failed to init, mbxCmd x%x "
  1427. "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
  1428. phba->brd_no, pmb->mb.mbxCommand,
  1429. pmb->mb.mbxStatus, 0);
  1430. phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
  1431. }
  1432. }
  1433. if (!done)
  1434. goto lpfc_sli_hba_setup_error;
  1435. rc = lpfc_sli_ring_map(phba, pmb);
  1436. if (rc)
  1437. goto lpfc_sli_hba_setup_error;
  1438. phba->sli.sli_flag |= LPFC_PROCESS_LA;
  1439. rc = lpfc_config_port_post(phba);
  1440. if (rc)
  1441. goto lpfc_sli_hba_setup_error;
  1442. goto lpfc_sli_hba_setup_exit;
  1443. lpfc_sli_hba_setup_error:
  1444. phba->hba_state = LPFC_HBA_ERROR;
  1445. lpfc_sli_hba_setup_exit:
  1446. mempool_free(pmb, phba->mbox_mem_pool);
  1447. return rc;
  1448. }
  1449. static void
  1450. lpfc_mbox_abort(struct lpfc_hba * phba)
  1451. {
  1452. LPFC_MBOXQ_t *pmbox;
  1453. MAILBOX_t *mb;
  1454. if (phba->sli.mbox_active) {
  1455. del_timer_sync(&phba->sli.mbox_tmo);
  1456. phba->work_hba_events &= ~WORKER_MBOX_TMO;
  1457. pmbox = phba->sli.mbox_active;
  1458. mb = &pmbox->mb;
  1459. phba->sli.mbox_active = NULL;
  1460. if (pmbox->mbox_cmpl) {
  1461. mb->mbxStatus = MBX_NOT_FINISHED;
  1462. (pmbox->mbox_cmpl) (phba, pmbox);
  1463. }
  1464. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1465. }
  1466. /* Abort all the non active mailbox commands. */
  1467. spin_lock_irq(phba->host->host_lock);
  1468. pmbox = lpfc_mbox_get(phba);
  1469. while (pmbox) {
  1470. mb = &pmbox->mb;
  1471. if (pmbox->mbox_cmpl) {
  1472. mb->mbxStatus = MBX_NOT_FINISHED;
  1473. spin_unlock_irq(phba->host->host_lock);
  1474. (pmbox->mbox_cmpl) (phba, pmbox);
  1475. spin_lock_irq(phba->host->host_lock);
  1476. }
  1477. pmbox = lpfc_mbox_get(phba);
  1478. }
  1479. spin_unlock_irq(phba->host->host_lock);
  1480. return;
  1481. }
  1482. /*! lpfc_mbox_timeout
  1483. *
  1484. * \pre
  1485. * \post
  1486. * \param hba Pointer to per struct lpfc_hba structure
  1487. * \param l1 Pointer to the driver's mailbox queue.
  1488. * \return
  1489. * void
  1490. *
  1491. * \b Description:
  1492. *
  1493. * This routine handles mailbox timeout events at timer interrupt context.
  1494. */
  1495. void
  1496. lpfc_mbox_timeout(unsigned long ptr)
  1497. {
  1498. struct lpfc_hba *phba;
  1499. unsigned long iflag;
  1500. phba = (struct lpfc_hba *)ptr;
  1501. spin_lock_irqsave(phba->host->host_lock, iflag);
  1502. if (!(phba->work_hba_events & WORKER_MBOX_TMO)) {
  1503. phba->work_hba_events |= WORKER_MBOX_TMO;
  1504. if (phba->work_wait)
  1505. wake_up(phba->work_wait);
  1506. }
  1507. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1508. }
  1509. void
  1510. lpfc_mbox_timeout_handler(struct lpfc_hba *phba)
  1511. {
  1512. LPFC_MBOXQ_t *pmbox;
  1513. MAILBOX_t *mb;
  1514. spin_lock_irq(phba->host->host_lock);
  1515. if (!(phba->work_hba_events & WORKER_MBOX_TMO)) {
  1516. spin_unlock_irq(phba->host->host_lock);
  1517. return;
  1518. }
  1519. phba->work_hba_events &= ~WORKER_MBOX_TMO;
  1520. pmbox = phba->sli.mbox_active;
  1521. mb = &pmbox->mb;
  1522. /* Mbox cmd <mbxCommand> timeout */
  1523. lpfc_printf_log(phba,
  1524. KERN_ERR,
  1525. LOG_MBOX | LOG_SLI,
  1526. "%d:0310 Mailbox command x%x timeout Data: x%x x%x x%p\n",
  1527. phba->brd_no,
  1528. mb->mbxCommand,
  1529. phba->hba_state,
  1530. phba->sli.sli_flag,
  1531. phba->sli.mbox_active);
  1532. phba->sli.mbox_active = NULL;
  1533. if (pmbox->mbox_cmpl) {
  1534. mb->mbxStatus = MBX_NOT_FINISHED;
  1535. spin_unlock_irq(phba->host->host_lock);
  1536. (pmbox->mbox_cmpl) (phba, pmbox);
  1537. spin_lock_irq(phba->host->host_lock);
  1538. }
  1539. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1540. spin_unlock_irq(phba->host->host_lock);
  1541. lpfc_mbox_abort(phba);
  1542. return;
  1543. }
  1544. int
  1545. lpfc_sli_issue_mbox(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmbox, uint32_t flag)
  1546. {
  1547. MAILBOX_t *mb;
  1548. struct lpfc_sli *psli;
  1549. uint32_t status, evtctr;
  1550. uint32_t ha_copy;
  1551. int i;
  1552. unsigned long drvr_flag = 0;
  1553. volatile uint32_t word0, ldata;
  1554. void __iomem *to_slim;
  1555. psli = &phba->sli;
  1556. spin_lock_irqsave(phba->host->host_lock, drvr_flag);
  1557. mb = &pmbox->mb;
  1558. status = MBX_SUCCESS;
  1559. if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
  1560. /* Polling for a mbox command when another one is already active
  1561. * is not allowed in SLI. Also, the driver must have established
  1562. * SLI2 mode to queue and process multiple mbox commands.
  1563. */
  1564. if (flag & MBX_POLL) {
  1565. spin_unlock_irqrestore(phba->host->host_lock,
  1566. drvr_flag);
  1567. /* Mbox command <mbxCommand> cannot issue */
  1568. LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
  1569. return (MBX_NOT_FINISHED);
  1570. }
  1571. if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) {
  1572. spin_unlock_irqrestore(phba->host->host_lock,
  1573. drvr_flag);
  1574. /* Mbox command <mbxCommand> cannot issue */
  1575. LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
  1576. return (MBX_NOT_FINISHED);
  1577. }
  1578. /* Handle STOP IOCB processing flag. This is only meaningful
  1579. * if we are not polling for mbox completion.
  1580. */
  1581. if (flag & MBX_STOP_IOCB) {
  1582. flag &= ~MBX_STOP_IOCB;
  1583. /* Now flag each ring */
  1584. for (i = 0; i < psli->num_rings; i++) {
  1585. /* If the ring is active, flag it */
  1586. if (psli->ring[i].cmdringaddr) {
  1587. psli->ring[i].flag |=
  1588. LPFC_STOP_IOCB_MBX;
  1589. }
  1590. }
  1591. }
  1592. /* Another mailbox command is still being processed, queue this
  1593. * command to be processed later.
  1594. */
  1595. lpfc_mbox_put(phba, pmbox);
  1596. /* Mbox cmd issue - BUSY */
  1597. lpfc_printf_log(phba,
  1598. KERN_INFO,
  1599. LOG_MBOX | LOG_SLI,
  1600. "%d:0308 Mbox cmd issue - BUSY Data: x%x x%x x%x x%x\n",
  1601. phba->brd_no,
  1602. mb->mbxCommand,
  1603. phba->hba_state,
  1604. psli->sli_flag,
  1605. flag);
  1606. psli->slistat.mbox_busy++;
  1607. spin_unlock_irqrestore(phba->host->host_lock,
  1608. drvr_flag);
  1609. return (MBX_BUSY);
  1610. }
  1611. /* Handle STOP IOCB processing flag. This is only meaningful
  1612. * if we are not polling for mbox completion.
  1613. */
  1614. if (flag & MBX_STOP_IOCB) {
  1615. flag &= ~MBX_STOP_IOCB;
  1616. if (flag == MBX_NOWAIT) {
  1617. /* Now flag each ring */
  1618. for (i = 0; i < psli->num_rings; i++) {
  1619. /* If the ring is active, flag it */
  1620. if (psli->ring[i].cmdringaddr) {
  1621. psli->ring[i].flag |=
  1622. LPFC_STOP_IOCB_MBX;
  1623. }
  1624. }
  1625. }
  1626. }
  1627. psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
  1628. /* If we are not polling, we MUST be in SLI2 mode */
  1629. if (flag != MBX_POLL) {
  1630. if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) {
  1631. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1632. spin_unlock_irqrestore(phba->host->host_lock,
  1633. drvr_flag);
  1634. /* Mbox command <mbxCommand> cannot issue */
  1635. LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag);
  1636. return (MBX_NOT_FINISHED);
  1637. }
  1638. /* timeout active mbox command */
  1639. mod_timer(&psli->mbox_tmo, jiffies + HZ * LPFC_MBOX_TMO);
  1640. }
  1641. /* Mailbox cmd <cmd> issue */
  1642. lpfc_printf_log(phba,
  1643. KERN_INFO,
  1644. LOG_MBOX | LOG_SLI,
  1645. "%d:0309 Mailbox cmd x%x issue Data: x%x x%x x%x\n",
  1646. phba->brd_no,
  1647. mb->mbxCommand,
  1648. phba->hba_state,
  1649. psli->sli_flag,
  1650. flag);
  1651. psli->slistat.mbox_cmd++;
  1652. evtctr = psli->slistat.mbox_event;
  1653. /* next set own bit for the adapter and copy over command word */
  1654. mb->mbxOwner = OWN_CHIP;
  1655. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  1656. /* First copy command data to host SLIM area */
  1657. lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx, MAILBOX_CMD_SIZE);
  1658. } else {
  1659. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  1660. /* copy command data into host mbox for cmpl */
  1661. lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx,
  1662. MAILBOX_CMD_SIZE);
  1663. }
  1664. /* First copy mbox command data to HBA SLIM, skip past first
  1665. word */
  1666. to_slim = phba->MBslimaddr + sizeof (uint32_t);
  1667. lpfc_memcpy_to_slim(to_slim, &mb->un.varWords[0],
  1668. MAILBOX_CMD_SIZE - sizeof (uint32_t));
  1669. /* Next copy over first word, with mbxOwner set */
  1670. ldata = *((volatile uint32_t *)mb);
  1671. to_slim = phba->MBslimaddr;
  1672. writel(ldata, to_slim);
  1673. readl(to_slim); /* flush */
  1674. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  1675. /* switch over to host mailbox */
  1676. psli->sli_flag |= LPFC_SLI2_ACTIVE;
  1677. }
  1678. }
  1679. wmb();
  1680. /* interrupt board to doit right away */
  1681. writel(CA_MBATT, phba->CAregaddr);
  1682. readl(phba->CAregaddr); /* flush */
  1683. switch (flag) {
  1684. case MBX_NOWAIT:
  1685. /* Don't wait for it to finish, just return */
  1686. psli->mbox_active = pmbox;
  1687. break;
  1688. case MBX_POLL:
  1689. i = 0;
  1690. psli->mbox_active = NULL;
  1691. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  1692. /* First read mbox status word */
  1693. word0 = *((volatile uint32_t *)&phba->slim2p->mbx);
  1694. word0 = le32_to_cpu(word0);
  1695. } else {
  1696. /* First read mbox status word */
  1697. word0 = readl(phba->MBslimaddr);
  1698. }
  1699. /* Read the HBA Host Attention Register */
  1700. ha_copy = readl(phba->HAregaddr);
  1701. /* Wait for command to complete */
  1702. while (((word0 & OWN_CHIP) == OWN_CHIP)
  1703. || !(ha_copy & HA_MBATT)) {
  1704. if (i++ >= 100) {
  1705. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1706. spin_unlock_irqrestore(phba->host->host_lock,
  1707. drvr_flag);
  1708. return (MBX_NOT_FINISHED);
  1709. }
  1710. /* Check if we took a mbox interrupt while we were
  1711. polling */
  1712. if (((word0 & OWN_CHIP) != OWN_CHIP)
  1713. && (evtctr != psli->slistat.mbox_event))
  1714. break;
  1715. spin_unlock_irqrestore(phba->host->host_lock,
  1716. drvr_flag);
  1717. /* Can be in interrupt context, do not sleep */
  1718. /* (or might be called with interrupts disabled) */
  1719. mdelay(i);
  1720. spin_lock_irqsave(phba->host->host_lock, drvr_flag);
  1721. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  1722. /* First copy command data */
  1723. word0 = *((volatile uint32_t *)
  1724. &phba->slim2p->mbx);
  1725. word0 = le32_to_cpu(word0);
  1726. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  1727. MAILBOX_t *slimmb;
  1728. volatile uint32_t slimword0;
  1729. /* Check real SLIM for any errors */
  1730. slimword0 = readl(phba->MBslimaddr);
  1731. slimmb = (MAILBOX_t *) & slimword0;
  1732. if (((slimword0 & OWN_CHIP) != OWN_CHIP)
  1733. && slimmb->mbxStatus) {
  1734. psli->sli_flag &=
  1735. ~LPFC_SLI2_ACTIVE;
  1736. word0 = slimword0;
  1737. }
  1738. }
  1739. } else {
  1740. /* First copy command data */
  1741. word0 = readl(phba->MBslimaddr);
  1742. }
  1743. /* Read the HBA Host Attention Register */
  1744. ha_copy = readl(phba->HAregaddr);
  1745. }
  1746. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  1747. /* copy results back to user */
  1748. lpfc_sli_pcimem_bcopy(&phba->slim2p->mbx, mb,
  1749. MAILBOX_CMD_SIZE);
  1750. } else {
  1751. /* First copy command data */
  1752. lpfc_memcpy_from_slim(mb, phba->MBslimaddr,
  1753. MAILBOX_CMD_SIZE);
  1754. if ((mb->mbxCommand == MBX_DUMP_MEMORY) &&
  1755. pmbox->context2) {
  1756. lpfc_memcpy_from_slim((void *)pmbox->context2,
  1757. phba->MBslimaddr + DMP_RSP_OFFSET,
  1758. mb->un.varDmp.word_cnt);
  1759. }
  1760. }
  1761. writel(HA_MBATT, phba->HAregaddr);
  1762. readl(phba->HAregaddr); /* flush */
  1763. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1764. status = mb->mbxStatus;
  1765. }
  1766. spin_unlock_irqrestore(phba->host->host_lock, drvr_flag);
  1767. return (status);
  1768. }
  1769. static int
  1770. lpfc_sli_ringtx_put(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
  1771. struct lpfc_iocbq * piocb)
  1772. {
  1773. /* Insert the caller's iocb in the txq tail for later processing. */
  1774. list_add_tail(&piocb->list, &pring->txq);
  1775. pring->txq_cnt++;
  1776. return (0);
  1777. }
  1778. static struct lpfc_iocbq *
  1779. lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  1780. struct lpfc_iocbq ** piocb)
  1781. {
  1782. struct lpfc_iocbq * nextiocb;
  1783. nextiocb = lpfc_sli_ringtx_get(phba, pring);
  1784. if (!nextiocb) {
  1785. nextiocb = *piocb;
  1786. *piocb = NULL;
  1787. }
  1788. return nextiocb;
  1789. }
  1790. int
  1791. lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  1792. struct lpfc_iocbq *piocb, uint32_t flag)
  1793. {
  1794. struct lpfc_iocbq *nextiocb;
  1795. IOCB_t *iocb;
  1796. /*
  1797. * We should never get an IOCB if we are in a < LINK_DOWN state
  1798. */
  1799. if (unlikely(phba->hba_state < LPFC_LINK_DOWN))
  1800. return IOCB_ERROR;
  1801. /*
  1802. * Check to see if we are blocking IOCB processing because of a
  1803. * outstanding mbox command.
  1804. */
  1805. if (unlikely(pring->flag & LPFC_STOP_IOCB_MBX))
  1806. goto iocb_busy;
  1807. if (unlikely(phba->hba_state == LPFC_LINK_DOWN)) {
  1808. /*
  1809. * Only CREATE_XRI, CLOSE_XRI, ABORT_XRI, and QUE_RING_BUF
  1810. * can be issued if the link is not up.
  1811. */
  1812. switch (piocb->iocb.ulpCommand) {
  1813. case CMD_QUE_RING_BUF_CN:
  1814. case CMD_QUE_RING_BUF64_CN:
  1815. /*
  1816. * For IOCBs, like QUE_RING_BUF, that have no rsp ring
  1817. * completion, iocb_cmpl MUST be 0.
  1818. */
  1819. if (piocb->iocb_cmpl)
  1820. piocb->iocb_cmpl = NULL;
  1821. /*FALLTHROUGH*/
  1822. case CMD_CREATE_XRI_CR:
  1823. break;
  1824. default:
  1825. goto iocb_busy;
  1826. }
  1827. /*
  1828. * For FCP commands, we must be in a state where we can process link
  1829. * attention events.
  1830. */
  1831. } else if (unlikely(pring->ringno == phba->sli.fcp_ring &&
  1832. !(phba->sli.sli_flag & LPFC_PROCESS_LA)))
  1833. goto iocb_busy;
  1834. /*
  1835. * Check to see if this is a high priority command.
  1836. * If so bypass tx queue processing.
  1837. */
  1838. if (unlikely((flag & SLI_IOCB_HIGH_PRIORITY) &&
  1839. (iocb = lpfc_sli_next_iocb_slot(phba, pring)))) {
  1840. lpfc_sli_submit_iocb(phba, pring, iocb, piocb);
  1841. piocb = NULL;
  1842. }
  1843. while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
  1844. (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
  1845. lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
  1846. if (iocb)
  1847. lpfc_sli_update_ring(phba, pring);
  1848. else
  1849. lpfc_sli_update_full_ring(phba, pring);
  1850. if (!piocb)
  1851. return IOCB_SUCCESS;
  1852. goto out_busy;
  1853. iocb_busy:
  1854. pring->stats.iocb_cmd_delay++;
  1855. out_busy:
  1856. if (!(flag & SLI_IOCB_RET_IOCB)) {
  1857. lpfc_sli_ringtx_put(phba, pring, piocb);
  1858. return IOCB_SUCCESS;
  1859. }
  1860. return IOCB_BUSY;
  1861. }
  1862. int
  1863. lpfc_sli_setup(struct lpfc_hba *phba)
  1864. {
  1865. int i, totiocb = 0;
  1866. struct lpfc_sli *psli = &phba->sli;
  1867. struct lpfc_sli_ring *pring;
  1868. psli->num_rings = MAX_CONFIGURED_RINGS;
  1869. psli->sli_flag = 0;
  1870. psli->fcp_ring = LPFC_FCP_RING;
  1871. psli->next_ring = LPFC_FCP_NEXT_RING;
  1872. psli->ip_ring = LPFC_IP_RING;
  1873. psli->iocbq_lookup = NULL;
  1874. psli->iocbq_lookup_len = 0;
  1875. psli->last_iotag = 0;
  1876. for (i = 0; i < psli->num_rings; i++) {
  1877. pring = &psli->ring[i];
  1878. switch (i) {
  1879. case LPFC_FCP_RING: /* ring 0 - FCP */
  1880. /* numCiocb and numRiocb are used in config_port */
  1881. pring->numCiocb = SLI2_IOCB_CMD_R0_ENTRIES;
  1882. pring->numRiocb = SLI2_IOCB_RSP_R0_ENTRIES;
  1883. pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  1884. pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  1885. pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  1886. pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  1887. pring->iotag_ctr = 0;
  1888. pring->iotag_max =
  1889. (phba->cfg_hba_queue_depth * 2);
  1890. pring->fast_iotag = pring->iotag_max;
  1891. pring->num_mask = 0;
  1892. break;
  1893. case LPFC_IP_RING: /* ring 1 - IP */
  1894. /* numCiocb and numRiocb are used in config_port */
  1895. pring->numCiocb = SLI2_IOCB_CMD_R1_ENTRIES;
  1896. pring->numRiocb = SLI2_IOCB_RSP_R1_ENTRIES;
  1897. pring->num_mask = 0;
  1898. break;
  1899. case LPFC_ELS_RING: /* ring 2 - ELS / CT */
  1900. /* numCiocb and numRiocb are used in config_port */
  1901. pring->numCiocb = SLI2_IOCB_CMD_R2_ENTRIES;
  1902. pring->numRiocb = SLI2_IOCB_RSP_R2_ENTRIES;
  1903. pring->fast_iotag = 0;
  1904. pring->iotag_ctr = 0;
  1905. pring->iotag_max = 4096;
  1906. pring->num_mask = 4;
  1907. pring->prt[0].profile = 0; /* Mask 0 */
  1908. pring->prt[0].rctl = FC_ELS_REQ;
  1909. pring->prt[0].type = FC_ELS_DATA;
  1910. pring->prt[0].lpfc_sli_rcv_unsol_event =
  1911. lpfc_els_unsol_event;
  1912. pring->prt[1].profile = 0; /* Mask 1 */
  1913. pring->prt[1].rctl = FC_ELS_RSP;
  1914. pring->prt[1].type = FC_ELS_DATA;
  1915. pring->prt[1].lpfc_sli_rcv_unsol_event =
  1916. lpfc_els_unsol_event;
  1917. pring->prt[2].profile = 0; /* Mask 2 */
  1918. /* NameServer Inquiry */
  1919. pring->prt[2].rctl = FC_UNSOL_CTL;
  1920. /* NameServer */
  1921. pring->prt[2].type = FC_COMMON_TRANSPORT_ULP;
  1922. pring->prt[2].lpfc_sli_rcv_unsol_event =
  1923. lpfc_ct_unsol_event;
  1924. pring->prt[3].profile = 0; /* Mask 3 */
  1925. /* NameServer response */
  1926. pring->prt[3].rctl = FC_SOL_CTL;
  1927. /* NameServer */
  1928. pring->prt[3].type = FC_COMMON_TRANSPORT_ULP;
  1929. pring->prt[3].lpfc_sli_rcv_unsol_event =
  1930. lpfc_ct_unsol_event;
  1931. break;
  1932. }
  1933. totiocb += (pring->numCiocb + pring->numRiocb);
  1934. }
  1935. if (totiocb > MAX_SLI2_IOCB) {
  1936. /* Too many cmd / rsp ring entries in SLI2 SLIM */
  1937. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  1938. "%d:0462 Too many cmd / rsp ring entries in "
  1939. "SLI2 SLIM Data: x%x x%x\n",
  1940. phba->brd_no, totiocb, MAX_SLI2_IOCB);
  1941. }
  1942. return 0;
  1943. }
  1944. int
  1945. lpfc_sli_queue_setup(struct lpfc_hba * phba)
  1946. {
  1947. struct lpfc_sli *psli;
  1948. struct lpfc_sli_ring *pring;
  1949. int i;
  1950. psli = &phba->sli;
  1951. spin_lock_irq(phba->host->host_lock);
  1952. INIT_LIST_HEAD(&psli->mboxq);
  1953. /* Initialize list headers for txq and txcmplq as double linked lists */
  1954. for (i = 0; i < psli->num_rings; i++) {
  1955. pring = &psli->ring[i];
  1956. pring->ringno = i;
  1957. pring->next_cmdidx = 0;
  1958. pring->local_getidx = 0;
  1959. pring->cmdidx = 0;
  1960. INIT_LIST_HEAD(&pring->txq);
  1961. INIT_LIST_HEAD(&pring->txcmplq);
  1962. INIT_LIST_HEAD(&pring->iocb_continueq);
  1963. INIT_LIST_HEAD(&pring->postbufq);
  1964. }
  1965. spin_unlock_irq(phba->host->host_lock);
  1966. return (1);
  1967. }
  1968. int
  1969. lpfc_sli_hba_down(struct lpfc_hba * phba)
  1970. {
  1971. struct lpfc_sli *psli;
  1972. struct lpfc_sli_ring *pring;
  1973. LPFC_MBOXQ_t *pmb;
  1974. struct lpfc_iocbq *iocb, *next_iocb;
  1975. IOCB_t *icmd = NULL;
  1976. int i;
  1977. unsigned long flags = 0;
  1978. psli = &phba->sli;
  1979. lpfc_hba_down_prep(phba);
  1980. spin_lock_irqsave(phba->host->host_lock, flags);
  1981. for (i = 0; i < psli->num_rings; i++) {
  1982. pring = &psli->ring[i];
  1983. pring->flag |= LPFC_DEFERRED_RING_EVENT;
  1984. /*
  1985. * Error everything on the txq since these iocbs have not been
  1986. * given to the FW yet.
  1987. */
  1988. pring->txq_cnt = 0;
  1989. list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
  1990. list_del_init(&iocb->list);
  1991. if (iocb->iocb_cmpl) {
  1992. icmd = &iocb->iocb;
  1993. icmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  1994. icmd->un.ulpWord[4] = IOERR_SLI_DOWN;
  1995. spin_unlock_irqrestore(phba->host->host_lock,
  1996. flags);
  1997. (iocb->iocb_cmpl) (phba, iocb, iocb);
  1998. spin_lock_irqsave(phba->host->host_lock, flags);
  1999. } else
  2000. lpfc_sli_release_iocbq(phba, iocb);
  2001. }
  2002. INIT_LIST_HEAD(&(pring->txq));
  2003. if (pring->fast_lookup) {
  2004. kfree(pring->fast_lookup);
  2005. pring->fast_lookup = NULL;
  2006. }
  2007. }
  2008. spin_unlock_irqrestore(phba->host->host_lock, flags);
  2009. /* Return any active mbox cmds */
  2010. del_timer_sync(&psli->mbox_tmo);
  2011. spin_lock_irqsave(phba->host->host_lock, flags);
  2012. phba->work_hba_events &= ~WORKER_MBOX_TMO;
  2013. if (psli->mbox_active) {
  2014. pmb = psli->mbox_active;
  2015. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  2016. if (pmb->mbox_cmpl) {
  2017. spin_unlock_irqrestore(phba->host->host_lock, flags);
  2018. pmb->mbox_cmpl(phba,pmb);
  2019. spin_lock_irqsave(phba->host->host_lock, flags);
  2020. }
  2021. }
  2022. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2023. psli->mbox_active = NULL;
  2024. /* Return any pending mbox cmds */
  2025. while ((pmb = lpfc_mbox_get(phba)) != NULL) {
  2026. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  2027. if (pmb->mbox_cmpl) {
  2028. spin_unlock_irqrestore(phba->host->host_lock, flags);
  2029. pmb->mbox_cmpl(phba,pmb);
  2030. spin_lock_irqsave(phba->host->host_lock, flags);
  2031. }
  2032. }
  2033. INIT_LIST_HEAD(&psli->mboxq);
  2034. spin_unlock_irqrestore(phba->host->host_lock, flags);
  2035. /*
  2036. * Provided the hba is not in an error state, reset it. It is not
  2037. * capable of IO anymore.
  2038. */
  2039. if (phba->hba_state != LPFC_HBA_ERROR) {
  2040. phba->hba_state = LPFC_INIT_START;
  2041. lpfc_sli_brdreset(phba, 1);
  2042. }
  2043. return 1;
  2044. }
  2045. void
  2046. lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
  2047. {
  2048. uint32_t *src = srcp;
  2049. uint32_t *dest = destp;
  2050. uint32_t ldata;
  2051. int i;
  2052. for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
  2053. ldata = *src;
  2054. ldata = le32_to_cpu(ldata);
  2055. *dest = ldata;
  2056. src++;
  2057. dest++;
  2058. }
  2059. }
  2060. int
  2061. lpfc_sli_ringpostbuf_put(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
  2062. struct lpfc_dmabuf * mp)
  2063. {
  2064. /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
  2065. later */
  2066. list_add_tail(&mp->list, &pring->postbufq);
  2067. pring->postbufq_cnt++;
  2068. return 0;
  2069. }
  2070. struct lpfc_dmabuf *
  2071. lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2072. dma_addr_t phys)
  2073. {
  2074. struct lpfc_dmabuf *mp, *next_mp;
  2075. struct list_head *slp = &pring->postbufq;
  2076. /* Search postbufq, from the begining, looking for a match on phys */
  2077. list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
  2078. if (mp->phys == phys) {
  2079. list_del_init(&mp->list);
  2080. pring->postbufq_cnt--;
  2081. return mp;
  2082. }
  2083. }
  2084. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  2085. "%d:0410 Cannot find virtual addr for mapped buf on "
  2086. "ring %d Data x%llx x%p x%p x%x\n",
  2087. phba->brd_no, pring->ringno, (unsigned long long)phys,
  2088. slp->next, slp->prev, pring->postbufq_cnt);
  2089. return NULL;
  2090. }
  2091. static void
  2092. lpfc_sli_abort_elsreq_cmpl(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
  2093. struct lpfc_iocbq * rspiocb)
  2094. {
  2095. struct lpfc_dmabuf *buf_ptr, *buf_ptr1;
  2096. /* Free the resources associated with the ELS_REQUEST64 IOCB the driver
  2097. * just aborted.
  2098. * In this case, context2 = cmd, context2->next = rsp, context3 = bpl
  2099. */
  2100. if (cmdiocb->context2) {
  2101. buf_ptr1 = (struct lpfc_dmabuf *) cmdiocb->context2;
  2102. /* Free the response IOCB before completing the abort
  2103. command. */
  2104. buf_ptr = NULL;
  2105. list_remove_head((&buf_ptr1->list), buf_ptr,
  2106. struct lpfc_dmabuf, list);
  2107. if (buf_ptr) {
  2108. lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
  2109. kfree(buf_ptr);
  2110. }
  2111. lpfc_mbuf_free(phba, buf_ptr1->virt, buf_ptr1->phys);
  2112. kfree(buf_ptr1);
  2113. }
  2114. if (cmdiocb->context3) {
  2115. buf_ptr = (struct lpfc_dmabuf *) cmdiocb->context3;
  2116. lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
  2117. kfree(buf_ptr);
  2118. }
  2119. lpfc_sli_release_iocbq(phba, cmdiocb);
  2120. return;
  2121. }
  2122. int
  2123. lpfc_sli_issue_abort_iotag32(struct lpfc_hba * phba,
  2124. struct lpfc_sli_ring * pring,
  2125. struct lpfc_iocbq * cmdiocb)
  2126. {
  2127. struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
  2128. struct lpfc_iocbq *abtsiocbp = NULL;
  2129. IOCB_t *icmd = NULL;
  2130. IOCB_t *iabt = NULL;
  2131. /* issue ABTS for this IOCB based on iotag */
  2132. list_remove_head(lpfc_iocb_list, abtsiocbp, struct lpfc_iocbq, list);
  2133. if (abtsiocbp == NULL)
  2134. return 0;
  2135. iabt = &abtsiocbp->iocb;
  2136. icmd = &cmdiocb->iocb;
  2137. switch (icmd->ulpCommand) {
  2138. case CMD_ELS_REQUEST64_CR:
  2139. /* Even though we abort the ELS command, the firmware may access
  2140. * the BPL or other resources before it processes our
  2141. * ABORT_MXRI64. Thus we must delay reusing the cmdiocb
  2142. * resources till the actual abort request completes.
  2143. */
  2144. abtsiocbp->context1 = (void *)((unsigned long)icmd->ulpCommand);
  2145. abtsiocbp->context2 = cmdiocb->context2;
  2146. abtsiocbp->context3 = cmdiocb->context3;
  2147. cmdiocb->context2 = NULL;
  2148. cmdiocb->context3 = NULL;
  2149. abtsiocbp->iocb_cmpl = lpfc_sli_abort_elsreq_cmpl;
  2150. break;
  2151. default:
  2152. lpfc_sli_release_iocbq(phba, abtsiocbp);
  2153. return 0;
  2154. }
  2155. iabt->un.amxri.abortType = ABORT_TYPE_ABTS;
  2156. iabt->un.amxri.iotag32 = icmd->un.elsreq64.bdl.ulpIoTag32;
  2157. iabt->ulpLe = 1;
  2158. iabt->ulpClass = CLASS3;
  2159. iabt->ulpCommand = CMD_ABORT_MXRI64_CN;
  2160. if (lpfc_sli_issue_iocb(phba, pring, abtsiocbp, 0) == IOCB_ERROR) {
  2161. lpfc_sli_release_iocbq(phba, abtsiocbp);
  2162. return 0;
  2163. }
  2164. return 1;
  2165. }
  2166. static int
  2167. lpfc_sli_validate_iocb_cmd(struct lpfc_scsi_buf *lpfc_cmd, uint16_t tgt_id,
  2168. uint64_t lun_id, struct lpfc_iocbq *iocb,
  2169. uint32_t ctx, lpfc_ctx_cmd ctx_cmd)
  2170. {
  2171. int rc = 1;
  2172. if (lpfc_cmd == NULL)
  2173. return rc;
  2174. switch (ctx_cmd) {
  2175. case LPFC_CTX_LUN:
  2176. if ((lpfc_cmd->pCmd->device->id == tgt_id) &&
  2177. (lpfc_cmd->pCmd->device->lun == lun_id))
  2178. rc = 0;
  2179. break;
  2180. case LPFC_CTX_TGT:
  2181. if (lpfc_cmd->pCmd->device->id == tgt_id)
  2182. rc = 0;
  2183. break;
  2184. case LPFC_CTX_CTX:
  2185. if (iocb->iocb.ulpContext == ctx)
  2186. rc = 0;
  2187. case LPFC_CTX_HOST:
  2188. rc = 0;
  2189. break;
  2190. default:
  2191. printk(KERN_ERR "%s: Unknown context cmd type, value %d\n",
  2192. __FUNCTION__, ctx_cmd);
  2193. break;
  2194. }
  2195. return rc;
  2196. }
  2197. int
  2198. lpfc_sli_sum_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2199. uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd ctx_cmd)
  2200. {
  2201. struct lpfc_iocbq *iocb, *next_iocb;
  2202. IOCB_t *cmd = NULL;
  2203. struct lpfc_scsi_buf *lpfc_cmd;
  2204. int sum = 0, ret_val = 0;
  2205. /* Next check the txcmplq */
  2206. list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list) {
  2207. cmd = &iocb->iocb;
  2208. /* Must be a FCP command */
  2209. if ((cmd->ulpCommand != CMD_FCP_ICMND64_CR) &&
  2210. (cmd->ulpCommand != CMD_FCP_IWRITE64_CR) &&
  2211. (cmd->ulpCommand != CMD_FCP_IREAD64_CR)) {
  2212. continue;
  2213. }
  2214. /* context1 MUST be a struct lpfc_scsi_buf */
  2215. lpfc_cmd = (struct lpfc_scsi_buf *) (iocb->context1);
  2216. ret_val = lpfc_sli_validate_iocb_cmd(lpfc_cmd, tgt_id, lun_id,
  2217. NULL, 0, ctx_cmd);
  2218. if (ret_val != 0)
  2219. continue;
  2220. sum++;
  2221. }
  2222. return sum;
  2223. }
  2224. void
  2225. lpfc_sli_abort_fcp_cmpl(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
  2226. struct lpfc_iocbq * rspiocb)
  2227. {
  2228. spin_lock_irq(phba->host->host_lock);
  2229. lpfc_sli_release_iocbq(phba, cmdiocb);
  2230. spin_unlock_irq(phba->host->host_lock);
  2231. return;
  2232. }
  2233. int
  2234. lpfc_sli_abort_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2235. uint16_t tgt_id, uint64_t lun_id, uint32_t ctx,
  2236. lpfc_ctx_cmd abort_cmd)
  2237. {
  2238. struct lpfc_iocbq *iocb, *next_iocb;
  2239. struct lpfc_iocbq *abtsiocb = NULL;
  2240. struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
  2241. IOCB_t *cmd = NULL;
  2242. struct lpfc_scsi_buf *lpfc_cmd;
  2243. int errcnt = 0, ret_val = 0;
  2244. list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list) {
  2245. cmd = &iocb->iocb;
  2246. /* Must be a FCP command */
  2247. if ((cmd->ulpCommand != CMD_FCP_ICMND64_CR) &&
  2248. (cmd->ulpCommand != CMD_FCP_IWRITE64_CR) &&
  2249. (cmd->ulpCommand != CMD_FCP_IREAD64_CR)) {
  2250. continue;
  2251. }
  2252. /* context1 MUST be a struct lpfc_scsi_buf */
  2253. lpfc_cmd = (struct lpfc_scsi_buf *) (iocb->context1);
  2254. ret_val = lpfc_sli_validate_iocb_cmd(lpfc_cmd, tgt_id, lun_id,
  2255. iocb, ctx, abort_cmd);
  2256. if (ret_val != 0)
  2257. continue;
  2258. /* issue ABTS for this IOCB based on iotag */
  2259. list_remove_head(lpfc_iocb_list, abtsiocb, struct lpfc_iocbq,
  2260. list);
  2261. if (abtsiocb == NULL) {
  2262. errcnt++;
  2263. continue;
  2264. }
  2265. abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
  2266. abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext;
  2267. abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag;
  2268. abtsiocb->iocb.ulpLe = 1;
  2269. abtsiocb->iocb.ulpClass = cmd->ulpClass;
  2270. if (phba->hba_state >= LPFC_LINK_UP)
  2271. abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
  2272. else
  2273. abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
  2274. /* Setup callback routine and issue the command. */
  2275. abtsiocb->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
  2276. ret_val = lpfc_sli_issue_iocb(phba, pring, abtsiocb, 0);
  2277. if (ret_val == IOCB_ERROR) {
  2278. lpfc_sli_release_iocbq(phba, abtsiocb);
  2279. errcnt++;
  2280. continue;
  2281. }
  2282. }
  2283. return errcnt;
  2284. }
  2285. void
  2286. lpfc_sli_wake_iocb_high_priority(struct lpfc_hba * phba,
  2287. struct lpfc_iocbq * queue1,
  2288. struct lpfc_iocbq * queue2)
  2289. {
  2290. struct lpfc_iocbq *save_iocbq = queue1->context2;
  2291. if (save_iocbq && queue2)
  2292. memcpy(&save_iocbq->iocb, &queue2->iocb, sizeof(queue2->iocb));
  2293. /* The waiter is looking for LPFC_IO_HIPRI bit to be set
  2294. as a signal to wake up */
  2295. queue1->iocb_flag |= LPFC_IO_HIPRI;
  2296. return;
  2297. }
  2298. int
  2299. lpfc_sli_issue_iocb_wait_high_priority(struct lpfc_hba * phba,
  2300. struct lpfc_sli_ring * pring,
  2301. struct lpfc_iocbq * piocb,
  2302. uint32_t flag,
  2303. struct lpfc_iocbq * prspiocbq,
  2304. uint32_t timeout)
  2305. {
  2306. int j, delay_time, retval = IOCB_ERROR;
  2307. /* The caller must left context1 empty. */
  2308. if (piocb->context_un.hipri_wait_queue != 0) {
  2309. return IOCB_ERROR;
  2310. }
  2311. /*
  2312. * If the caller has provided a response iocbq buffer, context2 must
  2313. * be NULL or its an error.
  2314. */
  2315. if (prspiocbq && piocb->context2) {
  2316. return IOCB_ERROR;
  2317. }
  2318. piocb->context2 = prspiocbq;
  2319. /* Setup callback routine and issue the command. */
  2320. piocb->iocb_cmpl = lpfc_sli_wake_iocb_high_priority;
  2321. retval = lpfc_sli_issue_iocb(phba, pring, piocb,
  2322. flag | SLI_IOCB_HIGH_PRIORITY);
  2323. if (retval != IOCB_SUCCESS) {
  2324. piocb->context2 = NULL;
  2325. return IOCB_ERROR;
  2326. }
  2327. /*
  2328. * This high-priority iocb was sent out-of-band. Poll for its
  2329. * completion rather than wait for a signal. Note that the host_lock
  2330. * is held by the midlayer and must be released here to allow the
  2331. * interrupt handlers to complete the IO and signal this routine via
  2332. * the iocb_flag.
  2333. * Also, the delay_time is computed to be one second longer than
  2334. * the scsi command timeout to give the FW time to abort on
  2335. * timeout rather than the driver just giving up. Typically,
  2336. * the midlayer does not specify a time for this command so the
  2337. * driver is free to enforce its own timeout.
  2338. */
  2339. delay_time = ((timeout + 1) * 1000) >> 6;
  2340. retval = IOCB_ERROR;
  2341. spin_unlock_irq(phba->host->host_lock);
  2342. for (j = 0; j < 64; j++) {
  2343. msleep(delay_time);
  2344. if (piocb->iocb_flag & LPFC_IO_HIPRI) {
  2345. piocb->iocb_flag &= ~LPFC_IO_HIPRI;
  2346. retval = IOCB_SUCCESS;
  2347. break;
  2348. }
  2349. }
  2350. spin_lock_irq(phba->host->host_lock);
  2351. piocb->context2 = NULL;
  2352. return retval;
  2353. }
  2354. int
  2355. lpfc_sli_issue_mbox_wait(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq,
  2356. uint32_t timeout)
  2357. {
  2358. DECLARE_WAIT_QUEUE_HEAD(done_q);
  2359. DECLARE_WAITQUEUE(wq_entry, current);
  2360. uint32_t timeleft = 0;
  2361. int retval;
  2362. /* The caller must leave context1 empty. */
  2363. if (pmboxq->context1 != 0) {
  2364. return (MBX_NOT_FINISHED);
  2365. }
  2366. /* setup wake call as IOCB callback */
  2367. pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
  2368. /* setup context field to pass wait_queue pointer to wake function */
  2369. pmboxq->context1 = &done_q;
  2370. /* start to sleep before we wait, to avoid races */
  2371. set_current_state(TASK_INTERRUPTIBLE);
  2372. add_wait_queue(&done_q, &wq_entry);
  2373. /* now issue the command */
  2374. retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
  2375. if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
  2376. timeleft = schedule_timeout(timeout * HZ);
  2377. pmboxq->context1 = NULL;
  2378. /* if schedule_timeout returns 0, we timed out and were not
  2379. woken up */
  2380. if (timeleft == 0) {
  2381. retval = MBX_TIMEOUT;
  2382. } else {
  2383. retval = MBX_SUCCESS;
  2384. }
  2385. }
  2386. set_current_state(TASK_RUNNING);
  2387. remove_wait_queue(&done_q, &wq_entry);
  2388. return retval;
  2389. }
  2390. irqreturn_t
  2391. lpfc_intr_handler(int irq, void *dev_id, struct pt_regs * regs)
  2392. {
  2393. struct lpfc_hba *phba;
  2394. uint32_t ha_copy;
  2395. uint32_t work_ha_copy;
  2396. unsigned long status;
  2397. int i;
  2398. uint32_t control;
  2399. /*
  2400. * Get the driver's phba structure from the dev_id and
  2401. * assume the HBA is not interrupting.
  2402. */
  2403. phba = (struct lpfc_hba *) dev_id;
  2404. if (unlikely(!phba))
  2405. return IRQ_NONE;
  2406. phba->sli.slistat.sli_intr++;
  2407. /*
  2408. * Call the HBA to see if it is interrupting. If not, don't claim
  2409. * the interrupt
  2410. */
  2411. /* Ignore all interrupts during initialization. */
  2412. if (unlikely(phba->hba_state < LPFC_LINK_DOWN))
  2413. return IRQ_NONE;
  2414. /*
  2415. * Read host attention register to determine interrupt source
  2416. * Clear Attention Sources, except Error Attention (to
  2417. * preserve status) and Link Attention
  2418. */
  2419. spin_lock(phba->host->host_lock);
  2420. ha_copy = readl(phba->HAregaddr);
  2421. writel((ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
  2422. readl(phba->HAregaddr); /* flush */
  2423. spin_unlock(phba->host->host_lock);
  2424. if (unlikely(!ha_copy))
  2425. return IRQ_NONE;
  2426. work_ha_copy = ha_copy & phba->work_ha_mask;
  2427. if (unlikely(work_ha_copy)) {
  2428. if (work_ha_copy & HA_LATT) {
  2429. if (phba->sli.sli_flag & LPFC_PROCESS_LA) {
  2430. /*
  2431. * Turn off Link Attention interrupts
  2432. * until CLEAR_LA done
  2433. */
  2434. spin_lock(phba->host->host_lock);
  2435. phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
  2436. control = readl(phba->HCregaddr);
  2437. control &= ~HC_LAINT_ENA;
  2438. writel(control, phba->HCregaddr);
  2439. readl(phba->HCregaddr); /* flush */
  2440. spin_unlock(phba->host->host_lock);
  2441. }
  2442. else
  2443. work_ha_copy &= ~HA_LATT;
  2444. }
  2445. if (work_ha_copy & ~(HA_ERATT|HA_MBATT|HA_LATT)) {
  2446. for (i = 0; i < phba->sli.num_rings; i++) {
  2447. if (work_ha_copy & (HA_RXATT << (4*i))) {
  2448. /*
  2449. * Turn off Slow Rings interrupts
  2450. */
  2451. spin_lock(phba->host->host_lock);
  2452. control = readl(phba->HCregaddr);
  2453. control &= ~(HC_R0INT_ENA << i);
  2454. writel(control, phba->HCregaddr);
  2455. readl(phba->HCregaddr); /* flush */
  2456. spin_unlock(phba->host->host_lock);
  2457. }
  2458. }
  2459. }
  2460. if (work_ha_copy & HA_ERATT) {
  2461. phba->hba_state = LPFC_HBA_ERROR;
  2462. /*
  2463. * There was a link/board error. Read the
  2464. * status register to retrieve the error event
  2465. * and process it.
  2466. */
  2467. phba->sli.slistat.err_attn_event++;
  2468. /* Save status info */
  2469. phba->work_hs = readl(phba->HSregaddr);
  2470. phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
  2471. phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
  2472. /* Clear Chip error bit */
  2473. writel(HA_ERATT, phba->HAregaddr);
  2474. readl(phba->HAregaddr); /* flush */
  2475. /*
  2476. * Reseting the HBA is the only reliable way
  2477. * to shutdown interrupt when there is a
  2478. * ERROR.
  2479. */
  2480. lpfc_sli_send_reset(phba, phba->hba_state);
  2481. }
  2482. spin_lock(phba->host->host_lock);
  2483. phba->work_ha |= work_ha_copy;
  2484. if (phba->work_wait)
  2485. wake_up(phba->work_wait);
  2486. spin_unlock(phba->host->host_lock);
  2487. }
  2488. ha_copy &= ~(phba->work_ha_mask);
  2489. /*
  2490. * Process all events on FCP ring. Take the optimized path for
  2491. * FCP IO. Any other IO is slow path and is handled by
  2492. * the worker thread.
  2493. */
  2494. status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
  2495. status >>= (4*LPFC_FCP_RING);
  2496. if (status & HA_RXATT)
  2497. lpfc_sli_handle_fast_ring_event(phba,
  2498. &phba->sli.ring[LPFC_FCP_RING],
  2499. status);
  2500. return IRQ_HANDLED;
  2501. } /* lpfc_intr_handler */