mach-exynos5-dt.c 8.0 KB

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  1. /*
  2. * SAMSUNG EXYNOS5250 Flattened Device Tree enabled machine
  3. *
  4. * Copyright (c) 2012 Samsung Electronics Co., Ltd.
  5. * http://www.samsung.com
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/of_platform.h>
  12. #include <linux/of_fdt.h>
  13. #include <linux/serial_core.h>
  14. #include <linux/memblock.h>
  15. #include <linux/io.h>
  16. #include <asm/mach/arch.h>
  17. #include <asm/hardware/gic.h>
  18. #include <mach/map.h>
  19. #include <mach/regs-pmu.h>
  20. #include <plat/cpu.h>
  21. #include <plat/regs-serial.h>
  22. #include <plat/mfc.h>
  23. #include "common.h"
  24. /*
  25. * The following lookup table is used to override device names when devices
  26. * are registered from device tree. This is temporarily added to enable
  27. * device tree support addition for the EXYNOS5 architecture.
  28. *
  29. * For drivers that require platform data to be provided from the machine
  30. * file, a platform data pointer can also be supplied along with the
  31. * devices names. Usually, the platform data elements that cannot be parsed
  32. * from the device tree by the drivers (example: function pointers) are
  33. * supplied. But it should be noted that this is a temporary mechanism and
  34. * at some point, the drivers should be capable of parsing all the platform
  35. * data from the device tree.
  36. */
  37. static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = {
  38. OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART0,
  39. "exynos4210-uart.0", NULL),
  40. OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART1,
  41. "exynos4210-uart.1", NULL),
  42. OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART2,
  43. "exynos4210-uart.2", NULL),
  44. OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART3,
  45. "exynos4210-uart.3", NULL),
  46. OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(0),
  47. "s3c2440-i2c.0", NULL),
  48. OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(1),
  49. "s3c2440-i2c.1", NULL),
  50. OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(2),
  51. "s3c2440-i2c.2", NULL),
  52. OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(3),
  53. "s3c2440-i2c.3", NULL),
  54. OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(4),
  55. "s3c2440-i2c.4", NULL),
  56. OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(5),
  57. "s3c2440-i2c.5", NULL),
  58. OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(6),
  59. "s3c2440-i2c.6", NULL),
  60. OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(7),
  61. "s3c2440-i2c.7", NULL),
  62. OF_DEV_AUXDATA("samsung,s3c2440-hdmiphy-i2c", EXYNOS5_PA_IIC(8),
  63. "s3c2440-hdmiphy-i2c", NULL),
  64. OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI0,
  65. "dw_mmc.0", NULL),
  66. OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI1,
  67. "dw_mmc.1", NULL),
  68. OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI2,
  69. "dw_mmc.2", NULL),
  70. OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI3,
  71. "dw_mmc.3", NULL),
  72. OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS5_PA_SPI0,
  73. "exynos4210-spi.0", NULL),
  74. OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS5_PA_SPI1,
  75. "exynos4210-spi.1", NULL),
  76. OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS5_PA_SPI2,
  77. "exynos4210-spi.2", NULL),
  78. OF_DEV_AUXDATA("samsung,exynos5-sata-ahci", 0x122F0000,
  79. "exynos5-sata", NULL),
  80. OF_DEV_AUXDATA("samsung,exynos5-sata-phy", 0x12170000,
  81. "exynos5-sata-phy", NULL),
  82. OF_DEV_AUXDATA("samsung,exynos5-sata-phy-i2c", 0x121D0000,
  83. "exynos5-sata-phy-i2c", NULL),
  84. OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA0, "dma-pl330.0", NULL),
  85. OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.1", NULL),
  86. OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_MDMA1, "dma-pl330.2", NULL),
  87. OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC0,
  88. "exynos-gsc.0", NULL),
  89. OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC1,
  90. "exynos-gsc.1", NULL),
  91. OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC2,
  92. "exynos-gsc.2", NULL),
  93. OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC3,
  94. "exynos-gsc.3", NULL),
  95. OF_DEV_AUXDATA("samsung,exynos5-hdmi", 0x14530000,
  96. "exynos5-hdmi", NULL),
  97. OF_DEV_AUXDATA("samsung,exynos5-mixer", 0x14450000,
  98. "exynos5-mixer", NULL),
  99. OF_DEV_AUXDATA("samsung,mfc-v6", 0x11000000, "s5p-mfc-v6", NULL),
  100. OF_DEV_AUXDATA("samsung,exynos5250-tmu", 0x10060000,
  101. "exynos-tmu", NULL),
  102. OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x11210000,
  103. "exynos-sysmmu.0", "mfc"), /* MFC_L */
  104. OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x11200000,
  105. "exynos-sysmmu.1", "mfc"), /* MFC_R */
  106. OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x14650000,
  107. "exynos-sysmmu.2", NULL), /* TV */
  108. OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x11F20000,
  109. "exynos-sysmmu.3", "jpeg"), /* JPEG */
  110. OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x11D40000,
  111. "exynos-sysmmu.4", NULL), /* ROTATOR */
  112. OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x13E80000,
  113. "exynos-sysmmu.5", "gscl"), /* GSCL0 */
  114. OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x13E90000,
  115. "exynos-sysmmu.6", "gscl"), /* GSCL1 */
  116. OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x13EA0000,
  117. "exynos-sysmmu.7", "gscl"), /* GSCL2 */
  118. OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x13EB0000,
  119. "exynos-sysmmu.8", "gscl"), /* GSCL3 */
  120. OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x13260000,
  121. "exynos-sysmmu.9", NULL), /* FIMC-IS0 */
  122. OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x132C0000,
  123. "exynos-sysmmu.10", NULL), /* FIMC-IS1 */
  124. OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x14640000,
  125. "exynos-sysmmu.11", NULL), /* FIMD1 */
  126. OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x13C40000,
  127. "exynos-sysmmu.12", NULL), /* FIMC-LITE0 */
  128. OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x13C50000,
  129. "exynos-sysmmu.13", NULL), /* FIMC-LITE1 */
  130. OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x10A60000,
  131. "exynos-sysmmu.14", NULL), /* G2D */
  132. {},
  133. };
  134. static const struct of_dev_auxdata exynos5440_auxdata_lookup[] __initconst = {
  135. OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5440_PA_UART0,
  136. "exynos4210-uart.0", NULL),
  137. {},
  138. };
  139. static void __init exynos5_dt_map_io(void)
  140. {
  141. unsigned long root = of_get_flat_dt_root();
  142. exynos_init_io(NULL, 0);
  143. if (of_flat_dt_is_compatible(root, "samsung,exynos5250"))
  144. s3c24xx_init_clocks(24000000);
  145. }
  146. static void __init exynos5_dt_machine_init(void)
  147. {
  148. struct device_node *i2c_np;
  149. const char *i2c_compat = "samsung,s3c2440-i2c";
  150. unsigned int tmp;
  151. /*
  152. * Exynos5's legacy i2c controller and new high speed i2c
  153. * controller have muxed interrupt sources. By default the
  154. * interrupts for 4-channel HS-I2C controller are enabled.
  155. * If node for first four channels of legacy i2c controller
  156. * are available then re-configure the interrupts via the
  157. * system register.
  158. */
  159. for_each_compatible_node(i2c_np, NULL, i2c_compat) {
  160. if (of_device_is_available(i2c_np)) {
  161. if (of_alias_get_id(i2c_np, "i2c") < 4) {
  162. tmp = readl(EXYNOS5_SYS_I2C_CFG);
  163. writel(tmp & ~(0x1 << of_alias_get_id(i2c_np, "i2c")),
  164. EXYNOS5_SYS_I2C_CFG);
  165. }
  166. }
  167. }
  168. if (of_machine_is_compatible("samsung,exynos5250"))
  169. of_platform_populate(NULL, of_default_bus_match_table,
  170. exynos5250_auxdata_lookup, NULL);
  171. else if (of_machine_is_compatible("samsung,exynos5440"))
  172. of_platform_populate(NULL, of_default_bus_match_table,
  173. exynos5440_auxdata_lookup, NULL);
  174. }
  175. static char const *exynos5_dt_compat[] __initdata = {
  176. "samsung,exynos5250",
  177. "samsung,exynos5440",
  178. NULL
  179. };
  180. static void __init exynos5_reserve(void)
  181. {
  182. #ifdef CONFIG_S5P_DEV_MFC
  183. struct s5p_mfc_dt_meminfo mfc_mem;
  184. /* Reserve memory for MFC only if it's available */
  185. mfc_mem.compatible = "samsung,mfc-v6";
  186. if (of_scan_flat_dt(s5p_fdt_find_mfc_mem, &mfc_mem))
  187. s5p_mfc_reserve_mem(mfc_mem.roff, mfc_mem.rsize, mfc_mem.loff,
  188. mfc_mem.lsize);
  189. #endif
  190. }
  191. DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)")
  192. /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
  193. .init_irq = exynos5_init_irq,
  194. .smp = smp_ops(exynos_smp_ops),
  195. .map_io = exynos5_dt_map_io,
  196. .handle_irq = gic_handle_irq,
  197. .init_machine = exynos5_dt_machine_init,
  198. .init_late = exynos_init_late,
  199. .timer = &exynos4_timer,
  200. .dt_compat = exynos5_dt_compat,
  201. .restart = exynos5_restart,
  202. .reserve = exynos5_reserve,
  203. MACHINE_END