sun5i.dtsi 1.4 KB

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  1. /*
  2. * Copyright 2012 Maxime Ripard
  3. *
  4. * Maxime Ripard <maxime.ripard@free-electrons.com>
  5. *
  6. * The code contained herein is licensed under the GNU General Public
  7. * License. You may obtain a copy of the GNU General Public License
  8. * Version 2 or later at the following locations:
  9. *
  10. * http://www.opensource.org/licenses/gpl-license.html
  11. * http://www.gnu.org/copyleft/gpl.html
  12. */
  13. /include/ "skeleton.dtsi"
  14. / {
  15. interrupt-parent = <&intc>;
  16. cpus {
  17. cpu@0 {
  18. compatible = "arm,cortex-a8";
  19. };
  20. };
  21. chosen {
  22. bootargs = "earlyprintk console=ttyS0,115200";
  23. };
  24. memory {
  25. reg = <0x40000000 0x20000000>;
  26. };
  27. clocks {
  28. #address-cells = <1>;
  29. #size-cells = <0>;
  30. osc: oscillator {
  31. #clock-cells = <0>;
  32. compatible = "fixed-clock";
  33. clock-frequency = <24000000>;
  34. };
  35. };
  36. soc {
  37. compatible = "simple-bus";
  38. #address-cells = <1>;
  39. #size-cells = <1>;
  40. reg = <0x01c20000 0x300000>;
  41. ranges;
  42. timer@01c20c00 {
  43. compatible = "allwinner,sunxi-timer";
  44. reg = <0x01c20c00 0x400>;
  45. interrupts = <22>;
  46. clocks = <&osc>;
  47. };
  48. intc: interrupt-controller@01c20400 {
  49. compatible = "allwinner,sunxi-ic";
  50. reg = <0x01c20400 0x400>;
  51. interrupt-controller;
  52. #interrupt-cells = <1>;
  53. };
  54. uart1: uart@01c28400 {
  55. compatible = "ns8250";
  56. reg = <0x01c28400 0x400>;
  57. interrupts = <2>;
  58. reg-shift = <2>;
  59. clock-frequency = <24000000>;
  60. status = "disabled";
  61. };
  62. };
  63. };