qla_os.c 101 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850285128522853285428552856285728582859286028612862286328642865286628672868286928702871287228732874287528762877287828792880288128822883288428852886288728882889289028912892289328942895289628972898289929002901290229032904290529062907290829092910291129122913291429152916291729182919292029212922292329242925292629272928292929302931293229332934293529362937293829392940294129422943294429452946294729482949295029512952295329542955295629572958295929602961296229632964296529662967296829692970297129722973297429752976297729782979298029812982298329842985298629872988298929902991299229932994299529962997299829993000300130023003300430053006300730083009301030113012301330143015301630173018301930203021302230233024302530263027302830293030303130323033303430353036303730383039304030413042304330443045304630473048304930503051305230533054305530563057305830593060306130623063306430653066306730683069307030713072307330743075307630773078307930803081308230833084308530863087308830893090309130923093309430953096309730983099310031013102310331043105310631073108310931103111311231133114311531163117311831193120312131223123312431253126312731283129313031313132313331343135313631373138313931403141314231433144314531463147314831493150315131523153315431553156315731583159316031613162316331643165316631673168316931703171317231733174317531763177317831793180318131823183318431853186318731883189319031913192319331943195319631973198319932003201320232033204320532063207320832093210321132123213321432153216321732183219322032213222322332243225322632273228322932303231323232333234323532363237323832393240324132423243324432453246324732483249325032513252325332543255325632573258325932603261326232633264326532663267326832693270327132723273327432753276327732783279328032813282328332843285328632873288328932903291329232933294329532963297329832993300330133023303330433053306330733083309331033113312331333143315331633173318331933203321332233233324332533263327332833293330333133323333333433353336333733383339334033413342334333443345334633473348334933503351335233533354335533563357335833593360336133623363336433653366336733683369337033713372337333743375337633773378337933803381338233833384338533863387338833893390339133923393339433953396339733983399340034013402340334043405340634073408340934103411341234133414341534163417341834193420342134223423342434253426342734283429343034313432343334343435343634373438343934403441344234433444344534463447344834493450345134523453345434553456345734583459346034613462346334643465346634673468346934703471347234733474347534763477347834793480348134823483348434853486348734883489349034913492349334943495349634973498349935003501350235033504350535063507350835093510351135123513351435153516351735183519352035213522352335243525352635273528352935303531353235333534353535363537353835393540354135423543354435453546354735483549355035513552355335543555355635573558355935603561356235633564356535663567356835693570357135723573357435753576357735783579358035813582358335843585358635873588358935903591359235933594359535963597359835993600360136023603360436053606360736083609361036113612361336143615361636173618361936203621362236233624362536263627362836293630363136323633363436353636363736383639364036413642364336443645364636473648364936503651365236533654365536563657365836593660366136623663366436653666366736683669367036713672367336743675367636773678367936803681368236833684368536863687368836893690369136923693369436953696369736983699370037013702370337043705370637073708370937103711371237133714371537163717371837193720372137223723372437253726372737283729373037313732373337343735373637373738373937403741374237433744374537463747374837493750375137523753375437553756375737583759376037613762376337643765376637673768376937703771377237733774377537763777377837793780378137823783378437853786378737883789379037913792379337943795379637973798379938003801380238033804380538063807380838093810381138123813381438153816381738183819382038213822382338243825382638273828382938303831383238333834383538363837383838393840384138423843384438453846384738483849385038513852385338543855385638573858385938603861386238633864386538663867386838693870387138723873387438753876387738783879
  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2008 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include <linux/moduleparam.h>
  9. #include <linux/vmalloc.h>
  10. #include <linux/delay.h>
  11. #include <linux/kthread.h>
  12. #include <linux/mutex.h>
  13. #include <linux/kobject.h>
  14. #include <linux/slab.h>
  15. #include <scsi/scsi_tcq.h>
  16. #include <scsi/scsicam.h>
  17. #include <scsi/scsi_transport.h>
  18. #include <scsi/scsi_transport_fc.h>
  19. /*
  20. * Driver version
  21. */
  22. char qla2x00_version_str[40];
  23. static int apidev_major;
  24. /*
  25. * SRB allocation cache
  26. */
  27. static struct kmem_cache *srb_cachep;
  28. /*
  29. * CT6 CTX allocation cache
  30. */
  31. static struct kmem_cache *ctx_cachep;
  32. int ql2xlogintimeout = 20;
  33. module_param(ql2xlogintimeout, int, S_IRUGO|S_IRUSR);
  34. MODULE_PARM_DESC(ql2xlogintimeout,
  35. "Login timeout value in seconds.");
  36. int qlport_down_retry;
  37. module_param(qlport_down_retry, int, S_IRUGO|S_IRUSR);
  38. MODULE_PARM_DESC(qlport_down_retry,
  39. "Maximum number of command retries to a port that returns "
  40. "a PORT-DOWN status.");
  41. int ql2xplogiabsentdevice;
  42. module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  43. MODULE_PARM_DESC(ql2xplogiabsentdevice,
  44. "Option to enable PLOGI to devices that are not present after "
  45. "a Fabric scan. This is needed for several broken switches. "
  46. "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
  47. int ql2xloginretrycount = 0;
  48. module_param(ql2xloginretrycount, int, S_IRUGO|S_IRUSR);
  49. MODULE_PARM_DESC(ql2xloginretrycount,
  50. "Specify an alternate value for the NVRAM login retry count.");
  51. int ql2xallocfwdump = 1;
  52. module_param(ql2xallocfwdump, int, S_IRUGO|S_IRUSR);
  53. MODULE_PARM_DESC(ql2xallocfwdump,
  54. "Option to enable allocation of memory for a firmware dump "
  55. "during HBA initialization. Memory allocation requirements "
  56. "vary by ISP type. Default is 1 - allocate memory.");
  57. int ql2xextended_error_logging;
  58. module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  59. MODULE_PARM_DESC(ql2xextended_error_logging,
  60. "Option to enable extended error logging, "
  61. "Default is 0 - no logging. 1 - log errors.");
  62. int ql2xshiftctondsd = 6;
  63. module_param(ql2xshiftctondsd, int, S_IRUGO|S_IRUSR);
  64. MODULE_PARM_DESC(ql2xshiftctondsd,
  65. "Set to control shifting of command type processing "
  66. "based on total number of SG elements.");
  67. static void qla2x00_free_device(scsi_qla_host_t *);
  68. int ql2xfdmienable=1;
  69. module_param(ql2xfdmienable, int, S_IRUGO|S_IRUSR);
  70. MODULE_PARM_DESC(ql2xfdmienable,
  71. "Enables FDMI registrations. "
  72. "0 - no FDMI. Default is 1 - perform FDMI.");
  73. #define MAX_Q_DEPTH 32
  74. static int ql2xmaxqdepth = MAX_Q_DEPTH;
  75. module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
  76. MODULE_PARM_DESC(ql2xmaxqdepth,
  77. "Maximum queue depth to report for target devices.");
  78. int ql2xiidmaenable=1;
  79. module_param(ql2xiidmaenable, int, S_IRUGO|S_IRUSR);
  80. MODULE_PARM_DESC(ql2xiidmaenable,
  81. "Enables iIDMA settings "
  82. "Default is 1 - perform iIDMA. 0 - no iIDMA.");
  83. int ql2xmaxqueues = 1;
  84. module_param(ql2xmaxqueues, int, S_IRUGO|S_IRUSR);
  85. MODULE_PARM_DESC(ql2xmaxqueues,
  86. "Enables MQ settings "
  87. "Default is 1 for single queue. Set it to number \
  88. of queues in MQ mode.");
  89. int ql2xmultique_tag;
  90. module_param(ql2xmultique_tag, int, S_IRUGO|S_IRUSR);
  91. MODULE_PARM_DESC(ql2xmultique_tag,
  92. "Enables CPU affinity settings for the driver "
  93. "Default is 0 for no affinity of request and response IO. "
  94. "Set it to 1 to turn on the cpu affinity.");
  95. int ql2xfwloadbin;
  96. module_param(ql2xfwloadbin, int, S_IRUGO|S_IRUSR);
  97. MODULE_PARM_DESC(ql2xfwloadbin,
  98. "Option to specify location from which to load ISP firmware:\n"
  99. " 2 -- load firmware via the request_firmware() (hotplug)\n"
  100. " interface.\n"
  101. " 1 -- load firmware from flash.\n"
  102. " 0 -- use default semantics.\n");
  103. int ql2xetsenable;
  104. module_param(ql2xetsenable, int, S_IRUGO|S_IRUSR);
  105. MODULE_PARM_DESC(ql2xetsenable,
  106. "Enables firmware ETS burst."
  107. "Default is 0 - skip ETS enablement.");
  108. int ql2xdbwr;
  109. module_param(ql2xdbwr, int, S_IRUGO|S_IRUSR);
  110. MODULE_PARM_DESC(ql2xdbwr,
  111. "Option to specify scheme for request queue posting\n"
  112. " 0 -- Regular doorbell.\n"
  113. " 1 -- CAMRAM doorbell (faster).\n");
  114. int ql2xdontresethba;
  115. module_param(ql2xdontresethba, int, S_IRUGO|S_IRUSR);
  116. MODULE_PARM_DESC(ql2xdontresethba,
  117. "Option to specify reset behaviour\n"
  118. " 0 (Default) -- Reset on failure.\n"
  119. " 1 -- Do not reset on failure.\n");
  120. /*
  121. * SCSI host template entry points
  122. */
  123. static int qla2xxx_slave_configure(struct scsi_device * device);
  124. static int qla2xxx_slave_alloc(struct scsi_device *);
  125. static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
  126. static void qla2xxx_scan_start(struct Scsi_Host *);
  127. static void qla2xxx_slave_destroy(struct scsi_device *);
  128. static int qla2xxx_queuecommand(struct scsi_cmnd *cmd,
  129. void (*fn)(struct scsi_cmnd *));
  130. static int qla2xxx_eh_abort(struct scsi_cmnd *);
  131. static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
  132. static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
  133. static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
  134. static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
  135. static int qla2x00_change_queue_depth(struct scsi_device *, int, int);
  136. static int qla2x00_change_queue_type(struct scsi_device *, int);
  137. struct scsi_host_template qla2xxx_driver_template = {
  138. .module = THIS_MODULE,
  139. .name = QLA2XXX_DRIVER_NAME,
  140. .queuecommand = qla2xxx_queuecommand,
  141. .eh_abort_handler = qla2xxx_eh_abort,
  142. .eh_device_reset_handler = qla2xxx_eh_device_reset,
  143. .eh_target_reset_handler = qla2xxx_eh_target_reset,
  144. .eh_bus_reset_handler = qla2xxx_eh_bus_reset,
  145. .eh_host_reset_handler = qla2xxx_eh_host_reset,
  146. .slave_configure = qla2xxx_slave_configure,
  147. .slave_alloc = qla2xxx_slave_alloc,
  148. .slave_destroy = qla2xxx_slave_destroy,
  149. .scan_finished = qla2xxx_scan_finished,
  150. .scan_start = qla2xxx_scan_start,
  151. .change_queue_depth = qla2x00_change_queue_depth,
  152. .change_queue_type = qla2x00_change_queue_type,
  153. .this_id = -1,
  154. .cmd_per_lun = 3,
  155. .use_clustering = ENABLE_CLUSTERING,
  156. .sg_tablesize = SG_ALL,
  157. .max_sectors = 0xFFFF,
  158. .shost_attrs = qla2x00_host_attrs,
  159. };
  160. static struct scsi_transport_template *qla2xxx_transport_template = NULL;
  161. struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
  162. /* TODO Convert to inlines
  163. *
  164. * Timer routines
  165. */
  166. __inline__ void
  167. qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
  168. {
  169. init_timer(&vha->timer);
  170. vha->timer.expires = jiffies + interval * HZ;
  171. vha->timer.data = (unsigned long)vha;
  172. vha->timer.function = (void (*)(unsigned long))func;
  173. add_timer(&vha->timer);
  174. vha->timer_active = 1;
  175. }
  176. static inline void
  177. qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
  178. {
  179. /* Currently used for 82XX only. */
  180. if (vha->device_flags & DFLG_DEV_FAILED)
  181. return;
  182. mod_timer(&vha->timer, jiffies + interval * HZ);
  183. }
  184. static __inline__ void
  185. qla2x00_stop_timer(scsi_qla_host_t *vha)
  186. {
  187. del_timer_sync(&vha->timer);
  188. vha->timer_active = 0;
  189. }
  190. static int qla2x00_do_dpc(void *data);
  191. static void qla2x00_rst_aen(scsi_qla_host_t *);
  192. static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
  193. struct req_que **, struct rsp_que **);
  194. static void qla2x00_mem_free(struct qla_hw_data *);
  195. static void qla2x00_sp_free_dma(srb_t *);
  196. /* -------------------------------------------------------------------------- */
  197. static int qla2x00_alloc_queues(struct qla_hw_data *ha)
  198. {
  199. ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
  200. GFP_KERNEL);
  201. if (!ha->req_q_map) {
  202. qla_printk(KERN_WARNING, ha,
  203. "Unable to allocate memory for request queue ptrs\n");
  204. goto fail_req_map;
  205. }
  206. ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
  207. GFP_KERNEL);
  208. if (!ha->rsp_q_map) {
  209. qla_printk(KERN_WARNING, ha,
  210. "Unable to allocate memory for response queue ptrs\n");
  211. goto fail_rsp_map;
  212. }
  213. set_bit(0, ha->rsp_qid_map);
  214. set_bit(0, ha->req_qid_map);
  215. return 1;
  216. fail_rsp_map:
  217. kfree(ha->req_q_map);
  218. ha->req_q_map = NULL;
  219. fail_req_map:
  220. return -ENOMEM;
  221. }
  222. static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
  223. {
  224. if (req && req->ring)
  225. dma_free_coherent(&ha->pdev->dev,
  226. (req->length + 1) * sizeof(request_t),
  227. req->ring, req->dma);
  228. kfree(req);
  229. req = NULL;
  230. }
  231. static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
  232. {
  233. if (rsp && rsp->ring)
  234. dma_free_coherent(&ha->pdev->dev,
  235. (rsp->length + 1) * sizeof(response_t),
  236. rsp->ring, rsp->dma);
  237. kfree(rsp);
  238. rsp = NULL;
  239. }
  240. static void qla2x00_free_queues(struct qla_hw_data *ha)
  241. {
  242. struct req_que *req;
  243. struct rsp_que *rsp;
  244. int cnt;
  245. for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
  246. req = ha->req_q_map[cnt];
  247. qla2x00_free_req_que(ha, req);
  248. }
  249. kfree(ha->req_q_map);
  250. ha->req_q_map = NULL;
  251. for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
  252. rsp = ha->rsp_q_map[cnt];
  253. qla2x00_free_rsp_que(ha, rsp);
  254. }
  255. kfree(ha->rsp_q_map);
  256. ha->rsp_q_map = NULL;
  257. }
  258. static int qla25xx_setup_mode(struct scsi_qla_host *vha)
  259. {
  260. uint16_t options = 0;
  261. int ques, req, ret;
  262. struct qla_hw_data *ha = vha->hw;
  263. if (!(ha->fw_attributes & BIT_6)) {
  264. qla_printk(KERN_INFO, ha,
  265. "Firmware is not multi-queue capable\n");
  266. goto fail;
  267. }
  268. if (ql2xmultique_tag) {
  269. /* create a request queue for IO */
  270. options |= BIT_7;
  271. req = qla25xx_create_req_que(ha, options, 0, 0, -1,
  272. QLA_DEFAULT_QUE_QOS);
  273. if (!req) {
  274. qla_printk(KERN_WARNING, ha,
  275. "Can't create request queue\n");
  276. goto fail;
  277. }
  278. ha->wq = create_workqueue("qla2xxx_wq");
  279. vha->req = ha->req_q_map[req];
  280. options |= BIT_1;
  281. for (ques = 1; ques < ha->max_rsp_queues; ques++) {
  282. ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
  283. if (!ret) {
  284. qla_printk(KERN_WARNING, ha,
  285. "Response Queue create failed\n");
  286. goto fail2;
  287. }
  288. }
  289. ha->flags.cpu_affinity_enabled = 1;
  290. DEBUG2(qla_printk(KERN_INFO, ha,
  291. "CPU affinity mode enabled, no. of response"
  292. " queues:%d, no. of request queues:%d\n",
  293. ha->max_rsp_queues, ha->max_req_queues));
  294. }
  295. return 0;
  296. fail2:
  297. qla25xx_delete_queues(vha);
  298. destroy_workqueue(ha->wq);
  299. ha->wq = NULL;
  300. fail:
  301. ha->mqenable = 0;
  302. kfree(ha->req_q_map);
  303. kfree(ha->rsp_q_map);
  304. ha->max_req_queues = ha->max_rsp_queues = 1;
  305. return 1;
  306. }
  307. static char *
  308. qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
  309. {
  310. struct qla_hw_data *ha = vha->hw;
  311. static char *pci_bus_modes[] = {
  312. "33", "66", "100", "133",
  313. };
  314. uint16_t pci_bus;
  315. strcpy(str, "PCI");
  316. pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
  317. if (pci_bus) {
  318. strcat(str, "-X (");
  319. strcat(str, pci_bus_modes[pci_bus]);
  320. } else {
  321. pci_bus = (ha->pci_attr & BIT_8) >> 8;
  322. strcat(str, " (");
  323. strcat(str, pci_bus_modes[pci_bus]);
  324. }
  325. strcat(str, " MHz)");
  326. return (str);
  327. }
  328. static char *
  329. qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
  330. {
  331. static char *pci_bus_modes[] = { "33", "66", "100", "133", };
  332. struct qla_hw_data *ha = vha->hw;
  333. uint32_t pci_bus;
  334. int pcie_reg;
  335. pcie_reg = pci_find_capability(ha->pdev, PCI_CAP_ID_EXP);
  336. if (pcie_reg) {
  337. char lwstr[6];
  338. uint16_t pcie_lstat, lspeed, lwidth;
  339. pcie_reg += 0x12;
  340. pci_read_config_word(ha->pdev, pcie_reg, &pcie_lstat);
  341. lspeed = pcie_lstat & (BIT_0 | BIT_1 | BIT_2 | BIT_3);
  342. lwidth = (pcie_lstat &
  343. (BIT_4 | BIT_5 | BIT_6 | BIT_7 | BIT_8 | BIT_9)) >> 4;
  344. strcpy(str, "PCIe (");
  345. if (lspeed == 1)
  346. strcat(str, "2.5GT/s ");
  347. else if (lspeed == 2)
  348. strcat(str, "5.0GT/s ");
  349. else
  350. strcat(str, "<unknown> ");
  351. snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
  352. strcat(str, lwstr);
  353. return str;
  354. }
  355. strcpy(str, "PCI");
  356. pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
  357. if (pci_bus == 0 || pci_bus == 8) {
  358. strcat(str, " (");
  359. strcat(str, pci_bus_modes[pci_bus >> 3]);
  360. } else {
  361. strcat(str, "-X ");
  362. if (pci_bus & BIT_2)
  363. strcat(str, "Mode 2");
  364. else
  365. strcat(str, "Mode 1");
  366. strcat(str, " (");
  367. strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
  368. }
  369. strcat(str, " MHz)");
  370. return str;
  371. }
  372. static char *
  373. qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str)
  374. {
  375. char un_str[10];
  376. struct qla_hw_data *ha = vha->hw;
  377. sprintf(str, "%d.%02d.%02d ", ha->fw_major_version,
  378. ha->fw_minor_version,
  379. ha->fw_subminor_version);
  380. if (ha->fw_attributes & BIT_9) {
  381. strcat(str, "FLX");
  382. return (str);
  383. }
  384. switch (ha->fw_attributes & 0xFF) {
  385. case 0x7:
  386. strcat(str, "EF");
  387. break;
  388. case 0x17:
  389. strcat(str, "TP");
  390. break;
  391. case 0x37:
  392. strcat(str, "IP");
  393. break;
  394. case 0x77:
  395. strcat(str, "VI");
  396. break;
  397. default:
  398. sprintf(un_str, "(%x)", ha->fw_attributes);
  399. strcat(str, un_str);
  400. break;
  401. }
  402. if (ha->fw_attributes & 0x100)
  403. strcat(str, "X");
  404. return (str);
  405. }
  406. static char *
  407. qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str)
  408. {
  409. struct qla_hw_data *ha = vha->hw;
  410. sprintf(str, "%d.%02d.%02d (%x)", ha->fw_major_version,
  411. ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
  412. return str;
  413. }
  414. static inline srb_t *
  415. qla2x00_get_new_sp(scsi_qla_host_t *vha, fc_port_t *fcport,
  416. struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
  417. {
  418. srb_t *sp;
  419. struct qla_hw_data *ha = vha->hw;
  420. sp = mempool_alloc(ha->srb_mempool, GFP_ATOMIC);
  421. if (!sp)
  422. return sp;
  423. sp->fcport = fcport;
  424. sp->cmd = cmd;
  425. sp->flags = 0;
  426. CMD_SP(cmd) = (void *)sp;
  427. cmd->scsi_done = done;
  428. sp->ctx = NULL;
  429. return sp;
  430. }
  431. static int
  432. qla2xxx_queuecommand(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
  433. {
  434. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  435. fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
  436. struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
  437. struct qla_hw_data *ha = vha->hw;
  438. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  439. srb_t *sp;
  440. int rval;
  441. if (ha->flags.eeh_busy) {
  442. if (ha->flags.pci_channel_io_perm_failure)
  443. cmd->result = DID_NO_CONNECT << 16;
  444. else
  445. cmd->result = DID_REQUEUE << 16;
  446. goto qc24_fail_command;
  447. }
  448. rval = fc_remote_port_chkready(rport);
  449. if (rval) {
  450. cmd->result = rval;
  451. goto qc24_fail_command;
  452. }
  453. /* Close window on fcport/rport state-transitioning. */
  454. if (fcport->drport)
  455. goto qc24_target_busy;
  456. if (atomic_read(&fcport->state) != FCS_ONLINE) {
  457. if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
  458. atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
  459. cmd->result = DID_NO_CONNECT << 16;
  460. goto qc24_fail_command;
  461. }
  462. goto qc24_target_busy;
  463. }
  464. spin_unlock_irq(vha->host->host_lock);
  465. sp = qla2x00_get_new_sp(base_vha, fcport, cmd, done);
  466. if (!sp)
  467. goto qc24_host_busy_lock;
  468. rval = ha->isp_ops->start_scsi(sp);
  469. if (rval != QLA_SUCCESS)
  470. goto qc24_host_busy_free_sp;
  471. spin_lock_irq(vha->host->host_lock);
  472. return 0;
  473. qc24_host_busy_free_sp:
  474. qla2x00_sp_free_dma(sp);
  475. mempool_free(sp, ha->srb_mempool);
  476. qc24_host_busy_lock:
  477. spin_lock_irq(vha->host->host_lock);
  478. return SCSI_MLQUEUE_HOST_BUSY;
  479. qc24_target_busy:
  480. return SCSI_MLQUEUE_TARGET_BUSY;
  481. qc24_fail_command:
  482. done(cmd);
  483. return 0;
  484. }
  485. /*
  486. * qla2x00_eh_wait_on_command
  487. * Waits for the command to be returned by the Firmware for some
  488. * max time.
  489. *
  490. * Input:
  491. * cmd = Scsi Command to wait on.
  492. *
  493. * Return:
  494. * Not Found : 0
  495. * Found : 1
  496. */
  497. static int
  498. qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
  499. {
  500. #define ABORT_POLLING_PERIOD 1000
  501. #define ABORT_WAIT_ITER ((10 * 1000) / (ABORT_POLLING_PERIOD))
  502. unsigned long wait_iter = ABORT_WAIT_ITER;
  503. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  504. struct qla_hw_data *ha = vha->hw;
  505. int ret = QLA_SUCCESS;
  506. if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
  507. DEBUG17(qla_printk(KERN_WARNING, ha, "return:eh_wait\n"));
  508. return ret;
  509. }
  510. while (CMD_SP(cmd) && wait_iter--) {
  511. msleep(ABORT_POLLING_PERIOD);
  512. }
  513. if (CMD_SP(cmd))
  514. ret = QLA_FUNCTION_FAILED;
  515. return ret;
  516. }
  517. /*
  518. * qla2x00_wait_for_hba_online
  519. * Wait till the HBA is online after going through
  520. * <= MAX_RETRIES_OF_ISP_ABORT or
  521. * finally HBA is disabled ie marked offline
  522. *
  523. * Input:
  524. * ha - pointer to host adapter structure
  525. *
  526. * Note:
  527. * Does context switching-Release SPIN_LOCK
  528. * (if any) before calling this routine.
  529. *
  530. * Return:
  531. * Success (Adapter is online) : 0
  532. * Failed (Adapter is offline/disabled) : 1
  533. */
  534. int
  535. qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
  536. {
  537. int return_status;
  538. unsigned long wait_online;
  539. struct qla_hw_data *ha = vha->hw;
  540. scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  541. wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
  542. while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
  543. test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
  544. test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
  545. ha->dpc_active) && time_before(jiffies, wait_online)) {
  546. msleep(1000);
  547. }
  548. if (base_vha->flags.online)
  549. return_status = QLA_SUCCESS;
  550. else
  551. return_status = QLA_FUNCTION_FAILED;
  552. return (return_status);
  553. }
  554. int
  555. qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
  556. {
  557. int return_status;
  558. unsigned long wait_reset;
  559. struct qla_hw_data *ha = vha->hw;
  560. scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  561. wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
  562. while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
  563. test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
  564. test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
  565. ha->dpc_active) && time_before(jiffies, wait_reset)) {
  566. msleep(1000);
  567. if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
  568. ha->flags.chip_reset_done)
  569. break;
  570. }
  571. if (ha->flags.chip_reset_done)
  572. return_status = QLA_SUCCESS;
  573. else
  574. return_status = QLA_FUNCTION_FAILED;
  575. return return_status;
  576. }
  577. /*
  578. * qla2x00_wait_for_loop_ready
  579. * Wait for MAX_LOOP_TIMEOUT(5 min) value for loop
  580. * to be in LOOP_READY state.
  581. * Input:
  582. * ha - pointer to host adapter structure
  583. *
  584. * Note:
  585. * Does context switching-Release SPIN_LOCK
  586. * (if any) before calling this routine.
  587. *
  588. *
  589. * Return:
  590. * Success (LOOP_READY) : 0
  591. * Failed (LOOP_NOT_READY) : 1
  592. */
  593. static inline int
  594. qla2x00_wait_for_loop_ready(scsi_qla_host_t *vha)
  595. {
  596. int return_status = QLA_SUCCESS;
  597. unsigned long loop_timeout ;
  598. struct qla_hw_data *ha = vha->hw;
  599. scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  600. /* wait for 5 min at the max for loop to be ready */
  601. loop_timeout = jiffies + (MAX_LOOP_TIMEOUT * HZ);
  602. while ((!atomic_read(&base_vha->loop_down_timer) &&
  603. atomic_read(&base_vha->loop_state) == LOOP_DOWN) ||
  604. atomic_read(&base_vha->loop_state) != LOOP_READY) {
  605. if (atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
  606. return_status = QLA_FUNCTION_FAILED;
  607. break;
  608. }
  609. msleep(1000);
  610. if (time_after_eq(jiffies, loop_timeout)) {
  611. return_status = QLA_FUNCTION_FAILED;
  612. break;
  613. }
  614. }
  615. return (return_status);
  616. }
  617. /**************************************************************************
  618. * qla2xxx_eh_abort
  619. *
  620. * Description:
  621. * The abort function will abort the specified command.
  622. *
  623. * Input:
  624. * cmd = Linux SCSI command packet to be aborted.
  625. *
  626. * Returns:
  627. * Either SUCCESS or FAILED.
  628. *
  629. * Note:
  630. * Only return FAILED if command not returned by firmware.
  631. **************************************************************************/
  632. static int
  633. qla2xxx_eh_abort(struct scsi_cmnd *cmd)
  634. {
  635. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  636. srb_t *sp;
  637. int ret, i;
  638. unsigned int id, lun;
  639. unsigned long serial;
  640. unsigned long flags;
  641. int wait = 0;
  642. struct qla_hw_data *ha = vha->hw;
  643. struct req_que *req = vha->req;
  644. srb_t *spt;
  645. fc_block_scsi_eh(cmd);
  646. if (!CMD_SP(cmd))
  647. return SUCCESS;
  648. ret = SUCCESS;
  649. id = cmd->device->id;
  650. lun = cmd->device->lun;
  651. serial = cmd->serial_number;
  652. spt = (srb_t *) CMD_SP(cmd);
  653. if (!spt)
  654. return SUCCESS;
  655. /* Check active list for command command. */
  656. spin_lock_irqsave(&ha->hardware_lock, flags);
  657. for (i = 1; i < MAX_OUTSTANDING_COMMANDS; i++) {
  658. sp = req->outstanding_cmds[i];
  659. if (sp == NULL)
  660. continue;
  661. if ((sp->ctx) && !(sp->flags & SRB_FCP_CMND_DMA_VALID))
  662. continue;
  663. if (sp->cmd != cmd)
  664. continue;
  665. DEBUG2(printk("%s(%ld): aborting sp %p from RISC."
  666. " pid=%ld.\n", __func__, vha->host_no, sp, serial));
  667. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  668. if (ha->isp_ops->abort_command(sp)) {
  669. DEBUG2(printk("%s(%ld): abort_command "
  670. "mbx failed.\n", __func__, vha->host_no));
  671. ret = FAILED;
  672. } else {
  673. DEBUG3(printk("%s(%ld): abort_command "
  674. "mbx success.\n", __func__, vha->host_no));
  675. wait = 1;
  676. }
  677. spin_lock_irqsave(&ha->hardware_lock, flags);
  678. break;
  679. }
  680. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  681. /* Wait for the command to be returned. */
  682. if (wait) {
  683. if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
  684. qla_printk(KERN_ERR, ha,
  685. "scsi(%ld:%d:%d): Abort handler timed out -- %lx "
  686. "%x.\n", vha->host_no, id, lun, serial, ret);
  687. ret = FAILED;
  688. }
  689. }
  690. qla_printk(KERN_INFO, ha,
  691. "scsi(%ld:%d:%d): Abort command issued -- %d %lx %x.\n",
  692. vha->host_no, id, lun, wait, serial, ret);
  693. return ret;
  694. }
  695. enum nexus_wait_type {
  696. WAIT_HOST = 0,
  697. WAIT_TARGET,
  698. WAIT_LUN,
  699. };
  700. static int
  701. qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
  702. unsigned int l, srb_t *sp, enum nexus_wait_type type)
  703. {
  704. int cnt, match, status;
  705. unsigned long flags;
  706. struct qla_hw_data *ha = vha->hw;
  707. struct req_que *req;
  708. status = QLA_SUCCESS;
  709. if (!sp)
  710. return status;
  711. spin_lock_irqsave(&ha->hardware_lock, flags);
  712. req = vha->req;
  713. for (cnt = 1; status == QLA_SUCCESS &&
  714. cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
  715. sp = req->outstanding_cmds[cnt];
  716. if (!sp)
  717. continue;
  718. if (sp->ctx)
  719. continue;
  720. if (vha->vp_idx != sp->fcport->vha->vp_idx)
  721. continue;
  722. match = 0;
  723. switch (type) {
  724. case WAIT_HOST:
  725. match = 1;
  726. break;
  727. case WAIT_TARGET:
  728. match = sp->cmd->device->id == t;
  729. break;
  730. case WAIT_LUN:
  731. match = (sp->cmd->device->id == t &&
  732. sp->cmd->device->lun == l);
  733. break;
  734. }
  735. if (!match)
  736. continue;
  737. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  738. status = qla2x00_eh_wait_on_command(sp->cmd);
  739. spin_lock_irqsave(&ha->hardware_lock, flags);
  740. }
  741. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  742. return status;
  743. }
  744. void qla82xx_wait_for_pending_commands(scsi_qla_host_t *vha)
  745. {
  746. int cnt;
  747. srb_t *sp;
  748. struct req_que *req = vha->req;
  749. DEBUG2(qla_printk(KERN_INFO, vha->hw,
  750. "Waiting for pending commands\n"));
  751. for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
  752. sp = req->outstanding_cmds[cnt];
  753. if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0,
  754. sp, WAIT_HOST) == QLA_SUCCESS) {
  755. DEBUG2(qla_printk(KERN_INFO, vha->hw,
  756. "Done wait for pending commands\n"));
  757. }
  758. }
  759. }
  760. static char *reset_errors[] = {
  761. "HBA not online",
  762. "HBA not ready",
  763. "Task management failed",
  764. "Waiting for command completions",
  765. };
  766. static int
  767. __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
  768. struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, unsigned int, int))
  769. {
  770. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  771. fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
  772. int err;
  773. fc_block_scsi_eh(cmd);
  774. if (!fcport)
  775. return FAILED;
  776. qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET ISSUED.\n",
  777. vha->host_no, cmd->device->id, cmd->device->lun, name);
  778. err = 0;
  779. if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS)
  780. goto eh_reset_failed;
  781. err = 1;
  782. if (qla2x00_wait_for_loop_ready(vha) != QLA_SUCCESS)
  783. goto eh_reset_failed;
  784. err = 2;
  785. if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
  786. != QLA_SUCCESS)
  787. goto eh_reset_failed;
  788. err = 3;
  789. if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
  790. cmd->device->lun, (srb_t *) CMD_SP(cmd), type) != QLA_SUCCESS)
  791. goto eh_reset_failed;
  792. qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET SUCCEEDED.\n",
  793. vha->host_no, cmd->device->id, cmd->device->lun, name);
  794. return SUCCESS;
  795. eh_reset_failed:
  796. qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET FAILED: %s.\n"
  797. , vha->host_no, cmd->device->id, cmd->device->lun, name,
  798. reset_errors[err]);
  799. return FAILED;
  800. }
  801. static int
  802. qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
  803. {
  804. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  805. struct qla_hw_data *ha = vha->hw;
  806. return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
  807. ha->isp_ops->lun_reset);
  808. }
  809. static int
  810. qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
  811. {
  812. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  813. struct qla_hw_data *ha = vha->hw;
  814. return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
  815. ha->isp_ops->target_reset);
  816. }
  817. /**************************************************************************
  818. * qla2xxx_eh_bus_reset
  819. *
  820. * Description:
  821. * The bus reset function will reset the bus and abort any executing
  822. * commands.
  823. *
  824. * Input:
  825. * cmd = Linux SCSI command packet of the command that cause the
  826. * bus reset.
  827. *
  828. * Returns:
  829. * SUCCESS/FAILURE (defined as macro in scsi.h).
  830. *
  831. **************************************************************************/
  832. static int
  833. qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
  834. {
  835. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  836. fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
  837. int ret = FAILED;
  838. unsigned int id, lun;
  839. unsigned long serial;
  840. srb_t *sp = (srb_t *) CMD_SP(cmd);
  841. fc_block_scsi_eh(cmd);
  842. id = cmd->device->id;
  843. lun = cmd->device->lun;
  844. serial = cmd->serial_number;
  845. if (!fcport)
  846. return ret;
  847. qla_printk(KERN_INFO, vha->hw,
  848. "scsi(%ld:%d:%d): BUS RESET ISSUED.\n", vha->host_no, id, lun);
  849. if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
  850. DEBUG2(printk("%s failed:board disabled\n",__func__));
  851. goto eh_bus_reset_done;
  852. }
  853. if (qla2x00_wait_for_loop_ready(vha) == QLA_SUCCESS) {
  854. if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
  855. ret = SUCCESS;
  856. }
  857. if (ret == FAILED)
  858. goto eh_bus_reset_done;
  859. /* Flush outstanding commands. */
  860. if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, sp, WAIT_HOST) !=
  861. QLA_SUCCESS)
  862. ret = FAILED;
  863. eh_bus_reset_done:
  864. qla_printk(KERN_INFO, vha->hw, "%s: reset %s\n", __func__,
  865. (ret == FAILED) ? "failed" : "succeded");
  866. return ret;
  867. }
  868. /**************************************************************************
  869. * qla2xxx_eh_host_reset
  870. *
  871. * Description:
  872. * The reset function will reset the Adapter.
  873. *
  874. * Input:
  875. * cmd = Linux SCSI command packet of the command that cause the
  876. * adapter reset.
  877. *
  878. * Returns:
  879. * Either SUCCESS or FAILED.
  880. *
  881. * Note:
  882. **************************************************************************/
  883. static int
  884. qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
  885. {
  886. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  887. fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
  888. struct qla_hw_data *ha = vha->hw;
  889. int ret = FAILED;
  890. unsigned int id, lun;
  891. unsigned long serial;
  892. srb_t *sp = (srb_t *) CMD_SP(cmd);
  893. scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  894. fc_block_scsi_eh(cmd);
  895. id = cmd->device->id;
  896. lun = cmd->device->lun;
  897. serial = cmd->serial_number;
  898. if (!fcport)
  899. return ret;
  900. qla_printk(KERN_INFO, ha,
  901. "scsi(%ld:%d:%d): ADAPTER RESET ISSUED.\n", vha->host_no, id, lun);
  902. if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS)
  903. goto eh_host_reset_lock;
  904. /*
  905. * Fixme-may be dpc thread is active and processing
  906. * loop_resync,so wait a while for it to
  907. * be completed and then issue big hammer.Otherwise
  908. * it may cause I/O failure as big hammer marks the
  909. * devices as lost kicking of the port_down_timer
  910. * while dpc is stuck for the mailbox to complete.
  911. */
  912. qla2x00_wait_for_loop_ready(vha);
  913. if (vha != base_vha) {
  914. if (qla2x00_vp_abort_isp(vha))
  915. goto eh_host_reset_lock;
  916. } else {
  917. if (IS_QLA82XX(vha->hw)) {
  918. if (!qla82xx_fcoe_ctx_reset(vha)) {
  919. /* Ctx reset success */
  920. ret = SUCCESS;
  921. goto eh_host_reset_lock;
  922. }
  923. /* fall thru if ctx reset failed */
  924. }
  925. if (ha->wq)
  926. flush_workqueue(ha->wq);
  927. set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  928. if (ha->isp_ops->abort_isp(base_vha)) {
  929. clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  930. /* failed. schedule dpc to try */
  931. set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
  932. if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS)
  933. goto eh_host_reset_lock;
  934. }
  935. clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  936. }
  937. /* Waiting for command to be returned to OS.*/
  938. if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, sp, WAIT_HOST) ==
  939. QLA_SUCCESS)
  940. ret = SUCCESS;
  941. eh_host_reset_lock:
  942. qla_printk(KERN_INFO, ha, "%s: reset %s\n", __func__,
  943. (ret == FAILED) ? "failed" : "succeded");
  944. return ret;
  945. }
  946. /*
  947. * qla2x00_loop_reset
  948. * Issue loop reset.
  949. *
  950. * Input:
  951. * ha = adapter block pointer.
  952. *
  953. * Returns:
  954. * 0 = success
  955. */
  956. int
  957. qla2x00_loop_reset(scsi_qla_host_t *vha)
  958. {
  959. int ret;
  960. struct fc_port *fcport;
  961. struct qla_hw_data *ha = vha->hw;
  962. if (ha->flags.enable_target_reset) {
  963. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  964. if (fcport->port_type != FCT_TARGET)
  965. continue;
  966. ret = ha->isp_ops->target_reset(fcport, 0, 0);
  967. if (ret != QLA_SUCCESS) {
  968. DEBUG2_3(printk("%s(%ld): bus_reset failed: "
  969. "target_reset=%d d_id=%x.\n", __func__,
  970. vha->host_no, ret, fcport->d_id.b24));
  971. }
  972. }
  973. }
  974. if (ha->flags.enable_lip_full_login && !IS_QLA8XXX_TYPE(ha)) {
  975. ret = qla2x00_full_login_lip(vha);
  976. if (ret != QLA_SUCCESS) {
  977. DEBUG2_3(printk("%s(%ld): failed: "
  978. "full_login_lip=%d.\n", __func__, vha->host_no,
  979. ret));
  980. }
  981. atomic_set(&vha->loop_state, LOOP_DOWN);
  982. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  983. qla2x00_mark_all_devices_lost(vha, 0);
  984. qla2x00_wait_for_loop_ready(vha);
  985. }
  986. if (ha->flags.enable_lip_reset) {
  987. ret = qla2x00_lip_reset(vha);
  988. if (ret != QLA_SUCCESS) {
  989. DEBUG2_3(printk("%s(%ld): failed: "
  990. "lip_reset=%d.\n", __func__, vha->host_no, ret));
  991. } else
  992. qla2x00_wait_for_loop_ready(vha);
  993. }
  994. /* Issue marker command only when we are going to start the I/O */
  995. vha->marker_needed = 1;
  996. return QLA_SUCCESS;
  997. }
  998. void
  999. qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
  1000. {
  1001. int que, cnt;
  1002. unsigned long flags;
  1003. srb_t *sp;
  1004. struct srb_ctx *ctx;
  1005. struct qla_hw_data *ha = vha->hw;
  1006. struct req_que *req;
  1007. spin_lock_irqsave(&ha->hardware_lock, flags);
  1008. for (que = 0; que < ha->max_req_queues; que++) {
  1009. req = ha->req_q_map[que];
  1010. if (!req)
  1011. continue;
  1012. for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
  1013. sp = req->outstanding_cmds[cnt];
  1014. if (sp) {
  1015. req->outstanding_cmds[cnt] = NULL;
  1016. if (!sp->ctx ||
  1017. (sp->flags & SRB_FCP_CMND_DMA_VALID)) {
  1018. sp->cmd->result = res;
  1019. qla2x00_sp_compl(ha, sp);
  1020. } else {
  1021. ctx = sp->ctx;
  1022. if (ctx->type == SRB_LOGIN_CMD ||
  1023. ctx->type == SRB_LOGOUT_CMD) {
  1024. del_timer_sync(&ctx->timer);
  1025. ctx->free(sp);
  1026. } else {
  1027. struct srb_bsg *sp_bsg =
  1028. (struct srb_bsg *)sp->ctx;
  1029. struct fc_bsg_job *bsg_job =
  1030. sp_bsg->bsg_job;
  1031. if (bsg_job->request->msgcode
  1032. == FC_BSG_HST_CT)
  1033. kfree(sp->fcport);
  1034. bsg_job->req->errors = 0;
  1035. bsg_job->reply->result = res;
  1036. bsg_job->job_done(
  1037. sp_bsg->bsg_job);
  1038. kfree(sp->ctx);
  1039. mempool_free(sp,
  1040. ha->srb_mempool);
  1041. }
  1042. }
  1043. }
  1044. }
  1045. }
  1046. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1047. }
  1048. static int
  1049. qla2xxx_slave_alloc(struct scsi_device *sdev)
  1050. {
  1051. struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
  1052. if (!rport || fc_remote_port_chkready(rport))
  1053. return -ENXIO;
  1054. sdev->hostdata = *(fc_port_t **)rport->dd_data;
  1055. return 0;
  1056. }
  1057. static int
  1058. qla2xxx_slave_configure(struct scsi_device *sdev)
  1059. {
  1060. scsi_qla_host_t *vha = shost_priv(sdev->host);
  1061. struct qla_hw_data *ha = vha->hw;
  1062. struct fc_rport *rport = starget_to_rport(sdev->sdev_target);
  1063. struct req_que *req = vha->req;
  1064. if (sdev->tagged_supported)
  1065. scsi_activate_tcq(sdev, req->max_q_depth);
  1066. else
  1067. scsi_deactivate_tcq(sdev, req->max_q_depth);
  1068. rport->dev_loss_tmo = ha->port_down_retry_count;
  1069. return 0;
  1070. }
  1071. static void
  1072. qla2xxx_slave_destroy(struct scsi_device *sdev)
  1073. {
  1074. sdev->hostdata = NULL;
  1075. }
  1076. static void qla2x00_handle_queue_full(struct scsi_device *sdev, int qdepth)
  1077. {
  1078. fc_port_t *fcport = (struct fc_port *) sdev->hostdata;
  1079. if (!scsi_track_queue_full(sdev, qdepth))
  1080. return;
  1081. DEBUG2(qla_printk(KERN_INFO, fcport->vha->hw,
  1082. "scsi(%ld:%d:%d:%d): Queue depth adjusted-down to %d.\n",
  1083. fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun,
  1084. sdev->queue_depth));
  1085. }
  1086. static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, int qdepth)
  1087. {
  1088. fc_port_t *fcport = sdev->hostdata;
  1089. struct scsi_qla_host *vha = fcport->vha;
  1090. struct qla_hw_data *ha = vha->hw;
  1091. struct req_que *req = NULL;
  1092. req = vha->req;
  1093. if (!req)
  1094. return;
  1095. if (req->max_q_depth <= sdev->queue_depth || req->max_q_depth < qdepth)
  1096. return;
  1097. if (sdev->ordered_tags)
  1098. scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, qdepth);
  1099. else
  1100. scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, qdepth);
  1101. DEBUG2(qla_printk(KERN_INFO, ha,
  1102. "scsi(%ld:%d:%d:%d): Queue depth adjusted-up to %d.\n",
  1103. fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun,
  1104. sdev->queue_depth));
  1105. }
  1106. static int
  1107. qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason)
  1108. {
  1109. switch (reason) {
  1110. case SCSI_QDEPTH_DEFAULT:
  1111. scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
  1112. break;
  1113. case SCSI_QDEPTH_QFULL:
  1114. qla2x00_handle_queue_full(sdev, qdepth);
  1115. break;
  1116. case SCSI_QDEPTH_RAMP_UP:
  1117. qla2x00_adjust_sdev_qdepth_up(sdev, qdepth);
  1118. break;
  1119. default:
  1120. return -EOPNOTSUPP;
  1121. }
  1122. return sdev->queue_depth;
  1123. }
  1124. static int
  1125. qla2x00_change_queue_type(struct scsi_device *sdev, int tag_type)
  1126. {
  1127. if (sdev->tagged_supported) {
  1128. scsi_set_tag_type(sdev, tag_type);
  1129. if (tag_type)
  1130. scsi_activate_tcq(sdev, sdev->queue_depth);
  1131. else
  1132. scsi_deactivate_tcq(sdev, sdev->queue_depth);
  1133. } else
  1134. tag_type = 0;
  1135. return tag_type;
  1136. }
  1137. /**
  1138. * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
  1139. * @ha: HA context
  1140. *
  1141. * At exit, the @ha's flags.enable_64bit_addressing set to indicated
  1142. * supported addressing method.
  1143. */
  1144. static void
  1145. qla2x00_config_dma_addressing(struct qla_hw_data *ha)
  1146. {
  1147. /* Assume a 32bit DMA mask. */
  1148. ha->flags.enable_64bit_addressing = 0;
  1149. if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
  1150. /* Any upper-dword bits set? */
  1151. if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
  1152. !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
  1153. /* Ok, a 64bit DMA mask is applicable. */
  1154. ha->flags.enable_64bit_addressing = 1;
  1155. ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
  1156. ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
  1157. return;
  1158. }
  1159. }
  1160. dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
  1161. pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
  1162. }
  1163. static void
  1164. qla2x00_enable_intrs(struct qla_hw_data *ha)
  1165. {
  1166. unsigned long flags = 0;
  1167. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1168. spin_lock_irqsave(&ha->hardware_lock, flags);
  1169. ha->interrupts_on = 1;
  1170. /* enable risc and host interrupts */
  1171. WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
  1172. RD_REG_WORD(&reg->ictrl);
  1173. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1174. }
  1175. static void
  1176. qla2x00_disable_intrs(struct qla_hw_data *ha)
  1177. {
  1178. unsigned long flags = 0;
  1179. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1180. spin_lock_irqsave(&ha->hardware_lock, flags);
  1181. ha->interrupts_on = 0;
  1182. /* disable risc and host interrupts */
  1183. WRT_REG_WORD(&reg->ictrl, 0);
  1184. RD_REG_WORD(&reg->ictrl);
  1185. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1186. }
  1187. static void
  1188. qla24xx_enable_intrs(struct qla_hw_data *ha)
  1189. {
  1190. unsigned long flags = 0;
  1191. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  1192. spin_lock_irqsave(&ha->hardware_lock, flags);
  1193. ha->interrupts_on = 1;
  1194. WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
  1195. RD_REG_DWORD(&reg->ictrl);
  1196. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1197. }
  1198. static void
  1199. qla24xx_disable_intrs(struct qla_hw_data *ha)
  1200. {
  1201. unsigned long flags = 0;
  1202. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  1203. if (IS_NOPOLLING_TYPE(ha))
  1204. return;
  1205. spin_lock_irqsave(&ha->hardware_lock, flags);
  1206. ha->interrupts_on = 0;
  1207. WRT_REG_DWORD(&reg->ictrl, 0);
  1208. RD_REG_DWORD(&reg->ictrl);
  1209. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1210. }
  1211. static struct isp_operations qla2100_isp_ops = {
  1212. .pci_config = qla2100_pci_config,
  1213. .reset_chip = qla2x00_reset_chip,
  1214. .chip_diag = qla2x00_chip_diag,
  1215. .config_rings = qla2x00_config_rings,
  1216. .reset_adapter = qla2x00_reset_adapter,
  1217. .nvram_config = qla2x00_nvram_config,
  1218. .update_fw_options = qla2x00_update_fw_options,
  1219. .load_risc = qla2x00_load_risc,
  1220. .pci_info_str = qla2x00_pci_info_str,
  1221. .fw_version_str = qla2x00_fw_version_str,
  1222. .intr_handler = qla2100_intr_handler,
  1223. .enable_intrs = qla2x00_enable_intrs,
  1224. .disable_intrs = qla2x00_disable_intrs,
  1225. .abort_command = qla2x00_abort_command,
  1226. .target_reset = qla2x00_abort_target,
  1227. .lun_reset = qla2x00_lun_reset,
  1228. .fabric_login = qla2x00_login_fabric,
  1229. .fabric_logout = qla2x00_fabric_logout,
  1230. .calc_req_entries = qla2x00_calc_iocbs_32,
  1231. .build_iocbs = qla2x00_build_scsi_iocbs_32,
  1232. .prep_ms_iocb = qla2x00_prep_ms_iocb,
  1233. .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
  1234. .read_nvram = qla2x00_read_nvram_data,
  1235. .write_nvram = qla2x00_write_nvram_data,
  1236. .fw_dump = qla2100_fw_dump,
  1237. .beacon_on = NULL,
  1238. .beacon_off = NULL,
  1239. .beacon_blink = NULL,
  1240. .read_optrom = qla2x00_read_optrom_data,
  1241. .write_optrom = qla2x00_write_optrom_data,
  1242. .get_flash_version = qla2x00_get_flash_version,
  1243. .start_scsi = qla2x00_start_scsi,
  1244. .abort_isp = qla2x00_abort_isp,
  1245. };
  1246. static struct isp_operations qla2300_isp_ops = {
  1247. .pci_config = qla2300_pci_config,
  1248. .reset_chip = qla2x00_reset_chip,
  1249. .chip_diag = qla2x00_chip_diag,
  1250. .config_rings = qla2x00_config_rings,
  1251. .reset_adapter = qla2x00_reset_adapter,
  1252. .nvram_config = qla2x00_nvram_config,
  1253. .update_fw_options = qla2x00_update_fw_options,
  1254. .load_risc = qla2x00_load_risc,
  1255. .pci_info_str = qla2x00_pci_info_str,
  1256. .fw_version_str = qla2x00_fw_version_str,
  1257. .intr_handler = qla2300_intr_handler,
  1258. .enable_intrs = qla2x00_enable_intrs,
  1259. .disable_intrs = qla2x00_disable_intrs,
  1260. .abort_command = qla2x00_abort_command,
  1261. .target_reset = qla2x00_abort_target,
  1262. .lun_reset = qla2x00_lun_reset,
  1263. .fabric_login = qla2x00_login_fabric,
  1264. .fabric_logout = qla2x00_fabric_logout,
  1265. .calc_req_entries = qla2x00_calc_iocbs_32,
  1266. .build_iocbs = qla2x00_build_scsi_iocbs_32,
  1267. .prep_ms_iocb = qla2x00_prep_ms_iocb,
  1268. .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
  1269. .read_nvram = qla2x00_read_nvram_data,
  1270. .write_nvram = qla2x00_write_nvram_data,
  1271. .fw_dump = qla2300_fw_dump,
  1272. .beacon_on = qla2x00_beacon_on,
  1273. .beacon_off = qla2x00_beacon_off,
  1274. .beacon_blink = qla2x00_beacon_blink,
  1275. .read_optrom = qla2x00_read_optrom_data,
  1276. .write_optrom = qla2x00_write_optrom_data,
  1277. .get_flash_version = qla2x00_get_flash_version,
  1278. .start_scsi = qla2x00_start_scsi,
  1279. .abort_isp = qla2x00_abort_isp,
  1280. };
  1281. static struct isp_operations qla24xx_isp_ops = {
  1282. .pci_config = qla24xx_pci_config,
  1283. .reset_chip = qla24xx_reset_chip,
  1284. .chip_diag = qla24xx_chip_diag,
  1285. .config_rings = qla24xx_config_rings,
  1286. .reset_adapter = qla24xx_reset_adapter,
  1287. .nvram_config = qla24xx_nvram_config,
  1288. .update_fw_options = qla24xx_update_fw_options,
  1289. .load_risc = qla24xx_load_risc,
  1290. .pci_info_str = qla24xx_pci_info_str,
  1291. .fw_version_str = qla24xx_fw_version_str,
  1292. .intr_handler = qla24xx_intr_handler,
  1293. .enable_intrs = qla24xx_enable_intrs,
  1294. .disable_intrs = qla24xx_disable_intrs,
  1295. .abort_command = qla24xx_abort_command,
  1296. .target_reset = qla24xx_abort_target,
  1297. .lun_reset = qla24xx_lun_reset,
  1298. .fabric_login = qla24xx_login_fabric,
  1299. .fabric_logout = qla24xx_fabric_logout,
  1300. .calc_req_entries = NULL,
  1301. .build_iocbs = NULL,
  1302. .prep_ms_iocb = qla24xx_prep_ms_iocb,
  1303. .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
  1304. .read_nvram = qla24xx_read_nvram_data,
  1305. .write_nvram = qla24xx_write_nvram_data,
  1306. .fw_dump = qla24xx_fw_dump,
  1307. .beacon_on = qla24xx_beacon_on,
  1308. .beacon_off = qla24xx_beacon_off,
  1309. .beacon_blink = qla24xx_beacon_blink,
  1310. .read_optrom = qla24xx_read_optrom_data,
  1311. .write_optrom = qla24xx_write_optrom_data,
  1312. .get_flash_version = qla24xx_get_flash_version,
  1313. .start_scsi = qla24xx_start_scsi,
  1314. .abort_isp = qla2x00_abort_isp,
  1315. };
  1316. static struct isp_operations qla25xx_isp_ops = {
  1317. .pci_config = qla25xx_pci_config,
  1318. .reset_chip = qla24xx_reset_chip,
  1319. .chip_diag = qla24xx_chip_diag,
  1320. .config_rings = qla24xx_config_rings,
  1321. .reset_adapter = qla24xx_reset_adapter,
  1322. .nvram_config = qla24xx_nvram_config,
  1323. .update_fw_options = qla24xx_update_fw_options,
  1324. .load_risc = qla24xx_load_risc,
  1325. .pci_info_str = qla24xx_pci_info_str,
  1326. .fw_version_str = qla24xx_fw_version_str,
  1327. .intr_handler = qla24xx_intr_handler,
  1328. .enable_intrs = qla24xx_enable_intrs,
  1329. .disable_intrs = qla24xx_disable_intrs,
  1330. .abort_command = qla24xx_abort_command,
  1331. .target_reset = qla24xx_abort_target,
  1332. .lun_reset = qla24xx_lun_reset,
  1333. .fabric_login = qla24xx_login_fabric,
  1334. .fabric_logout = qla24xx_fabric_logout,
  1335. .calc_req_entries = NULL,
  1336. .build_iocbs = NULL,
  1337. .prep_ms_iocb = qla24xx_prep_ms_iocb,
  1338. .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
  1339. .read_nvram = qla25xx_read_nvram_data,
  1340. .write_nvram = qla25xx_write_nvram_data,
  1341. .fw_dump = qla25xx_fw_dump,
  1342. .beacon_on = qla24xx_beacon_on,
  1343. .beacon_off = qla24xx_beacon_off,
  1344. .beacon_blink = qla24xx_beacon_blink,
  1345. .read_optrom = qla25xx_read_optrom_data,
  1346. .write_optrom = qla24xx_write_optrom_data,
  1347. .get_flash_version = qla24xx_get_flash_version,
  1348. .start_scsi = qla24xx_start_scsi,
  1349. .abort_isp = qla2x00_abort_isp,
  1350. };
  1351. static struct isp_operations qla81xx_isp_ops = {
  1352. .pci_config = qla25xx_pci_config,
  1353. .reset_chip = qla24xx_reset_chip,
  1354. .chip_diag = qla24xx_chip_diag,
  1355. .config_rings = qla24xx_config_rings,
  1356. .reset_adapter = qla24xx_reset_adapter,
  1357. .nvram_config = qla81xx_nvram_config,
  1358. .update_fw_options = qla81xx_update_fw_options,
  1359. .load_risc = qla81xx_load_risc,
  1360. .pci_info_str = qla24xx_pci_info_str,
  1361. .fw_version_str = qla24xx_fw_version_str,
  1362. .intr_handler = qla24xx_intr_handler,
  1363. .enable_intrs = qla24xx_enable_intrs,
  1364. .disable_intrs = qla24xx_disable_intrs,
  1365. .abort_command = qla24xx_abort_command,
  1366. .target_reset = qla24xx_abort_target,
  1367. .lun_reset = qla24xx_lun_reset,
  1368. .fabric_login = qla24xx_login_fabric,
  1369. .fabric_logout = qla24xx_fabric_logout,
  1370. .calc_req_entries = NULL,
  1371. .build_iocbs = NULL,
  1372. .prep_ms_iocb = qla24xx_prep_ms_iocb,
  1373. .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
  1374. .read_nvram = NULL,
  1375. .write_nvram = NULL,
  1376. .fw_dump = qla81xx_fw_dump,
  1377. .beacon_on = qla24xx_beacon_on,
  1378. .beacon_off = qla24xx_beacon_off,
  1379. .beacon_blink = qla24xx_beacon_blink,
  1380. .read_optrom = qla25xx_read_optrom_data,
  1381. .write_optrom = qla24xx_write_optrom_data,
  1382. .get_flash_version = qla24xx_get_flash_version,
  1383. .start_scsi = qla24xx_start_scsi,
  1384. .abort_isp = qla2x00_abort_isp,
  1385. };
  1386. static struct isp_operations qla82xx_isp_ops = {
  1387. .pci_config = qla82xx_pci_config,
  1388. .reset_chip = qla82xx_reset_chip,
  1389. .chip_diag = qla24xx_chip_diag,
  1390. .config_rings = qla82xx_config_rings,
  1391. .reset_adapter = qla24xx_reset_adapter,
  1392. .nvram_config = qla81xx_nvram_config,
  1393. .update_fw_options = qla24xx_update_fw_options,
  1394. .load_risc = qla82xx_load_risc,
  1395. .pci_info_str = qla82xx_pci_info_str,
  1396. .fw_version_str = qla24xx_fw_version_str,
  1397. .intr_handler = qla82xx_intr_handler,
  1398. .enable_intrs = qla82xx_enable_intrs,
  1399. .disable_intrs = qla82xx_disable_intrs,
  1400. .abort_command = qla24xx_abort_command,
  1401. .target_reset = qla24xx_abort_target,
  1402. .lun_reset = qla24xx_lun_reset,
  1403. .fabric_login = qla24xx_login_fabric,
  1404. .fabric_logout = qla24xx_fabric_logout,
  1405. .calc_req_entries = NULL,
  1406. .build_iocbs = NULL,
  1407. .prep_ms_iocb = qla24xx_prep_ms_iocb,
  1408. .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
  1409. .read_nvram = qla24xx_read_nvram_data,
  1410. .write_nvram = qla24xx_write_nvram_data,
  1411. .fw_dump = qla24xx_fw_dump,
  1412. .beacon_on = qla24xx_beacon_on,
  1413. .beacon_off = qla24xx_beacon_off,
  1414. .beacon_blink = qla24xx_beacon_blink,
  1415. .read_optrom = qla82xx_read_optrom_data,
  1416. .write_optrom = qla82xx_write_optrom_data,
  1417. .get_flash_version = qla24xx_get_flash_version,
  1418. .start_scsi = qla82xx_start_scsi,
  1419. .abort_isp = qla82xx_abort_isp,
  1420. };
  1421. static inline void
  1422. qla2x00_set_isp_flags(struct qla_hw_data *ha)
  1423. {
  1424. ha->device_type = DT_EXTENDED_IDS;
  1425. switch (ha->pdev->device) {
  1426. case PCI_DEVICE_ID_QLOGIC_ISP2100:
  1427. ha->device_type |= DT_ISP2100;
  1428. ha->device_type &= ~DT_EXTENDED_IDS;
  1429. ha->fw_srisc_address = RISC_START_ADDRESS_2100;
  1430. break;
  1431. case PCI_DEVICE_ID_QLOGIC_ISP2200:
  1432. ha->device_type |= DT_ISP2200;
  1433. ha->device_type &= ~DT_EXTENDED_IDS;
  1434. ha->fw_srisc_address = RISC_START_ADDRESS_2100;
  1435. break;
  1436. case PCI_DEVICE_ID_QLOGIC_ISP2300:
  1437. ha->device_type |= DT_ISP2300;
  1438. ha->device_type |= DT_ZIO_SUPPORTED;
  1439. ha->fw_srisc_address = RISC_START_ADDRESS_2300;
  1440. break;
  1441. case PCI_DEVICE_ID_QLOGIC_ISP2312:
  1442. ha->device_type |= DT_ISP2312;
  1443. ha->device_type |= DT_ZIO_SUPPORTED;
  1444. ha->fw_srisc_address = RISC_START_ADDRESS_2300;
  1445. break;
  1446. case PCI_DEVICE_ID_QLOGIC_ISP2322:
  1447. ha->device_type |= DT_ISP2322;
  1448. ha->device_type |= DT_ZIO_SUPPORTED;
  1449. if (ha->pdev->subsystem_vendor == 0x1028 &&
  1450. ha->pdev->subsystem_device == 0x0170)
  1451. ha->device_type |= DT_OEM_001;
  1452. ha->fw_srisc_address = RISC_START_ADDRESS_2300;
  1453. break;
  1454. case PCI_DEVICE_ID_QLOGIC_ISP6312:
  1455. ha->device_type |= DT_ISP6312;
  1456. ha->fw_srisc_address = RISC_START_ADDRESS_2300;
  1457. break;
  1458. case PCI_DEVICE_ID_QLOGIC_ISP6322:
  1459. ha->device_type |= DT_ISP6322;
  1460. ha->fw_srisc_address = RISC_START_ADDRESS_2300;
  1461. break;
  1462. case PCI_DEVICE_ID_QLOGIC_ISP2422:
  1463. ha->device_type |= DT_ISP2422;
  1464. ha->device_type |= DT_ZIO_SUPPORTED;
  1465. ha->device_type |= DT_FWI2;
  1466. ha->device_type |= DT_IIDMA;
  1467. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1468. break;
  1469. case PCI_DEVICE_ID_QLOGIC_ISP2432:
  1470. ha->device_type |= DT_ISP2432;
  1471. ha->device_type |= DT_ZIO_SUPPORTED;
  1472. ha->device_type |= DT_FWI2;
  1473. ha->device_type |= DT_IIDMA;
  1474. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1475. break;
  1476. case PCI_DEVICE_ID_QLOGIC_ISP8432:
  1477. ha->device_type |= DT_ISP8432;
  1478. ha->device_type |= DT_ZIO_SUPPORTED;
  1479. ha->device_type |= DT_FWI2;
  1480. ha->device_type |= DT_IIDMA;
  1481. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1482. break;
  1483. case PCI_DEVICE_ID_QLOGIC_ISP5422:
  1484. ha->device_type |= DT_ISP5422;
  1485. ha->device_type |= DT_FWI2;
  1486. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1487. break;
  1488. case PCI_DEVICE_ID_QLOGIC_ISP5432:
  1489. ha->device_type |= DT_ISP5432;
  1490. ha->device_type |= DT_FWI2;
  1491. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1492. break;
  1493. case PCI_DEVICE_ID_QLOGIC_ISP2532:
  1494. ha->device_type |= DT_ISP2532;
  1495. ha->device_type |= DT_ZIO_SUPPORTED;
  1496. ha->device_type |= DT_FWI2;
  1497. ha->device_type |= DT_IIDMA;
  1498. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1499. break;
  1500. case PCI_DEVICE_ID_QLOGIC_ISP8001:
  1501. ha->device_type |= DT_ISP8001;
  1502. ha->device_type |= DT_ZIO_SUPPORTED;
  1503. ha->device_type |= DT_FWI2;
  1504. ha->device_type |= DT_IIDMA;
  1505. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1506. break;
  1507. case PCI_DEVICE_ID_QLOGIC_ISP8021:
  1508. ha->device_type |= DT_ISP8021;
  1509. ha->device_type |= DT_ZIO_SUPPORTED;
  1510. ha->device_type |= DT_FWI2;
  1511. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1512. /* Initialize 82XX ISP flags */
  1513. qla82xx_init_flags(ha);
  1514. break;
  1515. }
  1516. if (IS_QLA82XX(ha))
  1517. ha->port_no = !(ha->portnum & 1);
  1518. else
  1519. /* Get adapter physical port no from interrupt pin register. */
  1520. pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
  1521. if (ha->port_no & 1)
  1522. ha->flags.port0 = 1;
  1523. else
  1524. ha->flags.port0 = 0;
  1525. }
  1526. static int
  1527. qla2x00_iospace_config(struct qla_hw_data *ha)
  1528. {
  1529. resource_size_t pio;
  1530. uint16_t msix;
  1531. int cpus;
  1532. if (IS_QLA82XX(ha))
  1533. return qla82xx_iospace_config(ha);
  1534. if (pci_request_selected_regions(ha->pdev, ha->bars,
  1535. QLA2XXX_DRIVER_NAME)) {
  1536. qla_printk(KERN_WARNING, ha,
  1537. "Failed to reserve PIO/MMIO regions (%s)\n",
  1538. pci_name(ha->pdev));
  1539. goto iospace_error_exit;
  1540. }
  1541. if (!(ha->bars & 1))
  1542. goto skip_pio;
  1543. /* We only need PIO for Flash operations on ISP2312 v2 chips. */
  1544. pio = pci_resource_start(ha->pdev, 0);
  1545. if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
  1546. if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
  1547. qla_printk(KERN_WARNING, ha,
  1548. "Invalid PCI I/O region size (%s)...\n",
  1549. pci_name(ha->pdev));
  1550. pio = 0;
  1551. }
  1552. } else {
  1553. qla_printk(KERN_WARNING, ha,
  1554. "region #0 not a PIO resource (%s)...\n",
  1555. pci_name(ha->pdev));
  1556. pio = 0;
  1557. }
  1558. ha->pio_address = pio;
  1559. skip_pio:
  1560. /* Use MMIO operations for all accesses. */
  1561. if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
  1562. qla_printk(KERN_ERR, ha,
  1563. "region #1 not an MMIO resource (%s), aborting\n",
  1564. pci_name(ha->pdev));
  1565. goto iospace_error_exit;
  1566. }
  1567. if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
  1568. qla_printk(KERN_ERR, ha,
  1569. "Invalid PCI mem region size (%s), aborting\n",
  1570. pci_name(ha->pdev));
  1571. goto iospace_error_exit;
  1572. }
  1573. ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
  1574. if (!ha->iobase) {
  1575. qla_printk(KERN_ERR, ha,
  1576. "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev));
  1577. goto iospace_error_exit;
  1578. }
  1579. /* Determine queue resources */
  1580. ha->max_req_queues = ha->max_rsp_queues = 1;
  1581. if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
  1582. (ql2xmaxqueues > 1 && ql2xmultique_tag) ||
  1583. (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
  1584. goto mqiobase_exit;
  1585. ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
  1586. pci_resource_len(ha->pdev, 3));
  1587. if (ha->mqiobase) {
  1588. /* Read MSIX vector size of the board */
  1589. pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
  1590. ha->msix_count = msix;
  1591. /* Max queues are bounded by available msix vectors */
  1592. /* queue 0 uses two msix vectors */
  1593. if (ql2xmultique_tag) {
  1594. cpus = num_online_cpus();
  1595. ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
  1596. (cpus + 1) : (ha->msix_count - 1);
  1597. ha->max_req_queues = 2;
  1598. } else if (ql2xmaxqueues > 1) {
  1599. ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
  1600. QLA_MQ_SIZE : ql2xmaxqueues;
  1601. DEBUG2(qla_printk(KERN_INFO, ha, "QoS mode set, max no"
  1602. " of request queues:%d\n", ha->max_req_queues));
  1603. }
  1604. qla_printk(KERN_INFO, ha,
  1605. "MSI-X vector count: %d\n", msix);
  1606. } else
  1607. qla_printk(KERN_INFO, ha, "BAR 3 not enabled\n");
  1608. mqiobase_exit:
  1609. ha->msix_count = ha->max_rsp_queues + 1;
  1610. return (0);
  1611. iospace_error_exit:
  1612. return (-ENOMEM);
  1613. }
  1614. static void
  1615. qla2xxx_scan_start(struct Scsi_Host *shost)
  1616. {
  1617. scsi_qla_host_t *vha = shost_priv(shost);
  1618. if (vha->hw->flags.running_gold_fw)
  1619. return;
  1620. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  1621. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  1622. set_bit(RSCN_UPDATE, &vha->dpc_flags);
  1623. set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
  1624. }
  1625. static int
  1626. qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
  1627. {
  1628. scsi_qla_host_t *vha = shost_priv(shost);
  1629. if (!vha->host)
  1630. return 1;
  1631. if (time > vha->hw->loop_reset_delay * HZ)
  1632. return 1;
  1633. return atomic_read(&vha->loop_state) == LOOP_READY;
  1634. }
  1635. /*
  1636. * PCI driver interface
  1637. */
  1638. static int __devinit
  1639. qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
  1640. {
  1641. int ret = -ENODEV;
  1642. struct Scsi_Host *host;
  1643. scsi_qla_host_t *base_vha = NULL;
  1644. struct qla_hw_data *ha;
  1645. char pci_info[30];
  1646. char fw_str[30];
  1647. struct scsi_host_template *sht;
  1648. int bars, max_id, mem_only = 0;
  1649. uint16_t req_length = 0, rsp_length = 0;
  1650. struct req_que *req = NULL;
  1651. struct rsp_que *rsp = NULL;
  1652. bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
  1653. sht = &qla2xxx_driver_template;
  1654. if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
  1655. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
  1656. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
  1657. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
  1658. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
  1659. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
  1660. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
  1661. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021) {
  1662. bars = pci_select_bars(pdev, IORESOURCE_MEM);
  1663. mem_only = 1;
  1664. }
  1665. if (mem_only) {
  1666. if (pci_enable_device_mem(pdev))
  1667. goto probe_out;
  1668. } else {
  1669. if (pci_enable_device(pdev))
  1670. goto probe_out;
  1671. }
  1672. /* This may fail but that's ok */
  1673. pci_enable_pcie_error_reporting(pdev);
  1674. ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
  1675. if (!ha) {
  1676. DEBUG(printk("Unable to allocate memory for ha\n"));
  1677. goto probe_out;
  1678. }
  1679. ha->pdev = pdev;
  1680. /* Clear our data area */
  1681. ha->bars = bars;
  1682. ha->mem_only = mem_only;
  1683. spin_lock_init(&ha->hardware_lock);
  1684. /* Set ISP-type information. */
  1685. qla2x00_set_isp_flags(ha);
  1686. /* Set EEH reset type to fundamental if required by hba */
  1687. if ( IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha)) {
  1688. pdev->needs_freset = 1;
  1689. }
  1690. /* Configure PCI I/O space */
  1691. ret = qla2x00_iospace_config(ha);
  1692. if (ret)
  1693. goto probe_hw_failed;
  1694. qla_printk(KERN_INFO, ha,
  1695. "Found an ISP%04X, irq %d, iobase 0x%p\n", pdev->device, pdev->irq,
  1696. ha->iobase);
  1697. ha->prev_topology = 0;
  1698. ha->init_cb_size = sizeof(init_cb_t);
  1699. ha->link_data_rate = PORT_SPEED_UNKNOWN;
  1700. ha->optrom_size = OPTROM_SIZE_2300;
  1701. /* Assign ISP specific operations. */
  1702. max_id = MAX_TARGETS_2200;
  1703. if (IS_QLA2100(ha)) {
  1704. max_id = MAX_TARGETS_2100;
  1705. ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
  1706. req_length = REQUEST_ENTRY_CNT_2100;
  1707. rsp_length = RESPONSE_ENTRY_CNT_2100;
  1708. ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
  1709. ha->gid_list_info_size = 4;
  1710. ha->flash_conf_off = ~0;
  1711. ha->flash_data_off = ~0;
  1712. ha->nvram_conf_off = ~0;
  1713. ha->nvram_data_off = ~0;
  1714. ha->isp_ops = &qla2100_isp_ops;
  1715. } else if (IS_QLA2200(ha)) {
  1716. ha->mbx_count = MAILBOX_REGISTER_COUNT;
  1717. req_length = REQUEST_ENTRY_CNT_2200;
  1718. rsp_length = RESPONSE_ENTRY_CNT_2100;
  1719. ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
  1720. ha->gid_list_info_size = 4;
  1721. ha->flash_conf_off = ~0;
  1722. ha->flash_data_off = ~0;
  1723. ha->nvram_conf_off = ~0;
  1724. ha->nvram_data_off = ~0;
  1725. ha->isp_ops = &qla2100_isp_ops;
  1726. } else if (IS_QLA23XX(ha)) {
  1727. ha->mbx_count = MAILBOX_REGISTER_COUNT;
  1728. req_length = REQUEST_ENTRY_CNT_2200;
  1729. rsp_length = RESPONSE_ENTRY_CNT_2300;
  1730. ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
  1731. ha->gid_list_info_size = 6;
  1732. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  1733. ha->optrom_size = OPTROM_SIZE_2322;
  1734. ha->flash_conf_off = ~0;
  1735. ha->flash_data_off = ~0;
  1736. ha->nvram_conf_off = ~0;
  1737. ha->nvram_data_off = ~0;
  1738. ha->isp_ops = &qla2300_isp_ops;
  1739. } else if (IS_QLA24XX_TYPE(ha)) {
  1740. ha->mbx_count = MAILBOX_REGISTER_COUNT;
  1741. req_length = REQUEST_ENTRY_CNT_24XX;
  1742. rsp_length = RESPONSE_ENTRY_CNT_2300;
  1743. ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
  1744. ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
  1745. ha->gid_list_info_size = 8;
  1746. ha->optrom_size = OPTROM_SIZE_24XX;
  1747. ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
  1748. ha->isp_ops = &qla24xx_isp_ops;
  1749. ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
  1750. ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
  1751. ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
  1752. ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
  1753. } else if (IS_QLA25XX(ha)) {
  1754. ha->mbx_count = MAILBOX_REGISTER_COUNT;
  1755. req_length = REQUEST_ENTRY_CNT_24XX;
  1756. rsp_length = RESPONSE_ENTRY_CNT_2300;
  1757. ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
  1758. ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
  1759. ha->gid_list_info_size = 8;
  1760. ha->optrom_size = OPTROM_SIZE_25XX;
  1761. ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
  1762. ha->isp_ops = &qla25xx_isp_ops;
  1763. ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
  1764. ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
  1765. ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
  1766. ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
  1767. } else if (IS_QLA81XX(ha)) {
  1768. ha->mbx_count = MAILBOX_REGISTER_COUNT;
  1769. req_length = REQUEST_ENTRY_CNT_24XX;
  1770. rsp_length = RESPONSE_ENTRY_CNT_2300;
  1771. ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
  1772. ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
  1773. ha->gid_list_info_size = 8;
  1774. ha->optrom_size = OPTROM_SIZE_81XX;
  1775. ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
  1776. ha->isp_ops = &qla81xx_isp_ops;
  1777. ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
  1778. ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
  1779. ha->nvram_conf_off = ~0;
  1780. ha->nvram_data_off = ~0;
  1781. } else if (IS_QLA82XX(ha)) {
  1782. ha->mbx_count = MAILBOX_REGISTER_COUNT;
  1783. req_length = REQUEST_ENTRY_CNT_82XX;
  1784. rsp_length = RESPONSE_ENTRY_CNT_82XX;
  1785. ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
  1786. ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
  1787. ha->gid_list_info_size = 8;
  1788. ha->optrom_size = OPTROM_SIZE_82XX;
  1789. ha->isp_ops = &qla82xx_isp_ops;
  1790. ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
  1791. ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
  1792. ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
  1793. ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
  1794. }
  1795. mutex_init(&ha->vport_lock);
  1796. init_completion(&ha->mbx_cmd_comp);
  1797. complete(&ha->mbx_cmd_comp);
  1798. init_completion(&ha->mbx_intr_comp);
  1799. set_bit(0, (unsigned long *) ha->vp_idx_map);
  1800. qla2x00_config_dma_addressing(ha);
  1801. ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
  1802. if (!ret) {
  1803. qla_printk(KERN_WARNING, ha,
  1804. "[ERROR] Failed to allocate memory for adapter\n");
  1805. goto probe_hw_failed;
  1806. }
  1807. req->max_q_depth = MAX_Q_DEPTH;
  1808. if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
  1809. req->max_q_depth = ql2xmaxqdepth;
  1810. base_vha = qla2x00_create_host(sht, ha);
  1811. if (!base_vha) {
  1812. qla_printk(KERN_WARNING, ha,
  1813. "[ERROR] Failed to allocate memory for scsi_host\n");
  1814. ret = -ENOMEM;
  1815. qla2x00_mem_free(ha);
  1816. qla2x00_free_req_que(ha, req);
  1817. qla2x00_free_rsp_que(ha, rsp);
  1818. goto probe_hw_failed;
  1819. }
  1820. pci_set_drvdata(pdev, base_vha);
  1821. host = base_vha->host;
  1822. base_vha->req = req;
  1823. host->can_queue = req->length + 128;
  1824. if (IS_QLA2XXX_MIDTYPE(ha))
  1825. base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
  1826. else
  1827. base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
  1828. base_vha->vp_idx;
  1829. if (IS_QLA2100(ha))
  1830. host->sg_tablesize = 32;
  1831. host->max_id = max_id;
  1832. host->this_id = 255;
  1833. host->cmd_per_lun = 3;
  1834. host->unique_id = host->host_no;
  1835. host->max_cmd_len = MAX_CMDSZ;
  1836. host->max_channel = MAX_BUSES - 1;
  1837. host->max_lun = MAX_LUNS;
  1838. host->transportt = qla2xxx_transport_template;
  1839. sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
  1840. /* Set up the irqs */
  1841. ret = qla2x00_request_irqs(ha, rsp);
  1842. if (ret)
  1843. goto probe_init_failed;
  1844. pci_save_state(pdev);
  1845. /* Alloc arrays of request and response ring ptrs */
  1846. que_init:
  1847. if (!qla2x00_alloc_queues(ha)) {
  1848. qla_printk(KERN_WARNING, ha,
  1849. "[ERROR] Failed to allocate memory for queue"
  1850. " pointers\n");
  1851. goto probe_init_failed;
  1852. }
  1853. ha->rsp_q_map[0] = rsp;
  1854. ha->req_q_map[0] = req;
  1855. rsp->req = req;
  1856. req->rsp = rsp;
  1857. set_bit(0, ha->req_qid_map);
  1858. set_bit(0, ha->rsp_qid_map);
  1859. /* FWI2-capable only. */
  1860. req->req_q_in = &ha->iobase->isp24.req_q_in;
  1861. req->req_q_out = &ha->iobase->isp24.req_q_out;
  1862. rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
  1863. rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
  1864. if (ha->mqenable) {
  1865. req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
  1866. req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
  1867. rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
  1868. rsp->rsp_q_out = &ha->mqiobase->isp25mq.rsp_q_out;
  1869. }
  1870. if (IS_QLA82XX(ha)) {
  1871. req->req_q_out = &ha->iobase->isp82.req_q_out[0];
  1872. rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
  1873. rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
  1874. }
  1875. if (qla2x00_initialize_adapter(base_vha)) {
  1876. qla_printk(KERN_WARNING, ha,
  1877. "Failed to initialize adapter\n");
  1878. DEBUG2(printk("scsi(%ld): Failed to initialize adapter - "
  1879. "Adapter flags %x.\n",
  1880. base_vha->host_no, base_vha->device_flags));
  1881. if (IS_QLA82XX(ha)) {
  1882. qla82xx_idc_lock(ha);
  1883. qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
  1884. QLA82XX_DEV_FAILED);
  1885. qla82xx_idc_unlock(ha);
  1886. qla_printk(KERN_INFO, ha, "HW State: FAILED\n");
  1887. }
  1888. ret = -ENODEV;
  1889. goto probe_failed;
  1890. }
  1891. if (ha->mqenable) {
  1892. if (qla25xx_setup_mode(base_vha)) {
  1893. qla_printk(KERN_WARNING, ha,
  1894. "Can't create queues, falling back to single"
  1895. " queue mode\n");
  1896. goto que_init;
  1897. }
  1898. }
  1899. if (ha->flags.running_gold_fw)
  1900. goto skip_dpc;
  1901. /*
  1902. * Startup the kernel thread for this host adapter
  1903. */
  1904. ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
  1905. "%s_dpc", base_vha->host_str);
  1906. if (IS_ERR(ha->dpc_thread)) {
  1907. qla_printk(KERN_WARNING, ha,
  1908. "Unable to start DPC thread!\n");
  1909. ret = PTR_ERR(ha->dpc_thread);
  1910. goto probe_failed;
  1911. }
  1912. skip_dpc:
  1913. list_add_tail(&base_vha->list, &ha->vp_list);
  1914. base_vha->host->irq = ha->pdev->irq;
  1915. /* Initialized the timer */
  1916. qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
  1917. DEBUG2(printk("DEBUG: detect hba %ld at address = %p\n",
  1918. base_vha->host_no, ha));
  1919. ha->isp_ops->enable_intrs(ha);
  1920. ret = scsi_add_host(host, &pdev->dev);
  1921. if (ret)
  1922. goto probe_failed;
  1923. base_vha->flags.init_done = 1;
  1924. base_vha->flags.online = 1;
  1925. scsi_scan_host(host);
  1926. qla2x00_alloc_sysfs_attr(base_vha);
  1927. qla2x00_init_host_attr(base_vha);
  1928. qla2x00_dfs_setup(base_vha);
  1929. qla_printk(KERN_INFO, ha, "\n"
  1930. " QLogic Fibre Channel HBA Driver: %s\n"
  1931. " QLogic %s - %s\n"
  1932. " ISP%04X: %s @ %s hdma%c, host#=%ld, fw=%s\n",
  1933. qla2x00_version_str, ha->model_number,
  1934. ha->model_desc ? ha->model_desc : "", pdev->device,
  1935. ha->isp_ops->pci_info_str(base_vha, pci_info), pci_name(pdev),
  1936. ha->flags.enable_64bit_addressing ? '+' : '-', base_vha->host_no,
  1937. ha->isp_ops->fw_version_str(base_vha, fw_str));
  1938. return 0;
  1939. probe_init_failed:
  1940. qla2x00_free_req_que(ha, req);
  1941. qla2x00_free_rsp_que(ha, rsp);
  1942. ha->max_req_queues = ha->max_rsp_queues = 0;
  1943. probe_failed:
  1944. if (base_vha->timer_active)
  1945. qla2x00_stop_timer(base_vha);
  1946. base_vha->flags.online = 0;
  1947. if (ha->dpc_thread) {
  1948. struct task_struct *t = ha->dpc_thread;
  1949. ha->dpc_thread = NULL;
  1950. kthread_stop(t);
  1951. }
  1952. qla2x00_free_device(base_vha);
  1953. scsi_host_put(base_vha->host);
  1954. probe_hw_failed:
  1955. if (IS_QLA82XX(ha)) {
  1956. qla82xx_idc_lock(ha);
  1957. qla82xx_clear_drv_active(ha);
  1958. qla82xx_idc_unlock(ha);
  1959. iounmap((device_reg_t __iomem *)ha->nx_pcibase);
  1960. if (!ql2xdbwr)
  1961. iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
  1962. } else {
  1963. if (ha->iobase)
  1964. iounmap(ha->iobase);
  1965. }
  1966. pci_release_selected_regions(ha->pdev, ha->bars);
  1967. kfree(ha);
  1968. ha = NULL;
  1969. probe_out:
  1970. pci_disable_device(pdev);
  1971. return ret;
  1972. }
  1973. static void
  1974. qla2x00_remove_one(struct pci_dev *pdev)
  1975. {
  1976. scsi_qla_host_t *base_vha, *vha, *temp;
  1977. struct qla_hw_data *ha;
  1978. base_vha = pci_get_drvdata(pdev);
  1979. ha = base_vha->hw;
  1980. list_for_each_entry_safe(vha, temp, &ha->vp_list, list) {
  1981. if (vha && vha->fc_vport)
  1982. fc_vport_terminate(vha->fc_vport);
  1983. }
  1984. set_bit(UNLOADING, &base_vha->dpc_flags);
  1985. qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
  1986. qla2x00_dfs_remove(base_vha);
  1987. qla84xx_put_chip(base_vha);
  1988. /* Disable timer */
  1989. if (base_vha->timer_active)
  1990. qla2x00_stop_timer(base_vha);
  1991. base_vha->flags.online = 0;
  1992. /* Flush the work queue and remove it */
  1993. if (ha->wq) {
  1994. flush_workqueue(ha->wq);
  1995. destroy_workqueue(ha->wq);
  1996. ha->wq = NULL;
  1997. }
  1998. /* Kill the kernel thread for this host */
  1999. if (ha->dpc_thread) {
  2000. struct task_struct *t = ha->dpc_thread;
  2001. /*
  2002. * qla2xxx_wake_dpc checks for ->dpc_thread
  2003. * so we need to zero it out.
  2004. */
  2005. ha->dpc_thread = NULL;
  2006. kthread_stop(t);
  2007. }
  2008. qla2x00_free_sysfs_attr(base_vha);
  2009. fc_remove_host(base_vha->host);
  2010. scsi_remove_host(base_vha->host);
  2011. qla2x00_free_device(base_vha);
  2012. scsi_host_put(base_vha->host);
  2013. if (IS_QLA82XX(ha)) {
  2014. iounmap((device_reg_t __iomem *)ha->nx_pcibase);
  2015. if (!ql2xdbwr)
  2016. iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
  2017. } else {
  2018. if (ha->iobase)
  2019. iounmap(ha->iobase);
  2020. if (ha->mqiobase)
  2021. iounmap(ha->mqiobase);
  2022. }
  2023. pci_release_selected_regions(ha->pdev, ha->bars);
  2024. kfree(ha);
  2025. ha = NULL;
  2026. pci_disable_pcie_error_reporting(pdev);
  2027. pci_disable_device(pdev);
  2028. pci_set_drvdata(pdev, NULL);
  2029. }
  2030. static void
  2031. qla2x00_free_device(scsi_qla_host_t *vha)
  2032. {
  2033. struct qla_hw_data *ha = vha->hw;
  2034. qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
  2035. /* Disable timer */
  2036. if (vha->timer_active)
  2037. qla2x00_stop_timer(vha);
  2038. /* Kill the kernel thread for this host */
  2039. if (ha->dpc_thread) {
  2040. struct task_struct *t = ha->dpc_thread;
  2041. /*
  2042. * qla2xxx_wake_dpc checks for ->dpc_thread
  2043. * so we need to zero it out.
  2044. */
  2045. ha->dpc_thread = NULL;
  2046. kthread_stop(t);
  2047. }
  2048. qla25xx_delete_queues(vha);
  2049. if (ha->flags.fce_enabled)
  2050. qla2x00_disable_fce_trace(vha, NULL, NULL);
  2051. if (ha->eft)
  2052. qla2x00_disable_eft_trace(vha);
  2053. /* Stop currently executing firmware. */
  2054. qla2x00_try_to_stop_firmware(vha);
  2055. vha->flags.online = 0;
  2056. /* turn-off interrupts on the card */
  2057. if (ha->interrupts_on) {
  2058. vha->flags.init_done = 0;
  2059. ha->isp_ops->disable_intrs(ha);
  2060. }
  2061. qla2x00_free_irqs(vha);
  2062. qla2x00_mem_free(ha);
  2063. qla2x00_free_queues(ha);
  2064. }
  2065. static inline void
  2066. qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
  2067. int defer)
  2068. {
  2069. struct fc_rport *rport;
  2070. scsi_qla_host_t *base_vha;
  2071. if (!fcport->rport)
  2072. return;
  2073. rport = fcport->rport;
  2074. if (defer) {
  2075. base_vha = pci_get_drvdata(vha->hw->pdev);
  2076. spin_lock_irq(vha->host->host_lock);
  2077. fcport->drport = rport;
  2078. spin_unlock_irq(vha->host->host_lock);
  2079. set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
  2080. qla2xxx_wake_dpc(base_vha);
  2081. } else
  2082. fc_remote_port_delete(rport);
  2083. }
  2084. /*
  2085. * qla2x00_mark_device_lost Updates fcport state when device goes offline.
  2086. *
  2087. * Input: ha = adapter block pointer. fcport = port structure pointer.
  2088. *
  2089. * Return: None.
  2090. *
  2091. * Context:
  2092. */
  2093. void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
  2094. int do_login, int defer)
  2095. {
  2096. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  2097. vha->vp_idx == fcport->vp_idx) {
  2098. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  2099. qla2x00_schedule_rport_del(vha, fcport, defer);
  2100. }
  2101. /*
  2102. * We may need to retry the login, so don't change the state of the
  2103. * port but do the retries.
  2104. */
  2105. if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
  2106. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  2107. if (!do_login)
  2108. return;
  2109. if (fcport->login_retry == 0) {
  2110. fcport->login_retry = vha->hw->login_retry_count;
  2111. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  2112. DEBUG(printk("scsi(%ld): Port login retry: "
  2113. "%02x%02x%02x%02x%02x%02x%02x%02x, "
  2114. "id = 0x%04x retry cnt=%d\n",
  2115. vha->host_no,
  2116. fcport->port_name[0],
  2117. fcport->port_name[1],
  2118. fcport->port_name[2],
  2119. fcport->port_name[3],
  2120. fcport->port_name[4],
  2121. fcport->port_name[5],
  2122. fcport->port_name[6],
  2123. fcport->port_name[7],
  2124. fcport->loop_id,
  2125. fcport->login_retry));
  2126. }
  2127. }
  2128. /*
  2129. * qla2x00_mark_all_devices_lost
  2130. * Updates fcport state when device goes offline.
  2131. *
  2132. * Input:
  2133. * ha = adapter block pointer.
  2134. * fcport = port structure pointer.
  2135. *
  2136. * Return:
  2137. * None.
  2138. *
  2139. * Context:
  2140. */
  2141. void
  2142. qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
  2143. {
  2144. fc_port_t *fcport;
  2145. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2146. if (vha->vp_idx != 0 && vha->vp_idx != fcport->vp_idx)
  2147. continue;
  2148. /*
  2149. * No point in marking the device as lost, if the device is
  2150. * already DEAD.
  2151. */
  2152. if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
  2153. continue;
  2154. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  2155. if (defer)
  2156. qla2x00_schedule_rport_del(vha, fcport, defer);
  2157. else if (vha->vp_idx == fcport->vp_idx)
  2158. qla2x00_schedule_rport_del(vha, fcport, defer);
  2159. }
  2160. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  2161. }
  2162. }
  2163. /*
  2164. * qla2x00_mem_alloc
  2165. * Allocates adapter memory.
  2166. *
  2167. * Returns:
  2168. * 0 = success.
  2169. * !0 = failure.
  2170. */
  2171. static int
  2172. qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
  2173. struct req_que **req, struct rsp_que **rsp)
  2174. {
  2175. char name[16];
  2176. ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
  2177. &ha->init_cb_dma, GFP_KERNEL);
  2178. if (!ha->init_cb)
  2179. goto fail;
  2180. ha->gid_list = dma_alloc_coherent(&ha->pdev->dev, GID_LIST_SIZE,
  2181. &ha->gid_list_dma, GFP_KERNEL);
  2182. if (!ha->gid_list)
  2183. goto fail_free_init_cb;
  2184. ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
  2185. if (!ha->srb_mempool)
  2186. goto fail_free_gid_list;
  2187. if (IS_QLA82XX(ha)) {
  2188. /* Allocate cache for CT6 Ctx. */
  2189. if (!ctx_cachep) {
  2190. ctx_cachep = kmem_cache_create("qla2xxx_ctx",
  2191. sizeof(struct ct6_dsd), 0,
  2192. SLAB_HWCACHE_ALIGN, NULL);
  2193. if (!ctx_cachep)
  2194. goto fail_free_gid_list;
  2195. }
  2196. ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
  2197. ctx_cachep);
  2198. if (!ha->ctx_mempool)
  2199. goto fail_free_srb_mempool;
  2200. }
  2201. /* Get memory for cached NVRAM */
  2202. ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
  2203. if (!ha->nvram)
  2204. goto fail_free_ctx_mempool;
  2205. snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
  2206. ha->pdev->device);
  2207. ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
  2208. DMA_POOL_SIZE, 8, 0);
  2209. if (!ha->s_dma_pool)
  2210. goto fail_free_nvram;
  2211. if (IS_QLA82XX(ha)) {
  2212. ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
  2213. DSD_LIST_DMA_POOL_SIZE, 8, 0);
  2214. if (!ha->dl_dma_pool) {
  2215. qla_printk(KERN_WARNING, ha,
  2216. "Memory Allocation failed - dl_dma_pool\n");
  2217. goto fail_s_dma_pool;
  2218. }
  2219. ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
  2220. FCP_CMND_DMA_POOL_SIZE, 8, 0);
  2221. if (!ha->fcp_cmnd_dma_pool) {
  2222. qla_printk(KERN_WARNING, ha,
  2223. "Memory Allocation failed - fcp_cmnd_dma_pool\n");
  2224. goto fail_dl_dma_pool;
  2225. }
  2226. }
  2227. /* Allocate memory for SNS commands */
  2228. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  2229. /* Get consistent memory allocated for SNS commands */
  2230. ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
  2231. sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
  2232. if (!ha->sns_cmd)
  2233. goto fail_dma_pool;
  2234. } else {
  2235. /* Get consistent memory allocated for MS IOCB */
  2236. ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
  2237. &ha->ms_iocb_dma);
  2238. if (!ha->ms_iocb)
  2239. goto fail_dma_pool;
  2240. /* Get consistent memory allocated for CT SNS commands */
  2241. ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
  2242. sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
  2243. if (!ha->ct_sns)
  2244. goto fail_free_ms_iocb;
  2245. }
  2246. /* Allocate memory for request ring */
  2247. *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
  2248. if (!*req) {
  2249. DEBUG(printk("Unable to allocate memory for req\n"));
  2250. goto fail_req;
  2251. }
  2252. (*req)->length = req_len;
  2253. (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
  2254. ((*req)->length + 1) * sizeof(request_t),
  2255. &(*req)->dma, GFP_KERNEL);
  2256. if (!(*req)->ring) {
  2257. DEBUG(printk("Unable to allocate memory for req_ring\n"));
  2258. goto fail_req_ring;
  2259. }
  2260. /* Allocate memory for response ring */
  2261. *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
  2262. if (!*rsp) {
  2263. qla_printk(KERN_WARNING, ha,
  2264. "Unable to allocate memory for rsp\n");
  2265. goto fail_rsp;
  2266. }
  2267. (*rsp)->hw = ha;
  2268. (*rsp)->length = rsp_len;
  2269. (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
  2270. ((*rsp)->length + 1) * sizeof(response_t),
  2271. &(*rsp)->dma, GFP_KERNEL);
  2272. if (!(*rsp)->ring) {
  2273. qla_printk(KERN_WARNING, ha,
  2274. "Unable to allocate memory for rsp_ring\n");
  2275. goto fail_rsp_ring;
  2276. }
  2277. (*req)->rsp = *rsp;
  2278. (*rsp)->req = *req;
  2279. /* Allocate memory for NVRAM data for vports */
  2280. if (ha->nvram_npiv_size) {
  2281. ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
  2282. ha->nvram_npiv_size, GFP_KERNEL);
  2283. if (!ha->npiv_info) {
  2284. qla_printk(KERN_WARNING, ha,
  2285. "Unable to allocate memory for npiv info\n");
  2286. goto fail_npiv_info;
  2287. }
  2288. } else
  2289. ha->npiv_info = NULL;
  2290. /* Get consistent memory allocated for EX-INIT-CB. */
  2291. if (IS_QLA8XXX_TYPE(ha)) {
  2292. ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
  2293. &ha->ex_init_cb_dma);
  2294. if (!ha->ex_init_cb)
  2295. goto fail_ex_init_cb;
  2296. }
  2297. INIT_LIST_HEAD(&ha->gbl_dsd_list);
  2298. /* Get consistent memory allocated for Async Port-Database. */
  2299. if (!IS_FWI2_CAPABLE(ha)) {
  2300. ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
  2301. &ha->async_pd_dma);
  2302. if (!ha->async_pd)
  2303. goto fail_async_pd;
  2304. }
  2305. INIT_LIST_HEAD(&ha->vp_list);
  2306. return 1;
  2307. fail_async_pd:
  2308. dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
  2309. fail_ex_init_cb:
  2310. kfree(ha->npiv_info);
  2311. fail_npiv_info:
  2312. dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
  2313. sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
  2314. (*rsp)->ring = NULL;
  2315. (*rsp)->dma = 0;
  2316. fail_rsp_ring:
  2317. kfree(*rsp);
  2318. fail_rsp:
  2319. dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
  2320. sizeof(request_t), (*req)->ring, (*req)->dma);
  2321. (*req)->ring = NULL;
  2322. (*req)->dma = 0;
  2323. fail_req_ring:
  2324. kfree(*req);
  2325. fail_req:
  2326. dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
  2327. ha->ct_sns, ha->ct_sns_dma);
  2328. ha->ct_sns = NULL;
  2329. ha->ct_sns_dma = 0;
  2330. fail_free_ms_iocb:
  2331. dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
  2332. ha->ms_iocb = NULL;
  2333. ha->ms_iocb_dma = 0;
  2334. fail_dma_pool:
  2335. if (IS_QLA82XX(ha)) {
  2336. dma_pool_destroy(ha->fcp_cmnd_dma_pool);
  2337. ha->fcp_cmnd_dma_pool = NULL;
  2338. }
  2339. fail_dl_dma_pool:
  2340. if (IS_QLA82XX(ha)) {
  2341. dma_pool_destroy(ha->dl_dma_pool);
  2342. ha->dl_dma_pool = NULL;
  2343. }
  2344. fail_s_dma_pool:
  2345. dma_pool_destroy(ha->s_dma_pool);
  2346. ha->s_dma_pool = NULL;
  2347. fail_free_nvram:
  2348. kfree(ha->nvram);
  2349. ha->nvram = NULL;
  2350. fail_free_ctx_mempool:
  2351. mempool_destroy(ha->ctx_mempool);
  2352. ha->ctx_mempool = NULL;
  2353. fail_free_srb_mempool:
  2354. mempool_destroy(ha->srb_mempool);
  2355. ha->srb_mempool = NULL;
  2356. fail_free_gid_list:
  2357. dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list,
  2358. ha->gid_list_dma);
  2359. ha->gid_list = NULL;
  2360. ha->gid_list_dma = 0;
  2361. fail_free_init_cb:
  2362. dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
  2363. ha->init_cb_dma);
  2364. ha->init_cb = NULL;
  2365. ha->init_cb_dma = 0;
  2366. fail:
  2367. DEBUG(printk("%s: Memory allocation failure\n", __func__));
  2368. return -ENOMEM;
  2369. }
  2370. /*
  2371. * qla2x00_mem_free
  2372. * Frees all adapter allocated memory.
  2373. *
  2374. * Input:
  2375. * ha = adapter block pointer.
  2376. */
  2377. static void
  2378. qla2x00_mem_free(struct qla_hw_data *ha)
  2379. {
  2380. if (ha->srb_mempool)
  2381. mempool_destroy(ha->srb_mempool);
  2382. if (ha->fce)
  2383. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
  2384. ha->fce_dma);
  2385. if (ha->fw_dump) {
  2386. if (ha->eft)
  2387. dma_free_coherent(&ha->pdev->dev,
  2388. ntohl(ha->fw_dump->eft_size), ha->eft, ha->eft_dma);
  2389. vfree(ha->fw_dump);
  2390. }
  2391. if (ha->dcbx_tlv)
  2392. dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
  2393. ha->dcbx_tlv, ha->dcbx_tlv_dma);
  2394. if (ha->xgmac_data)
  2395. dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
  2396. ha->xgmac_data, ha->xgmac_data_dma);
  2397. if (ha->sns_cmd)
  2398. dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
  2399. ha->sns_cmd, ha->sns_cmd_dma);
  2400. if (ha->ct_sns)
  2401. dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
  2402. ha->ct_sns, ha->ct_sns_dma);
  2403. if (ha->sfp_data)
  2404. dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
  2405. if (ha->edc_data)
  2406. dma_pool_free(ha->s_dma_pool, ha->edc_data, ha->edc_data_dma);
  2407. if (ha->ms_iocb)
  2408. dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
  2409. if (ha->ex_init_cb)
  2410. dma_pool_free(ha->s_dma_pool,
  2411. ha->ex_init_cb, ha->ex_init_cb_dma);
  2412. if (ha->async_pd)
  2413. dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
  2414. if (ha->s_dma_pool)
  2415. dma_pool_destroy(ha->s_dma_pool);
  2416. if (ha->gid_list)
  2417. dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list,
  2418. ha->gid_list_dma);
  2419. if (IS_QLA82XX(ha)) {
  2420. if (!list_empty(&ha->gbl_dsd_list)) {
  2421. struct dsd_dma *dsd_ptr, *tdsd_ptr;
  2422. /* clean up allocated prev pool */
  2423. list_for_each_entry_safe(dsd_ptr,
  2424. tdsd_ptr, &ha->gbl_dsd_list, list) {
  2425. dma_pool_free(ha->dl_dma_pool,
  2426. dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
  2427. list_del(&dsd_ptr->list);
  2428. kfree(dsd_ptr);
  2429. }
  2430. }
  2431. }
  2432. if (ha->dl_dma_pool)
  2433. dma_pool_destroy(ha->dl_dma_pool);
  2434. if (ha->fcp_cmnd_dma_pool)
  2435. dma_pool_destroy(ha->fcp_cmnd_dma_pool);
  2436. if (ha->ctx_mempool)
  2437. mempool_destroy(ha->ctx_mempool);
  2438. if (ha->init_cb)
  2439. dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
  2440. ha->init_cb, ha->init_cb_dma);
  2441. vfree(ha->optrom_buffer);
  2442. kfree(ha->nvram);
  2443. kfree(ha->npiv_info);
  2444. ha->srb_mempool = NULL;
  2445. ha->ctx_mempool = NULL;
  2446. ha->eft = NULL;
  2447. ha->eft_dma = 0;
  2448. ha->sns_cmd = NULL;
  2449. ha->sns_cmd_dma = 0;
  2450. ha->ct_sns = NULL;
  2451. ha->ct_sns_dma = 0;
  2452. ha->ms_iocb = NULL;
  2453. ha->ms_iocb_dma = 0;
  2454. ha->init_cb = NULL;
  2455. ha->init_cb_dma = 0;
  2456. ha->ex_init_cb = NULL;
  2457. ha->ex_init_cb_dma = 0;
  2458. ha->async_pd = NULL;
  2459. ha->async_pd_dma = 0;
  2460. ha->s_dma_pool = NULL;
  2461. ha->dl_dma_pool = NULL;
  2462. ha->fcp_cmnd_dma_pool = NULL;
  2463. ha->gid_list = NULL;
  2464. ha->gid_list_dma = 0;
  2465. ha->fw_dump = NULL;
  2466. ha->fw_dumped = 0;
  2467. ha->fw_dump_reading = 0;
  2468. }
  2469. struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
  2470. struct qla_hw_data *ha)
  2471. {
  2472. struct Scsi_Host *host;
  2473. struct scsi_qla_host *vha = NULL;
  2474. host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
  2475. if (host == NULL) {
  2476. printk(KERN_WARNING
  2477. "qla2xxx: Couldn't allocate host from scsi layer!\n");
  2478. goto fail;
  2479. }
  2480. /* Clear our data area */
  2481. vha = shost_priv(host);
  2482. memset(vha, 0, sizeof(scsi_qla_host_t));
  2483. vha->host = host;
  2484. vha->host_no = host->host_no;
  2485. vha->hw = ha;
  2486. INIT_LIST_HEAD(&vha->vp_fcports);
  2487. INIT_LIST_HEAD(&vha->work_list);
  2488. INIT_LIST_HEAD(&vha->list);
  2489. spin_lock_init(&vha->work_lock);
  2490. sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
  2491. return vha;
  2492. fail:
  2493. return vha;
  2494. }
  2495. static struct qla_work_evt *
  2496. qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
  2497. {
  2498. struct qla_work_evt *e;
  2499. e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
  2500. if (!e)
  2501. return NULL;
  2502. INIT_LIST_HEAD(&e->list);
  2503. e->type = type;
  2504. e->flags = QLA_EVT_FLAG_FREE;
  2505. return e;
  2506. }
  2507. static int
  2508. qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
  2509. {
  2510. unsigned long flags;
  2511. spin_lock_irqsave(&vha->work_lock, flags);
  2512. list_add_tail(&e->list, &vha->work_list);
  2513. spin_unlock_irqrestore(&vha->work_lock, flags);
  2514. qla2xxx_wake_dpc(vha);
  2515. return QLA_SUCCESS;
  2516. }
  2517. int
  2518. qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
  2519. u32 data)
  2520. {
  2521. struct qla_work_evt *e;
  2522. e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
  2523. if (!e)
  2524. return QLA_FUNCTION_FAILED;
  2525. e->u.aen.code = code;
  2526. e->u.aen.data = data;
  2527. return qla2x00_post_work(vha, e);
  2528. }
  2529. int
  2530. qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
  2531. {
  2532. struct qla_work_evt *e;
  2533. e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
  2534. if (!e)
  2535. return QLA_FUNCTION_FAILED;
  2536. memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
  2537. return qla2x00_post_work(vha, e);
  2538. }
  2539. #define qla2x00_post_async_work(name, type) \
  2540. int qla2x00_post_async_##name##_work( \
  2541. struct scsi_qla_host *vha, \
  2542. fc_port_t *fcport, uint16_t *data) \
  2543. { \
  2544. struct qla_work_evt *e; \
  2545. \
  2546. e = qla2x00_alloc_work(vha, type); \
  2547. if (!e) \
  2548. return QLA_FUNCTION_FAILED; \
  2549. \
  2550. e->u.logio.fcport = fcport; \
  2551. if (data) { \
  2552. e->u.logio.data[0] = data[0]; \
  2553. e->u.logio.data[1] = data[1]; \
  2554. } \
  2555. return qla2x00_post_work(vha, e); \
  2556. }
  2557. qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
  2558. qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
  2559. qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
  2560. qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
  2561. qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
  2562. qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
  2563. int
  2564. qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
  2565. {
  2566. struct qla_work_evt *e;
  2567. e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
  2568. if (!e)
  2569. return QLA_FUNCTION_FAILED;
  2570. e->u.uevent.code = code;
  2571. return qla2x00_post_work(vha, e);
  2572. }
  2573. static void
  2574. qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
  2575. {
  2576. char event_string[40];
  2577. char *envp[] = { event_string, NULL };
  2578. switch (code) {
  2579. case QLA_UEVENT_CODE_FW_DUMP:
  2580. snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
  2581. vha->host_no);
  2582. break;
  2583. default:
  2584. /* do nothing */
  2585. break;
  2586. }
  2587. kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
  2588. }
  2589. void
  2590. qla2x00_do_work(struct scsi_qla_host *vha)
  2591. {
  2592. struct qla_work_evt *e, *tmp;
  2593. unsigned long flags;
  2594. LIST_HEAD(work);
  2595. spin_lock_irqsave(&vha->work_lock, flags);
  2596. list_splice_init(&vha->work_list, &work);
  2597. spin_unlock_irqrestore(&vha->work_lock, flags);
  2598. list_for_each_entry_safe(e, tmp, &work, list) {
  2599. list_del_init(&e->list);
  2600. switch (e->type) {
  2601. case QLA_EVT_AEN:
  2602. fc_host_post_event(vha->host, fc_get_event_number(),
  2603. e->u.aen.code, e->u.aen.data);
  2604. break;
  2605. case QLA_EVT_IDC_ACK:
  2606. qla81xx_idc_ack(vha, e->u.idc_ack.mb);
  2607. break;
  2608. case QLA_EVT_ASYNC_LOGIN:
  2609. qla2x00_async_login(vha, e->u.logio.fcport,
  2610. e->u.logio.data);
  2611. break;
  2612. case QLA_EVT_ASYNC_LOGIN_DONE:
  2613. qla2x00_async_login_done(vha, e->u.logio.fcport,
  2614. e->u.logio.data);
  2615. break;
  2616. case QLA_EVT_ASYNC_LOGOUT:
  2617. qla2x00_async_logout(vha, e->u.logio.fcport);
  2618. break;
  2619. case QLA_EVT_ASYNC_LOGOUT_DONE:
  2620. qla2x00_async_logout_done(vha, e->u.logio.fcport,
  2621. e->u.logio.data);
  2622. break;
  2623. case QLA_EVT_ASYNC_ADISC:
  2624. qla2x00_async_adisc(vha, e->u.logio.fcport,
  2625. e->u.logio.data);
  2626. break;
  2627. case QLA_EVT_ASYNC_ADISC_DONE:
  2628. qla2x00_async_adisc_done(vha, e->u.logio.fcport,
  2629. e->u.logio.data);
  2630. break;
  2631. case QLA_EVT_UEVENT:
  2632. qla2x00_uevent_emit(vha, e->u.uevent.code);
  2633. break;
  2634. }
  2635. if (e->flags & QLA_EVT_FLAG_FREE)
  2636. kfree(e);
  2637. }
  2638. }
  2639. /* Relogins all the fcports of a vport
  2640. * Context: dpc thread
  2641. */
  2642. void qla2x00_relogin(struct scsi_qla_host *vha)
  2643. {
  2644. fc_port_t *fcport;
  2645. int status;
  2646. uint16_t next_loopid = 0;
  2647. struct qla_hw_data *ha = vha->hw;
  2648. uint16_t data[2];
  2649. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2650. /*
  2651. * If the port is not ONLINE then try to login
  2652. * to it if we haven't run out of retries.
  2653. */
  2654. if (atomic_read(&fcport->state) != FCS_ONLINE &&
  2655. fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
  2656. fcport->login_retry--;
  2657. if (fcport->flags & FCF_FABRIC_DEVICE) {
  2658. if (fcport->flags & FCF_FCP2_DEVICE)
  2659. ha->isp_ops->fabric_logout(vha,
  2660. fcport->loop_id,
  2661. fcport->d_id.b.domain,
  2662. fcport->d_id.b.area,
  2663. fcport->d_id.b.al_pa);
  2664. if (IS_ALOGIO_CAPABLE(ha)) {
  2665. fcport->flags |= FCF_ASYNC_SENT;
  2666. data[0] = 0;
  2667. data[1] = QLA_LOGIO_LOGIN_RETRIED;
  2668. status = qla2x00_post_async_login_work(
  2669. vha, fcport, data);
  2670. if (status == QLA_SUCCESS)
  2671. continue;
  2672. /* Attempt a retry. */
  2673. status = 1;
  2674. } else
  2675. status = qla2x00_fabric_login(vha,
  2676. fcport, &next_loopid);
  2677. } else
  2678. status = qla2x00_local_device_login(vha,
  2679. fcport);
  2680. if (status == QLA_SUCCESS) {
  2681. fcport->old_loop_id = fcport->loop_id;
  2682. DEBUG(printk("scsi(%ld): port login OK: logged "
  2683. "in ID 0x%x\n", vha->host_no, fcport->loop_id));
  2684. qla2x00_update_fcport(vha, fcport);
  2685. } else if (status == 1) {
  2686. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  2687. /* retry the login again */
  2688. DEBUG(printk("scsi(%ld): Retrying"
  2689. " %d login again loop_id 0x%x\n",
  2690. vha->host_no, fcport->login_retry,
  2691. fcport->loop_id));
  2692. } else {
  2693. fcport->login_retry = 0;
  2694. }
  2695. if (fcport->login_retry == 0 && status != QLA_SUCCESS)
  2696. fcport->loop_id = FC_NO_LOOP_ID;
  2697. }
  2698. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2699. break;
  2700. }
  2701. }
  2702. /**************************************************************************
  2703. * qla2x00_do_dpc
  2704. * This kernel thread is a task that is schedule by the interrupt handler
  2705. * to perform the background processing for interrupts.
  2706. *
  2707. * Notes:
  2708. * This task always run in the context of a kernel thread. It
  2709. * is kick-off by the driver's detect code and starts up
  2710. * up one per adapter. It immediately goes to sleep and waits for
  2711. * some fibre event. When either the interrupt handler or
  2712. * the timer routine detects a event it will one of the task
  2713. * bits then wake us up.
  2714. **************************************************************************/
  2715. static int
  2716. qla2x00_do_dpc(void *data)
  2717. {
  2718. int rval;
  2719. scsi_qla_host_t *base_vha;
  2720. struct qla_hw_data *ha;
  2721. ha = (struct qla_hw_data *)data;
  2722. base_vha = pci_get_drvdata(ha->pdev);
  2723. set_user_nice(current, -20);
  2724. while (!kthread_should_stop()) {
  2725. DEBUG3(printk("qla2x00: DPC handler sleeping\n"));
  2726. set_current_state(TASK_INTERRUPTIBLE);
  2727. schedule();
  2728. __set_current_state(TASK_RUNNING);
  2729. DEBUG3(printk("qla2x00: DPC handler waking up\n"));
  2730. /* Initialization not yet finished. Don't do anything yet. */
  2731. if (!base_vha->flags.init_done)
  2732. continue;
  2733. if (ha->flags.eeh_busy) {
  2734. DEBUG17(qla_printk(KERN_WARNING, ha,
  2735. "qla2x00_do_dpc: dpc_flags: %lx\n",
  2736. base_vha->dpc_flags));
  2737. continue;
  2738. }
  2739. DEBUG3(printk("scsi(%ld): DPC handler\n", base_vha->host_no));
  2740. ha->dpc_active = 1;
  2741. if (ha->flags.mbox_busy) {
  2742. ha->dpc_active = 0;
  2743. continue;
  2744. }
  2745. qla2x00_do_work(base_vha);
  2746. if (IS_QLA82XX(ha)) {
  2747. if (test_and_clear_bit(ISP_UNRECOVERABLE,
  2748. &base_vha->dpc_flags)) {
  2749. qla82xx_idc_lock(ha);
  2750. qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
  2751. QLA82XX_DEV_FAILED);
  2752. qla82xx_idc_unlock(ha);
  2753. qla_printk(KERN_INFO, ha,
  2754. "HW State: FAILED\n");
  2755. qla82xx_device_state_handler(base_vha);
  2756. continue;
  2757. }
  2758. if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
  2759. &base_vha->dpc_flags)) {
  2760. DEBUG(printk(KERN_INFO
  2761. "scsi(%ld): dpc: sched "
  2762. "qla82xx_fcoe_ctx_reset ha = %p\n",
  2763. base_vha->host_no, ha));
  2764. if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
  2765. &base_vha->dpc_flags))) {
  2766. if (qla82xx_fcoe_ctx_reset(base_vha)) {
  2767. /* FCoE-ctx reset failed.
  2768. * Escalate to chip-reset
  2769. */
  2770. set_bit(ISP_ABORT_NEEDED,
  2771. &base_vha->dpc_flags);
  2772. }
  2773. clear_bit(ABORT_ISP_ACTIVE,
  2774. &base_vha->dpc_flags);
  2775. }
  2776. DEBUG(printk("scsi(%ld): dpc:"
  2777. " qla82xx_fcoe_ctx_reset end\n",
  2778. base_vha->host_no));
  2779. }
  2780. }
  2781. if (test_and_clear_bit(ISP_ABORT_NEEDED,
  2782. &base_vha->dpc_flags)) {
  2783. DEBUG(printk("scsi(%ld): dpc: sched "
  2784. "qla2x00_abort_isp ha = %p\n",
  2785. base_vha->host_no, ha));
  2786. if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
  2787. &base_vha->dpc_flags))) {
  2788. if (ha->isp_ops->abort_isp(base_vha)) {
  2789. /* failed. retry later */
  2790. set_bit(ISP_ABORT_NEEDED,
  2791. &base_vha->dpc_flags);
  2792. }
  2793. clear_bit(ABORT_ISP_ACTIVE,
  2794. &base_vha->dpc_flags);
  2795. }
  2796. DEBUG(printk("scsi(%ld): dpc: qla2x00_abort_isp end\n",
  2797. base_vha->host_no));
  2798. }
  2799. if (test_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags)) {
  2800. qla2x00_update_fcports(base_vha);
  2801. clear_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
  2802. }
  2803. if (test_and_clear_bit(RESET_MARKER_NEEDED,
  2804. &base_vha->dpc_flags) &&
  2805. (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
  2806. DEBUG(printk("scsi(%ld): qla2x00_reset_marker()\n",
  2807. base_vha->host_no));
  2808. qla2x00_rst_aen(base_vha);
  2809. clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
  2810. }
  2811. /* Retry each device up to login retry count */
  2812. if ((test_and_clear_bit(RELOGIN_NEEDED,
  2813. &base_vha->dpc_flags)) &&
  2814. !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
  2815. atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
  2816. DEBUG(printk("scsi(%ld): qla2x00_port_login()\n",
  2817. base_vha->host_no));
  2818. qla2x00_relogin(base_vha);
  2819. DEBUG(printk("scsi(%ld): qla2x00_port_login - end\n",
  2820. base_vha->host_no));
  2821. }
  2822. if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
  2823. &base_vha->dpc_flags)) {
  2824. DEBUG(printk("scsi(%ld): qla2x00_loop_resync()\n",
  2825. base_vha->host_no));
  2826. if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
  2827. &base_vha->dpc_flags))) {
  2828. rval = qla2x00_loop_resync(base_vha);
  2829. clear_bit(LOOP_RESYNC_ACTIVE,
  2830. &base_vha->dpc_flags);
  2831. }
  2832. DEBUG(printk("scsi(%ld): qla2x00_loop_resync - end\n",
  2833. base_vha->host_no));
  2834. }
  2835. if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
  2836. atomic_read(&base_vha->loop_state) == LOOP_READY) {
  2837. clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
  2838. qla2xxx_flash_npiv_conf(base_vha);
  2839. }
  2840. if (!ha->interrupts_on)
  2841. ha->isp_ops->enable_intrs(ha);
  2842. if (test_and_clear_bit(BEACON_BLINK_NEEDED,
  2843. &base_vha->dpc_flags))
  2844. ha->isp_ops->beacon_blink(base_vha);
  2845. qla2x00_do_dpc_all_vps(base_vha);
  2846. ha->dpc_active = 0;
  2847. } /* End of while(1) */
  2848. DEBUG(printk("scsi(%ld): DPC handler exiting\n", base_vha->host_no));
  2849. /*
  2850. * Make sure that nobody tries to wake us up again.
  2851. */
  2852. ha->dpc_active = 0;
  2853. /* Cleanup any residual CTX SRBs. */
  2854. qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
  2855. return 0;
  2856. }
  2857. void
  2858. qla2xxx_wake_dpc(struct scsi_qla_host *vha)
  2859. {
  2860. struct qla_hw_data *ha = vha->hw;
  2861. struct task_struct *t = ha->dpc_thread;
  2862. if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
  2863. wake_up_process(t);
  2864. }
  2865. /*
  2866. * qla2x00_rst_aen
  2867. * Processes asynchronous reset.
  2868. *
  2869. * Input:
  2870. * ha = adapter block pointer.
  2871. */
  2872. static void
  2873. qla2x00_rst_aen(scsi_qla_host_t *vha)
  2874. {
  2875. if (vha->flags.online && !vha->flags.reset_active &&
  2876. !atomic_read(&vha->loop_down_timer) &&
  2877. !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
  2878. do {
  2879. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  2880. /*
  2881. * Issue marker command only when we are going to start
  2882. * the I/O.
  2883. */
  2884. vha->marker_needed = 1;
  2885. } while (!atomic_read(&vha->loop_down_timer) &&
  2886. (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
  2887. }
  2888. }
  2889. static void
  2890. qla2x00_sp_free_dma(srb_t *sp)
  2891. {
  2892. struct scsi_cmnd *cmd = sp->cmd;
  2893. if (sp->flags & SRB_DMA_VALID) {
  2894. scsi_dma_unmap(cmd);
  2895. sp->flags &= ~SRB_DMA_VALID;
  2896. }
  2897. CMD_SP(cmd) = NULL;
  2898. }
  2899. void
  2900. qla2x00_sp_compl(struct qla_hw_data *ha, srb_t *sp)
  2901. {
  2902. struct scsi_cmnd *cmd = sp->cmd;
  2903. qla2x00_sp_free_dma(sp);
  2904. if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
  2905. struct ct6_dsd *ctx = sp->ctx;
  2906. dma_pool_free(ha->fcp_cmnd_dma_pool, ctx->fcp_cmnd,
  2907. ctx->fcp_cmnd_dma);
  2908. list_splice(&ctx->dsd_list, &ha->gbl_dsd_list);
  2909. ha->gbl_dsd_inuse -= ctx->dsd_use_cnt;
  2910. ha->gbl_dsd_avail += ctx->dsd_use_cnt;
  2911. mempool_free(sp->ctx, ha->ctx_mempool);
  2912. sp->ctx = NULL;
  2913. }
  2914. mempool_free(sp, ha->srb_mempool);
  2915. cmd->scsi_done(cmd);
  2916. }
  2917. /**************************************************************************
  2918. * qla2x00_timer
  2919. *
  2920. * Description:
  2921. * One second timer
  2922. *
  2923. * Context: Interrupt
  2924. ***************************************************************************/
  2925. void
  2926. qla2x00_timer(scsi_qla_host_t *vha)
  2927. {
  2928. unsigned long cpu_flags = 0;
  2929. fc_port_t *fcport;
  2930. int start_dpc = 0;
  2931. int index;
  2932. srb_t *sp;
  2933. int t;
  2934. uint16_t w;
  2935. struct qla_hw_data *ha = vha->hw;
  2936. struct req_que *req;
  2937. if (IS_QLA82XX(ha))
  2938. qla82xx_watchdog(vha);
  2939. /* Hardware read to raise pending EEH errors during mailbox waits. */
  2940. if (!pci_channel_offline(ha->pdev))
  2941. pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
  2942. /*
  2943. * Ports - Port down timer.
  2944. *
  2945. * Whenever, a port is in the LOST state we start decrementing its port
  2946. * down timer every second until it reaches zero. Once it reaches zero
  2947. * the port it marked DEAD.
  2948. */
  2949. t = 0;
  2950. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2951. if (fcport->port_type != FCT_TARGET)
  2952. continue;
  2953. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  2954. if (atomic_read(&fcport->port_down_timer) == 0)
  2955. continue;
  2956. if (atomic_dec_and_test(&fcport->port_down_timer) != 0)
  2957. atomic_set(&fcport->state, FCS_DEVICE_DEAD);
  2958. DEBUG(printk("scsi(%ld): fcport-%d - port retry count: "
  2959. "%d remaining\n",
  2960. vha->host_no,
  2961. t, atomic_read(&fcport->port_down_timer)));
  2962. }
  2963. t++;
  2964. } /* End of for fcport */
  2965. /* Loop down handler. */
  2966. if (atomic_read(&vha->loop_down_timer) > 0 &&
  2967. !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))
  2968. && vha->flags.online) {
  2969. if (atomic_read(&vha->loop_down_timer) ==
  2970. vha->loop_down_abort_time) {
  2971. DEBUG(printk("scsi(%ld): Loop Down - aborting the "
  2972. "queues before time expire\n",
  2973. vha->host_no));
  2974. if (!IS_QLA2100(ha) && vha->link_down_timeout)
  2975. atomic_set(&vha->loop_state, LOOP_DEAD);
  2976. /*
  2977. * Schedule an ISP abort to return any FCP2-device
  2978. * commands.
  2979. */
  2980. /* NPIV - scan physical port only */
  2981. if (!vha->vp_idx) {
  2982. spin_lock_irqsave(&ha->hardware_lock,
  2983. cpu_flags);
  2984. req = ha->req_q_map[0];
  2985. for (index = 1;
  2986. index < MAX_OUTSTANDING_COMMANDS;
  2987. index++) {
  2988. fc_port_t *sfcp;
  2989. sp = req->outstanding_cmds[index];
  2990. if (!sp)
  2991. continue;
  2992. if (sp->ctx)
  2993. continue;
  2994. sfcp = sp->fcport;
  2995. if (!(sfcp->flags & FCF_FCP2_DEVICE))
  2996. continue;
  2997. set_bit(ISP_ABORT_NEEDED,
  2998. &vha->dpc_flags);
  2999. break;
  3000. }
  3001. spin_unlock_irqrestore(&ha->hardware_lock,
  3002. cpu_flags);
  3003. }
  3004. start_dpc++;
  3005. }
  3006. /* if the loop has been down for 4 minutes, reinit adapter */
  3007. if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
  3008. if (!(vha->device_flags & DFLG_NO_CABLE)) {
  3009. DEBUG(printk("scsi(%ld): Loop down - "
  3010. "aborting ISP.\n",
  3011. vha->host_no));
  3012. qla_printk(KERN_WARNING, ha,
  3013. "Loop down - aborting ISP.\n");
  3014. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  3015. }
  3016. }
  3017. DEBUG3(printk("scsi(%ld): Loop Down - seconds remaining %d\n",
  3018. vha->host_no,
  3019. atomic_read(&vha->loop_down_timer)));
  3020. }
  3021. /* Check if beacon LED needs to be blinked */
  3022. if (ha->beacon_blink_led == 1) {
  3023. set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
  3024. start_dpc++;
  3025. }
  3026. /* Process any deferred work. */
  3027. if (!list_empty(&vha->work_list))
  3028. start_dpc++;
  3029. /* Schedule the DPC routine if needed */
  3030. if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
  3031. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
  3032. test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
  3033. start_dpc ||
  3034. test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
  3035. test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
  3036. test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
  3037. test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
  3038. test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
  3039. test_bit(RELOGIN_NEEDED, &vha->dpc_flags)))
  3040. qla2xxx_wake_dpc(vha);
  3041. qla2x00_restart_timer(vha, WATCH_INTERVAL);
  3042. }
  3043. /* Firmware interface routines. */
  3044. #define FW_BLOBS 8
  3045. #define FW_ISP21XX 0
  3046. #define FW_ISP22XX 1
  3047. #define FW_ISP2300 2
  3048. #define FW_ISP2322 3
  3049. #define FW_ISP24XX 4
  3050. #define FW_ISP25XX 5
  3051. #define FW_ISP81XX 6
  3052. #define FW_ISP82XX 7
  3053. #define FW_FILE_ISP21XX "ql2100_fw.bin"
  3054. #define FW_FILE_ISP22XX "ql2200_fw.bin"
  3055. #define FW_FILE_ISP2300 "ql2300_fw.bin"
  3056. #define FW_FILE_ISP2322 "ql2322_fw.bin"
  3057. #define FW_FILE_ISP24XX "ql2400_fw.bin"
  3058. #define FW_FILE_ISP25XX "ql2500_fw.bin"
  3059. #define FW_FILE_ISP81XX "ql8100_fw.bin"
  3060. #define FW_FILE_ISP82XX "ql8200_fw.bin"
  3061. static DEFINE_MUTEX(qla_fw_lock);
  3062. static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
  3063. { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
  3064. { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
  3065. { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
  3066. { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
  3067. { .name = FW_FILE_ISP24XX, },
  3068. { .name = FW_FILE_ISP25XX, },
  3069. { .name = FW_FILE_ISP81XX, },
  3070. { .name = FW_FILE_ISP82XX, },
  3071. };
  3072. struct fw_blob *
  3073. qla2x00_request_firmware(scsi_qla_host_t *vha)
  3074. {
  3075. struct qla_hw_data *ha = vha->hw;
  3076. struct fw_blob *blob;
  3077. blob = NULL;
  3078. if (IS_QLA2100(ha)) {
  3079. blob = &qla_fw_blobs[FW_ISP21XX];
  3080. } else if (IS_QLA2200(ha)) {
  3081. blob = &qla_fw_blobs[FW_ISP22XX];
  3082. } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  3083. blob = &qla_fw_blobs[FW_ISP2300];
  3084. } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
  3085. blob = &qla_fw_blobs[FW_ISP2322];
  3086. } else if (IS_QLA24XX_TYPE(ha)) {
  3087. blob = &qla_fw_blobs[FW_ISP24XX];
  3088. } else if (IS_QLA25XX(ha)) {
  3089. blob = &qla_fw_blobs[FW_ISP25XX];
  3090. } else if (IS_QLA81XX(ha)) {
  3091. blob = &qla_fw_blobs[FW_ISP81XX];
  3092. } else if (IS_QLA82XX(ha)) {
  3093. blob = &qla_fw_blobs[FW_ISP82XX];
  3094. }
  3095. mutex_lock(&qla_fw_lock);
  3096. if (blob->fw)
  3097. goto out;
  3098. if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
  3099. DEBUG2(printk("scsi(%ld): Failed to load firmware image "
  3100. "(%s).\n", vha->host_no, blob->name));
  3101. blob->fw = NULL;
  3102. blob = NULL;
  3103. goto out;
  3104. }
  3105. out:
  3106. mutex_unlock(&qla_fw_lock);
  3107. return blob;
  3108. }
  3109. static void
  3110. qla2x00_release_firmware(void)
  3111. {
  3112. int idx;
  3113. mutex_lock(&qla_fw_lock);
  3114. for (idx = 0; idx < FW_BLOBS; idx++)
  3115. if (qla_fw_blobs[idx].fw)
  3116. release_firmware(qla_fw_blobs[idx].fw);
  3117. mutex_unlock(&qla_fw_lock);
  3118. }
  3119. static pci_ers_result_t
  3120. qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
  3121. {
  3122. scsi_qla_host_t *vha = pci_get_drvdata(pdev);
  3123. struct qla_hw_data *ha = vha->hw;
  3124. DEBUG2(qla_printk(KERN_WARNING, ha, "error_detected:state %x\n",
  3125. state));
  3126. switch (state) {
  3127. case pci_channel_io_normal:
  3128. ha->flags.eeh_busy = 0;
  3129. return PCI_ERS_RESULT_CAN_RECOVER;
  3130. case pci_channel_io_frozen:
  3131. ha->flags.eeh_busy = 1;
  3132. qla2x00_free_irqs(vha);
  3133. pci_disable_device(pdev);
  3134. return PCI_ERS_RESULT_NEED_RESET;
  3135. case pci_channel_io_perm_failure:
  3136. ha->flags.pci_channel_io_perm_failure = 1;
  3137. qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
  3138. return PCI_ERS_RESULT_DISCONNECT;
  3139. }
  3140. return PCI_ERS_RESULT_NEED_RESET;
  3141. }
  3142. static pci_ers_result_t
  3143. qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
  3144. {
  3145. int risc_paused = 0;
  3146. uint32_t stat;
  3147. unsigned long flags;
  3148. scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
  3149. struct qla_hw_data *ha = base_vha->hw;
  3150. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  3151. struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
  3152. spin_lock_irqsave(&ha->hardware_lock, flags);
  3153. if (IS_QLA2100(ha) || IS_QLA2200(ha)){
  3154. stat = RD_REG_DWORD(&reg->hccr);
  3155. if (stat & HCCR_RISC_PAUSE)
  3156. risc_paused = 1;
  3157. } else if (IS_QLA23XX(ha)) {
  3158. stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
  3159. if (stat & HSR_RISC_PAUSED)
  3160. risc_paused = 1;
  3161. } else if (IS_FWI2_CAPABLE(ha)) {
  3162. stat = RD_REG_DWORD(&reg24->host_status);
  3163. if (stat & HSRX_RISC_PAUSED)
  3164. risc_paused = 1;
  3165. }
  3166. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3167. if (risc_paused) {
  3168. qla_printk(KERN_INFO, ha, "RISC paused -- mmio_enabled, "
  3169. "Dumping firmware!\n");
  3170. ha->isp_ops->fw_dump(base_vha, 0);
  3171. return PCI_ERS_RESULT_NEED_RESET;
  3172. } else
  3173. return PCI_ERS_RESULT_RECOVERED;
  3174. }
  3175. static pci_ers_result_t
  3176. qla2xxx_pci_slot_reset(struct pci_dev *pdev)
  3177. {
  3178. pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
  3179. scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
  3180. struct qla_hw_data *ha = base_vha->hw;
  3181. struct rsp_que *rsp;
  3182. int rc, retries = 10;
  3183. DEBUG17(qla_printk(KERN_WARNING, ha, "slot_reset\n"));
  3184. /* Workaround: qla2xxx driver which access hardware earlier
  3185. * needs error state to be pci_channel_io_online.
  3186. * Otherwise mailbox command timesout.
  3187. */
  3188. pdev->error_state = pci_channel_io_normal;
  3189. pci_restore_state(pdev);
  3190. /* pci_restore_state() clears the saved_state flag of the device
  3191. * save restored state which resets saved_state flag
  3192. */
  3193. pci_save_state(pdev);
  3194. if (ha->mem_only)
  3195. rc = pci_enable_device_mem(pdev);
  3196. else
  3197. rc = pci_enable_device(pdev);
  3198. if (rc) {
  3199. qla_printk(KERN_WARNING, ha,
  3200. "Can't re-enable PCI device after reset.\n");
  3201. return ret;
  3202. }
  3203. rsp = ha->rsp_q_map[0];
  3204. if (qla2x00_request_irqs(ha, rsp))
  3205. return ret;
  3206. if (ha->isp_ops->pci_config(base_vha))
  3207. return ret;
  3208. while (ha->flags.mbox_busy && retries--)
  3209. msleep(1000);
  3210. set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  3211. if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
  3212. ret = PCI_ERS_RESULT_RECOVERED;
  3213. clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  3214. DEBUG17(qla_printk(KERN_WARNING, ha,
  3215. "slot_reset-return:ret=%x\n", ret));
  3216. return ret;
  3217. }
  3218. static void
  3219. qla2xxx_pci_resume(struct pci_dev *pdev)
  3220. {
  3221. scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
  3222. struct qla_hw_data *ha = base_vha->hw;
  3223. int ret;
  3224. DEBUG17(qla_printk(KERN_WARNING, ha, "pci_resume\n"));
  3225. ret = qla2x00_wait_for_hba_online(base_vha);
  3226. if (ret != QLA_SUCCESS) {
  3227. qla_printk(KERN_ERR, ha,
  3228. "the device failed to resume I/O "
  3229. "from slot/link_reset");
  3230. }
  3231. pci_cleanup_aer_uncorrect_error_status(pdev);
  3232. ha->flags.eeh_busy = 0;
  3233. }
  3234. static struct pci_error_handlers qla2xxx_err_handler = {
  3235. .error_detected = qla2xxx_pci_error_detected,
  3236. .mmio_enabled = qla2xxx_pci_mmio_enabled,
  3237. .slot_reset = qla2xxx_pci_slot_reset,
  3238. .resume = qla2xxx_pci_resume,
  3239. };
  3240. static struct pci_device_id qla2xxx_pci_tbl[] = {
  3241. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
  3242. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
  3243. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
  3244. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
  3245. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
  3246. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
  3247. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
  3248. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
  3249. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
  3250. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
  3251. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
  3252. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
  3253. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
  3254. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
  3255. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
  3256. { 0 },
  3257. };
  3258. MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
  3259. static struct pci_driver qla2xxx_pci_driver = {
  3260. .name = QLA2XXX_DRIVER_NAME,
  3261. .driver = {
  3262. .owner = THIS_MODULE,
  3263. },
  3264. .id_table = qla2xxx_pci_tbl,
  3265. .probe = qla2x00_probe_one,
  3266. .remove = qla2x00_remove_one,
  3267. .err_handler = &qla2xxx_err_handler,
  3268. };
  3269. static struct file_operations apidev_fops = {
  3270. .owner = THIS_MODULE,
  3271. };
  3272. /**
  3273. * qla2x00_module_init - Module initialization.
  3274. **/
  3275. static int __init
  3276. qla2x00_module_init(void)
  3277. {
  3278. int ret = 0;
  3279. /* Allocate cache for SRBs. */
  3280. srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
  3281. SLAB_HWCACHE_ALIGN, NULL);
  3282. if (srb_cachep == NULL) {
  3283. printk(KERN_ERR
  3284. "qla2xxx: Unable to allocate SRB cache...Failing load!\n");
  3285. return -ENOMEM;
  3286. }
  3287. /* Derive version string. */
  3288. strcpy(qla2x00_version_str, QLA2XXX_VERSION);
  3289. if (ql2xextended_error_logging)
  3290. strcat(qla2x00_version_str, "-debug");
  3291. qla2xxx_transport_template =
  3292. fc_attach_transport(&qla2xxx_transport_functions);
  3293. if (!qla2xxx_transport_template) {
  3294. kmem_cache_destroy(srb_cachep);
  3295. return -ENODEV;
  3296. }
  3297. apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
  3298. if (apidev_major < 0) {
  3299. printk(KERN_WARNING "qla2xxx: Unable to register char device "
  3300. "%s\n", QLA2XXX_APIDEV);
  3301. }
  3302. qla2xxx_transport_vport_template =
  3303. fc_attach_transport(&qla2xxx_transport_vport_functions);
  3304. if (!qla2xxx_transport_vport_template) {
  3305. kmem_cache_destroy(srb_cachep);
  3306. fc_release_transport(qla2xxx_transport_template);
  3307. return -ENODEV;
  3308. }
  3309. printk(KERN_INFO "QLogic Fibre Channel HBA Driver: %s\n",
  3310. qla2x00_version_str);
  3311. ret = pci_register_driver(&qla2xxx_pci_driver);
  3312. if (ret) {
  3313. kmem_cache_destroy(srb_cachep);
  3314. fc_release_transport(qla2xxx_transport_template);
  3315. fc_release_transport(qla2xxx_transport_vport_template);
  3316. }
  3317. return ret;
  3318. }
  3319. /**
  3320. * qla2x00_module_exit - Module cleanup.
  3321. **/
  3322. static void __exit
  3323. qla2x00_module_exit(void)
  3324. {
  3325. unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
  3326. pci_unregister_driver(&qla2xxx_pci_driver);
  3327. qla2x00_release_firmware();
  3328. kmem_cache_destroy(srb_cachep);
  3329. if (ctx_cachep)
  3330. kmem_cache_destroy(ctx_cachep);
  3331. fc_release_transport(qla2xxx_transport_template);
  3332. fc_release_transport(qla2xxx_transport_vport_template);
  3333. }
  3334. module_init(qla2x00_module_init);
  3335. module_exit(qla2x00_module_exit);
  3336. MODULE_AUTHOR("QLogic Corporation");
  3337. MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
  3338. MODULE_LICENSE("GPL");
  3339. MODULE_VERSION(QLA2XXX_VERSION);
  3340. MODULE_FIRMWARE(FW_FILE_ISP21XX);
  3341. MODULE_FIRMWARE(FW_FILE_ISP22XX);
  3342. MODULE_FIRMWARE(FW_FILE_ISP2300);
  3343. MODULE_FIRMWARE(FW_FILE_ISP2322);
  3344. MODULE_FIRMWARE(FW_FILE_ISP24XX);
  3345. MODULE_FIRMWARE(FW_FILE_ISP25XX);