init.c 42 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779
  1. /*
  2. * Copyright (c) 2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/moduleparam.h>
  17. #include <linux/errno.h>
  18. #include <linux/of.h>
  19. #include <linux/mmc/sdio_func.h>
  20. #include "core.h"
  21. #include "cfg80211.h"
  22. #include "target.h"
  23. #include "debug.h"
  24. #include "hif-ops.h"
  25. unsigned int debug_mask;
  26. static unsigned int testmode;
  27. module_param(debug_mask, uint, 0644);
  28. module_param(testmode, uint, 0644);
  29. /*
  30. * Include definitions here that can be used to tune the WLAN module
  31. * behavior. Different customers can tune the behavior as per their needs,
  32. * here.
  33. */
  34. /*
  35. * This configuration item enable/disable keepalive support.
  36. * Keepalive support: In the absence of any data traffic to AP, null
  37. * frames will be sent to the AP at periodic interval, to keep the association
  38. * active. This configuration item defines the periodic interval.
  39. * Use value of zero to disable keepalive support
  40. * Default: 60 seconds
  41. */
  42. #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
  43. /*
  44. * This configuration item sets the value of disconnect timeout
  45. * Firmware delays sending the disconnec event to the host for this
  46. * timeout after is gets disconnected from the current AP.
  47. * If the firmware successly roams within the disconnect timeout
  48. * it sends a new connect event
  49. */
  50. #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
  51. #define CONFIG_AR600x_DEBUG_UART_TX_PIN 8
  52. #define ATH6KL_DATA_OFFSET 64
  53. struct sk_buff *ath6kl_buf_alloc(int size)
  54. {
  55. struct sk_buff *skb;
  56. u16 reserved;
  57. /* Add chacheline space at front and back of buffer */
  58. reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
  59. sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES;
  60. skb = dev_alloc_skb(size + reserved);
  61. if (skb)
  62. skb_reserve(skb, reserved - L1_CACHE_BYTES);
  63. return skb;
  64. }
  65. void ath6kl_init_profile_info(struct ath6kl_vif *vif)
  66. {
  67. vif->ssid_len = 0;
  68. memset(vif->ssid, 0, sizeof(vif->ssid));
  69. vif->dot11_auth_mode = OPEN_AUTH;
  70. vif->auth_mode = NONE_AUTH;
  71. vif->prwise_crypto = NONE_CRYPT;
  72. vif->prwise_crypto_len = 0;
  73. vif->grp_crypto = NONE_CRYPT;
  74. vif->grp_crypto_len = 0;
  75. memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
  76. memset(vif->req_bssid, 0, sizeof(vif->req_bssid));
  77. memset(vif->bssid, 0, sizeof(vif->bssid));
  78. vif->bss_ch = 0;
  79. }
  80. static int ath6kl_set_host_app_area(struct ath6kl *ar)
  81. {
  82. u32 address, data;
  83. struct host_app_area host_app_area;
  84. /* Fetch the address of the host_app_area_s
  85. * instance in the host interest area */
  86. address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
  87. address = TARG_VTOP(ar->target_type, address);
  88. if (ath6kl_diag_read32(ar, address, &data))
  89. return -EIO;
  90. address = TARG_VTOP(ar->target_type, data);
  91. host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION);
  92. if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
  93. sizeof(struct host_app_area)))
  94. return -EIO;
  95. return 0;
  96. }
  97. static inline void set_ac2_ep_map(struct ath6kl *ar,
  98. u8 ac,
  99. enum htc_endpoint_id ep)
  100. {
  101. ar->ac2ep_map[ac] = ep;
  102. ar->ep2ac_map[ep] = ac;
  103. }
  104. /* connect to a service */
  105. static int ath6kl_connectservice(struct ath6kl *ar,
  106. struct htc_service_connect_req *con_req,
  107. char *desc)
  108. {
  109. int status;
  110. struct htc_service_connect_resp response;
  111. memset(&response, 0, sizeof(response));
  112. status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
  113. if (status) {
  114. ath6kl_err("failed to connect to %s service status:%d\n",
  115. desc, status);
  116. return status;
  117. }
  118. switch (con_req->svc_id) {
  119. case WMI_CONTROL_SVC:
  120. if (test_bit(WMI_ENABLED, &ar->flag))
  121. ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
  122. ar->ctrl_ep = response.endpoint;
  123. break;
  124. case WMI_DATA_BE_SVC:
  125. set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
  126. break;
  127. case WMI_DATA_BK_SVC:
  128. set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
  129. break;
  130. case WMI_DATA_VI_SVC:
  131. set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
  132. break;
  133. case WMI_DATA_VO_SVC:
  134. set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
  135. break;
  136. default:
  137. ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
  138. return -EINVAL;
  139. }
  140. return 0;
  141. }
  142. static int ath6kl_init_service_ep(struct ath6kl *ar)
  143. {
  144. struct htc_service_connect_req connect;
  145. memset(&connect, 0, sizeof(connect));
  146. /* these fields are the same for all service endpoints */
  147. connect.ep_cb.rx = ath6kl_rx;
  148. connect.ep_cb.rx_refill = ath6kl_rx_refill;
  149. connect.ep_cb.tx_full = ath6kl_tx_queue_full;
  150. /*
  151. * Set the max queue depth so that our ath6kl_tx_queue_full handler
  152. * gets called.
  153. */
  154. connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
  155. connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
  156. if (!connect.ep_cb.rx_refill_thresh)
  157. connect.ep_cb.rx_refill_thresh++;
  158. /* connect to control service */
  159. connect.svc_id = WMI_CONTROL_SVC;
  160. if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
  161. return -EIO;
  162. connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
  163. /*
  164. * Limit the HTC message size on the send path, although e can
  165. * receive A-MSDU frames of 4K, we will only send ethernet-sized
  166. * (802.3) frames on the send path.
  167. */
  168. connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
  169. /*
  170. * To reduce the amount of committed memory for larger A_MSDU
  171. * frames, use the recv-alloc threshold mechanism for larger
  172. * packets.
  173. */
  174. connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
  175. connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
  176. /*
  177. * For the remaining data services set the connection flag to
  178. * reduce dribbling, if configured to do so.
  179. */
  180. connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
  181. connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
  182. connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
  183. connect.svc_id = WMI_DATA_BE_SVC;
  184. if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
  185. return -EIO;
  186. /* connect to back-ground map this to WMI LOW_PRI */
  187. connect.svc_id = WMI_DATA_BK_SVC;
  188. if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
  189. return -EIO;
  190. /* connect to Video service, map this to to HI PRI */
  191. connect.svc_id = WMI_DATA_VI_SVC;
  192. if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
  193. return -EIO;
  194. /*
  195. * Connect to VO service, this is currently not mapped to a WMI
  196. * priority stream due to historical reasons. WMI originally
  197. * defined 3 priorities over 3 mailboxes We can change this when
  198. * WMI is reworked so that priorities are not dependent on
  199. * mailboxes.
  200. */
  201. connect.svc_id = WMI_DATA_VO_SVC;
  202. if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
  203. return -EIO;
  204. return 0;
  205. }
  206. void ath6kl_init_control_info(struct ath6kl_vif *vif)
  207. {
  208. ath6kl_init_profile_info(vif);
  209. vif->def_txkey_index = 0;
  210. memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
  211. vif->ch_hint = 0;
  212. }
  213. /*
  214. * Set HTC/Mbox operational parameters, this can only be called when the
  215. * target is in the BMI phase.
  216. */
  217. static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
  218. u8 htc_ctrl_buf)
  219. {
  220. int status;
  221. u32 blk_size;
  222. blk_size = ar->mbox_info.block_size;
  223. if (htc_ctrl_buf)
  224. blk_size |= ((u32)htc_ctrl_buf) << 16;
  225. /* set the host interest area for the block size */
  226. status = ath6kl_bmi_write(ar,
  227. ath6kl_get_hi_item_addr(ar,
  228. HI_ITEM(hi_mbox_io_block_sz)),
  229. (u8 *)&blk_size,
  230. 4);
  231. if (status) {
  232. ath6kl_err("bmi_write_memory for IO block size failed\n");
  233. goto out;
  234. }
  235. ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
  236. blk_size,
  237. ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
  238. if (mbox_isr_yield_val) {
  239. /* set the host interest area for the mbox ISR yield limit */
  240. status = ath6kl_bmi_write(ar,
  241. ath6kl_get_hi_item_addr(ar,
  242. HI_ITEM(hi_mbox_isr_yield_limit)),
  243. (u8 *)&mbox_isr_yield_val,
  244. 4);
  245. if (status) {
  246. ath6kl_err("bmi_write_memory for yield limit failed\n");
  247. goto out;
  248. }
  249. }
  250. out:
  251. return status;
  252. }
  253. #define REG_DUMP_COUNT_AR6003 60
  254. #define REGISTER_DUMP_LEN_MAX 60
  255. static void ath6kl_dump_target_assert_info(struct ath6kl *ar)
  256. {
  257. u32 address;
  258. u32 regdump_loc = 0;
  259. int status;
  260. u32 regdump_val[REGISTER_DUMP_LEN_MAX];
  261. u32 i;
  262. if (ar->target_type != TARGET_TYPE_AR6003)
  263. return;
  264. /* the reg dump pointer is copied to the host interest area */
  265. address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_failure_state));
  266. address = TARG_VTOP(ar->target_type, address);
  267. /* read RAM location through diagnostic window */
  268. status = ath6kl_diag_read32(ar, address, &regdump_loc);
  269. if (status || !regdump_loc) {
  270. ath6kl_err("failed to get ptr to register dump area\n");
  271. return;
  272. }
  273. ath6kl_dbg(ATH6KL_DBG_TRC, "location of register dump data: 0x%X\n",
  274. regdump_loc);
  275. regdump_loc = TARG_VTOP(ar->target_type, regdump_loc);
  276. /* fetch register dump data */
  277. status = ath6kl_diag_read(ar, regdump_loc, (u8 *)&regdump_val[0],
  278. REG_DUMP_COUNT_AR6003 * (sizeof(u32)));
  279. if (status) {
  280. ath6kl_err("failed to get register dump\n");
  281. return;
  282. }
  283. ath6kl_dbg(ATH6KL_DBG_TRC, "Register Dump:\n");
  284. for (i = 0; i < REG_DUMP_COUNT_AR6003; i++)
  285. ath6kl_dbg(ATH6KL_DBG_TRC, " %d : 0x%8.8X\n",
  286. i, regdump_val[i]);
  287. }
  288. void ath6kl_target_failure(struct ath6kl *ar)
  289. {
  290. ath6kl_err("target asserted\n");
  291. /* try dumping target assertion information (if any) */
  292. ath6kl_dump_target_assert_info(ar);
  293. }
  294. static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx)
  295. {
  296. int status = 0;
  297. int ret;
  298. /*
  299. * Configure the device for rx dot11 header rules. "0,0" are the
  300. * default values. Required if checksum offload is needed. Set
  301. * RxMetaVersion to 2.
  302. */
  303. if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx,
  304. ar->rx_meta_ver, 0, 0)) {
  305. ath6kl_err("unable to set the rx frame format\n");
  306. status = -EIO;
  307. }
  308. if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN)
  309. if ((ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1,
  310. IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) {
  311. ath6kl_err("unable to set power save fail event policy\n");
  312. status = -EIO;
  313. }
  314. if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER))
  315. if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0,
  316. WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) {
  317. ath6kl_err("unable to set barker preamble policy\n");
  318. status = -EIO;
  319. }
  320. if (ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx,
  321. WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) {
  322. ath6kl_err("unable to set keep alive interval\n");
  323. status = -EIO;
  324. }
  325. if (ath6kl_wmi_disctimeout_cmd(ar->wmi, idx,
  326. WLAN_CONFIG_DISCONNECT_TIMEOUT)) {
  327. ath6kl_err("unable to set disconnect timeout\n");
  328. status = -EIO;
  329. }
  330. if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST))
  331. if (ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED)) {
  332. ath6kl_err("unable to set txop bursting\n");
  333. status = -EIO;
  334. }
  335. /*
  336. * FIXME: Make sure p2p configurations are not applied to
  337. * non-p2p capable interfaces when multivif support is enabled.
  338. */
  339. if (ar->p2p) {
  340. ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx,
  341. P2P_FLAG_CAPABILITIES_REQ |
  342. P2P_FLAG_MACADDR_REQ |
  343. P2P_FLAG_HMODEL_REQ);
  344. if (ret) {
  345. ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P "
  346. "capabilities (%d) - assuming P2P not "
  347. "supported\n", ret);
  348. ar->p2p = 0;
  349. }
  350. }
  351. /*
  352. * FIXME: Make sure p2p configurations are not applied to
  353. * non-p2p capable interfaces when multivif support is enabled.
  354. */
  355. if (ar->p2p) {
  356. /* Enable Probe Request reporting for P2P */
  357. ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true);
  358. if (ret) {
  359. ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe "
  360. "Request reporting (%d)\n", ret);
  361. }
  362. }
  363. return status;
  364. }
  365. int ath6kl_configure_target(struct ath6kl *ar)
  366. {
  367. u32 param, ram_reserved_size;
  368. u8 fw_iftype, fw_mode = 0, fw_submode = 0;
  369. int i;
  370. /*
  371. * Note: Even though the firmware interface type is
  372. * chosen as BSS_STA for all three interfaces, can
  373. * be configured to IBSS/AP as long as the fw submode
  374. * remains normal mode (0 - AP, STA and IBSS). But
  375. * due to an target assert in firmware only one interface is
  376. * configured for now.
  377. */
  378. fw_iftype = HI_OPTION_FW_MODE_BSS_STA;
  379. for (i = 0; i < MAX_NUM_VIF; i++)
  380. fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS);
  381. /*
  382. * By default, submodes :
  383. * vif[0] - AP/STA/IBSS
  384. * vif[1] - "P2P dev"/"P2P GO"/"P2P Client"
  385. * vif[2] - "P2P dev"/"P2P GO"/"P2P Client"
  386. */
  387. for (i = 0; i < ar->max_norm_iface; i++)
  388. fw_submode |= HI_OPTION_FW_SUBMODE_NONE <<
  389. (i * HI_OPTION_FW_SUBMODE_BITS);
  390. for (i = ar->max_norm_iface; i < MAX_NUM_VIF; i++)
  391. fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
  392. (i * HI_OPTION_FW_SUBMODE_BITS);
  393. /*
  394. * FIXME: This needs to be removed once the multivif
  395. * support is enabled.
  396. */
  397. if (ar->p2p)
  398. fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV;
  399. param = HTC_PROTOCOL_VERSION;
  400. if (ath6kl_bmi_write(ar,
  401. ath6kl_get_hi_item_addr(ar,
  402. HI_ITEM(hi_app_host_interest)),
  403. (u8 *)&param, 4) != 0) {
  404. ath6kl_err("bmi_write_memory for htc version failed\n");
  405. return -EIO;
  406. }
  407. /* set the firmware mode to STA/IBSS/AP */
  408. param = 0;
  409. if (ath6kl_bmi_read(ar,
  410. ath6kl_get_hi_item_addr(ar,
  411. HI_ITEM(hi_option_flag)),
  412. (u8 *)&param, 4) != 0) {
  413. ath6kl_err("bmi_read_memory for setting fwmode failed\n");
  414. return -EIO;
  415. }
  416. param |= (MAX_NUM_VIF << HI_OPTION_NUM_DEV_SHIFT);
  417. param |= fw_mode << HI_OPTION_FW_MODE_SHIFT;
  418. param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT;
  419. param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
  420. param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
  421. if (ath6kl_bmi_write(ar,
  422. ath6kl_get_hi_item_addr(ar,
  423. HI_ITEM(hi_option_flag)),
  424. (u8 *)&param,
  425. 4) != 0) {
  426. ath6kl_err("bmi_write_memory for setting fwmode failed\n");
  427. return -EIO;
  428. }
  429. ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
  430. /*
  431. * Hardcode the address use for the extended board data
  432. * Ideally this should be pre-allocate by the OS at boot time
  433. * But since it is a new feature and board data is loaded
  434. * at init time, we have to workaround this from host.
  435. * It is difficult to patch the firmware boot code,
  436. * but possible in theory.
  437. */
  438. param = ar->hw.board_ext_data_addr;
  439. ram_reserved_size = ar->hw.reserved_ram_size;
  440. if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
  441. HI_ITEM(hi_board_ext_data)),
  442. (u8 *)&param, 4) != 0) {
  443. ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
  444. return -EIO;
  445. }
  446. if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
  447. HI_ITEM(hi_end_ram_reserve_sz)),
  448. (u8 *)&ram_reserved_size, 4) != 0) {
  449. ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
  450. return -EIO;
  451. }
  452. /* set the block size for the target */
  453. if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
  454. /* use default number of control buffers */
  455. return -EIO;
  456. return 0;
  457. }
  458. void ath6kl_core_free(struct ath6kl *ar)
  459. {
  460. wiphy_free(ar->wiphy);
  461. }
  462. void ath6kl_core_cleanup(struct ath6kl *ar)
  463. {
  464. ath6kl_hif_power_off(ar);
  465. destroy_workqueue(ar->ath6kl_wq);
  466. if (ar->htc_target)
  467. ath6kl_htc_cleanup(ar->htc_target);
  468. ath6kl_cookie_cleanup(ar);
  469. ath6kl_cleanup_amsdu_rxbufs(ar);
  470. ath6kl_bmi_cleanup(ar);
  471. ath6kl_debug_cleanup(ar);
  472. kfree(ar->fw_board);
  473. kfree(ar->fw_otp);
  474. kfree(ar->fw);
  475. kfree(ar->fw_patch);
  476. ath6kl_deinit_ieee80211_hw(ar);
  477. }
  478. /* firmware upload */
  479. static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
  480. u8 **fw, size_t *fw_len)
  481. {
  482. const struct firmware *fw_entry;
  483. int ret;
  484. ret = request_firmware(&fw_entry, filename, ar->dev);
  485. if (ret)
  486. return ret;
  487. *fw_len = fw_entry->size;
  488. *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
  489. if (*fw == NULL)
  490. ret = -ENOMEM;
  491. release_firmware(fw_entry);
  492. return ret;
  493. }
  494. #ifdef CONFIG_OF
  495. static const char *get_target_ver_dir(const struct ath6kl *ar)
  496. {
  497. switch (ar->version.target_ver) {
  498. case AR6003_REV1_VERSION:
  499. return "ath6k/AR6003/hw1.0";
  500. case AR6003_REV2_VERSION:
  501. return "ath6k/AR6003/hw2.0";
  502. case AR6003_REV3_VERSION:
  503. return "ath6k/AR6003/hw2.1.1";
  504. }
  505. ath6kl_warn("%s: unsupported target version 0x%x.\n", __func__,
  506. ar->version.target_ver);
  507. return NULL;
  508. }
  509. /*
  510. * Check the device tree for a board-id and use it to construct
  511. * the pathname to the firmware file. Used (for now) to find a
  512. * fallback to the "bdata.bin" file--typically a symlink to the
  513. * appropriate board-specific file.
  514. */
  515. static bool check_device_tree(struct ath6kl *ar)
  516. {
  517. static const char *board_id_prop = "atheros,board-id";
  518. struct device_node *node;
  519. char board_filename[64];
  520. const char *board_id;
  521. int ret;
  522. for_each_compatible_node(node, NULL, "atheros,ath6kl") {
  523. board_id = of_get_property(node, board_id_prop, NULL);
  524. if (board_id == NULL) {
  525. ath6kl_warn("No \"%s\" property on %s node.\n",
  526. board_id_prop, node->name);
  527. continue;
  528. }
  529. snprintf(board_filename, sizeof(board_filename),
  530. "%s/bdata.%s.bin", get_target_ver_dir(ar), board_id);
  531. ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board,
  532. &ar->fw_board_len);
  533. if (ret) {
  534. ath6kl_err("Failed to get DT board file %s: %d\n",
  535. board_filename, ret);
  536. continue;
  537. }
  538. return true;
  539. }
  540. return false;
  541. }
  542. #else
  543. static bool check_device_tree(struct ath6kl *ar)
  544. {
  545. return false;
  546. }
  547. #endif /* CONFIG_OF */
  548. static int ath6kl_fetch_board_file(struct ath6kl *ar)
  549. {
  550. const char *filename;
  551. int ret;
  552. if (ar->fw_board != NULL)
  553. return 0;
  554. switch (ar->version.target_ver) {
  555. case AR6003_REV2_VERSION:
  556. filename = AR6003_REV2_BOARD_DATA_FILE;
  557. break;
  558. case AR6004_REV1_VERSION:
  559. filename = AR6004_REV1_BOARD_DATA_FILE;
  560. break;
  561. default:
  562. filename = AR6003_REV3_BOARD_DATA_FILE;
  563. break;
  564. }
  565. ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
  566. &ar->fw_board_len);
  567. if (ret == 0) {
  568. /* managed to get proper board file */
  569. return 0;
  570. }
  571. if (check_device_tree(ar)) {
  572. /* got board file from device tree */
  573. return 0;
  574. }
  575. /* there was no proper board file, try to use default instead */
  576. ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
  577. filename, ret);
  578. switch (ar->version.target_ver) {
  579. case AR6003_REV2_VERSION:
  580. filename = AR6003_REV2_DEFAULT_BOARD_DATA_FILE;
  581. break;
  582. case AR6004_REV1_VERSION:
  583. filename = AR6004_REV1_DEFAULT_BOARD_DATA_FILE;
  584. break;
  585. default:
  586. filename = AR6003_REV3_DEFAULT_BOARD_DATA_FILE;
  587. break;
  588. }
  589. ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
  590. &ar->fw_board_len);
  591. if (ret) {
  592. ath6kl_err("Failed to get default board file %s: %d\n",
  593. filename, ret);
  594. return ret;
  595. }
  596. ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
  597. ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
  598. return 0;
  599. }
  600. static int ath6kl_fetch_otp_file(struct ath6kl *ar)
  601. {
  602. const char *filename;
  603. int ret;
  604. if (ar->fw_otp != NULL)
  605. return 0;
  606. switch (ar->version.target_ver) {
  607. case AR6003_REV2_VERSION:
  608. filename = AR6003_REV2_OTP_FILE;
  609. break;
  610. case AR6004_REV1_VERSION:
  611. ath6kl_dbg(ATH6KL_DBG_TRC, "AR6004 doesn't need OTP file\n");
  612. return 0;
  613. break;
  614. default:
  615. filename = AR6003_REV3_OTP_FILE;
  616. break;
  617. }
  618. ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
  619. &ar->fw_otp_len);
  620. if (ret) {
  621. ath6kl_err("Failed to get OTP file %s: %d\n",
  622. filename, ret);
  623. return ret;
  624. }
  625. return 0;
  626. }
  627. static int ath6kl_fetch_fw_file(struct ath6kl *ar)
  628. {
  629. const char *filename;
  630. int ret;
  631. if (ar->fw != NULL)
  632. return 0;
  633. if (testmode) {
  634. switch (ar->version.target_ver) {
  635. case AR6003_REV2_VERSION:
  636. filename = AR6003_REV2_TCMD_FIRMWARE_FILE;
  637. break;
  638. case AR6003_REV3_VERSION:
  639. filename = AR6003_REV3_TCMD_FIRMWARE_FILE;
  640. break;
  641. case AR6004_REV1_VERSION:
  642. ath6kl_warn("testmode not supported with ar6004\n");
  643. return -EOPNOTSUPP;
  644. default:
  645. ath6kl_warn("unknown target version: 0x%x\n",
  646. ar->version.target_ver);
  647. return -EINVAL;
  648. }
  649. set_bit(TESTMODE, &ar->flag);
  650. goto get_fw;
  651. }
  652. switch (ar->version.target_ver) {
  653. case AR6003_REV2_VERSION:
  654. filename = AR6003_REV2_FIRMWARE_FILE;
  655. break;
  656. case AR6004_REV1_VERSION:
  657. filename = AR6004_REV1_FIRMWARE_FILE;
  658. break;
  659. default:
  660. filename = AR6003_REV3_FIRMWARE_FILE;
  661. break;
  662. }
  663. get_fw:
  664. ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
  665. if (ret) {
  666. ath6kl_err("Failed to get firmware file %s: %d\n",
  667. filename, ret);
  668. return ret;
  669. }
  670. return 0;
  671. }
  672. static int ath6kl_fetch_patch_file(struct ath6kl *ar)
  673. {
  674. const char *filename;
  675. int ret;
  676. switch (ar->version.target_ver) {
  677. case AR6003_REV2_VERSION:
  678. filename = AR6003_REV2_PATCH_FILE;
  679. break;
  680. case AR6004_REV1_VERSION:
  681. /* FIXME: implement for AR6004 */
  682. return 0;
  683. break;
  684. default:
  685. filename = AR6003_REV3_PATCH_FILE;
  686. break;
  687. }
  688. if (ar->fw_patch == NULL) {
  689. ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
  690. &ar->fw_patch_len);
  691. if (ret) {
  692. ath6kl_err("Failed to get patch file %s: %d\n",
  693. filename, ret);
  694. return ret;
  695. }
  696. }
  697. return 0;
  698. }
  699. static int ath6kl_fetch_fw_api1(struct ath6kl *ar)
  700. {
  701. int ret;
  702. ret = ath6kl_fetch_otp_file(ar);
  703. if (ret)
  704. return ret;
  705. ret = ath6kl_fetch_fw_file(ar);
  706. if (ret)
  707. return ret;
  708. ret = ath6kl_fetch_patch_file(ar);
  709. if (ret)
  710. return ret;
  711. return 0;
  712. }
  713. static int ath6kl_fetch_fw_api2(struct ath6kl *ar)
  714. {
  715. size_t magic_len, len, ie_len;
  716. const struct firmware *fw;
  717. struct ath6kl_fw_ie *hdr;
  718. const char *filename;
  719. const u8 *data;
  720. int ret, ie_id, i, index, bit;
  721. __le32 *val;
  722. switch (ar->version.target_ver) {
  723. case AR6003_REV2_VERSION:
  724. filename = AR6003_REV2_FIRMWARE_2_FILE;
  725. break;
  726. case AR6003_REV3_VERSION:
  727. filename = AR6003_REV3_FIRMWARE_2_FILE;
  728. break;
  729. case AR6004_REV1_VERSION:
  730. filename = AR6004_REV1_FIRMWARE_2_FILE;
  731. break;
  732. default:
  733. return -EOPNOTSUPP;
  734. }
  735. ret = request_firmware(&fw, filename, ar->dev);
  736. if (ret)
  737. return ret;
  738. data = fw->data;
  739. len = fw->size;
  740. /* magic also includes the null byte, check that as well */
  741. magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1;
  742. if (len < magic_len) {
  743. ret = -EINVAL;
  744. goto out;
  745. }
  746. if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) {
  747. ret = -EINVAL;
  748. goto out;
  749. }
  750. len -= magic_len;
  751. data += magic_len;
  752. /* loop elements */
  753. while (len > sizeof(struct ath6kl_fw_ie)) {
  754. /* hdr is unaligned! */
  755. hdr = (struct ath6kl_fw_ie *) data;
  756. ie_id = le32_to_cpup(&hdr->id);
  757. ie_len = le32_to_cpup(&hdr->len);
  758. len -= sizeof(*hdr);
  759. data += sizeof(*hdr);
  760. if (len < ie_len) {
  761. ret = -EINVAL;
  762. goto out;
  763. }
  764. switch (ie_id) {
  765. case ATH6KL_FW_IE_OTP_IMAGE:
  766. ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n",
  767. ie_len);
  768. ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL);
  769. if (ar->fw_otp == NULL) {
  770. ret = -ENOMEM;
  771. goto out;
  772. }
  773. ar->fw_otp_len = ie_len;
  774. break;
  775. case ATH6KL_FW_IE_FW_IMAGE:
  776. ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n",
  777. ie_len);
  778. ar->fw = kmemdup(data, ie_len, GFP_KERNEL);
  779. if (ar->fw == NULL) {
  780. ret = -ENOMEM;
  781. goto out;
  782. }
  783. ar->fw_len = ie_len;
  784. break;
  785. case ATH6KL_FW_IE_PATCH_IMAGE:
  786. ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n",
  787. ie_len);
  788. ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL);
  789. if (ar->fw_patch == NULL) {
  790. ret = -ENOMEM;
  791. goto out;
  792. }
  793. ar->fw_patch_len = ie_len;
  794. break;
  795. case ATH6KL_FW_IE_RESERVED_RAM_SIZE:
  796. val = (__le32 *) data;
  797. ar->hw.reserved_ram_size = le32_to_cpup(val);
  798. ath6kl_dbg(ATH6KL_DBG_BOOT,
  799. "found reserved ram size ie 0x%d\n",
  800. ar->hw.reserved_ram_size);
  801. break;
  802. case ATH6KL_FW_IE_CAPABILITIES:
  803. ath6kl_dbg(ATH6KL_DBG_BOOT,
  804. "found firmware capabilities ie (%zd B)\n",
  805. ie_len);
  806. for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
  807. index = ALIGN(i, 8) / 8;
  808. bit = i % 8;
  809. if (data[index] & (1 << bit))
  810. __set_bit(i, ar->fw_capabilities);
  811. }
  812. ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "",
  813. ar->fw_capabilities,
  814. sizeof(ar->fw_capabilities));
  815. break;
  816. case ATH6KL_FW_IE_PATCH_ADDR:
  817. if (ie_len != sizeof(*val))
  818. break;
  819. val = (__le32 *) data;
  820. ar->hw.dataset_patch_addr = le32_to_cpup(val);
  821. ath6kl_dbg(ATH6KL_DBG_BOOT,
  822. "found patch address ie 0x%d\n",
  823. ar->hw.dataset_patch_addr);
  824. break;
  825. default:
  826. ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
  827. le32_to_cpup(&hdr->id));
  828. break;
  829. }
  830. len -= ie_len;
  831. data += ie_len;
  832. };
  833. ret = 0;
  834. out:
  835. release_firmware(fw);
  836. return ret;
  837. }
  838. static int ath6kl_fetch_firmwares(struct ath6kl *ar)
  839. {
  840. int ret;
  841. ret = ath6kl_fetch_board_file(ar);
  842. if (ret)
  843. return ret;
  844. ret = ath6kl_fetch_fw_api2(ar);
  845. if (ret == 0) {
  846. ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 2\n");
  847. return 0;
  848. }
  849. ret = ath6kl_fetch_fw_api1(ar);
  850. if (ret)
  851. return ret;
  852. ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 1\n");
  853. return 0;
  854. }
  855. static int ath6kl_upload_board_file(struct ath6kl *ar)
  856. {
  857. u32 board_address, board_ext_address, param;
  858. u32 board_data_size, board_ext_data_size;
  859. int ret;
  860. if (WARN_ON(ar->fw_board == NULL))
  861. return -ENOENT;
  862. /*
  863. * Determine where in Target RAM to write Board Data.
  864. * For AR6004, host determine Target RAM address for
  865. * writing board data.
  866. */
  867. if (ar->target_type == TARGET_TYPE_AR6004) {
  868. board_address = AR6004_REV1_BOARD_DATA_ADDRESS;
  869. ath6kl_bmi_write(ar,
  870. ath6kl_get_hi_item_addr(ar,
  871. HI_ITEM(hi_board_data)),
  872. (u8 *) &board_address, 4);
  873. } else {
  874. ath6kl_bmi_read(ar,
  875. ath6kl_get_hi_item_addr(ar,
  876. HI_ITEM(hi_board_data)),
  877. (u8 *) &board_address, 4);
  878. }
  879. /* determine where in target ram to write extended board data */
  880. ath6kl_bmi_read(ar,
  881. ath6kl_get_hi_item_addr(ar,
  882. HI_ITEM(hi_board_ext_data)),
  883. (u8 *) &board_ext_address, 4);
  884. if (board_ext_address == 0) {
  885. ath6kl_err("Failed to get board file target address.\n");
  886. return -EINVAL;
  887. }
  888. switch (ar->target_type) {
  889. case TARGET_TYPE_AR6003:
  890. board_data_size = AR6003_BOARD_DATA_SZ;
  891. board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
  892. break;
  893. case TARGET_TYPE_AR6004:
  894. board_data_size = AR6004_BOARD_DATA_SZ;
  895. board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
  896. break;
  897. default:
  898. WARN_ON(1);
  899. return -EINVAL;
  900. break;
  901. }
  902. if (ar->fw_board_len == (board_data_size +
  903. board_ext_data_size)) {
  904. /* write extended board data */
  905. ath6kl_dbg(ATH6KL_DBG_BOOT,
  906. "writing extended board data to 0x%x (%d B)\n",
  907. board_ext_address, board_ext_data_size);
  908. ret = ath6kl_bmi_write(ar, board_ext_address,
  909. ar->fw_board + board_data_size,
  910. board_ext_data_size);
  911. if (ret) {
  912. ath6kl_err("Failed to write extended board data: %d\n",
  913. ret);
  914. return ret;
  915. }
  916. /* record that extended board data is initialized */
  917. param = (board_ext_data_size << 16) | 1;
  918. ath6kl_bmi_write(ar,
  919. ath6kl_get_hi_item_addr(ar,
  920. HI_ITEM(hi_board_ext_data_config)),
  921. (unsigned char *) &param, 4);
  922. }
  923. if (ar->fw_board_len < board_data_size) {
  924. ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
  925. ret = -EINVAL;
  926. return ret;
  927. }
  928. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n",
  929. board_address, board_data_size);
  930. ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
  931. board_data_size);
  932. if (ret) {
  933. ath6kl_err("Board file bmi write failed: %d\n", ret);
  934. return ret;
  935. }
  936. /* record the fact that Board Data IS initialized */
  937. param = 1;
  938. ath6kl_bmi_write(ar,
  939. ath6kl_get_hi_item_addr(ar,
  940. HI_ITEM(hi_board_data_initialized)),
  941. (u8 *)&param, 4);
  942. return ret;
  943. }
  944. static int ath6kl_upload_otp(struct ath6kl *ar)
  945. {
  946. u32 address, param;
  947. bool from_hw = false;
  948. int ret;
  949. if (WARN_ON(ar->fw_otp == NULL))
  950. return -ENOENT;
  951. address = ar->hw.app_load_addr;
  952. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address,
  953. ar->fw_otp_len);
  954. ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
  955. ar->fw_otp_len);
  956. if (ret) {
  957. ath6kl_err("Failed to upload OTP file: %d\n", ret);
  958. return ret;
  959. }
  960. /* read firmware start address */
  961. ret = ath6kl_bmi_read(ar,
  962. ath6kl_get_hi_item_addr(ar,
  963. HI_ITEM(hi_app_start)),
  964. (u8 *) &address, sizeof(address));
  965. if (ret) {
  966. ath6kl_err("Failed to read hi_app_start: %d\n", ret);
  967. return ret;
  968. }
  969. if (ar->hw.app_start_override_addr == 0) {
  970. ar->hw.app_start_override_addr = address;
  971. from_hw = true;
  972. }
  973. ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n",
  974. from_hw ? " (from hw)" : "",
  975. ar->hw.app_start_override_addr);
  976. /* execute the OTP code */
  977. ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n",
  978. ar->hw.app_start_override_addr);
  979. param = 0;
  980. ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, &param);
  981. return ret;
  982. }
  983. static int ath6kl_upload_firmware(struct ath6kl *ar)
  984. {
  985. u32 address;
  986. int ret;
  987. if (WARN_ON(ar->fw == NULL))
  988. return -ENOENT;
  989. address = ar->hw.app_load_addr;
  990. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n",
  991. address, ar->fw_len);
  992. ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
  993. if (ret) {
  994. ath6kl_err("Failed to write firmware: %d\n", ret);
  995. return ret;
  996. }
  997. /*
  998. * Set starting address for firmware
  999. * Don't need to setup app_start override addr on AR6004
  1000. */
  1001. if (ar->target_type != TARGET_TYPE_AR6004) {
  1002. address = ar->hw.app_start_override_addr;
  1003. ath6kl_bmi_set_app_start(ar, address);
  1004. }
  1005. return ret;
  1006. }
  1007. static int ath6kl_upload_patch(struct ath6kl *ar)
  1008. {
  1009. u32 address, param;
  1010. int ret;
  1011. if (WARN_ON(ar->fw_patch == NULL))
  1012. return -ENOENT;
  1013. address = ar->hw.dataset_patch_addr;
  1014. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n",
  1015. address, ar->fw_patch_len);
  1016. ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
  1017. if (ret) {
  1018. ath6kl_err("Failed to write patch file: %d\n", ret);
  1019. return ret;
  1020. }
  1021. param = address;
  1022. ath6kl_bmi_write(ar,
  1023. ath6kl_get_hi_item_addr(ar,
  1024. HI_ITEM(hi_dset_list_head)),
  1025. (unsigned char *) &param, 4);
  1026. return 0;
  1027. }
  1028. static int ath6kl_init_upload(struct ath6kl *ar)
  1029. {
  1030. u32 param, options, sleep, address;
  1031. int status = 0;
  1032. if (ar->target_type != TARGET_TYPE_AR6003 &&
  1033. ar->target_type != TARGET_TYPE_AR6004)
  1034. return -EINVAL;
  1035. /* temporarily disable system sleep */
  1036. address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
  1037. status = ath6kl_bmi_reg_read(ar, address, &param);
  1038. if (status)
  1039. return status;
  1040. options = param;
  1041. param |= ATH6KL_OPTION_SLEEP_DISABLE;
  1042. status = ath6kl_bmi_reg_write(ar, address, param);
  1043. if (status)
  1044. return status;
  1045. address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
  1046. status = ath6kl_bmi_reg_read(ar, address, &param);
  1047. if (status)
  1048. return status;
  1049. sleep = param;
  1050. param |= SM(SYSTEM_SLEEP_DISABLE, 1);
  1051. status = ath6kl_bmi_reg_write(ar, address, param);
  1052. if (status)
  1053. return status;
  1054. ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
  1055. options, sleep);
  1056. /* program analog PLL register */
  1057. /* no need to control 40/44MHz clock on AR6004 */
  1058. if (ar->target_type != TARGET_TYPE_AR6004) {
  1059. status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
  1060. 0xF9104001);
  1061. if (status)
  1062. return status;
  1063. /* Run at 80/88MHz by default */
  1064. param = SM(CPU_CLOCK_STANDARD, 1);
  1065. address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
  1066. status = ath6kl_bmi_reg_write(ar, address, param);
  1067. if (status)
  1068. return status;
  1069. }
  1070. param = 0;
  1071. address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
  1072. param = SM(LPO_CAL_ENABLE, 1);
  1073. status = ath6kl_bmi_reg_write(ar, address, param);
  1074. if (status)
  1075. return status;
  1076. /* WAR to avoid SDIO CRC err */
  1077. if (ar->version.target_ver == AR6003_REV2_VERSION) {
  1078. ath6kl_err("temporary war to avoid sdio crc error\n");
  1079. param = 0x20;
  1080. address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
  1081. status = ath6kl_bmi_reg_write(ar, address, param);
  1082. if (status)
  1083. return status;
  1084. address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
  1085. status = ath6kl_bmi_reg_write(ar, address, param);
  1086. if (status)
  1087. return status;
  1088. address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
  1089. status = ath6kl_bmi_reg_write(ar, address, param);
  1090. if (status)
  1091. return status;
  1092. address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
  1093. status = ath6kl_bmi_reg_write(ar, address, param);
  1094. if (status)
  1095. return status;
  1096. }
  1097. /* write EEPROM data to Target RAM */
  1098. status = ath6kl_upload_board_file(ar);
  1099. if (status)
  1100. return status;
  1101. /* transfer One time Programmable data */
  1102. status = ath6kl_upload_otp(ar);
  1103. if (status)
  1104. return status;
  1105. /* Download Target firmware */
  1106. status = ath6kl_upload_firmware(ar);
  1107. if (status)
  1108. return status;
  1109. status = ath6kl_upload_patch(ar);
  1110. if (status)
  1111. return status;
  1112. /* Restore system sleep */
  1113. address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
  1114. status = ath6kl_bmi_reg_write(ar, address, sleep);
  1115. if (status)
  1116. return status;
  1117. address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
  1118. param = options | 0x20;
  1119. status = ath6kl_bmi_reg_write(ar, address, param);
  1120. if (status)
  1121. return status;
  1122. /* Configure GPIO AR6003 UART */
  1123. param = CONFIG_AR600x_DEBUG_UART_TX_PIN;
  1124. status = ath6kl_bmi_write(ar,
  1125. ath6kl_get_hi_item_addr(ar,
  1126. HI_ITEM(hi_dbg_uart_txpin)),
  1127. (u8 *)&param, 4);
  1128. return status;
  1129. }
  1130. static int ath6kl_init_hw_params(struct ath6kl *ar)
  1131. {
  1132. switch (ar->version.target_ver) {
  1133. case AR6003_REV2_VERSION:
  1134. ar->hw.dataset_patch_addr = AR6003_REV2_DATASET_PATCH_ADDRESS;
  1135. ar->hw.app_load_addr = AR6003_REV2_APP_LOAD_ADDRESS;
  1136. ar->hw.board_ext_data_addr = AR6003_REV2_BOARD_EXT_DATA_ADDRESS;
  1137. ar->hw.reserved_ram_size = AR6003_REV2_RAM_RESERVE_SIZE;
  1138. /* hw2.0 needs override address hardcoded */
  1139. ar->hw.app_start_override_addr = 0x944C00;
  1140. break;
  1141. case AR6003_REV3_VERSION:
  1142. ar->hw.dataset_patch_addr = AR6003_REV3_DATASET_PATCH_ADDRESS;
  1143. ar->hw.app_load_addr = 0x1234;
  1144. ar->hw.board_ext_data_addr = AR6003_REV3_BOARD_EXT_DATA_ADDRESS;
  1145. ar->hw.reserved_ram_size = AR6003_REV3_RAM_RESERVE_SIZE;
  1146. break;
  1147. case AR6004_REV1_VERSION:
  1148. ar->hw.dataset_patch_addr = AR6003_REV2_DATASET_PATCH_ADDRESS;
  1149. ar->hw.app_load_addr = AR6003_REV3_APP_LOAD_ADDRESS;
  1150. ar->hw.board_ext_data_addr = AR6004_REV1_BOARD_EXT_DATA_ADDRESS;
  1151. ar->hw.reserved_ram_size = AR6004_REV1_RAM_RESERVE_SIZE;
  1152. break;
  1153. default:
  1154. ath6kl_err("Unsupported hardware version: 0x%x\n",
  1155. ar->version.target_ver);
  1156. return -EINVAL;
  1157. }
  1158. ath6kl_dbg(ATH6KL_DBG_BOOT,
  1159. "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
  1160. ar->version.target_ver, ar->target_type,
  1161. ar->hw.dataset_patch_addr, ar->hw.app_load_addr);
  1162. ath6kl_dbg(ATH6KL_DBG_BOOT,
  1163. "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
  1164. ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
  1165. ar->hw.reserved_ram_size);
  1166. return 0;
  1167. }
  1168. int ath6kl_init_hw_start(struct ath6kl *ar)
  1169. {
  1170. long timeleft;
  1171. int ret, i;
  1172. ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n");
  1173. ret = ath6kl_hif_power_on(ar);
  1174. if (ret)
  1175. return ret;
  1176. ret = ath6kl_configure_target(ar);
  1177. if (ret)
  1178. goto err_power_off;
  1179. ret = ath6kl_init_upload(ar);
  1180. if (ret)
  1181. goto err_power_off;
  1182. /* Do we need to finish the BMI phase */
  1183. /* FIXME: return error from ath6kl_bmi_done() */
  1184. if (ath6kl_bmi_done(ar)) {
  1185. ret = -EIO;
  1186. goto err_power_off;
  1187. }
  1188. /*
  1189. * The reason we have to wait for the target here is that the
  1190. * driver layer has to init BMI in order to set the host block
  1191. * size.
  1192. */
  1193. if (ath6kl_htc_wait_target(ar->htc_target)) {
  1194. ret = -EIO;
  1195. goto err_power_off;
  1196. }
  1197. if (ath6kl_init_service_ep(ar)) {
  1198. ret = -EIO;
  1199. goto err_cleanup_scatter;
  1200. }
  1201. /* setup credit distribution */
  1202. ath6kl_credit_setup(ar->htc_target, &ar->credit_state_info);
  1203. /* start HTC */
  1204. ret = ath6kl_htc_start(ar->htc_target);
  1205. if (ret) {
  1206. /* FIXME: call this */
  1207. ath6kl_cookie_cleanup(ar);
  1208. goto err_cleanup_scatter;
  1209. }
  1210. /* Wait for Wmi event to be ready */
  1211. timeleft = wait_event_interruptible_timeout(ar->event_wq,
  1212. test_bit(WMI_READY,
  1213. &ar->flag),
  1214. WMI_TIMEOUT);
  1215. ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
  1216. if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
  1217. ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
  1218. ATH6KL_ABI_VERSION, ar->version.abi_ver);
  1219. ret = -EIO;
  1220. goto err_htc_stop;
  1221. }
  1222. if (!timeleft || signal_pending(current)) {
  1223. ath6kl_err("wmi is not ready or wait was interrupted\n");
  1224. ret = -EIO;
  1225. goto err_htc_stop;
  1226. }
  1227. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
  1228. /* communicate the wmi protocol verision to the target */
  1229. /* FIXME: return error */
  1230. if ((ath6kl_set_host_app_area(ar)) != 0)
  1231. ath6kl_err("unable to set the host app area\n");
  1232. for (i = 0; i < MAX_NUM_VIF; i++) {
  1233. ret = ath6kl_target_config_wlan_params(ar, i);
  1234. if (ret)
  1235. goto err_htc_stop;
  1236. }
  1237. return 0;
  1238. err_htc_stop:
  1239. ath6kl_htc_stop(ar->htc_target);
  1240. err_cleanup_scatter:
  1241. ath6kl_hif_cleanup_scatter(ar);
  1242. err_power_off:
  1243. ath6kl_hif_power_off(ar);
  1244. return ret;
  1245. }
  1246. int ath6kl_init_hw_stop(struct ath6kl *ar)
  1247. {
  1248. int ret;
  1249. ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n");
  1250. ath6kl_htc_stop(ar->htc_target);
  1251. ath6kl_hif_stop(ar);
  1252. ath6kl_bmi_reset(ar);
  1253. ret = ath6kl_hif_power_off(ar);
  1254. if (ret)
  1255. ath6kl_warn("failed to power off hif: %d\n", ret);
  1256. return 0;
  1257. }
  1258. int ath6kl_core_init(struct ath6kl *ar)
  1259. {
  1260. struct ath6kl_bmi_target_info targ_info;
  1261. struct net_device *ndev;
  1262. int ret = 0, i;
  1263. ar->ath6kl_wq = create_singlethread_workqueue("ath6kl");
  1264. if (!ar->ath6kl_wq)
  1265. return -ENOMEM;
  1266. ret = ath6kl_bmi_init(ar);
  1267. if (ret)
  1268. goto err_wq;
  1269. /*
  1270. * Turn on power to get hardware (target) version and leave power
  1271. * on delibrately as we will boot the hardware anyway within few
  1272. * seconds.
  1273. */
  1274. ret = ath6kl_hif_power_on(ar);
  1275. if (ret)
  1276. goto err_bmi_cleanup;
  1277. ret = ath6kl_bmi_get_target_info(ar, &targ_info);
  1278. if (ret)
  1279. goto err_power_off;
  1280. ar->version.target_ver = le32_to_cpu(targ_info.version);
  1281. ar->target_type = le32_to_cpu(targ_info.type);
  1282. ar->wiphy->hw_version = le32_to_cpu(targ_info.version);
  1283. ret = ath6kl_init_hw_params(ar);
  1284. if (ret)
  1285. goto err_power_off;
  1286. ar->htc_target = ath6kl_htc_create(ar);
  1287. if (!ar->htc_target) {
  1288. ret = -ENOMEM;
  1289. goto err_power_off;
  1290. }
  1291. ret = ath6kl_fetch_firmwares(ar);
  1292. if (ret)
  1293. goto err_htc_cleanup;
  1294. /* FIXME: we should free all firmwares in the error cases below */
  1295. /* Indicate that WMI is enabled (although not ready yet) */
  1296. set_bit(WMI_ENABLED, &ar->flag);
  1297. ar->wmi = ath6kl_wmi_init(ar);
  1298. if (!ar->wmi) {
  1299. ath6kl_err("failed to initialize wmi\n");
  1300. ret = -EIO;
  1301. goto err_htc_cleanup;
  1302. }
  1303. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi);
  1304. ret = ath6kl_register_ieee80211_hw(ar);
  1305. if (ret)
  1306. goto err_node_cleanup;
  1307. ret = ath6kl_debug_init(ar);
  1308. if (ret) {
  1309. wiphy_unregister(ar->wiphy);
  1310. goto err_node_cleanup;
  1311. }
  1312. for (i = 0; i < MAX_NUM_VIF; i++)
  1313. ar->avail_idx_map |= BIT(i);
  1314. rtnl_lock();
  1315. /* Add an initial station interface */
  1316. ndev = ath6kl_interface_add(ar, "wlan%d", NL80211_IFTYPE_STATION, 0,
  1317. INFRA_NETWORK);
  1318. rtnl_unlock();
  1319. if (!ndev) {
  1320. ath6kl_err("Failed to instantiate a network device\n");
  1321. ret = -ENOMEM;
  1322. wiphy_unregister(ar->wiphy);
  1323. goto err_debug_init;
  1324. }
  1325. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n",
  1326. __func__, ndev->name, ndev, ar);
  1327. /* setup access class priority mappings */
  1328. ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest */
  1329. ar->ac_stream_pri_map[WMM_AC_BE] = 1;
  1330. ar->ac_stream_pri_map[WMM_AC_VI] = 2;
  1331. ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */
  1332. /* give our connected endpoints some buffers */
  1333. ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep);
  1334. ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]);
  1335. /* allocate some buffers that handle larger AMSDU frames */
  1336. ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS);
  1337. ath6kl_cookie_init(ar);
  1338. ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER |
  1339. ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST;
  1340. ar->wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM |
  1341. WIPHY_FLAG_HAVE_AP_SME;
  1342. set_bit(FIRST_BOOT, &ar->flag);
  1343. ret = ath6kl_init_hw_start(ar);
  1344. if (ret) {
  1345. ath6kl_err("Failed to start hardware: %d\n", ret);
  1346. goto err_rxbuf_cleanup;
  1347. }
  1348. /*
  1349. * Set mac address which is received in ready event
  1350. * FIXME: Move to ath6kl_interface_add()
  1351. */
  1352. memcpy(ndev->dev_addr, ar->mac_addr, ETH_ALEN);
  1353. ret = ath6kl_init_hw_stop(ar);
  1354. if (ret) {
  1355. ath6kl_err("Failed to stop hardware: %d\n", ret);
  1356. goto err_htc_cleanup;
  1357. }
  1358. return ret;
  1359. err_rxbuf_cleanup:
  1360. ath6kl_htc_flush_rx_buf(ar->htc_target);
  1361. ath6kl_cleanup_amsdu_rxbufs(ar);
  1362. rtnl_lock();
  1363. ath6kl_deinit_if_data(netdev_priv(ndev));
  1364. rtnl_unlock();
  1365. wiphy_unregister(ar->wiphy);
  1366. err_debug_init:
  1367. ath6kl_debug_cleanup(ar);
  1368. err_node_cleanup:
  1369. ath6kl_wmi_shutdown(ar->wmi);
  1370. clear_bit(WMI_ENABLED, &ar->flag);
  1371. ar->wmi = NULL;
  1372. err_htc_cleanup:
  1373. ath6kl_htc_cleanup(ar->htc_target);
  1374. err_power_off:
  1375. ath6kl_hif_power_off(ar);
  1376. err_bmi_cleanup:
  1377. ath6kl_bmi_cleanup(ar);
  1378. err_wq:
  1379. destroy_workqueue(ar->ath6kl_wq);
  1380. return ret;
  1381. }
  1382. void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready)
  1383. {
  1384. static u8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
  1385. bool discon_issued;
  1386. netif_stop_queue(vif->ndev);
  1387. clear_bit(WLAN_ENABLED, &vif->flags);
  1388. if (wmi_ready) {
  1389. discon_issued = test_bit(CONNECTED, &vif->flags) ||
  1390. test_bit(CONNECT_PEND, &vif->flags);
  1391. ath6kl_disconnect(vif);
  1392. del_timer(&vif->disconnect_timer);
  1393. if (discon_issued)
  1394. ath6kl_disconnect_event(vif, DISCONNECT_CMD,
  1395. (vif->nw_type & AP_NETWORK) ?
  1396. bcast_mac : vif->bssid,
  1397. 0, NULL, 0);
  1398. }
  1399. if (vif->scan_req) {
  1400. cfg80211_scan_done(vif->scan_req, true);
  1401. vif->scan_req = NULL;
  1402. }
  1403. }
  1404. void ath6kl_stop_txrx(struct ath6kl *ar)
  1405. {
  1406. struct ath6kl_vif *vif, *tmp_vif;
  1407. set_bit(DESTROY_IN_PROGRESS, &ar->flag);
  1408. if (down_interruptible(&ar->sem)) {
  1409. ath6kl_err("down_interruptible failed\n");
  1410. return;
  1411. }
  1412. spin_lock(&ar->list_lock);
  1413. list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) {
  1414. list_del(&vif->list);
  1415. spin_unlock(&ar->list_lock);
  1416. ath6kl_cleanup_vif(vif, test_bit(WMI_READY, &ar->flag));
  1417. rtnl_lock();
  1418. ath6kl_deinit_if_data(vif);
  1419. rtnl_unlock();
  1420. spin_lock(&ar->list_lock);
  1421. }
  1422. spin_unlock(&ar->list_lock);
  1423. clear_bit(WMI_READY, &ar->flag);
  1424. /*
  1425. * After wmi_shudown all WMI events will be dropped. We
  1426. * need to cleanup the buffers allocated in AP mode and
  1427. * give disconnect notification to stack, which usually
  1428. * happens in the disconnect_event. Simulate the disconnect
  1429. * event by calling the function directly. Sometimes
  1430. * disconnect_event will be received when the debug logs
  1431. * are collected.
  1432. */
  1433. ath6kl_wmi_shutdown(ar->wmi);
  1434. clear_bit(WMI_ENABLED, &ar->flag);
  1435. if (ar->htc_target) {
  1436. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__);
  1437. ath6kl_htc_stop(ar->htc_target);
  1438. }
  1439. /*
  1440. * Try to reset the device if we can. The driver may have been
  1441. * configure NOT to reset the target during a debug session.
  1442. */
  1443. ath6kl_dbg(ATH6KL_DBG_TRC,
  1444. "attempting to reset target on instance destroy\n");
  1445. ath6kl_reset_device(ar, ar->target_type, true, true);
  1446. clear_bit(WLAN_ENABLED, &ar->flag);
  1447. }