oxygen.c 21 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799
  1. /*
  2. * C-Media CMI8788 driver for C-Media's reference design and similar models
  3. *
  4. * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
  5. *
  6. *
  7. * This driver is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License, version 2.
  9. *
  10. * This driver is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this driver; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. */
  19. /*
  20. * CMI8788:
  21. *
  22. * SPI 0 -> 1st AK4396 (front)
  23. * SPI 1 -> 2nd AK4396 (surround)
  24. * SPI 2 -> 3rd AK4396 (center/LFE)
  25. * SPI 3 -> WM8785
  26. * SPI 4 -> 4th AK4396 (back)
  27. *
  28. * GPIO 0 -> DFS0 of AK5385
  29. * GPIO 1 -> DFS1 of AK5385
  30. *
  31. * X-Meridian models:
  32. * GPIO 4 -> enable extension S/PDIF input
  33. * GPIO 6 -> enable on-board S/PDIF input
  34. *
  35. * Claro models:
  36. * GPIO 8 -> enable headphone amplifier
  37. *
  38. * CM9780:
  39. *
  40. * LINE_OUT -> input of ADC
  41. *
  42. * AUX_IN <- aux
  43. * CD_IN <- CD
  44. * MIC_IN <- mic
  45. *
  46. * GPO 0 -> route line-in (0) or AC97 output (1) to ADC input
  47. */
  48. #include <linux/delay.h>
  49. #include <linux/mutex.h>
  50. #include <linux/pci.h>
  51. #include <sound/ac97_codec.h>
  52. #include <sound/control.h>
  53. #include <sound/core.h>
  54. #include <sound/info.h>
  55. #include <sound/initval.h>
  56. #include <sound/pcm.h>
  57. #include <sound/pcm_params.h>
  58. #include <sound/tlv.h>
  59. #include "oxygen.h"
  60. #include "xonar_dg.h"
  61. #include "ak4396.h"
  62. #include "wm8785.h"
  63. MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
  64. MODULE_DESCRIPTION("C-Media CMI8788 driver");
  65. MODULE_LICENSE("GPL v2");
  66. MODULE_SUPPORTED_DEVICE("{{C-Media,CMI8786}"
  67. ",{C-Media,CMI8787}"
  68. ",{C-Media,CMI8788}}");
  69. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
  70. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
  71. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
  72. module_param_array(index, int, NULL, 0444);
  73. MODULE_PARM_DESC(index, "card index");
  74. module_param_array(id, charp, NULL, 0444);
  75. MODULE_PARM_DESC(id, "ID string");
  76. module_param_array(enable, bool, NULL, 0444);
  77. MODULE_PARM_DESC(enable, "enable card");
  78. enum {
  79. MODEL_CMEDIA_REF,
  80. MODEL_MERIDIAN,
  81. MODEL_MERIDIAN_2G,
  82. MODEL_CLARO,
  83. MODEL_CLARO_HALO,
  84. MODEL_FANTASIA,
  85. MODEL_SERENADE,
  86. MODEL_2CH_OUTPUT,
  87. MODEL_HG2PCI,
  88. MODEL_XONAR_DG,
  89. };
  90. static DEFINE_PCI_DEVICE_TABLE(oxygen_ids) = {
  91. /* C-Media's reference design */
  92. { OXYGEN_PCI_SUBID(0x10b0, 0x0216), .driver_data = MODEL_CMEDIA_REF },
  93. { OXYGEN_PCI_SUBID(0x10b0, 0x0217), .driver_data = MODEL_CMEDIA_REF },
  94. { OXYGEN_PCI_SUBID(0x10b0, 0x0218), .driver_data = MODEL_CMEDIA_REF },
  95. { OXYGEN_PCI_SUBID(0x10b0, 0x0219), .driver_data = MODEL_CMEDIA_REF },
  96. { OXYGEN_PCI_SUBID(0x13f6, 0x0001), .driver_data = MODEL_CMEDIA_REF },
  97. { OXYGEN_PCI_SUBID(0x13f6, 0x0010), .driver_data = MODEL_CMEDIA_REF },
  98. { OXYGEN_PCI_SUBID(0x13f6, 0x8788), .driver_data = MODEL_CMEDIA_REF },
  99. { OXYGEN_PCI_SUBID(0x147a, 0xa017), .driver_data = MODEL_CMEDIA_REF },
  100. { OXYGEN_PCI_SUBID(0x1a58, 0x0910), .driver_data = MODEL_CMEDIA_REF },
  101. /* Asus Xonar DG */
  102. { OXYGEN_PCI_SUBID(0x1043, 0x8467), .driver_data = MODEL_XONAR_DG },
  103. /* PCI 2.0 HD Audio */
  104. { OXYGEN_PCI_SUBID(0x13f6, 0x8782), .driver_data = MODEL_2CH_OUTPUT },
  105. /* Kuroutoshikou CMI8787-HG2PCI */
  106. { OXYGEN_PCI_SUBID(0x13f6, 0xffff), .driver_data = MODEL_HG2PCI },
  107. /* TempoTec HiFier Fantasia */
  108. { OXYGEN_PCI_SUBID(0x14c3, 0x1710), .driver_data = MODEL_FANTASIA },
  109. /* TempoTec HiFier Serenade */
  110. { OXYGEN_PCI_SUBID(0x14c3, 0x1711), .driver_data = MODEL_SERENADE },
  111. /* AuzenTech X-Meridian */
  112. { OXYGEN_PCI_SUBID(0x415a, 0x5431), .driver_data = MODEL_MERIDIAN },
  113. /* AuzenTech X-Meridian 2G */
  114. { OXYGEN_PCI_SUBID(0x5431, 0x017a), .driver_data = MODEL_MERIDIAN_2G },
  115. /* HT-Omega Claro */
  116. { OXYGEN_PCI_SUBID(0x7284, 0x9761), .driver_data = MODEL_CLARO },
  117. /* HT-Omega Claro halo */
  118. { OXYGEN_PCI_SUBID(0x7284, 0x9781), .driver_data = MODEL_CLARO_HALO },
  119. { }
  120. };
  121. MODULE_DEVICE_TABLE(pci, oxygen_ids);
  122. #define GPIO_AK5385_DFS_MASK 0x0003
  123. #define GPIO_AK5385_DFS_NORMAL 0x0000
  124. #define GPIO_AK5385_DFS_DOUBLE 0x0001
  125. #define GPIO_AK5385_DFS_QUAD 0x0002
  126. #define GPIO_MERIDIAN_DIG_MASK 0x0050
  127. #define GPIO_MERIDIAN_DIG_EXT 0x0010
  128. #define GPIO_MERIDIAN_DIG_BOARD 0x0040
  129. #define GPIO_CLARO_HP 0x0100
  130. struct generic_data {
  131. unsigned int dacs;
  132. u8 ak4396_regs[4][5];
  133. u16 wm8785_regs[3];
  134. };
  135. static void ak4396_write(struct oxygen *chip, unsigned int codec,
  136. u8 reg, u8 value)
  137. {
  138. /* maps ALSA channel pair number to SPI output */
  139. static const u8 codec_spi_map[4] = {
  140. 0, 1, 2, 4
  141. };
  142. struct generic_data *data = chip->model_data;
  143. oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
  144. OXYGEN_SPI_DATA_LENGTH_2 |
  145. OXYGEN_SPI_CLOCK_160 |
  146. (codec_spi_map[codec] << OXYGEN_SPI_CODEC_SHIFT) |
  147. OXYGEN_SPI_CEN_LATCH_CLOCK_HI,
  148. AK4396_WRITE | (reg << 8) | value);
  149. data->ak4396_regs[codec][reg] = value;
  150. }
  151. static void ak4396_write_cached(struct oxygen *chip, unsigned int codec,
  152. u8 reg, u8 value)
  153. {
  154. struct generic_data *data = chip->model_data;
  155. if (value != data->ak4396_regs[codec][reg])
  156. ak4396_write(chip, codec, reg, value);
  157. }
  158. static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value)
  159. {
  160. struct generic_data *data = chip->model_data;
  161. oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
  162. OXYGEN_SPI_DATA_LENGTH_2 |
  163. OXYGEN_SPI_CLOCK_160 |
  164. (3 << OXYGEN_SPI_CODEC_SHIFT) |
  165. OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
  166. (reg << 9) | value);
  167. if (reg < ARRAY_SIZE(data->wm8785_regs))
  168. data->wm8785_regs[reg] = value;
  169. }
  170. static void ak4396_registers_init(struct oxygen *chip)
  171. {
  172. struct generic_data *data = chip->model_data;
  173. unsigned int i;
  174. for (i = 0; i < data->dacs; ++i) {
  175. ak4396_write(chip, i, AK4396_CONTROL_1,
  176. AK4396_DIF_24_MSB | AK4396_RSTN);
  177. ak4396_write(chip, i, AK4396_CONTROL_2,
  178. data->ak4396_regs[0][AK4396_CONTROL_2]);
  179. ak4396_write(chip, i, AK4396_CONTROL_3,
  180. AK4396_PCM);
  181. ak4396_write(chip, i, AK4396_LCH_ATT,
  182. chip->dac_volume[i * 2]);
  183. ak4396_write(chip, i, AK4396_RCH_ATT,
  184. chip->dac_volume[i * 2 + 1]);
  185. }
  186. }
  187. static void ak4396_init(struct oxygen *chip)
  188. {
  189. struct generic_data *data = chip->model_data;
  190. data->dacs = chip->model.dac_channels_pcm / 2;
  191. data->ak4396_regs[0][AK4396_CONTROL_2] =
  192. AK4396_SMUTE | AK4396_DEM_OFF | AK4396_DFS_NORMAL;
  193. ak4396_registers_init(chip);
  194. snd_component_add(chip->card, "AK4396");
  195. }
  196. static void ak5385_init(struct oxygen *chip)
  197. {
  198. oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_AK5385_DFS_MASK);
  199. oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_AK5385_DFS_MASK);
  200. snd_component_add(chip->card, "AK5385");
  201. }
  202. static void wm8785_registers_init(struct oxygen *chip)
  203. {
  204. struct generic_data *data = chip->model_data;
  205. wm8785_write(chip, WM8785_R7, 0);
  206. wm8785_write(chip, WM8785_R0, data->wm8785_regs[0]);
  207. wm8785_write(chip, WM8785_R2, data->wm8785_regs[2]);
  208. }
  209. static void wm8785_init(struct oxygen *chip)
  210. {
  211. struct generic_data *data = chip->model_data;
  212. data->wm8785_regs[0] =
  213. WM8785_MCR_SLAVE | WM8785_OSR_SINGLE | WM8785_FORMAT_LJUST;
  214. data->wm8785_regs[2] = WM8785_HPFR | WM8785_HPFL;
  215. wm8785_registers_init(chip);
  216. snd_component_add(chip->card, "WM8785");
  217. }
  218. static void generic_init(struct oxygen *chip)
  219. {
  220. ak4396_init(chip);
  221. wm8785_init(chip);
  222. }
  223. static void meridian_init(struct oxygen *chip)
  224. {
  225. oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
  226. GPIO_MERIDIAN_DIG_MASK);
  227. oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
  228. GPIO_MERIDIAN_DIG_BOARD, GPIO_MERIDIAN_DIG_MASK);
  229. ak4396_init(chip);
  230. ak5385_init(chip);
  231. }
  232. static void claro_enable_hp(struct oxygen *chip)
  233. {
  234. msleep(300);
  235. oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_HP);
  236. oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
  237. }
  238. static void claro_init(struct oxygen *chip)
  239. {
  240. ak4396_init(chip);
  241. wm8785_init(chip);
  242. claro_enable_hp(chip);
  243. }
  244. static void claro_halo_init(struct oxygen *chip)
  245. {
  246. ak4396_init(chip);
  247. ak5385_init(chip);
  248. claro_enable_hp(chip);
  249. }
  250. static void fantasia_init(struct oxygen *chip)
  251. {
  252. ak4396_init(chip);
  253. snd_component_add(chip->card, "CS5340");
  254. }
  255. static void stereo_output_init(struct oxygen *chip)
  256. {
  257. ak4396_init(chip);
  258. }
  259. static void generic_cleanup(struct oxygen *chip)
  260. {
  261. }
  262. static void claro_disable_hp(struct oxygen *chip)
  263. {
  264. oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
  265. }
  266. static void claro_cleanup(struct oxygen *chip)
  267. {
  268. claro_disable_hp(chip);
  269. }
  270. static void claro_suspend(struct oxygen *chip)
  271. {
  272. claro_disable_hp(chip);
  273. }
  274. static void generic_resume(struct oxygen *chip)
  275. {
  276. ak4396_registers_init(chip);
  277. wm8785_registers_init(chip);
  278. }
  279. static void meridian_resume(struct oxygen *chip)
  280. {
  281. ak4396_registers_init(chip);
  282. }
  283. static void claro_resume(struct oxygen *chip)
  284. {
  285. ak4396_registers_init(chip);
  286. claro_enable_hp(chip);
  287. }
  288. static void stereo_resume(struct oxygen *chip)
  289. {
  290. ak4396_registers_init(chip);
  291. }
  292. static void set_ak4396_params(struct oxygen *chip,
  293. struct snd_pcm_hw_params *params)
  294. {
  295. struct generic_data *data = chip->model_data;
  296. unsigned int i;
  297. u8 value;
  298. value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_DFS_MASK;
  299. if (params_rate(params) <= 54000)
  300. value |= AK4396_DFS_NORMAL;
  301. else if (params_rate(params) <= 108000)
  302. value |= AK4396_DFS_DOUBLE;
  303. else
  304. value |= AK4396_DFS_QUAD;
  305. msleep(1); /* wait for the new MCLK to become stable */
  306. if (value != data->ak4396_regs[0][AK4396_CONTROL_2]) {
  307. for (i = 0; i < data->dacs; ++i) {
  308. ak4396_write(chip, i, AK4396_CONTROL_1,
  309. AK4396_DIF_24_MSB);
  310. ak4396_write(chip, i, AK4396_CONTROL_2, value);
  311. ak4396_write(chip, i, AK4396_CONTROL_1,
  312. AK4396_DIF_24_MSB | AK4396_RSTN);
  313. }
  314. }
  315. }
  316. static void update_ak4396_volume(struct oxygen *chip)
  317. {
  318. struct generic_data *data = chip->model_data;
  319. unsigned int i;
  320. for (i = 0; i < data->dacs; ++i) {
  321. ak4396_write_cached(chip, i, AK4396_LCH_ATT,
  322. chip->dac_volume[i * 2]);
  323. ak4396_write_cached(chip, i, AK4396_RCH_ATT,
  324. chip->dac_volume[i * 2 + 1]);
  325. }
  326. }
  327. static void update_ak4396_mute(struct oxygen *chip)
  328. {
  329. struct generic_data *data = chip->model_data;
  330. unsigned int i;
  331. u8 value;
  332. value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_SMUTE;
  333. if (chip->dac_mute)
  334. value |= AK4396_SMUTE;
  335. for (i = 0; i < data->dacs; ++i)
  336. ak4396_write_cached(chip, i, AK4396_CONTROL_2, value);
  337. }
  338. static void set_wm8785_params(struct oxygen *chip,
  339. struct snd_pcm_hw_params *params)
  340. {
  341. struct generic_data *data = chip->model_data;
  342. unsigned int value;
  343. value = WM8785_MCR_SLAVE | WM8785_FORMAT_LJUST;
  344. if (params_rate(params) <= 48000)
  345. value |= WM8785_OSR_SINGLE;
  346. else if (params_rate(params) <= 96000)
  347. value |= WM8785_OSR_DOUBLE;
  348. else
  349. value |= WM8785_OSR_QUAD;
  350. if (value != data->wm8785_regs[0]) {
  351. wm8785_write(chip, WM8785_R7, 0);
  352. wm8785_write(chip, WM8785_R0, value);
  353. wm8785_write(chip, WM8785_R2, data->wm8785_regs[2]);
  354. }
  355. }
  356. static void set_ak5385_params(struct oxygen *chip,
  357. struct snd_pcm_hw_params *params)
  358. {
  359. unsigned int value;
  360. if (params_rate(params) <= 54000)
  361. value = GPIO_AK5385_DFS_NORMAL;
  362. else if (params_rate(params) <= 108000)
  363. value = GPIO_AK5385_DFS_DOUBLE;
  364. else
  365. value = GPIO_AK5385_DFS_QUAD;
  366. oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
  367. value, GPIO_AK5385_DFS_MASK);
  368. }
  369. static void set_no_params(struct oxygen *chip, struct snd_pcm_hw_params *params)
  370. {
  371. }
  372. static int rolloff_info(struct snd_kcontrol *ctl,
  373. struct snd_ctl_elem_info *info)
  374. {
  375. static const char *const names[2] = {
  376. "Sharp Roll-off", "Slow Roll-off"
  377. };
  378. return snd_ctl_enum_info(info, 1, 2, names);
  379. }
  380. static int rolloff_get(struct snd_kcontrol *ctl,
  381. struct snd_ctl_elem_value *value)
  382. {
  383. struct oxygen *chip = ctl->private_data;
  384. struct generic_data *data = chip->model_data;
  385. value->value.enumerated.item[0] =
  386. (data->ak4396_regs[0][AK4396_CONTROL_2] & AK4396_SLOW) != 0;
  387. return 0;
  388. }
  389. static int rolloff_put(struct snd_kcontrol *ctl,
  390. struct snd_ctl_elem_value *value)
  391. {
  392. struct oxygen *chip = ctl->private_data;
  393. struct generic_data *data = chip->model_data;
  394. unsigned int i;
  395. int changed;
  396. u8 reg;
  397. mutex_lock(&chip->mutex);
  398. reg = data->ak4396_regs[0][AK4396_CONTROL_2];
  399. if (value->value.enumerated.item[0])
  400. reg |= AK4396_SLOW;
  401. else
  402. reg &= ~AK4396_SLOW;
  403. changed = reg != data->ak4396_regs[0][AK4396_CONTROL_2];
  404. if (changed) {
  405. for (i = 0; i < data->dacs; ++i)
  406. ak4396_write(chip, i, AK4396_CONTROL_2, reg);
  407. }
  408. mutex_unlock(&chip->mutex);
  409. return changed;
  410. }
  411. static const struct snd_kcontrol_new rolloff_control = {
  412. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  413. .name = "DAC Filter Playback Enum",
  414. .info = rolloff_info,
  415. .get = rolloff_get,
  416. .put = rolloff_put,
  417. };
  418. static int hpf_info(struct snd_kcontrol *ctl, struct snd_ctl_elem_info *info)
  419. {
  420. static const char *const names[2] = {
  421. "None", "High-pass Filter"
  422. };
  423. return snd_ctl_enum_info(info, 1, 2, names);
  424. }
  425. static int hpf_get(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
  426. {
  427. struct oxygen *chip = ctl->private_data;
  428. struct generic_data *data = chip->model_data;
  429. value->value.enumerated.item[0] =
  430. (data->wm8785_regs[WM8785_R2] & WM8785_HPFR) != 0;
  431. return 0;
  432. }
  433. static int hpf_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
  434. {
  435. struct oxygen *chip = ctl->private_data;
  436. struct generic_data *data = chip->model_data;
  437. unsigned int reg;
  438. int changed;
  439. mutex_lock(&chip->mutex);
  440. reg = data->wm8785_regs[WM8785_R2] & ~(WM8785_HPFR | WM8785_HPFL);
  441. if (value->value.enumerated.item[0])
  442. reg |= WM8785_HPFR | WM8785_HPFL;
  443. changed = reg != data->wm8785_regs[WM8785_R2];
  444. if (changed)
  445. wm8785_write(chip, WM8785_R2, reg);
  446. mutex_unlock(&chip->mutex);
  447. return changed;
  448. }
  449. static const struct snd_kcontrol_new hpf_control = {
  450. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  451. .name = "ADC Filter Capture Enum",
  452. .info = hpf_info,
  453. .get = hpf_get,
  454. .put = hpf_put,
  455. };
  456. static int meridian_dig_source_info(struct snd_kcontrol *ctl, struct snd_ctl_elem_info *info)
  457. {
  458. static const char *const names[2] = { "On-board", "Extension" };
  459. return snd_ctl_enum_info(info, 1, 2, names);
  460. }
  461. static int meridian_dig_source_get(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
  462. {
  463. struct oxygen *chip = ctl->private_data;
  464. value->value.enumerated.item[0] =
  465. !!(oxygen_read16(chip, OXYGEN_GPIO_DATA) &
  466. GPIO_MERIDIAN_DIG_EXT);
  467. return 0;
  468. }
  469. static int meridian_dig_source_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
  470. {
  471. struct oxygen *chip = ctl->private_data;
  472. u16 old_reg, new_reg;
  473. int changed;
  474. mutex_lock(&chip->mutex);
  475. old_reg = oxygen_read16(chip, OXYGEN_GPIO_DATA);
  476. new_reg = old_reg & ~GPIO_MERIDIAN_DIG_MASK;
  477. if (value->value.enumerated.item[0] == 0)
  478. new_reg |= GPIO_MERIDIAN_DIG_BOARD;
  479. else
  480. new_reg |= GPIO_MERIDIAN_DIG_EXT;
  481. changed = new_reg != old_reg;
  482. if (changed)
  483. oxygen_write16(chip, OXYGEN_GPIO_DATA, new_reg);
  484. mutex_unlock(&chip->mutex);
  485. return changed;
  486. }
  487. static const struct snd_kcontrol_new meridian_dig_source_control = {
  488. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  489. .name = "IEC958 Source Capture Enum",
  490. .info = meridian_dig_source_info,
  491. .get = meridian_dig_source_get,
  492. .put = meridian_dig_source_put,
  493. };
  494. static int generic_mixer_init(struct oxygen *chip)
  495. {
  496. return snd_ctl_add(chip->card, snd_ctl_new1(&rolloff_control, chip));
  497. }
  498. static int generic_wm8785_mixer_init(struct oxygen *chip)
  499. {
  500. int err;
  501. err = generic_mixer_init(chip);
  502. if (err < 0)
  503. return err;
  504. err = snd_ctl_add(chip->card, snd_ctl_new1(&hpf_control, chip));
  505. if (err < 0)
  506. return err;
  507. return 0;
  508. }
  509. static int meridian_mixer_init(struct oxygen *chip)
  510. {
  511. int err;
  512. err = generic_mixer_init(chip);
  513. if (err < 0)
  514. return err;
  515. err = snd_ctl_add(chip->card,
  516. snd_ctl_new1(&meridian_dig_source_control, chip));
  517. if (err < 0)
  518. return err;
  519. return 0;
  520. }
  521. static void dump_ak4396_registers(struct oxygen *chip,
  522. struct snd_info_buffer *buffer)
  523. {
  524. struct generic_data *data = chip->model_data;
  525. unsigned int dac, i;
  526. for (dac = 0; dac < data->dacs; ++dac) {
  527. snd_iprintf(buffer, "\nAK4396 %u:", dac + 1);
  528. for (i = 0; i < 5; ++i)
  529. snd_iprintf(buffer, " %02x", data->ak4396_regs[dac][i]);
  530. }
  531. snd_iprintf(buffer, "\n");
  532. }
  533. static void dump_wm8785_registers(struct oxygen *chip,
  534. struct snd_info_buffer *buffer)
  535. {
  536. struct generic_data *data = chip->model_data;
  537. unsigned int i;
  538. snd_iprintf(buffer, "\nWM8785:");
  539. for (i = 0; i < 3; ++i)
  540. snd_iprintf(buffer, " %03x", data->wm8785_regs[i]);
  541. snd_iprintf(buffer, "\n");
  542. }
  543. static void dump_oxygen_registers(struct oxygen *chip,
  544. struct snd_info_buffer *buffer)
  545. {
  546. dump_ak4396_registers(chip, buffer);
  547. dump_wm8785_registers(chip, buffer);
  548. }
  549. static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0);
  550. static const struct oxygen_model model_generic = {
  551. .shortname = "C-Media CMI8788",
  552. .longname = "C-Media Oxygen HD Audio",
  553. .chip = "CMI8788",
  554. .init = generic_init,
  555. .mixer_init = generic_wm8785_mixer_init,
  556. .cleanup = generic_cleanup,
  557. .resume = generic_resume,
  558. .set_dac_params = set_ak4396_params,
  559. .set_adc_params = set_wm8785_params,
  560. .update_dac_volume = update_ak4396_volume,
  561. .update_dac_mute = update_ak4396_mute,
  562. .dump_registers = dump_oxygen_registers,
  563. .dac_tlv = ak4396_db_scale,
  564. .model_data_size = sizeof(struct generic_data),
  565. .device_config = PLAYBACK_0_TO_I2S |
  566. PLAYBACK_1_TO_SPDIF |
  567. PLAYBACK_2_TO_AC97_1 |
  568. CAPTURE_0_FROM_I2S_1 |
  569. CAPTURE_1_FROM_SPDIF |
  570. CAPTURE_2_FROM_AC97_1 |
  571. AC97_CD_INPUT,
  572. .dac_channels_pcm = 8,
  573. .dac_channels_mixer = 8,
  574. .dac_volume_min = 0,
  575. .dac_volume_max = 255,
  576. .function_flags = OXYGEN_FUNCTION_SPI |
  577. OXYGEN_FUNCTION_ENABLE_SPI_4_5,
  578. .dac_mclks = OXYGEN_MCLKS(256, 128, 128),
  579. .adc_mclks = OXYGEN_MCLKS(256, 256, 128),
  580. .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  581. .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  582. };
  583. static int __devinit get_oxygen_model(struct oxygen *chip,
  584. const struct pci_device_id *id)
  585. {
  586. static const char *const names[] = {
  587. [MODEL_MERIDIAN] = "AuzenTech X-Meridian",
  588. [MODEL_MERIDIAN_2G] = "AuzenTech X-Meridian 2G",
  589. [MODEL_CLARO] = "HT-Omega Claro",
  590. [MODEL_CLARO_HALO] = "HT-Omega Claro halo",
  591. [MODEL_FANTASIA] = "TempoTec HiFier Fantasia",
  592. [MODEL_SERENADE] = "TempoTec HiFier Serenade",
  593. [MODEL_HG2PCI] = "CMI8787-HG2PCI",
  594. };
  595. chip->model = model_generic;
  596. switch (id->driver_data) {
  597. case MODEL_MERIDIAN:
  598. case MODEL_MERIDIAN_2G:
  599. chip->model.init = meridian_init;
  600. chip->model.mixer_init = meridian_mixer_init;
  601. chip->model.resume = meridian_resume;
  602. chip->model.set_adc_params = set_ak5385_params;
  603. chip->model.dump_registers = dump_ak4396_registers;
  604. chip->model.device_config = PLAYBACK_0_TO_I2S |
  605. PLAYBACK_1_TO_SPDIF |
  606. CAPTURE_0_FROM_I2S_2 |
  607. CAPTURE_1_FROM_SPDIF;
  608. if (id->driver_data == MODEL_MERIDIAN)
  609. chip->model.device_config |= AC97_CD_INPUT;
  610. break;
  611. case MODEL_CLARO:
  612. chip->model.init = claro_init;
  613. chip->model.cleanup = claro_cleanup;
  614. chip->model.suspend = claro_suspend;
  615. chip->model.resume = claro_resume;
  616. break;
  617. case MODEL_CLARO_HALO:
  618. chip->model.init = claro_halo_init;
  619. chip->model.mixer_init = generic_mixer_init;
  620. chip->model.cleanup = claro_cleanup;
  621. chip->model.suspend = claro_suspend;
  622. chip->model.resume = claro_resume;
  623. chip->model.set_adc_params = set_ak5385_params;
  624. chip->model.dump_registers = dump_ak4396_registers;
  625. chip->model.device_config = PLAYBACK_0_TO_I2S |
  626. PLAYBACK_1_TO_SPDIF |
  627. CAPTURE_0_FROM_I2S_2 |
  628. CAPTURE_1_FROM_SPDIF;
  629. break;
  630. case MODEL_FANTASIA:
  631. case MODEL_SERENADE:
  632. case MODEL_2CH_OUTPUT:
  633. case MODEL_HG2PCI:
  634. chip->model.shortname = "C-Media CMI8787";
  635. chip->model.chip = "CMI8787";
  636. if (id->driver_data == MODEL_FANTASIA)
  637. chip->model.init = fantasia_init;
  638. else
  639. chip->model.init = stereo_output_init;
  640. chip->model.resume = stereo_resume;
  641. chip->model.mixer_init = generic_mixer_init;
  642. chip->model.set_adc_params = set_no_params;
  643. chip->model.dump_registers = dump_ak4396_registers;
  644. chip->model.device_config = PLAYBACK_0_TO_I2S |
  645. PLAYBACK_1_TO_SPDIF;
  646. if (id->driver_data == MODEL_FANTASIA) {
  647. chip->model.device_config |= CAPTURE_0_FROM_I2S_1;
  648. chip->model.adc_mclks = OXYGEN_MCLKS(256, 128, 128);
  649. }
  650. chip->model.dac_channels_pcm = 2;
  651. chip->model.dac_channels_mixer = 2;
  652. break;
  653. case MODEL_XONAR_DG:
  654. chip->model = model_xonar_dg;
  655. break;
  656. }
  657. if (id->driver_data == MODEL_MERIDIAN ||
  658. id->driver_data == MODEL_MERIDIAN_2G ||
  659. id->driver_data == MODEL_CLARO_HALO) {
  660. chip->model.misc_flags = OXYGEN_MISC_MIDI;
  661. chip->model.device_config |= MIDI_OUTPUT | MIDI_INPUT;
  662. }
  663. if (id->driver_data < ARRAY_SIZE(names) && names[id->driver_data])
  664. chip->model.shortname = names[id->driver_data];
  665. return 0;
  666. }
  667. static int __devinit generic_oxygen_probe(struct pci_dev *pci,
  668. const struct pci_device_id *pci_id)
  669. {
  670. static int dev;
  671. int err;
  672. if (dev >= SNDRV_CARDS)
  673. return -ENODEV;
  674. if (!enable[dev]) {
  675. ++dev;
  676. return -ENOENT;
  677. }
  678. err = oxygen_pci_probe(pci, index[dev], id[dev], THIS_MODULE,
  679. oxygen_ids, get_oxygen_model);
  680. if (err >= 0)
  681. ++dev;
  682. return err;
  683. }
  684. static struct pci_driver oxygen_driver = {
  685. .name = "CMI8788",
  686. .id_table = oxygen_ids,
  687. .probe = generic_oxygen_probe,
  688. .remove = __devexit_p(oxygen_pci_remove),
  689. #ifdef CONFIG_PM
  690. .suspend = oxygen_pci_suspend,
  691. .resume = oxygen_pci_resume,
  692. #endif
  693. };
  694. static int __init alsa_card_oxygen_init(void)
  695. {
  696. return pci_register_driver(&oxygen_driver);
  697. }
  698. static void __exit alsa_card_oxygen_exit(void)
  699. {
  700. pci_unregister_driver(&oxygen_driver);
  701. }
  702. module_init(alsa_card_oxygen_init)
  703. module_exit(alsa_card_oxygen_exit)