atmel_lcdfb.c 28 KB

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  1. /*
  2. * Driver for AT91/AT32 LCD Controller
  3. *
  4. * Copyright (C) 2007 Atmel Corporation
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file COPYING in the main directory of this archive for
  8. * more details.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/dma-mapping.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/clk.h>
  15. #include <linux/fb.h>
  16. #include <linux/init.h>
  17. #include <linux/delay.h>
  18. #include <linux/backlight.h>
  19. #include <asm/arch/board.h>
  20. #include <asm/arch/cpu.h>
  21. #include <asm/arch/gpio.h>
  22. #include <video/atmel_lcdc.h>
  23. #define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg))
  24. #define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg))
  25. /* configurable parameters */
  26. #define ATMEL_LCDC_CVAL_DEFAULT 0xc8
  27. #define ATMEL_LCDC_DMA_BURST_LEN 8
  28. #if defined(CONFIG_ARCH_AT91SAM9263) || defined(CONFIG_ARCH_AT91CAP9) || \
  29. defined(CONFIG_ARCH_AT91SAM9RL)
  30. #define ATMEL_LCDC_FIFO_SIZE 2048
  31. #else
  32. #define ATMEL_LCDC_FIFO_SIZE 512
  33. #endif
  34. #if defined(CONFIG_ARCH_AT91)
  35. #define ATMEL_LCDFB_FBINFO_DEFAULT FBINFO_DEFAULT
  36. static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
  37. struct fb_var_screeninfo *var)
  38. {
  39. }
  40. #elif defined(CONFIG_AVR32)
  41. #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
  42. | FBINFO_PARTIAL_PAN_OK \
  43. | FBINFO_HWACCEL_XPAN \
  44. | FBINFO_HWACCEL_YPAN)
  45. static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
  46. struct fb_var_screeninfo *var)
  47. {
  48. u32 dma2dcfg;
  49. u32 pixeloff;
  50. pixeloff = (var->xoffset * var->bits_per_pixel) & 0x1f;
  51. dma2dcfg = ((var->xres_virtual - var->xres) * var->bits_per_pixel) / 8;
  52. dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET;
  53. lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg);
  54. /* Update configuration */
  55. lcdc_writel(sinfo, ATMEL_LCDC_DMACON,
  56. lcdc_readl(sinfo, ATMEL_LCDC_DMACON)
  57. | ATMEL_LCDC_DMAUPDT);
  58. }
  59. #endif
  60. static const u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
  61. | ATMEL_LCDC_POL_POSITIVE
  62. | ATMEL_LCDC_ENA_PWMENABLE;
  63. #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
  64. /* some bl->props field just changed */
  65. static int atmel_bl_update_status(struct backlight_device *bl)
  66. {
  67. struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
  68. int power = sinfo->bl_power;
  69. int brightness = bl->props.brightness;
  70. /* REVISIT there may be a meaningful difference between
  71. * fb_blank and power ... there seem to be some cases
  72. * this doesn't handle correctly.
  73. */
  74. if (bl->props.fb_blank != sinfo->bl_power)
  75. power = bl->props.fb_blank;
  76. else if (bl->props.power != sinfo->bl_power)
  77. power = bl->props.power;
  78. if (brightness < 0 && power == FB_BLANK_UNBLANK)
  79. brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
  80. else if (power != FB_BLANK_UNBLANK)
  81. brightness = 0;
  82. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);
  83. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
  84. brightness ? contrast_ctr : 0);
  85. bl->props.fb_blank = bl->props.power = sinfo->bl_power = power;
  86. return 0;
  87. }
  88. static int atmel_bl_get_brightness(struct backlight_device *bl)
  89. {
  90. struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
  91. return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
  92. }
  93. static struct backlight_ops atmel_lcdc_bl_ops = {
  94. .update_status = atmel_bl_update_status,
  95. .get_brightness = atmel_bl_get_brightness,
  96. };
  97. static void init_backlight(struct atmel_lcdfb_info *sinfo)
  98. {
  99. struct backlight_device *bl;
  100. sinfo->bl_power = FB_BLANK_UNBLANK;
  101. if (sinfo->backlight)
  102. return;
  103. bl = backlight_device_register("backlight", &sinfo->pdev->dev,
  104. sinfo, &atmel_lcdc_bl_ops);
  105. if (IS_ERR(sinfo->backlight)) {
  106. dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",
  107. PTR_ERR(bl));
  108. return;
  109. }
  110. sinfo->backlight = bl;
  111. bl->props.power = FB_BLANK_UNBLANK;
  112. bl->props.fb_blank = FB_BLANK_UNBLANK;
  113. bl->props.max_brightness = 0xff;
  114. bl->props.brightness = atmel_bl_get_brightness(bl);
  115. }
  116. static void exit_backlight(struct atmel_lcdfb_info *sinfo)
  117. {
  118. if (sinfo->backlight)
  119. backlight_device_unregister(sinfo->backlight);
  120. }
  121. #else
  122. static void init_backlight(struct atmel_lcdfb_info *sinfo)
  123. {
  124. dev_warn(&sinfo->pdev->dev, "backlight control is not available\n");
  125. }
  126. static void exit_backlight(struct atmel_lcdfb_info *sinfo)
  127. {
  128. }
  129. #endif
  130. static void init_contrast(struct atmel_lcdfb_info *sinfo)
  131. {
  132. /* have some default contrast/backlight settings */
  133. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
  134. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
  135. if (sinfo->lcdcon_is_backlight)
  136. init_backlight(sinfo);
  137. }
  138. static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
  139. .type = FB_TYPE_PACKED_PIXELS,
  140. .visual = FB_VISUAL_TRUECOLOR,
  141. .xpanstep = 0,
  142. .ypanstep = 0,
  143. .ywrapstep = 0,
  144. .accel = FB_ACCEL_NONE,
  145. };
  146. static unsigned long compute_hozval(unsigned long xres, unsigned long lcdcon2)
  147. {
  148. unsigned long value;
  149. if (!(cpu_is_at91sam9261() || cpu_is_at32ap7000()))
  150. return xres;
  151. value = xres;
  152. if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {
  153. /* STN display */
  154. if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) {
  155. value *= 3;
  156. }
  157. if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4
  158. || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8
  159. && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL ))
  160. value = DIV_ROUND_UP(value, 4);
  161. else
  162. value = DIV_ROUND_UP(value, 8);
  163. }
  164. return value;
  165. }
  166. static void atmel_lcdfb_update_dma(struct fb_info *info,
  167. struct fb_var_screeninfo *var)
  168. {
  169. struct atmel_lcdfb_info *sinfo = info->par;
  170. struct fb_fix_screeninfo *fix = &info->fix;
  171. unsigned long dma_addr;
  172. dma_addr = (fix->smem_start + var->yoffset * fix->line_length
  173. + var->xoffset * var->bits_per_pixel / 8);
  174. dma_addr &= ~3UL;
  175. /* Set framebuffer DMA base address and pixel offset */
  176. lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
  177. atmel_lcdfb_update_dma2d(sinfo, var);
  178. }
  179. static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
  180. {
  181. struct fb_info *info = sinfo->info;
  182. dma_free_writecombine(info->device, info->fix.smem_len,
  183. info->screen_base, info->fix.smem_start);
  184. }
  185. /**
  186. * atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
  187. * @sinfo: the frame buffer to allocate memory for
  188. */
  189. static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
  190. {
  191. struct fb_info *info = sinfo->info;
  192. struct fb_var_screeninfo *var = &info->var;
  193. info->fix.smem_len = (var->xres_virtual * var->yres_virtual
  194. * ((var->bits_per_pixel + 7) / 8));
  195. info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len,
  196. (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL);
  197. if (!info->screen_base) {
  198. return -ENOMEM;
  199. }
  200. memset(info->screen_base, 0, info->fix.smem_len);
  201. return 0;
  202. }
  203. /**
  204. * atmel_lcdfb_check_var - Validates a var passed in.
  205. * @var: frame buffer variable screen structure
  206. * @info: frame buffer structure that represents a single frame buffer
  207. *
  208. * Checks to see if the hardware supports the state requested by
  209. * var passed in. This function does not alter the hardware
  210. * state!!! This means the data stored in struct fb_info and
  211. * struct atmel_lcdfb_info do not change. This includes the var
  212. * inside of struct fb_info. Do NOT change these. This function
  213. * can be called on its own if we intent to only test a mode and
  214. * not actually set it. The stuff in modedb.c is a example of
  215. * this. If the var passed in is slightly off by what the
  216. * hardware can support then we alter the var PASSED in to what
  217. * we can do. If the hardware doesn't support mode change a
  218. * -EINVAL will be returned by the upper layers. You don't need
  219. * to implement this function then. If you hardware doesn't
  220. * support changing the resolution then this function is not
  221. * needed. In this case the driver would just provide a var that
  222. * represents the static state the screen is in.
  223. *
  224. * Returns negative errno on error, or zero on success.
  225. */
  226. static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
  227. struct fb_info *info)
  228. {
  229. struct device *dev = info->device;
  230. struct atmel_lcdfb_info *sinfo = info->par;
  231. unsigned long clk_value_khz;
  232. clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
  233. dev_dbg(dev, "%s:\n", __func__);
  234. dev_dbg(dev, " resolution: %ux%u\n", var->xres, var->yres);
  235. dev_dbg(dev, " pixclk: %lu KHz\n", PICOS2KHZ(var->pixclock));
  236. dev_dbg(dev, " bpp: %u\n", var->bits_per_pixel);
  237. dev_dbg(dev, " clk: %lu KHz\n", clk_value_khz);
  238. if ((PICOS2KHZ(var->pixclock) * var->bits_per_pixel / 8) > clk_value_khz) {
  239. dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
  240. return -EINVAL;
  241. }
  242. /* Force same alignment for each line */
  243. var->xres = (var->xres + 3) & ~3UL;
  244. var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
  245. var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
  246. var->transp.msb_right = 0;
  247. var->transp.offset = var->transp.length = 0;
  248. var->xoffset = var->yoffset = 0;
  249. /* Saturate vertical and horizontal timings at maximum values */
  250. var->vsync_len = min_t(u32, var->vsync_len,
  251. (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
  252. var->upper_margin = min_t(u32, var->upper_margin,
  253. ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
  254. var->lower_margin = min_t(u32, var->lower_margin,
  255. ATMEL_LCDC_VFP);
  256. var->right_margin = min_t(u32, var->right_margin,
  257. (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
  258. var->hsync_len = min_t(u32, var->hsync_len,
  259. (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
  260. var->left_margin = min_t(u32, var->left_margin,
  261. ATMEL_LCDC_HBP + 1);
  262. /* Some parameters can't be zero */
  263. var->vsync_len = max_t(u32, var->vsync_len, 1);
  264. var->right_margin = max_t(u32, var->right_margin, 1);
  265. var->hsync_len = max_t(u32, var->hsync_len, 1);
  266. var->left_margin = max_t(u32, var->left_margin, 1);
  267. switch (var->bits_per_pixel) {
  268. case 1:
  269. case 2:
  270. case 4:
  271. case 8:
  272. var->red.offset = var->green.offset = var->blue.offset = 0;
  273. var->red.length = var->green.length = var->blue.length
  274. = var->bits_per_pixel;
  275. break;
  276. case 15:
  277. case 16:
  278. if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
  279. /* RGB:565 mode */
  280. var->red.offset = 11;
  281. var->blue.offset = 0;
  282. var->green.length = 6;
  283. } else {
  284. /* BGR:555 mode */
  285. var->red.offset = 0;
  286. var->blue.offset = 10;
  287. var->green.length = 5;
  288. }
  289. var->green.offset = 5;
  290. var->red.length = var->blue.length = 5;
  291. break;
  292. case 32:
  293. var->transp.offset = 24;
  294. var->transp.length = 8;
  295. /* fall through */
  296. case 24:
  297. if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
  298. /* RGB:888 mode */
  299. var->red.offset = 16;
  300. var->blue.offset = 0;
  301. } else {
  302. /* BGR:888 mode */
  303. var->red.offset = 0;
  304. var->blue.offset = 16;
  305. }
  306. var->green.offset = 8;
  307. var->red.length = var->green.length = var->blue.length = 8;
  308. break;
  309. default:
  310. dev_err(dev, "color depth %d not supported\n",
  311. var->bits_per_pixel);
  312. return -EINVAL;
  313. }
  314. return 0;
  315. }
  316. /**
  317. * atmel_lcdfb_set_par - Alters the hardware state.
  318. * @info: frame buffer structure that represents a single frame buffer
  319. *
  320. * Using the fb_var_screeninfo in fb_info we set the resolution
  321. * of the this particular framebuffer. This function alters the
  322. * par AND the fb_fix_screeninfo stored in fb_info. It doesn't
  323. * not alter var in fb_info since we are using that data. This
  324. * means we depend on the data in var inside fb_info to be
  325. * supported by the hardware. atmel_lcdfb_check_var is always called
  326. * before atmel_lcdfb_set_par to ensure this. Again if you can't
  327. * change the resolution you don't need this function.
  328. *
  329. */
  330. static int atmel_lcdfb_set_par(struct fb_info *info)
  331. {
  332. struct atmel_lcdfb_info *sinfo = info->par;
  333. unsigned long hozval_linesz;
  334. unsigned long value;
  335. unsigned long clk_value_khz;
  336. unsigned long bits_per_line;
  337. dev_dbg(info->device, "%s:\n", __func__);
  338. dev_dbg(info->device, " * resolution: %ux%u (%ux%u virtual)\n",
  339. info->var.xres, info->var.yres,
  340. info->var.xres_virtual, info->var.yres_virtual);
  341. /* Turn off the LCD controller and the DMA controller */
  342. lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
  343. /* Wait for the LCDC core to become idle */
  344. while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
  345. msleep(10);
  346. lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
  347. if (info->var.bits_per_pixel == 1)
  348. info->fix.visual = FB_VISUAL_MONO01;
  349. else if (info->var.bits_per_pixel <= 8)
  350. info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
  351. else
  352. info->fix.visual = FB_VISUAL_TRUECOLOR;
  353. bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel;
  354. info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8);
  355. /* Re-initialize the DMA engine... */
  356. dev_dbg(info->device, " * update DMA engine\n");
  357. atmel_lcdfb_update_dma(info, &info->var);
  358. /* ...set frame size and burst length = 8 words (?) */
  359. value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
  360. value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
  361. lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
  362. /* Now, the LCDC core... */
  363. /* Set pixel clock */
  364. clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
  365. value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
  366. value = (value / 2) - 1;
  367. dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n", value);
  368. if (value <= 0) {
  369. dev_notice(info->device, "Bypassing pixel clock divider\n");
  370. lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
  371. } else {
  372. lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, value << ATMEL_LCDC_CLKVAL_OFFSET);
  373. info->var.pixclock = KHZ2PICOS(clk_value_khz / (2 * (value + 1)));
  374. dev_dbg(info->device, " updated pixclk: %lu KHz\n",
  375. PICOS2KHZ(info->var.pixclock));
  376. }
  377. /* Initialize control register 2 */
  378. value = sinfo->default_lcdcon2;
  379. if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
  380. value |= ATMEL_LCDC_INVLINE_INVERTED;
  381. if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
  382. value |= ATMEL_LCDC_INVFRAME_INVERTED;
  383. switch (info->var.bits_per_pixel) {
  384. case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break;
  385. case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
  386. case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
  387. case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
  388. case 15: /* fall through */
  389. case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
  390. case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
  391. case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
  392. default: BUG(); break;
  393. }
  394. dev_dbg(info->device, " * LCDCON2 = %08lx\n", value);
  395. lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
  396. /* Vertical timing */
  397. value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
  398. value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
  399. value |= info->var.lower_margin;
  400. dev_dbg(info->device, " * LCDTIM1 = %08lx\n", value);
  401. lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
  402. /* Horizontal timing */
  403. value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
  404. value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
  405. value |= (info->var.left_margin - 1);
  406. dev_dbg(info->device, " * LCDTIM2 = %08lx\n", value);
  407. lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
  408. /* Horizontal value (aka line size) */
  409. hozval_linesz = compute_hozval(info->var.xres,
  410. lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2));
  411. /* Display size */
  412. value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
  413. value |= info->var.yres - 1;
  414. dev_dbg(info->device, " * LCDFRMCFG = %08lx\n", value);
  415. lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
  416. /* FIFO Threshold: Use formula from data sheet */
  417. value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
  418. lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
  419. /* Toggle LCD_MODE every frame */
  420. lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
  421. /* Disable all interrupts */
  422. lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
  423. /* ...wait for DMA engine to become idle... */
  424. while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
  425. msleep(10);
  426. dev_dbg(info->device, " * re-enable DMA engine\n");
  427. /* ...and enable it with updated configuration */
  428. lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
  429. dev_dbg(info->device, " * re-enable LCDC core\n");
  430. lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
  431. (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET) | ATMEL_LCDC_PWR);
  432. dev_dbg(info->device, " * DONE\n");
  433. return 0;
  434. }
  435. static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)
  436. {
  437. chan &= 0xffff;
  438. chan >>= 16 - bf->length;
  439. return chan << bf->offset;
  440. }
  441. /**
  442. * atmel_lcdfb_setcolreg - Optional function. Sets a color register.
  443. * @regno: Which register in the CLUT we are programming
  444. * @red: The red value which can be up to 16 bits wide
  445. * @green: The green value which can be up to 16 bits wide
  446. * @blue: The blue value which can be up to 16 bits wide.
  447. * @transp: If supported the alpha value which can be up to 16 bits wide.
  448. * @info: frame buffer info structure
  449. *
  450. * Set a single color register. The values supplied have a 16 bit
  451. * magnitude which needs to be scaled in this function for the hardware.
  452. * Things to take into consideration are how many color registers, if
  453. * any, are supported with the current color visual. With truecolor mode
  454. * no color palettes are supported. Here a psuedo palette is created
  455. * which we store the value in pseudo_palette in struct fb_info. For
  456. * pseudocolor mode we have a limited color palette. To deal with this
  457. * we can program what color is displayed for a particular pixel value.
  458. * DirectColor is similar in that we can program each color field. If
  459. * we have a static colormap we don't need to implement this function.
  460. *
  461. * Returns negative errno on error, or zero on success. In an
  462. * ideal world, this would have been the case, but as it turns
  463. * out, the other drivers return 1 on failure, so that's what
  464. * we're going to do.
  465. */
  466. static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
  467. unsigned int green, unsigned int blue,
  468. unsigned int transp, struct fb_info *info)
  469. {
  470. struct atmel_lcdfb_info *sinfo = info->par;
  471. unsigned int val;
  472. u32 *pal;
  473. int ret = 1;
  474. if (info->var.grayscale)
  475. red = green = blue = (19595 * red + 38470 * green
  476. + 7471 * blue) >> 16;
  477. switch (info->fix.visual) {
  478. case FB_VISUAL_TRUECOLOR:
  479. if (regno < 16) {
  480. pal = info->pseudo_palette;
  481. val = chan_to_field(red, &info->var.red);
  482. val |= chan_to_field(green, &info->var.green);
  483. val |= chan_to_field(blue, &info->var.blue);
  484. pal[regno] = val;
  485. ret = 0;
  486. }
  487. break;
  488. case FB_VISUAL_PSEUDOCOLOR:
  489. if (regno < 256) {
  490. val = ((red >> 11) & 0x001f);
  491. val |= ((green >> 6) & 0x03e0);
  492. val |= ((blue >> 1) & 0x7c00);
  493. /*
  494. * TODO: intensity bit. Maybe something like
  495. * ~(red[10] ^ green[10] ^ blue[10]) & 1
  496. */
  497. lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
  498. ret = 0;
  499. }
  500. break;
  501. case FB_VISUAL_MONO01:
  502. if (regno < 2) {
  503. val = (regno == 0) ? 0x00 : 0x1F;
  504. lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
  505. ret = 0;
  506. }
  507. break;
  508. }
  509. return ret;
  510. }
  511. static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
  512. struct fb_info *info)
  513. {
  514. dev_dbg(info->device, "%s\n", __func__);
  515. atmel_lcdfb_update_dma(info, var);
  516. return 0;
  517. }
  518. static struct fb_ops atmel_lcdfb_ops = {
  519. .owner = THIS_MODULE,
  520. .fb_check_var = atmel_lcdfb_check_var,
  521. .fb_set_par = atmel_lcdfb_set_par,
  522. .fb_setcolreg = atmel_lcdfb_setcolreg,
  523. .fb_pan_display = atmel_lcdfb_pan_display,
  524. .fb_fillrect = cfb_fillrect,
  525. .fb_copyarea = cfb_copyarea,
  526. .fb_imageblit = cfb_imageblit,
  527. };
  528. static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
  529. {
  530. struct fb_info *info = dev_id;
  531. struct atmel_lcdfb_info *sinfo = info->par;
  532. u32 status;
  533. status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
  534. lcdc_writel(sinfo, ATMEL_LCDC_IDR, status);
  535. return IRQ_HANDLED;
  536. }
  537. static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
  538. {
  539. struct fb_info *info = sinfo->info;
  540. int ret = 0;
  541. info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
  542. dev_info(info->device,
  543. "%luKiB frame buffer at %08lx (mapped at %p)\n",
  544. (unsigned long)info->fix.smem_len / 1024,
  545. (unsigned long)info->fix.smem_start,
  546. info->screen_base);
  547. /* Allocate colormap */
  548. ret = fb_alloc_cmap(&info->cmap, 256, 0);
  549. if (ret < 0)
  550. dev_err(info->device, "Alloc color map failed\n");
  551. return ret;
  552. }
  553. static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
  554. {
  555. if (sinfo->bus_clk)
  556. clk_enable(sinfo->bus_clk);
  557. clk_enable(sinfo->lcdc_clk);
  558. }
  559. static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
  560. {
  561. if (sinfo->bus_clk)
  562. clk_disable(sinfo->bus_clk);
  563. clk_disable(sinfo->lcdc_clk);
  564. }
  565. static int __init atmel_lcdfb_probe(struct platform_device *pdev)
  566. {
  567. struct device *dev = &pdev->dev;
  568. struct fb_info *info;
  569. struct atmel_lcdfb_info *sinfo;
  570. struct atmel_lcdfb_info *pdata_sinfo;
  571. struct resource *regs = NULL;
  572. struct resource *map = NULL;
  573. int ret;
  574. dev_dbg(dev, "%s BEGIN\n", __func__);
  575. ret = -ENOMEM;
  576. info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
  577. if (!info) {
  578. dev_err(dev, "cannot allocate memory\n");
  579. goto out;
  580. }
  581. sinfo = info->par;
  582. if (dev->platform_data) {
  583. pdata_sinfo = (struct atmel_lcdfb_info *)dev->platform_data;
  584. sinfo->default_bpp = pdata_sinfo->default_bpp;
  585. sinfo->default_dmacon = pdata_sinfo->default_dmacon;
  586. sinfo->default_lcdcon2 = pdata_sinfo->default_lcdcon2;
  587. sinfo->default_monspecs = pdata_sinfo->default_monspecs;
  588. sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control;
  589. sinfo->guard_time = pdata_sinfo->guard_time;
  590. sinfo->lcdcon_is_backlight = pdata_sinfo->lcdcon_is_backlight;
  591. sinfo->lcd_wiring_mode = pdata_sinfo->lcd_wiring_mode;
  592. } else {
  593. dev_err(dev, "cannot get default configuration\n");
  594. goto free_info;
  595. }
  596. sinfo->info = info;
  597. sinfo->pdev = pdev;
  598. strcpy(info->fix.id, sinfo->pdev->name);
  599. info->flags = ATMEL_LCDFB_FBINFO_DEFAULT;
  600. info->pseudo_palette = sinfo->pseudo_palette;
  601. info->fbops = &atmel_lcdfb_ops;
  602. memcpy(&info->monspecs, sinfo->default_monspecs, sizeof(info->monspecs));
  603. info->fix = atmel_lcdfb_fix;
  604. /* Enable LCDC Clocks */
  605. if (cpu_is_at91sam9261() || cpu_is_at32ap7000()) {
  606. sinfo->bus_clk = clk_get(dev, "hck1");
  607. if (IS_ERR(sinfo->bus_clk)) {
  608. ret = PTR_ERR(sinfo->bus_clk);
  609. goto free_info;
  610. }
  611. }
  612. sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
  613. if (IS_ERR(sinfo->lcdc_clk)) {
  614. ret = PTR_ERR(sinfo->lcdc_clk);
  615. goto put_bus_clk;
  616. }
  617. atmel_lcdfb_start_clock(sinfo);
  618. ret = fb_find_mode(&info->var, info, NULL, info->monspecs.modedb,
  619. info->monspecs.modedb_len, info->monspecs.modedb,
  620. sinfo->default_bpp);
  621. if (!ret) {
  622. dev_err(dev, "no suitable video mode found\n");
  623. goto stop_clk;
  624. }
  625. regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  626. if (!regs) {
  627. dev_err(dev, "resources unusable\n");
  628. ret = -ENXIO;
  629. goto stop_clk;
  630. }
  631. sinfo->irq_base = platform_get_irq(pdev, 0);
  632. if (sinfo->irq_base < 0) {
  633. dev_err(dev, "unable to get irq\n");
  634. ret = sinfo->irq_base;
  635. goto stop_clk;
  636. }
  637. /* Initialize video memory */
  638. map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  639. if (map) {
  640. /* use a pre-allocated memory buffer */
  641. info->fix.smem_start = map->start;
  642. info->fix.smem_len = map->end - map->start + 1;
  643. if (!request_mem_region(info->fix.smem_start,
  644. info->fix.smem_len, pdev->name)) {
  645. ret = -EBUSY;
  646. goto stop_clk;
  647. }
  648. info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
  649. if (!info->screen_base)
  650. goto release_intmem;
  651. /*
  652. * Don't clear the framebuffer -- someone may have set
  653. * up a splash image.
  654. */
  655. } else {
  656. /* alocate memory buffer */
  657. ret = atmel_lcdfb_alloc_video_memory(sinfo);
  658. if (ret < 0) {
  659. dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
  660. goto stop_clk;
  661. }
  662. }
  663. /* LCDC registers */
  664. info->fix.mmio_start = regs->start;
  665. info->fix.mmio_len = regs->end - regs->start + 1;
  666. if (!request_mem_region(info->fix.mmio_start,
  667. info->fix.mmio_len, pdev->name)) {
  668. ret = -EBUSY;
  669. goto free_fb;
  670. }
  671. sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
  672. if (!sinfo->mmio) {
  673. dev_err(dev, "cannot map LCDC registers\n");
  674. goto release_mem;
  675. }
  676. /* Initialize PWM for contrast or backlight ("off") */
  677. init_contrast(sinfo);
  678. /* interrupt */
  679. ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
  680. if (ret) {
  681. dev_err(dev, "request_irq failed: %d\n", ret);
  682. goto unmap_mmio;
  683. }
  684. ret = atmel_lcdfb_init_fbinfo(sinfo);
  685. if (ret < 0) {
  686. dev_err(dev, "init fbinfo failed: %d\n", ret);
  687. goto unregister_irqs;
  688. }
  689. /*
  690. * This makes sure that our colour bitfield
  691. * descriptors are correctly initialised.
  692. */
  693. atmel_lcdfb_check_var(&info->var, info);
  694. ret = fb_set_var(info, &info->var);
  695. if (ret) {
  696. dev_warn(dev, "unable to set display parameters\n");
  697. goto free_cmap;
  698. }
  699. dev_set_drvdata(dev, info);
  700. /*
  701. * Tell the world that we're ready to go
  702. */
  703. ret = register_framebuffer(info);
  704. if (ret < 0) {
  705. dev_err(dev, "failed to register framebuffer device: %d\n", ret);
  706. goto free_cmap;
  707. }
  708. /* Power up the LCDC screen */
  709. if (sinfo->atmel_lcdfb_power_control)
  710. sinfo->atmel_lcdfb_power_control(1);
  711. dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %lu\n",
  712. info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
  713. return 0;
  714. free_cmap:
  715. fb_dealloc_cmap(&info->cmap);
  716. unregister_irqs:
  717. free_irq(sinfo->irq_base, info);
  718. unmap_mmio:
  719. exit_backlight(sinfo);
  720. iounmap(sinfo->mmio);
  721. release_mem:
  722. release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
  723. free_fb:
  724. if (map)
  725. iounmap(info->screen_base);
  726. else
  727. atmel_lcdfb_free_video_memory(sinfo);
  728. release_intmem:
  729. if (map)
  730. release_mem_region(info->fix.smem_start, info->fix.smem_len);
  731. stop_clk:
  732. atmel_lcdfb_stop_clock(sinfo);
  733. clk_put(sinfo->lcdc_clk);
  734. put_bus_clk:
  735. if (sinfo->bus_clk)
  736. clk_put(sinfo->bus_clk);
  737. free_info:
  738. framebuffer_release(info);
  739. out:
  740. dev_dbg(dev, "%s FAILED\n", __func__);
  741. return ret;
  742. }
  743. static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
  744. {
  745. struct device *dev = &pdev->dev;
  746. struct fb_info *info = dev_get_drvdata(dev);
  747. struct atmel_lcdfb_info *sinfo = info->par;
  748. if (!sinfo)
  749. return 0;
  750. exit_backlight(sinfo);
  751. if (sinfo->atmel_lcdfb_power_control)
  752. sinfo->atmel_lcdfb_power_control(0);
  753. unregister_framebuffer(info);
  754. atmel_lcdfb_stop_clock(sinfo);
  755. clk_put(sinfo->lcdc_clk);
  756. if (sinfo->bus_clk)
  757. clk_put(sinfo->bus_clk);
  758. fb_dealloc_cmap(&info->cmap);
  759. free_irq(sinfo->irq_base, info);
  760. iounmap(sinfo->mmio);
  761. release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
  762. if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
  763. iounmap(info->screen_base);
  764. release_mem_region(info->fix.smem_start, info->fix.smem_len);
  765. } else {
  766. atmel_lcdfb_free_video_memory(sinfo);
  767. }
  768. dev_set_drvdata(dev, NULL);
  769. framebuffer_release(info);
  770. return 0;
  771. }
  772. #ifdef CONFIG_PM
  773. static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg)
  774. {
  775. struct fb_info *info = platform_get_drvdata(pdev);
  776. struct atmel_lcdfb_info *sinfo = info->par;
  777. sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
  778. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0);
  779. if (sinfo->atmel_lcdfb_power_control)
  780. sinfo->atmel_lcdfb_power_control(0);
  781. atmel_lcdfb_stop_clock(sinfo);
  782. return 0;
  783. }
  784. static int atmel_lcdfb_resume(struct platform_device *pdev)
  785. {
  786. struct fb_info *info = platform_get_drvdata(pdev);
  787. struct atmel_lcdfb_info *sinfo = info->par;
  788. atmel_lcdfb_start_clock(sinfo);
  789. if (sinfo->atmel_lcdfb_power_control)
  790. sinfo->atmel_lcdfb_power_control(1);
  791. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon);
  792. return 0;
  793. }
  794. #else
  795. #define atmel_lcdfb_suspend NULL
  796. #define atmel_lcdfb_resume NULL
  797. #endif
  798. static struct platform_driver atmel_lcdfb_driver = {
  799. .remove = __exit_p(atmel_lcdfb_remove),
  800. .suspend = atmel_lcdfb_suspend,
  801. .resume = atmel_lcdfb_resume,
  802. .driver = {
  803. .name = "atmel_lcdfb",
  804. .owner = THIS_MODULE,
  805. },
  806. };
  807. static int __init atmel_lcdfb_init(void)
  808. {
  809. return platform_driver_probe(&atmel_lcdfb_driver, atmel_lcdfb_probe);
  810. }
  811. static void __exit atmel_lcdfb_exit(void)
  812. {
  813. platform_driver_unregister(&atmel_lcdfb_driver);
  814. }
  815. module_init(atmel_lcdfb_init);
  816. module_exit(atmel_lcdfb_exit);
  817. MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
  818. MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
  819. MODULE_LICENSE("GPL");