Kconfig 9.5 KB

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  1. #
  2. # DMA engine configuration
  3. #
  4. menuconfig DMADEVICES
  5. bool "DMA Engine support"
  6. depends on HAS_DMA
  7. help
  8. DMA engines can do asynchronous data transfers without
  9. involving the host CPU. Currently, this framework can be
  10. used to offload memory copies in the network stack and
  11. RAID operations in the MD driver. This menu only presents
  12. DMA Device drivers supported by the configured arch, it may
  13. be empty in some cases.
  14. config DMADEVICES_DEBUG
  15. bool "DMA Engine debugging"
  16. depends on DMADEVICES != n
  17. help
  18. This is an option for use by developers; most people should
  19. say N here. This enables DMA engine core and driver debugging.
  20. config DMADEVICES_VDEBUG
  21. bool "DMA Engine verbose debugging"
  22. depends on DMADEVICES_DEBUG != n
  23. help
  24. This is an option for use by developers; most people should
  25. say N here. This enables deeper (more verbose) debugging of
  26. the DMA engine core and drivers.
  27. if DMADEVICES
  28. comment "DMA Devices"
  29. config INTEL_MID_DMAC
  30. tristate "Intel MID DMA support for Peripheral DMA controllers"
  31. depends on PCI && X86
  32. select DMA_ENGINE
  33. default n
  34. help
  35. Enable support for the Intel(R) MID DMA engine present
  36. in Intel MID chipsets.
  37. Say Y here if you have such a chipset.
  38. If unsure, say N.
  39. config ASYNC_TX_ENABLE_CHANNEL_SWITCH
  40. bool
  41. config AMBA_PL08X
  42. bool "ARM PrimeCell PL080 or PL081 support"
  43. depends on ARM_AMBA
  44. select DMA_ENGINE
  45. select DMA_VIRTUAL_CHANNELS
  46. help
  47. Platform has a PL08x DMAC device
  48. which can provide DMA engine support
  49. config INTEL_IOATDMA
  50. tristate "Intel I/OAT DMA support"
  51. depends on PCI && X86
  52. select DMA_ENGINE
  53. select DCA
  54. select ASYNC_TX_DISABLE_PQ_VAL_DMA
  55. select ASYNC_TX_DISABLE_XOR_VAL_DMA
  56. help
  57. Enable support for the Intel(R) I/OAT DMA engine present
  58. in recent Intel Xeon chipsets.
  59. Say Y here if you have such a chipset.
  60. If unsure, say N.
  61. config INTEL_IOP_ADMA
  62. tristate "Intel IOP ADMA support"
  63. depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
  64. select DMA_ENGINE
  65. select ASYNC_TX_ENABLE_CHANNEL_SWITCH
  66. help
  67. Enable support for the Intel(R) IOP Series RAID engines.
  68. config DW_DMAC
  69. tristate "Synopsys DesignWare AHB DMA support"
  70. select DMA_ENGINE
  71. default y if CPU_AT32AP7000
  72. help
  73. Support the Synopsys DesignWare AHB DMA controller. This
  74. can be integrated in chips such as the Atmel AT32ap7000.
  75. config DW_DMAC_BIG_ENDIAN_IO
  76. bool "Use big endian I/O register access"
  77. default y if AVR32
  78. depends on DW_DMAC
  79. help
  80. Say yes here to use big endian I/O access when reading and writing
  81. to the DMA controller registers. This is needed on some platforms,
  82. like the Atmel AVR32 architecture.
  83. If unsure, use the default setting.
  84. config AT_HDMAC
  85. tristate "Atmel AHB DMA support"
  86. depends on ARCH_AT91
  87. select DMA_ENGINE
  88. help
  89. Support the Atmel AHB DMA controller.
  90. config FSL_DMA
  91. tristate "Freescale Elo and Elo Plus DMA support"
  92. depends on FSL_SOC
  93. select DMA_ENGINE
  94. select ASYNC_TX_ENABLE_CHANNEL_SWITCH
  95. ---help---
  96. Enable support for the Freescale Elo and Elo Plus DMA controllers.
  97. The Elo is the DMA controller on some 82xx and 83xx parts, and the
  98. Elo Plus is the DMA controller on 85xx and 86xx parts.
  99. config MPC512X_DMA
  100. tristate "Freescale MPC512x built-in DMA engine support"
  101. depends on PPC_MPC512x || PPC_MPC831x
  102. select DMA_ENGINE
  103. ---help---
  104. Enable support for the Freescale MPC512x built-in DMA engine.
  105. config MV_XOR
  106. bool "Marvell XOR engine support"
  107. depends on PLAT_ORION
  108. select DMA_ENGINE
  109. select ASYNC_TX_ENABLE_CHANNEL_SWITCH
  110. ---help---
  111. Enable support for the Marvell XOR engine.
  112. config MX3_IPU
  113. bool "MX3x Image Processing Unit support"
  114. depends on ARCH_MXC
  115. select DMA_ENGINE
  116. default y
  117. help
  118. If you plan to use the Image Processing unit in the i.MX3x, say
  119. Y here. If unsure, select Y.
  120. config MX3_IPU_IRQS
  121. int "Number of dynamically mapped interrupts for IPU"
  122. depends on MX3_IPU
  123. range 2 137
  124. default 4
  125. help
  126. Out of 137 interrupt sources on i.MX31 IPU only very few are used.
  127. To avoid bloating the irq_desc[] array we allocate a sufficient
  128. number of IRQ slots and map them dynamically to specific sources.
  129. config TXX9_DMAC
  130. tristate "Toshiba TXx9 SoC DMA support"
  131. depends on MACH_TX49XX || MACH_TX39XX
  132. select DMA_ENGINE
  133. help
  134. Support the TXx9 SoC internal DMA controller. This can be
  135. integrated in chips such as the Toshiba TX4927/38/39.
  136. config TEGRA20_APB_DMA
  137. bool "NVIDIA Tegra20 APB DMA support"
  138. depends on ARCH_TEGRA
  139. select DMA_ENGINE
  140. help
  141. Support for the NVIDIA Tegra20 APB DMA controller driver. The
  142. DMA controller is having multiple DMA channel which can be
  143. configured for different peripherals like audio, UART, SPI,
  144. I2C etc which is in APB bus.
  145. This DMA controller transfers data from memory to peripheral fifo
  146. or vice versa. It does not support memory to memory data transfer.
  147. config SH_DMAE
  148. tristate "Renesas SuperH DMAC support"
  149. depends on (SUPERH && SH_DMA) || (ARM && ARCH_SHMOBILE)
  150. depends on !SH_DMA_API
  151. select DMA_ENGINE
  152. help
  153. Enable support for the Renesas SuperH DMA controllers.
  154. config COH901318
  155. bool "ST-Ericsson COH901318 DMA support"
  156. select DMA_ENGINE
  157. depends on ARCH_U300
  158. help
  159. Enable support for ST-Ericsson COH 901 318 DMA.
  160. config STE_DMA40
  161. bool "ST-Ericsson DMA40 support"
  162. depends on ARCH_U8500
  163. select DMA_ENGINE
  164. help
  165. Support for ST-Ericsson DMA40 controller
  166. config AMCC_PPC440SPE_ADMA
  167. tristate "AMCC PPC440SPe ADMA support"
  168. depends on 440SPe || 440SP
  169. select DMA_ENGINE
  170. select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
  171. select ASYNC_TX_ENABLE_CHANNEL_SWITCH
  172. help
  173. Enable support for the AMCC PPC440SPe RAID engines.
  174. config TIMB_DMA
  175. tristate "Timberdale FPGA DMA support"
  176. depends on MFD_TIMBERDALE || HAS_IOMEM
  177. select DMA_ENGINE
  178. help
  179. Enable support for the Timberdale FPGA DMA engine.
  180. config SIRF_DMA
  181. tristate "CSR SiRFprimaII/SiRFmarco DMA support"
  182. depends on ARCH_SIRF
  183. select DMA_ENGINE
  184. help
  185. Enable support for the CSR SiRFprimaII DMA engine.
  186. config TI_EDMA
  187. tristate "TI EDMA support"
  188. depends on ARCH_DAVINCI
  189. select DMA_ENGINE
  190. select DMA_VIRTUAL_CHANNELS
  191. default n
  192. help
  193. Enable support for the TI EDMA controller. This DMA
  194. engine is found on TI DaVinci and AM33xx parts.
  195. config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
  196. bool
  197. config PL330_DMA
  198. tristate "DMA API Driver for PL330"
  199. select DMA_ENGINE
  200. depends on ARM_AMBA
  201. help
  202. Select if your platform has one or more PL330 DMACs.
  203. You need to provide platform specific settings via
  204. platform_data for a dma-pl330 device.
  205. config PCH_DMA
  206. tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA"
  207. depends on PCI && X86
  208. select DMA_ENGINE
  209. help
  210. Enable support for Intel EG20T PCH DMA engine.
  211. This driver also can be used for LAPIS Semiconductor IOH(Input/
  212. Output Hub), ML7213, ML7223 and ML7831.
  213. ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
  214. for MP(Media Phone) use and ML7831 IOH is for general purpose use.
  215. ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
  216. ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
  217. config IMX_SDMA
  218. tristate "i.MX SDMA support"
  219. depends on ARCH_MXC
  220. select DMA_ENGINE
  221. help
  222. Support the i.MX SDMA engine. This engine is integrated into
  223. Freescale i.MX25/31/35/51/53 chips.
  224. config IMX_DMA
  225. tristate "i.MX DMA support"
  226. depends on ARCH_MXC
  227. select DMA_ENGINE
  228. help
  229. Support the i.MX DMA engine. This engine is integrated into
  230. Freescale i.MX1/21/27 chips.
  231. config MXS_DMA
  232. bool "MXS DMA support"
  233. depends on SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q
  234. select STMP_DEVICE
  235. select DMA_ENGINE
  236. help
  237. Support the MXS DMA engine. This engine including APBH-DMA
  238. and APBX-DMA is integrated into Freescale i.MX23/28 chips.
  239. config EP93XX_DMA
  240. bool "Cirrus Logic EP93xx DMA support"
  241. depends on ARCH_EP93XX
  242. select DMA_ENGINE
  243. help
  244. Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.
  245. config DMA_SA11X0
  246. tristate "SA-11x0 DMA support"
  247. depends on ARCH_SA1100
  248. select DMA_ENGINE
  249. select DMA_VIRTUAL_CHANNELS
  250. help
  251. Support the DMA engine found on Intel StrongARM SA-1100 and
  252. SA-1110 SoCs. This DMA engine can only be used with on-chip
  253. devices.
  254. config MMP_TDMA
  255. bool "MMP Two-Channel DMA support"
  256. depends on ARCH_MMP
  257. select DMA_ENGINE
  258. help
  259. Support the MMP Two-Channel DMA engine.
  260. This engine used for MMP Audio DMA and pxa910 SQU.
  261. Say Y here if you enabled MMP ADMA, otherwise say N.
  262. config DMA_OMAP
  263. tristate "OMAP DMA support"
  264. depends on ARCH_OMAP
  265. select DMA_ENGINE
  266. select DMA_VIRTUAL_CHANNELS
  267. config MMP_PDMA
  268. bool "MMP PDMA support"
  269. depends on (ARCH_MMP || ARCH_PXA)
  270. select DMA_ENGINE
  271. help
  272. Support the MMP PDMA engine for PXA and MMP platfrom.
  273. config DMA_ENGINE
  274. bool
  275. config DMA_VIRTUAL_CHANNELS
  276. tristate
  277. config DMA_OF
  278. def_bool y
  279. depends on OF
  280. comment "DMA Clients"
  281. depends on DMA_ENGINE
  282. config NET_DMA
  283. bool "Network: TCP receive copy offload"
  284. depends on DMA_ENGINE && NET
  285. default (INTEL_IOATDMA || FSL_DMA)
  286. help
  287. This enables the use of DMA engines in the network stack to
  288. offload receive copy-to-user operations, freeing CPU cycles.
  289. Say Y here if you enabled INTEL_IOATDMA or FSL_DMA, otherwise
  290. say N.
  291. config ASYNC_TX_DMA
  292. bool "Async_tx: Offload support for the async_tx api"
  293. depends on DMA_ENGINE
  294. help
  295. This allows the async_tx api to take advantage of offload engines for
  296. memcpy, memset, xor, and raid6 p+q operations. If your platform has
  297. a dma engine that can perform raid operations and you have enabled
  298. MD_RAID456 say Y.
  299. If unsure, say N.
  300. config DMATEST
  301. tristate "DMA Test client"
  302. depends on DMA_ENGINE
  303. help
  304. Simple DMA test client. Say N unless you're debugging a
  305. DMA Device driver.
  306. endif