ab8500-gpadc.c 20 KB

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  1. /*
  2. * Copyright (C) ST-Ericsson SA 2010
  3. *
  4. * License Terms: GNU General Public License v2
  5. * Author: Arun R Murthy <arun.murthy@stericsson.com>
  6. * Author: Daniel Willerud <daniel.willerud@stericsson.com>
  7. * Author: Johan Palsson <johan.palsson@stericsson.com>
  8. */
  9. #include <linux/init.h>
  10. #include <linux/module.h>
  11. #include <linux/device.h>
  12. #include <linux/interrupt.h>
  13. #include <linux/spinlock.h>
  14. #include <linux/delay.h>
  15. #include <linux/pm_runtime.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/completion.h>
  18. #include <linux/regulator/consumer.h>
  19. #include <linux/err.h>
  20. #include <linux/slab.h>
  21. #include <linux/list.h>
  22. #include <linux/mfd/abx500.h>
  23. #include <linux/mfd/abx500/ab8500.h>
  24. #include <linux/mfd/abx500/ab8500-gpadc.h>
  25. /*
  26. * GPADC register offsets
  27. * Bank : 0x0A
  28. */
  29. #define AB8500_GPADC_CTRL1_REG 0x00
  30. #define AB8500_GPADC_CTRL2_REG 0x01
  31. #define AB8500_GPADC_CTRL3_REG 0x02
  32. #define AB8500_GPADC_AUTO_TIMER_REG 0x03
  33. #define AB8500_GPADC_STAT_REG 0x04
  34. #define AB8500_GPADC_MANDATAL_REG 0x05
  35. #define AB8500_GPADC_MANDATAH_REG 0x06
  36. #define AB8500_GPADC_AUTODATAL_REG 0x07
  37. #define AB8500_GPADC_AUTODATAH_REG 0x08
  38. #define AB8500_GPADC_MUX_CTRL_REG 0x09
  39. /*
  40. * OTP register offsets
  41. * Bank : 0x15
  42. */
  43. #define AB8500_GPADC_CAL_1 0x0F
  44. #define AB8500_GPADC_CAL_2 0x10
  45. #define AB8500_GPADC_CAL_3 0x11
  46. #define AB8500_GPADC_CAL_4 0x12
  47. #define AB8500_GPADC_CAL_5 0x13
  48. #define AB8500_GPADC_CAL_6 0x14
  49. #define AB8500_GPADC_CAL_7 0x15
  50. /* gpadc constants */
  51. #define EN_VINTCORE12 0x04
  52. #define EN_VTVOUT 0x02
  53. #define EN_GPADC 0x01
  54. #define DIS_GPADC 0x00
  55. #define SW_AVG_16 0x60
  56. #define ADC_SW_CONV 0x04
  57. #define EN_ICHAR 0x80
  58. #define BTEMP_PULL_UP 0x08
  59. #define EN_BUF 0x40
  60. #define DIS_ZERO 0x00
  61. #define GPADC_BUSY 0x01
  62. /* GPADC constants from AB8500 spec, UM0836 */
  63. #define ADC_RESOLUTION 1024
  64. #define ADC_CH_BTEMP_MIN 0
  65. #define ADC_CH_BTEMP_MAX 1350
  66. #define ADC_CH_DIETEMP_MIN 0
  67. #define ADC_CH_DIETEMP_MAX 1350
  68. #define ADC_CH_CHG_V_MIN 0
  69. #define ADC_CH_CHG_V_MAX 20030
  70. #define ADC_CH_ACCDET2_MIN 0
  71. #define ADC_CH_ACCDET2_MAX 2500
  72. #define ADC_CH_VBAT_MIN 2300
  73. #define ADC_CH_VBAT_MAX 4800
  74. #define ADC_CH_CHG_I_MIN 0
  75. #define ADC_CH_CHG_I_MAX 1500
  76. #define ADC_CH_BKBAT_MIN 0
  77. #define ADC_CH_BKBAT_MAX 3200
  78. /* This is used to not lose precision when dividing to get gain and offset */
  79. #define CALIB_SCALE 1000
  80. /* Time in ms before disabling regulator */
  81. #define GPADC_AUDOSUSPEND_DELAY 1
  82. enum cal_channels {
  83. ADC_INPUT_VMAIN = 0,
  84. ADC_INPUT_BTEMP,
  85. ADC_INPUT_VBAT,
  86. NBR_CAL_INPUTS,
  87. };
  88. /**
  89. * struct adc_cal_data - Table for storing gain and offset for the calibrated
  90. * ADC channels
  91. * @gain: Gain of the ADC channel
  92. * @offset: Offset of the ADC channel
  93. */
  94. struct adc_cal_data {
  95. u64 gain;
  96. u64 offset;
  97. };
  98. /**
  99. * struct ab8500_gpadc - AB8500 GPADC device information
  100. * @dev: pointer to the struct device
  101. * @node: a list of AB8500 GPADCs, hence prepared for
  102. reentrance
  103. * @parent: pointer to the struct ab8500
  104. * @ab8500_gpadc_complete: pointer to the struct completion, to indicate
  105. * the completion of gpadc conversion
  106. * @ab8500_gpadc_lock: structure of type mutex
  107. * @regu: pointer to the struct regulator
  108. * @irq: interrupt number that is used by gpadc
  109. * @cal_data array of ADC calibration data structs
  110. */
  111. struct ab8500_gpadc {
  112. struct device *dev;
  113. struct list_head node;
  114. struct ab8500 *parent;
  115. struct completion ab8500_gpadc_complete;
  116. struct mutex ab8500_gpadc_lock;
  117. struct regulator *regu;
  118. int irq;
  119. struct adc_cal_data cal_data[NBR_CAL_INPUTS];
  120. };
  121. static LIST_HEAD(ab8500_gpadc_list);
  122. /**
  123. * ab8500_gpadc_get() - returns a reference to the primary AB8500 GPADC
  124. * (i.e. the first GPADC in the instance list)
  125. */
  126. struct ab8500_gpadc *ab8500_gpadc_get(char *name)
  127. {
  128. struct ab8500_gpadc *gpadc;
  129. list_for_each_entry(gpadc, &ab8500_gpadc_list, node) {
  130. if (!strcmp(name, dev_name(gpadc->dev)))
  131. return gpadc;
  132. }
  133. return ERR_PTR(-ENOENT);
  134. }
  135. EXPORT_SYMBOL(ab8500_gpadc_get);
  136. /**
  137. * ab8500_gpadc_ad_to_voltage() - Convert a raw ADC value to a voltage
  138. */
  139. int ab8500_gpadc_ad_to_voltage(struct ab8500_gpadc *gpadc, u8 channel,
  140. int ad_value)
  141. {
  142. int res;
  143. switch (channel) {
  144. case MAIN_CHARGER_V:
  145. /* For some reason we don't have calibrated data */
  146. if (!gpadc->cal_data[ADC_INPUT_VMAIN].gain) {
  147. res = ADC_CH_CHG_V_MIN + (ADC_CH_CHG_V_MAX -
  148. ADC_CH_CHG_V_MIN) * ad_value /
  149. ADC_RESOLUTION;
  150. break;
  151. }
  152. /* Here we can use the calibrated data */
  153. res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_VMAIN].gain +
  154. gpadc->cal_data[ADC_INPUT_VMAIN].offset) / CALIB_SCALE;
  155. break;
  156. case BAT_CTRL:
  157. case BTEMP_BALL:
  158. case ACC_DETECT1:
  159. case ADC_AUX1:
  160. case ADC_AUX2:
  161. /* For some reason we don't have calibrated data */
  162. if (!gpadc->cal_data[ADC_INPUT_BTEMP].gain) {
  163. res = ADC_CH_BTEMP_MIN + (ADC_CH_BTEMP_MAX -
  164. ADC_CH_BTEMP_MIN) * ad_value /
  165. ADC_RESOLUTION;
  166. break;
  167. }
  168. /* Here we can use the calibrated data */
  169. res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_BTEMP].gain +
  170. gpadc->cal_data[ADC_INPUT_BTEMP].offset) / CALIB_SCALE;
  171. break;
  172. case MAIN_BAT_V:
  173. /* For some reason we don't have calibrated data */
  174. if (!gpadc->cal_data[ADC_INPUT_VBAT].gain) {
  175. res = ADC_CH_VBAT_MIN + (ADC_CH_VBAT_MAX -
  176. ADC_CH_VBAT_MIN) * ad_value /
  177. ADC_RESOLUTION;
  178. break;
  179. }
  180. /* Here we can use the calibrated data */
  181. res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_VBAT].gain +
  182. gpadc->cal_data[ADC_INPUT_VBAT].offset) / CALIB_SCALE;
  183. break;
  184. case DIE_TEMP:
  185. res = ADC_CH_DIETEMP_MIN +
  186. (ADC_CH_DIETEMP_MAX - ADC_CH_DIETEMP_MIN) * ad_value /
  187. ADC_RESOLUTION;
  188. break;
  189. case ACC_DETECT2:
  190. res = ADC_CH_ACCDET2_MIN +
  191. (ADC_CH_ACCDET2_MAX - ADC_CH_ACCDET2_MIN) * ad_value /
  192. ADC_RESOLUTION;
  193. break;
  194. case VBUS_V:
  195. res = ADC_CH_CHG_V_MIN +
  196. (ADC_CH_CHG_V_MAX - ADC_CH_CHG_V_MIN) * ad_value /
  197. ADC_RESOLUTION;
  198. break;
  199. case MAIN_CHARGER_C:
  200. case USB_CHARGER_C:
  201. res = ADC_CH_CHG_I_MIN +
  202. (ADC_CH_CHG_I_MAX - ADC_CH_CHG_I_MIN) * ad_value /
  203. ADC_RESOLUTION;
  204. break;
  205. case BK_BAT_V:
  206. res = ADC_CH_BKBAT_MIN +
  207. (ADC_CH_BKBAT_MAX - ADC_CH_BKBAT_MIN) * ad_value /
  208. ADC_RESOLUTION;
  209. break;
  210. default:
  211. dev_err(gpadc->dev,
  212. "unknown channel, not possible to convert\n");
  213. res = -EINVAL;
  214. break;
  215. }
  216. return res;
  217. }
  218. EXPORT_SYMBOL(ab8500_gpadc_ad_to_voltage);
  219. /**
  220. * ab8500_gpadc_convert() - gpadc conversion
  221. * @channel: analog channel to be converted to digital data
  222. *
  223. * This function converts the selected analog i/p to digital
  224. * data.
  225. */
  226. int ab8500_gpadc_convert(struct ab8500_gpadc *gpadc, u8 channel)
  227. {
  228. int ad_value;
  229. int voltage;
  230. ad_value = ab8500_gpadc_read_raw(gpadc, channel);
  231. if (ad_value < 0) {
  232. dev_err(gpadc->dev, "GPADC raw value failed ch: %d\n", channel);
  233. return ad_value;
  234. }
  235. voltage = ab8500_gpadc_ad_to_voltage(gpadc, channel, ad_value);
  236. if (voltage < 0)
  237. dev_err(gpadc->dev, "GPADC to voltage conversion failed ch:"
  238. " %d AD: 0x%x\n", channel, ad_value);
  239. return voltage;
  240. }
  241. EXPORT_SYMBOL(ab8500_gpadc_convert);
  242. /**
  243. * ab8500_gpadc_read_raw() - gpadc read
  244. * @channel: analog channel to be read
  245. *
  246. * This function obtains the raw ADC value, this then needs
  247. * to be converted by calling ab8500_gpadc_ad_to_voltage()
  248. */
  249. int ab8500_gpadc_read_raw(struct ab8500_gpadc *gpadc, u8 channel)
  250. {
  251. int ret;
  252. int looplimit = 0;
  253. u8 val, low_data, high_data;
  254. if (!gpadc)
  255. return -ENODEV;
  256. mutex_lock(&gpadc->ab8500_gpadc_lock);
  257. /* Enable VTVout LDO this is required for GPADC */
  258. pm_runtime_get_sync(gpadc->dev);
  259. /* Check if ADC is not busy, lock and proceed */
  260. do {
  261. ret = abx500_get_register_interruptible(gpadc->dev,
  262. AB8500_GPADC, AB8500_GPADC_STAT_REG, &val);
  263. if (ret < 0)
  264. goto out;
  265. if (!(val & GPADC_BUSY))
  266. break;
  267. msleep(10);
  268. } while (++looplimit < 10);
  269. if (looplimit >= 10 && (val & GPADC_BUSY)) {
  270. dev_err(gpadc->dev, "gpadc_conversion: GPADC busy");
  271. ret = -EINVAL;
  272. goto out;
  273. }
  274. /* Enable GPADC */
  275. ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
  276. AB8500_GPADC, AB8500_GPADC_CTRL1_REG, EN_GPADC, EN_GPADC);
  277. if (ret < 0) {
  278. dev_err(gpadc->dev, "gpadc_conversion: enable gpadc failed\n");
  279. goto out;
  280. }
  281. /* Select the channel source and set average samples to 16 */
  282. ret = abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
  283. AB8500_GPADC_CTRL2_REG, (channel | SW_AVG_16));
  284. if (ret < 0) {
  285. dev_err(gpadc->dev,
  286. "gpadc_conversion: set avg samples failed\n");
  287. goto out;
  288. }
  289. /*
  290. * Enable ADC, buffering, select rising edge and enable ADC path
  291. * charging current sense if it needed, ABB 3.0 needs some special
  292. * treatment too.
  293. */
  294. switch (channel) {
  295. case MAIN_CHARGER_C:
  296. case USB_CHARGER_C:
  297. ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
  298. AB8500_GPADC, AB8500_GPADC_CTRL1_REG,
  299. EN_BUF | EN_ICHAR,
  300. EN_BUF | EN_ICHAR);
  301. break;
  302. case BTEMP_BALL:
  303. if (!is_ab8500_2p0_or_earlier(gpadc->parent)) {
  304. /* Turn on btemp pull-up on ABB 3.0 */
  305. ret = abx500_mask_and_set_register_interruptible(
  306. gpadc->dev,
  307. AB8500_GPADC, AB8500_GPADC_CTRL1_REG,
  308. EN_BUF | BTEMP_PULL_UP,
  309. EN_BUF | BTEMP_PULL_UP);
  310. /*
  311. * Delay might be needed for ABB8500 cut 3.0, if not, remove
  312. * when hardware will be available
  313. */
  314. usleep_range(1000, 1000);
  315. break;
  316. }
  317. /* Intentional fallthrough */
  318. default:
  319. ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
  320. AB8500_GPADC, AB8500_GPADC_CTRL1_REG, EN_BUF, EN_BUF);
  321. break;
  322. }
  323. if (ret < 0) {
  324. dev_err(gpadc->dev,
  325. "gpadc_conversion: select falling edge failed\n");
  326. goto out;
  327. }
  328. ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
  329. AB8500_GPADC, AB8500_GPADC_CTRL1_REG, ADC_SW_CONV, ADC_SW_CONV);
  330. if (ret < 0) {
  331. dev_err(gpadc->dev,
  332. "gpadc_conversion: start s/w conversion failed\n");
  333. goto out;
  334. }
  335. /* wait for completion of conversion */
  336. if (!wait_for_completion_timeout(&gpadc->ab8500_gpadc_complete, 2*HZ)) {
  337. dev_err(gpadc->dev,
  338. "timeout: didn't receive GPADC conversion interrupt\n");
  339. ret = -EINVAL;
  340. goto out;
  341. }
  342. /* Read the converted RAW data */
  343. ret = abx500_get_register_interruptible(gpadc->dev, AB8500_GPADC,
  344. AB8500_GPADC_MANDATAL_REG, &low_data);
  345. if (ret < 0) {
  346. dev_err(gpadc->dev, "gpadc_conversion: read low data failed\n");
  347. goto out;
  348. }
  349. ret = abx500_get_register_interruptible(gpadc->dev, AB8500_GPADC,
  350. AB8500_GPADC_MANDATAH_REG, &high_data);
  351. if (ret < 0) {
  352. dev_err(gpadc->dev,
  353. "gpadc_conversion: read high data failed\n");
  354. goto out;
  355. }
  356. /* Disable GPADC */
  357. ret = abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
  358. AB8500_GPADC_CTRL1_REG, DIS_GPADC);
  359. if (ret < 0) {
  360. dev_err(gpadc->dev, "gpadc_conversion: disable gpadc failed\n");
  361. goto out;
  362. }
  363. pm_runtime_mark_last_busy(gpadc->dev);
  364. pm_runtime_put_autosuspend(gpadc->dev);
  365. mutex_unlock(&gpadc->ab8500_gpadc_lock);
  366. return (high_data << 8) | low_data;
  367. out:
  368. /*
  369. * It has shown to be needed to turn off the GPADC if an error occurs,
  370. * otherwise we might have problem when waiting for the busy bit in the
  371. * GPADC status register to go low. In V1.1 there wait_for_completion
  372. * seems to timeout when waiting for an interrupt.. Not seen in V2.0
  373. */
  374. (void) abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
  375. AB8500_GPADC_CTRL1_REG, DIS_GPADC);
  376. pm_runtime_put(gpadc->dev);
  377. mutex_unlock(&gpadc->ab8500_gpadc_lock);
  378. dev_err(gpadc->dev,
  379. "gpadc_conversion: Failed to AD convert channel %d\n", channel);
  380. return ret;
  381. }
  382. EXPORT_SYMBOL(ab8500_gpadc_read_raw);
  383. /**
  384. * ab8500_bm_gpswadcconvend_handler() - isr for s/w gpadc conversion completion
  385. * @irq: irq number
  386. * @data: pointer to the data passed during request irq
  387. *
  388. * This is a interrupt service routine for s/w gpadc conversion completion.
  389. * Notifies the gpadc completion is completed and the converted raw value
  390. * can be read from the registers.
  391. * Returns IRQ status(IRQ_HANDLED)
  392. */
  393. static irqreturn_t ab8500_bm_gpswadcconvend_handler(int irq, void *_gpadc)
  394. {
  395. struct ab8500_gpadc *gpadc = _gpadc;
  396. complete(&gpadc->ab8500_gpadc_complete);
  397. return IRQ_HANDLED;
  398. }
  399. static int otp_cal_regs[] = {
  400. AB8500_GPADC_CAL_1,
  401. AB8500_GPADC_CAL_2,
  402. AB8500_GPADC_CAL_3,
  403. AB8500_GPADC_CAL_4,
  404. AB8500_GPADC_CAL_5,
  405. AB8500_GPADC_CAL_6,
  406. AB8500_GPADC_CAL_7,
  407. };
  408. static void ab8500_gpadc_read_calibration_data(struct ab8500_gpadc *gpadc)
  409. {
  410. int i;
  411. int ret[ARRAY_SIZE(otp_cal_regs)];
  412. u8 gpadc_cal[ARRAY_SIZE(otp_cal_regs)];
  413. int vmain_high, vmain_low;
  414. int btemp_high, btemp_low;
  415. int vbat_high, vbat_low;
  416. /* First we read all OTP registers and store the error code */
  417. for (i = 0; i < ARRAY_SIZE(otp_cal_regs); i++) {
  418. ret[i] = abx500_get_register_interruptible(gpadc->dev,
  419. AB8500_OTP_EMUL, otp_cal_regs[i], &gpadc_cal[i]);
  420. if (ret[i] < 0)
  421. dev_err(gpadc->dev, "%s: read otp reg 0x%02x failed\n",
  422. __func__, otp_cal_regs[i]);
  423. }
  424. /*
  425. * The ADC calibration data is stored in OTP registers.
  426. * The layout of the calibration data is outlined below and a more
  427. * detailed description can be found in UM0836
  428. *
  429. * vm_h/l = vmain_high/low
  430. * bt_h/l = btemp_high/low
  431. * vb_h/l = vbat_high/low
  432. *
  433. * Data bits:
  434. * | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
  435. * |.......|.......|.......|.......|.......|.......|.......|.......
  436. * | | vm_h9 | vm_h8
  437. * |.......|.......|.......|.......|.......|.......|.......|.......
  438. * | | vm_h7 | vm_h6 | vm_h5 | vm_h4 | vm_h3 | vm_h2
  439. * |.......|.......|.......|.......|.......|.......|.......|.......
  440. * | vm_h1 | vm_h0 | vm_l4 | vm_l3 | vm_l2 | vm_l1 | vm_l0 | bt_h9
  441. * |.......|.......|.......|.......|.......|.......|.......|.......
  442. * | bt_h8 | bt_h7 | bt_h6 | bt_h5 | bt_h4 | bt_h3 | bt_h2 | bt_h1
  443. * |.......|.......|.......|.......|.......|.......|.......|.......
  444. * | bt_h0 | bt_l4 | bt_l3 | bt_l2 | bt_l1 | bt_l0 | vb_h9 | vb_h8
  445. * |.......|.......|.......|.......|.......|.......|.......|.......
  446. * | vb_h7 | vb_h6 | vb_h5 | vb_h4 | vb_h3 | vb_h2 | vb_h1 | vb_h0
  447. * |.......|.......|.......|.......|.......|.......|.......|.......
  448. * | vb_l5 | vb_l4 | vb_l3 | vb_l2 | vb_l1 | vb_l0 |
  449. * |.......|.......|.......|.......|.......|.......|.......|.......
  450. *
  451. *
  452. * Ideal output ADC codes corresponding to injected input voltages
  453. * during manufacturing is:
  454. *
  455. * vmain_high: Vin = 19500mV / ADC ideal code = 997
  456. * vmain_low: Vin = 315mV / ADC ideal code = 16
  457. * btemp_high: Vin = 1300mV / ADC ideal code = 985
  458. * btemp_low: Vin = 21mV / ADC ideal code = 16
  459. * vbat_high: Vin = 4700mV / ADC ideal code = 982
  460. * vbat_low: Vin = 2380mV / ADC ideal code = 33
  461. */
  462. /* Calculate gain and offset for VMAIN if all reads succeeded */
  463. if (!(ret[0] < 0 || ret[1] < 0 || ret[2] < 0)) {
  464. vmain_high = (((gpadc_cal[0] & 0x03) << 8) |
  465. ((gpadc_cal[1] & 0x3F) << 2) |
  466. ((gpadc_cal[2] & 0xC0) >> 6));
  467. vmain_low = ((gpadc_cal[2] & 0x3E) >> 1);
  468. gpadc->cal_data[ADC_INPUT_VMAIN].gain = CALIB_SCALE *
  469. (19500 - 315) / (vmain_high - vmain_low);
  470. gpadc->cal_data[ADC_INPUT_VMAIN].offset = CALIB_SCALE * 19500 -
  471. (CALIB_SCALE * (19500 - 315) /
  472. (vmain_high - vmain_low)) * vmain_high;
  473. } else {
  474. gpadc->cal_data[ADC_INPUT_VMAIN].gain = 0;
  475. }
  476. /* Calculate gain and offset for BTEMP if all reads succeeded */
  477. if (!(ret[2] < 0 || ret[3] < 0 || ret[4] < 0)) {
  478. btemp_high = (((gpadc_cal[2] & 0x01) << 9) |
  479. (gpadc_cal[3] << 1) |
  480. ((gpadc_cal[4] & 0x80) >> 7));
  481. btemp_low = ((gpadc_cal[4] & 0x7C) >> 2);
  482. gpadc->cal_data[ADC_INPUT_BTEMP].gain =
  483. CALIB_SCALE * (1300 - 21) / (btemp_high - btemp_low);
  484. gpadc->cal_data[ADC_INPUT_BTEMP].offset = CALIB_SCALE * 1300 -
  485. (CALIB_SCALE * (1300 - 21) /
  486. (btemp_high - btemp_low)) * btemp_high;
  487. } else {
  488. gpadc->cal_data[ADC_INPUT_BTEMP].gain = 0;
  489. }
  490. /* Calculate gain and offset for VBAT if all reads succeeded */
  491. if (!(ret[4] < 0 || ret[5] < 0 || ret[6] < 0)) {
  492. vbat_high = (((gpadc_cal[4] & 0x03) << 8) | gpadc_cal[5]);
  493. vbat_low = ((gpadc_cal[6] & 0xFC) >> 2);
  494. gpadc->cal_data[ADC_INPUT_VBAT].gain = CALIB_SCALE *
  495. (4700 - 2380) / (vbat_high - vbat_low);
  496. gpadc->cal_data[ADC_INPUT_VBAT].offset = CALIB_SCALE * 4700 -
  497. (CALIB_SCALE * (4700 - 2380) /
  498. (vbat_high - vbat_low)) * vbat_high;
  499. } else {
  500. gpadc->cal_data[ADC_INPUT_VBAT].gain = 0;
  501. }
  502. dev_dbg(gpadc->dev, "VMAIN gain %llu offset %llu\n",
  503. gpadc->cal_data[ADC_INPUT_VMAIN].gain,
  504. gpadc->cal_data[ADC_INPUT_VMAIN].offset);
  505. dev_dbg(gpadc->dev, "BTEMP gain %llu offset %llu\n",
  506. gpadc->cal_data[ADC_INPUT_BTEMP].gain,
  507. gpadc->cal_data[ADC_INPUT_BTEMP].offset);
  508. dev_dbg(gpadc->dev, "VBAT gain %llu offset %llu\n",
  509. gpadc->cal_data[ADC_INPUT_VBAT].gain,
  510. gpadc->cal_data[ADC_INPUT_VBAT].offset);
  511. }
  512. static int ab8500_gpadc_runtime_suspend(struct device *dev)
  513. {
  514. struct ab8500_gpadc *gpadc = dev_get_drvdata(dev);
  515. regulator_disable(gpadc->regu);
  516. return 0;
  517. }
  518. static int ab8500_gpadc_runtime_resume(struct device *dev)
  519. {
  520. struct ab8500_gpadc *gpadc = dev_get_drvdata(dev);
  521. regulator_enable(gpadc->regu);
  522. return 0;
  523. }
  524. static int ab8500_gpadc_runtime_idle(struct device *dev)
  525. {
  526. struct ab8500_gpadc *gpadc = dev_get_drvdata(dev);
  527. pm_runtime_suspend(dev);
  528. return 0;
  529. }
  530. static int ab8500_gpadc_probe(struct platform_device *pdev)
  531. {
  532. int ret = 0;
  533. struct ab8500_gpadc *gpadc;
  534. gpadc = kzalloc(sizeof(struct ab8500_gpadc), GFP_KERNEL);
  535. if (!gpadc) {
  536. dev_err(&pdev->dev, "Error: No memory\n");
  537. return -ENOMEM;
  538. }
  539. gpadc->irq = platform_get_irq_byname(pdev, "SW_CONV_END");
  540. if (gpadc->irq < 0) {
  541. dev_err(&pdev->dev, "failed to get platform irq-%d\n",
  542. gpadc->irq);
  543. ret = gpadc->irq;
  544. goto fail;
  545. }
  546. gpadc->dev = &pdev->dev;
  547. gpadc->parent = dev_get_drvdata(pdev->dev.parent);
  548. mutex_init(&gpadc->ab8500_gpadc_lock);
  549. /* Initialize completion used to notify completion of conversion */
  550. init_completion(&gpadc->ab8500_gpadc_complete);
  551. /* Register interrupt - SwAdcComplete */
  552. ret = request_threaded_irq(gpadc->irq, NULL,
  553. ab8500_bm_gpswadcconvend_handler,
  554. IRQF_ONESHOT | IRQF_NO_SUSPEND | IRQF_SHARED,
  555. "ab8500-gpadc", gpadc);
  556. if (ret < 0) {
  557. dev_err(gpadc->dev, "Failed to register interrupt, irq: %d\n",
  558. gpadc->irq);
  559. goto fail;
  560. }
  561. /* VTVout LDO used to power up ab8500-GPADC */
  562. gpadc->regu = regulator_get(&pdev->dev, "vddadc");
  563. if (IS_ERR(gpadc->regu)) {
  564. ret = PTR_ERR(gpadc->regu);
  565. dev_err(gpadc->dev, "failed to get vtvout LDO\n");
  566. goto fail_irq;
  567. }
  568. platform_set_drvdata(pdev, gpadc);
  569. regulator_enable(gpadc->regu);
  570. pm_runtime_set_autosuspend_delay(gpadc->dev, GPADC_AUDOSUSPEND_DELAY);
  571. pm_runtime_use_autosuspend(gpadc->dev);
  572. pm_runtime_set_active(gpadc->dev);
  573. pm_runtime_enable(gpadc->dev);
  574. ab8500_gpadc_read_calibration_data(gpadc);
  575. list_add_tail(&gpadc->node, &ab8500_gpadc_list);
  576. dev_dbg(gpadc->dev, "probe success\n");
  577. return 0;
  578. fail_irq:
  579. free_irq(gpadc->irq, gpadc);
  580. fail:
  581. kfree(gpadc);
  582. gpadc = NULL;
  583. return ret;
  584. }
  585. static int ab8500_gpadc_remove(struct platform_device *pdev)
  586. {
  587. struct ab8500_gpadc *gpadc = platform_get_drvdata(pdev);
  588. /* remove this gpadc entry from the list */
  589. list_del(&gpadc->node);
  590. /* remove interrupt - completion of Sw ADC conversion */
  591. free_irq(gpadc->irq, gpadc);
  592. pm_runtime_get_sync(gpadc->dev);
  593. pm_runtime_disable(gpadc->dev);
  594. regulator_disable(gpadc->regu);
  595. pm_runtime_set_suspended(gpadc->dev);
  596. pm_runtime_put_noidle(gpadc->dev);
  597. kfree(gpadc);
  598. gpadc = NULL;
  599. return 0;
  600. }
  601. static const struct dev_pm_ops ab8500_gpadc_pm_ops = {
  602. SET_RUNTIME_PM_OPS(ab8500_gpadc_runtime_suspend,
  603. ab8500_gpadc_runtime_resume,
  604. ab8500_gpadc_runtime_idle)
  605. };
  606. static struct platform_driver ab8500_gpadc_driver = {
  607. .probe = ab8500_gpadc_probe,
  608. .remove = ab8500_gpadc_remove,
  609. .driver = {
  610. .name = "ab8500-gpadc",
  611. .owner = THIS_MODULE,
  612. .pm = &ab8500_gpadc_pm_ops,
  613. },
  614. };
  615. static int __init ab8500_gpadc_init(void)
  616. {
  617. return platform_driver_register(&ab8500_gpadc_driver);
  618. }
  619. static void __exit ab8500_gpadc_exit(void)
  620. {
  621. platform_driver_unregister(&ab8500_gpadc_driver);
  622. }
  623. subsys_initcall_sync(ab8500_gpadc_init);
  624. module_exit(ab8500_gpadc_exit);
  625. MODULE_LICENSE("GPL v2");
  626. MODULE_AUTHOR("Arun R Murthy, Daniel Willerud, Johan Palsson");
  627. MODULE_ALIAS("platform:ab8500_gpadc");
  628. MODULE_DESCRIPTION("AB8500 GPADC driver");