main.c 55 KB

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  1. /*
  2. * Copyright (c) 2008-2009 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/nl80211.h>
  17. #include "ath9k.h"
  18. #include "btcoex.h"
  19. static void ath_update_txpow(struct ath_softc *sc)
  20. {
  21. struct ath_hw *ah = sc->sc_ah;
  22. if (sc->curtxpow != sc->config.txpowlimit) {
  23. ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
  24. /* read back in case value is clamped */
  25. sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
  26. }
  27. }
  28. static u8 parse_mpdudensity(u8 mpdudensity)
  29. {
  30. /*
  31. * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  32. * 0 for no restriction
  33. * 1 for 1/4 us
  34. * 2 for 1/2 us
  35. * 3 for 1 us
  36. * 4 for 2 us
  37. * 5 for 4 us
  38. * 6 for 8 us
  39. * 7 for 16 us
  40. */
  41. switch (mpdudensity) {
  42. case 0:
  43. return 0;
  44. case 1:
  45. case 2:
  46. case 3:
  47. /* Our lower layer calculations limit our precision to
  48. 1 microsecond */
  49. return 1;
  50. case 4:
  51. return 2;
  52. case 5:
  53. return 4;
  54. case 6:
  55. return 8;
  56. case 7:
  57. return 16;
  58. default:
  59. return 0;
  60. }
  61. }
  62. static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
  63. struct ieee80211_hw *hw)
  64. {
  65. struct ieee80211_channel *curchan = hw->conf.channel;
  66. struct ath9k_channel *channel;
  67. u8 chan_idx;
  68. chan_idx = curchan->hw_value;
  69. channel = &sc->sc_ah->channels[chan_idx];
  70. ath9k_update_ichannel(sc, hw, channel);
  71. return channel;
  72. }
  73. bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  74. {
  75. unsigned long flags;
  76. bool ret;
  77. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  78. ret = ath9k_hw_setpower(sc->sc_ah, mode);
  79. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  80. return ret;
  81. }
  82. void ath9k_ps_wakeup(struct ath_softc *sc)
  83. {
  84. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  85. unsigned long flags;
  86. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  87. if (++sc->ps_usecount != 1)
  88. goto unlock;
  89. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
  90. /*
  91. * While the hardware is asleep, the cycle counters contain no
  92. * useful data. Better clear them now so that they don't mess up
  93. * survey data results.
  94. */
  95. spin_lock(&common->cc_lock);
  96. ath_hw_cycle_counters_update(common);
  97. memset(&common->cc_survey, 0, sizeof(common->cc_survey));
  98. spin_unlock(&common->cc_lock);
  99. unlock:
  100. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  101. }
  102. void ath9k_ps_restore(struct ath_softc *sc)
  103. {
  104. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  105. unsigned long flags;
  106. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  107. if (--sc->ps_usecount != 0)
  108. goto unlock;
  109. spin_lock(&common->cc_lock);
  110. ath_hw_cycle_counters_update(common);
  111. spin_unlock(&common->cc_lock);
  112. if (sc->ps_idle)
  113. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
  114. else if (sc->ps_enabled &&
  115. !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
  116. PS_WAIT_FOR_CAB |
  117. PS_WAIT_FOR_PSPOLL_DATA |
  118. PS_WAIT_FOR_TX_ACK)))
  119. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
  120. unlock:
  121. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  122. }
  123. static void ath_start_ani(struct ath_common *common)
  124. {
  125. struct ath_hw *ah = common->ah;
  126. unsigned long timestamp = jiffies_to_msecs(jiffies);
  127. struct ath_softc *sc = (struct ath_softc *) common->priv;
  128. if (!(sc->sc_flags & SC_OP_ANI_RUN))
  129. return;
  130. if (sc->sc_flags & SC_OP_OFFCHANNEL)
  131. return;
  132. common->ani.longcal_timer = timestamp;
  133. common->ani.shortcal_timer = timestamp;
  134. common->ani.checkani_timer = timestamp;
  135. mod_timer(&common->ani.timer,
  136. jiffies +
  137. msecs_to_jiffies((u32)ah->config.ani_poll_interval));
  138. }
  139. static void ath_update_survey_nf(struct ath_softc *sc, int channel)
  140. {
  141. struct ath_hw *ah = sc->sc_ah;
  142. struct ath9k_channel *chan = &ah->channels[channel];
  143. struct survey_info *survey = &sc->survey[channel];
  144. if (chan->noisefloor) {
  145. survey->filled |= SURVEY_INFO_NOISE_DBM;
  146. survey->noise = chan->noisefloor;
  147. }
  148. }
  149. static void ath_update_survey_stats(struct ath_softc *sc)
  150. {
  151. struct ath_hw *ah = sc->sc_ah;
  152. struct ath_common *common = ath9k_hw_common(ah);
  153. int pos = ah->curchan - &ah->channels[0];
  154. struct survey_info *survey = &sc->survey[pos];
  155. struct ath_cycle_counters *cc = &common->cc_survey;
  156. unsigned int div = common->clockrate * 1000;
  157. if (!ah->curchan)
  158. return;
  159. if (ah->power_mode == ATH9K_PM_AWAKE)
  160. ath_hw_cycle_counters_update(common);
  161. if (cc->cycles > 0) {
  162. survey->filled |= SURVEY_INFO_CHANNEL_TIME |
  163. SURVEY_INFO_CHANNEL_TIME_BUSY |
  164. SURVEY_INFO_CHANNEL_TIME_RX |
  165. SURVEY_INFO_CHANNEL_TIME_TX;
  166. survey->channel_time += cc->cycles / div;
  167. survey->channel_time_busy += cc->rx_busy / div;
  168. survey->channel_time_rx += cc->rx_frame / div;
  169. survey->channel_time_tx += cc->tx_frame / div;
  170. }
  171. memset(cc, 0, sizeof(*cc));
  172. ath_update_survey_nf(sc, pos);
  173. }
  174. /*
  175. * Set/change channels. If the channel is really being changed, it's done
  176. * by reseting the chip. To accomplish this we must first cleanup any pending
  177. * DMA, then restart stuff.
  178. */
  179. int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
  180. struct ath9k_channel *hchan)
  181. {
  182. struct ath_wiphy *aphy = hw->priv;
  183. struct ath_hw *ah = sc->sc_ah;
  184. struct ath_common *common = ath9k_hw_common(ah);
  185. struct ieee80211_conf *conf = &common->hw->conf;
  186. bool fastcc = true, stopped;
  187. struct ieee80211_channel *channel = hw->conf.channel;
  188. struct ath9k_hw_cal_data *caldata = NULL;
  189. int r;
  190. if (sc->sc_flags & SC_OP_INVALID)
  191. return -EIO;
  192. del_timer_sync(&common->ani.timer);
  193. cancel_work_sync(&sc->paprd_work);
  194. cancel_work_sync(&sc->hw_check_work);
  195. cancel_delayed_work_sync(&sc->tx_complete_work);
  196. ath9k_ps_wakeup(sc);
  197. /*
  198. * This is only performed if the channel settings have
  199. * actually changed.
  200. *
  201. * To switch channels clear any pending DMA operations;
  202. * wait long enough for the RX fifo to drain, reset the
  203. * hardware at the new frequency, and then re-enable
  204. * the relevant bits of the h/w.
  205. */
  206. ath9k_hw_set_interrupts(ah, 0);
  207. ath_drain_all_txq(sc, false);
  208. spin_lock_bh(&sc->rx.pcu_lock);
  209. stopped = ath_stoprecv(sc);
  210. /* XXX: do not flush receive queue here. We don't want
  211. * to flush data frames already in queue because of
  212. * changing channel. */
  213. if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
  214. fastcc = false;
  215. if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
  216. caldata = &aphy->caldata;
  217. ath_print(common, ATH_DBG_CONFIG,
  218. "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
  219. sc->sc_ah->curchan->channel,
  220. channel->center_freq, conf_is_ht40(conf),
  221. fastcc);
  222. spin_lock_bh(&sc->sc_resetlock);
  223. r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
  224. if (r) {
  225. ath_print(common, ATH_DBG_FATAL,
  226. "Unable to reset channel (%u MHz), "
  227. "reset status %d\n",
  228. channel->center_freq, r);
  229. spin_unlock_bh(&sc->sc_resetlock);
  230. spin_unlock_bh(&sc->rx.pcu_lock);
  231. goto ps_restore;
  232. }
  233. spin_unlock_bh(&sc->sc_resetlock);
  234. if (ath_startrecv(sc) != 0) {
  235. ath_print(common, ATH_DBG_FATAL,
  236. "Unable to restart recv logic\n");
  237. r = -EIO;
  238. spin_unlock_bh(&sc->rx.pcu_lock);
  239. goto ps_restore;
  240. }
  241. spin_unlock_bh(&sc->rx.pcu_lock);
  242. ath_update_txpow(sc);
  243. ath9k_hw_set_interrupts(ah, ah->imask);
  244. if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
  245. ath_beacon_config(sc, NULL);
  246. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  247. ath_start_ani(common);
  248. }
  249. ps_restore:
  250. ath9k_ps_restore(sc);
  251. return r;
  252. }
  253. static void ath_paprd_activate(struct ath_softc *sc)
  254. {
  255. struct ath_hw *ah = sc->sc_ah;
  256. struct ath9k_hw_cal_data *caldata = ah->caldata;
  257. struct ath_common *common = ath9k_hw_common(ah);
  258. int chain;
  259. if (!caldata || !caldata->paprd_done)
  260. return;
  261. ath9k_ps_wakeup(sc);
  262. ar9003_paprd_enable(ah, false);
  263. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  264. if (!(common->tx_chainmask & BIT(chain)))
  265. continue;
  266. ar9003_paprd_populate_single_table(ah, caldata, chain);
  267. }
  268. ar9003_paprd_enable(ah, true);
  269. ath9k_ps_restore(sc);
  270. }
  271. void ath_paprd_calibrate(struct work_struct *work)
  272. {
  273. struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
  274. struct ieee80211_hw *hw = sc->hw;
  275. struct ath_hw *ah = sc->sc_ah;
  276. struct ieee80211_hdr *hdr;
  277. struct sk_buff *skb = NULL;
  278. struct ieee80211_tx_info *tx_info;
  279. int band = hw->conf.channel->band;
  280. struct ieee80211_supported_band *sband = &sc->sbands[band];
  281. struct ath_tx_control txctl;
  282. struct ath9k_hw_cal_data *caldata = ah->caldata;
  283. struct ath_common *common = ath9k_hw_common(ah);
  284. int qnum, ftype;
  285. int chain_ok = 0;
  286. int chain;
  287. int len = 1800;
  288. int time_left;
  289. int i;
  290. if (!caldata)
  291. return;
  292. skb = alloc_skb(len, GFP_KERNEL);
  293. if (!skb)
  294. return;
  295. tx_info = IEEE80211_SKB_CB(skb);
  296. skb_put(skb, len);
  297. memset(skb->data, 0, len);
  298. hdr = (struct ieee80211_hdr *)skb->data;
  299. ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
  300. hdr->frame_control = cpu_to_le16(ftype);
  301. hdr->duration_id = cpu_to_le16(10);
  302. memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
  303. memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
  304. memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
  305. memset(&txctl, 0, sizeof(txctl));
  306. qnum = sc->tx.hwq_map[WME_AC_BE];
  307. txctl.txq = &sc->tx.txq[qnum];
  308. ath9k_ps_wakeup(sc);
  309. ar9003_paprd_init_table(ah);
  310. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  311. if (!(common->tx_chainmask & BIT(chain)))
  312. continue;
  313. chain_ok = 0;
  314. memset(tx_info, 0, sizeof(*tx_info));
  315. tx_info->band = band;
  316. for (i = 0; i < 4; i++) {
  317. tx_info->control.rates[i].idx = sband->n_bitrates - 1;
  318. tx_info->control.rates[i].count = 6;
  319. }
  320. init_completion(&sc->paprd_complete);
  321. ar9003_paprd_setup_gain_table(ah, chain);
  322. txctl.paprd = BIT(chain);
  323. if (ath_tx_start(hw, skb, &txctl) != 0)
  324. break;
  325. time_left = wait_for_completion_timeout(&sc->paprd_complete,
  326. msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
  327. if (!time_left) {
  328. ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
  329. "Timeout waiting for paprd training on "
  330. "TX chain %d\n",
  331. chain);
  332. goto fail_paprd;
  333. }
  334. if (!ar9003_paprd_is_done(ah))
  335. break;
  336. if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
  337. break;
  338. chain_ok = 1;
  339. }
  340. kfree_skb(skb);
  341. if (chain_ok) {
  342. caldata->paprd_done = true;
  343. ath_paprd_activate(sc);
  344. }
  345. fail_paprd:
  346. ath9k_ps_restore(sc);
  347. }
  348. /*
  349. * This routine performs the periodic noise floor calibration function
  350. * that is used to adjust and optimize the chip performance. This
  351. * takes environmental changes (location, temperature) into account.
  352. * When the task is complete, it reschedules itself depending on the
  353. * appropriate interval that was calculated.
  354. */
  355. void ath_ani_calibrate(unsigned long data)
  356. {
  357. struct ath_softc *sc = (struct ath_softc *)data;
  358. struct ath_hw *ah = sc->sc_ah;
  359. struct ath_common *common = ath9k_hw_common(ah);
  360. bool longcal = false;
  361. bool shortcal = false;
  362. bool aniflag = false;
  363. unsigned int timestamp = jiffies_to_msecs(jiffies);
  364. u32 cal_interval, short_cal_interval, long_cal_interval;
  365. unsigned long flags;
  366. if (ah->caldata && ah->caldata->nfcal_interference)
  367. long_cal_interval = ATH_LONG_CALINTERVAL_INT;
  368. else
  369. long_cal_interval = ATH_LONG_CALINTERVAL;
  370. short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
  371. ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
  372. /* Only calibrate if awake */
  373. if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
  374. goto set_timer;
  375. ath9k_ps_wakeup(sc);
  376. /* Long calibration runs independently of short calibration. */
  377. if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
  378. longcal = true;
  379. ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
  380. common->ani.longcal_timer = timestamp;
  381. }
  382. /* Short calibration applies only while caldone is false */
  383. if (!common->ani.caldone) {
  384. if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
  385. shortcal = true;
  386. ath_print(common, ATH_DBG_ANI,
  387. "shortcal @%lu\n", jiffies);
  388. common->ani.shortcal_timer = timestamp;
  389. common->ani.resetcal_timer = timestamp;
  390. }
  391. } else {
  392. if ((timestamp - common->ani.resetcal_timer) >=
  393. ATH_RESTART_CALINTERVAL) {
  394. common->ani.caldone = ath9k_hw_reset_calvalid(ah);
  395. if (common->ani.caldone)
  396. common->ani.resetcal_timer = timestamp;
  397. }
  398. }
  399. /* Verify whether we must check ANI */
  400. if ((timestamp - common->ani.checkani_timer) >=
  401. ah->config.ani_poll_interval) {
  402. aniflag = true;
  403. common->ani.checkani_timer = timestamp;
  404. }
  405. /* Skip all processing if there's nothing to do. */
  406. if (longcal || shortcal || aniflag) {
  407. /* Call ANI routine if necessary */
  408. if (aniflag) {
  409. spin_lock_irqsave(&common->cc_lock, flags);
  410. ath9k_hw_ani_monitor(ah, ah->curchan);
  411. ath_update_survey_stats(sc);
  412. spin_unlock_irqrestore(&common->cc_lock, flags);
  413. }
  414. /* Perform calibration if necessary */
  415. if (longcal || shortcal) {
  416. common->ani.caldone =
  417. ath9k_hw_calibrate(ah,
  418. ah->curchan,
  419. common->rx_chainmask,
  420. longcal);
  421. }
  422. }
  423. ath9k_ps_restore(sc);
  424. set_timer:
  425. /*
  426. * Set timer interval based on previous results.
  427. * The interval must be the shortest necessary to satisfy ANI,
  428. * short calibration and long calibration.
  429. */
  430. cal_interval = ATH_LONG_CALINTERVAL;
  431. if (sc->sc_ah->config.enable_ani)
  432. cal_interval = min(cal_interval,
  433. (u32)ah->config.ani_poll_interval);
  434. if (!common->ani.caldone)
  435. cal_interval = min(cal_interval, (u32)short_cal_interval);
  436. mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
  437. if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
  438. if (!ah->caldata->paprd_done)
  439. ieee80211_queue_work(sc->hw, &sc->paprd_work);
  440. else
  441. ath_paprd_activate(sc);
  442. }
  443. }
  444. /*
  445. * Update tx/rx chainmask. For legacy association,
  446. * hard code chainmask to 1x1, for 11n association, use
  447. * the chainmask configuration, for bt coexistence, use
  448. * the chainmask configuration even in legacy mode.
  449. */
  450. void ath_update_chainmask(struct ath_softc *sc, int is_ht)
  451. {
  452. struct ath_hw *ah = sc->sc_ah;
  453. struct ath_common *common = ath9k_hw_common(ah);
  454. if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht ||
  455. (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
  456. common->tx_chainmask = ah->caps.tx_chainmask;
  457. common->rx_chainmask = ah->caps.rx_chainmask;
  458. } else {
  459. common->tx_chainmask = 1;
  460. common->rx_chainmask = 1;
  461. }
  462. ath_print(common, ATH_DBG_CONFIG,
  463. "tx chmask: %d, rx chmask: %d\n",
  464. common->tx_chainmask,
  465. common->rx_chainmask);
  466. }
  467. static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
  468. {
  469. struct ath_node *an;
  470. an = (struct ath_node *)sta->drv_priv;
  471. if (sc->sc_flags & SC_OP_TXAGGR) {
  472. ath_tx_node_init(sc, an);
  473. an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
  474. sta->ht_cap.ampdu_factor);
  475. an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
  476. an->last_rssi = ATH_RSSI_DUMMY_MARKER;
  477. }
  478. }
  479. static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
  480. {
  481. struct ath_node *an = (struct ath_node *)sta->drv_priv;
  482. if (sc->sc_flags & SC_OP_TXAGGR)
  483. ath_tx_node_cleanup(sc, an);
  484. }
  485. void ath_hw_check(struct work_struct *work)
  486. {
  487. struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
  488. int i;
  489. ath9k_ps_wakeup(sc);
  490. for (i = 0; i < 3; i++) {
  491. if (ath9k_hw_check_alive(sc->sc_ah))
  492. goto out;
  493. msleep(1);
  494. }
  495. ath_reset(sc, true);
  496. out:
  497. ath9k_ps_restore(sc);
  498. }
  499. void ath9k_tasklet(unsigned long data)
  500. {
  501. struct ath_softc *sc = (struct ath_softc *)data;
  502. struct ath_hw *ah = sc->sc_ah;
  503. struct ath_common *common = ath9k_hw_common(ah);
  504. u32 status = sc->intrstatus;
  505. u32 rxmask;
  506. ath9k_ps_wakeup(sc);
  507. if (status & ATH9K_INT_FATAL) {
  508. ath_reset(sc, true);
  509. ath9k_ps_restore(sc);
  510. return;
  511. }
  512. if (!ath9k_hw_check_alive(ah))
  513. ieee80211_queue_work(sc->hw, &sc->hw_check_work);
  514. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  515. rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
  516. ATH9K_INT_RXORN);
  517. else
  518. rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  519. if (status & rxmask) {
  520. spin_lock_bh(&sc->rx.pcu_lock);
  521. /* Check for high priority Rx first */
  522. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  523. (status & ATH9K_INT_RXHP))
  524. ath_rx_tasklet(sc, 0, true);
  525. ath_rx_tasklet(sc, 0, false);
  526. spin_unlock_bh(&sc->rx.pcu_lock);
  527. }
  528. if (status & ATH9K_INT_TX) {
  529. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  530. ath_tx_edma_tasklet(sc);
  531. else
  532. ath_tx_tasklet(sc);
  533. }
  534. if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
  535. /*
  536. * TSF sync does not look correct; remain awake to sync with
  537. * the next Beacon.
  538. */
  539. ath_print(common, ATH_DBG_PS,
  540. "TSFOOR - Sync with next Beacon\n");
  541. sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
  542. }
  543. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  544. if (status & ATH9K_INT_GENTIMER)
  545. ath_gen_timer_isr(sc->sc_ah);
  546. /* re-enable hardware interrupt */
  547. ath9k_hw_set_interrupts(ah, ah->imask);
  548. ath9k_ps_restore(sc);
  549. }
  550. irqreturn_t ath_isr(int irq, void *dev)
  551. {
  552. #define SCHED_INTR ( \
  553. ATH9K_INT_FATAL | \
  554. ATH9K_INT_RXORN | \
  555. ATH9K_INT_RXEOL | \
  556. ATH9K_INT_RX | \
  557. ATH9K_INT_RXLP | \
  558. ATH9K_INT_RXHP | \
  559. ATH9K_INT_TX | \
  560. ATH9K_INT_BMISS | \
  561. ATH9K_INT_CST | \
  562. ATH9K_INT_TSFOOR | \
  563. ATH9K_INT_GENTIMER)
  564. struct ath_softc *sc = dev;
  565. struct ath_hw *ah = sc->sc_ah;
  566. struct ath_common *common = ath9k_hw_common(ah);
  567. enum ath9k_int status;
  568. bool sched = false;
  569. /*
  570. * The hardware is not ready/present, don't
  571. * touch anything. Note this can happen early
  572. * on if the IRQ is shared.
  573. */
  574. if (sc->sc_flags & SC_OP_INVALID)
  575. return IRQ_NONE;
  576. /* shared irq, not for us */
  577. if (!ath9k_hw_intrpend(ah))
  578. return IRQ_NONE;
  579. /*
  580. * Figure out the reason(s) for the interrupt. Note
  581. * that the hal returns a pseudo-ISR that may include
  582. * bits we haven't explicitly enabled so we mask the
  583. * value to insure we only process bits we requested.
  584. */
  585. ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
  586. status &= ah->imask; /* discard unasked-for bits */
  587. /*
  588. * If there are no status bits set, then this interrupt was not
  589. * for me (should have been caught above).
  590. */
  591. if (!status)
  592. return IRQ_NONE;
  593. /* Cache the status */
  594. sc->intrstatus = status;
  595. if (status & SCHED_INTR)
  596. sched = true;
  597. /*
  598. * If a FATAL or RXORN interrupt is received, we have to reset the
  599. * chip immediately.
  600. */
  601. if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
  602. !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
  603. goto chip_reset;
  604. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  605. (status & ATH9K_INT_BB_WATCHDOG)) {
  606. spin_lock(&common->cc_lock);
  607. ath_hw_cycle_counters_update(common);
  608. ar9003_hw_bb_watchdog_dbg_info(ah);
  609. spin_unlock(&common->cc_lock);
  610. goto chip_reset;
  611. }
  612. if (status & ATH9K_INT_SWBA)
  613. tasklet_schedule(&sc->bcon_tasklet);
  614. if (status & ATH9K_INT_TXURN)
  615. ath9k_hw_updatetxtriglevel(ah, true);
  616. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
  617. if (status & ATH9K_INT_RXEOL) {
  618. ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  619. ath9k_hw_set_interrupts(ah, ah->imask);
  620. }
  621. }
  622. if (status & ATH9K_INT_MIB) {
  623. /*
  624. * Disable interrupts until we service the MIB
  625. * interrupt; otherwise it will continue to
  626. * fire.
  627. */
  628. ath9k_hw_set_interrupts(ah, 0);
  629. /*
  630. * Let the hal handle the event. We assume
  631. * it will clear whatever condition caused
  632. * the interrupt.
  633. */
  634. spin_lock(&common->cc_lock);
  635. ath9k_hw_proc_mib_event(ah);
  636. spin_unlock(&common->cc_lock);
  637. ath9k_hw_set_interrupts(ah, ah->imask);
  638. }
  639. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  640. if (status & ATH9K_INT_TIM_TIMER) {
  641. /* Clear RxAbort bit so that we can
  642. * receive frames */
  643. ath9k_setpower(sc, ATH9K_PM_AWAKE);
  644. ath9k_hw_setrxabort(sc->sc_ah, 0);
  645. sc->ps_flags |= PS_WAIT_FOR_BEACON;
  646. }
  647. chip_reset:
  648. ath_debug_stat_interrupt(sc, status);
  649. if (sched) {
  650. /* turn off every interrupt except SWBA */
  651. ath9k_hw_set_interrupts(ah, (ah->imask & ATH9K_INT_SWBA));
  652. tasklet_schedule(&sc->intr_tq);
  653. }
  654. return IRQ_HANDLED;
  655. #undef SCHED_INTR
  656. }
  657. static u32 ath_get_extchanmode(struct ath_softc *sc,
  658. struct ieee80211_channel *chan,
  659. enum nl80211_channel_type channel_type)
  660. {
  661. u32 chanmode = 0;
  662. switch (chan->band) {
  663. case IEEE80211_BAND_2GHZ:
  664. switch(channel_type) {
  665. case NL80211_CHAN_NO_HT:
  666. case NL80211_CHAN_HT20:
  667. chanmode = CHANNEL_G_HT20;
  668. break;
  669. case NL80211_CHAN_HT40PLUS:
  670. chanmode = CHANNEL_G_HT40PLUS;
  671. break;
  672. case NL80211_CHAN_HT40MINUS:
  673. chanmode = CHANNEL_G_HT40MINUS;
  674. break;
  675. }
  676. break;
  677. case IEEE80211_BAND_5GHZ:
  678. switch(channel_type) {
  679. case NL80211_CHAN_NO_HT:
  680. case NL80211_CHAN_HT20:
  681. chanmode = CHANNEL_A_HT20;
  682. break;
  683. case NL80211_CHAN_HT40PLUS:
  684. chanmode = CHANNEL_A_HT40PLUS;
  685. break;
  686. case NL80211_CHAN_HT40MINUS:
  687. chanmode = CHANNEL_A_HT40MINUS;
  688. break;
  689. }
  690. break;
  691. default:
  692. break;
  693. }
  694. return chanmode;
  695. }
  696. static void ath9k_bss_assoc_info(struct ath_softc *sc,
  697. struct ieee80211_vif *vif,
  698. struct ieee80211_bss_conf *bss_conf)
  699. {
  700. struct ath_hw *ah = sc->sc_ah;
  701. struct ath_common *common = ath9k_hw_common(ah);
  702. if (bss_conf->assoc) {
  703. ath_print(common, ATH_DBG_CONFIG,
  704. "Bss Info ASSOC %d, bssid: %pM\n",
  705. bss_conf->aid, common->curbssid);
  706. /* New association, store aid */
  707. common->curaid = bss_conf->aid;
  708. ath9k_hw_write_associd(ah);
  709. /*
  710. * Request a re-configuration of Beacon related timers
  711. * on the receipt of the first Beacon frame (i.e.,
  712. * after time sync with the AP).
  713. */
  714. sc->ps_flags |= PS_BEACON_SYNC;
  715. /* Configure the beacon */
  716. ath_beacon_config(sc, vif);
  717. /* Reset rssi stats */
  718. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  719. sc->sc_flags |= SC_OP_ANI_RUN;
  720. ath_start_ani(common);
  721. } else {
  722. ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
  723. common->curaid = 0;
  724. /* Stop ANI */
  725. sc->sc_flags &= ~SC_OP_ANI_RUN;
  726. del_timer_sync(&common->ani.timer);
  727. }
  728. }
  729. void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
  730. {
  731. struct ath_hw *ah = sc->sc_ah;
  732. struct ath_common *common = ath9k_hw_common(ah);
  733. struct ieee80211_channel *channel = hw->conf.channel;
  734. int r;
  735. ath9k_ps_wakeup(sc);
  736. ath9k_hw_configpcipowersave(ah, 0, 0);
  737. if (!ah->curchan)
  738. ah->curchan = ath_get_curchannel(sc, sc->hw);
  739. spin_lock_bh(&sc->rx.pcu_lock);
  740. spin_lock_bh(&sc->sc_resetlock);
  741. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  742. if (r) {
  743. ath_print(common, ATH_DBG_FATAL,
  744. "Unable to reset channel (%u MHz), "
  745. "reset status %d\n",
  746. channel->center_freq, r);
  747. }
  748. spin_unlock_bh(&sc->sc_resetlock);
  749. ath_update_txpow(sc);
  750. if (ath_startrecv(sc) != 0) {
  751. ath_print(common, ATH_DBG_FATAL,
  752. "Unable to restart recv logic\n");
  753. spin_unlock_bh(&sc->rx.pcu_lock);
  754. return;
  755. }
  756. spin_unlock_bh(&sc->rx.pcu_lock);
  757. if (sc->sc_flags & SC_OP_BEACONS)
  758. ath_beacon_config(sc, NULL); /* restart beacons */
  759. /* Re-Enable interrupts */
  760. ath9k_hw_set_interrupts(ah, ah->imask);
  761. /* Enable LED */
  762. ath9k_hw_cfg_output(ah, ah->led_pin,
  763. AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
  764. ath9k_hw_set_gpio(ah, ah->led_pin, 0);
  765. ieee80211_wake_queues(hw);
  766. ath9k_ps_restore(sc);
  767. }
  768. void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
  769. {
  770. struct ath_hw *ah = sc->sc_ah;
  771. struct ieee80211_channel *channel = hw->conf.channel;
  772. int r;
  773. ath9k_ps_wakeup(sc);
  774. ieee80211_stop_queues(hw);
  775. /*
  776. * Keep the LED on when the radio is disabled
  777. * during idle unassociated state.
  778. */
  779. if (!sc->ps_idle) {
  780. ath9k_hw_set_gpio(ah, ah->led_pin, 1);
  781. ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
  782. }
  783. /* Disable interrupts */
  784. ath9k_hw_set_interrupts(ah, 0);
  785. ath_drain_all_txq(sc, false); /* clear pending tx frames */
  786. spin_lock_bh(&sc->rx.pcu_lock);
  787. ath_stoprecv(sc); /* turn off frame recv */
  788. ath_flushrecv(sc); /* flush recv queue */
  789. if (!ah->curchan)
  790. ah->curchan = ath_get_curchannel(sc, hw);
  791. spin_lock_bh(&sc->sc_resetlock);
  792. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  793. if (r) {
  794. ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
  795. "Unable to reset channel (%u MHz), "
  796. "reset status %d\n",
  797. channel->center_freq, r);
  798. }
  799. spin_unlock_bh(&sc->sc_resetlock);
  800. ath9k_hw_phy_disable(ah);
  801. spin_unlock_bh(&sc->rx.pcu_lock);
  802. ath9k_hw_configpcipowersave(ah, 1, 1);
  803. ath9k_ps_restore(sc);
  804. ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
  805. }
  806. int ath_reset(struct ath_softc *sc, bool retry_tx)
  807. {
  808. struct ath_hw *ah = sc->sc_ah;
  809. struct ath_common *common = ath9k_hw_common(ah);
  810. struct ieee80211_hw *hw = sc->hw;
  811. int r;
  812. /* Stop ANI */
  813. del_timer_sync(&common->ani.timer);
  814. ieee80211_stop_queues(hw);
  815. ath9k_hw_set_interrupts(ah, 0);
  816. ath_drain_all_txq(sc, retry_tx);
  817. spin_lock_bh(&sc->rx.pcu_lock);
  818. ath_stoprecv(sc);
  819. ath_flushrecv(sc);
  820. spin_lock_bh(&sc->sc_resetlock);
  821. r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
  822. if (r)
  823. ath_print(common, ATH_DBG_FATAL,
  824. "Unable to reset hardware; reset status %d\n", r);
  825. spin_unlock_bh(&sc->sc_resetlock);
  826. if (ath_startrecv(sc) != 0)
  827. ath_print(common, ATH_DBG_FATAL,
  828. "Unable to start recv logic\n");
  829. spin_unlock_bh(&sc->rx.pcu_lock);
  830. /*
  831. * We may be doing a reset in response to a request
  832. * that changes the channel so update any state that
  833. * might change as a result.
  834. */
  835. ath_update_txpow(sc);
  836. if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
  837. ath_beacon_config(sc, NULL); /* restart beacons */
  838. ath9k_hw_set_interrupts(ah, ah->imask);
  839. if (retry_tx) {
  840. int i;
  841. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  842. if (ATH_TXQ_SETUP(sc, i)) {
  843. spin_lock_bh(&sc->tx.txq[i].axq_lock);
  844. ath_txq_schedule(sc, &sc->tx.txq[i]);
  845. spin_unlock_bh(&sc->tx.txq[i].axq_lock);
  846. }
  847. }
  848. }
  849. ieee80211_wake_queues(hw);
  850. /* Start ANI */
  851. ath_start_ani(common);
  852. return r;
  853. }
  854. static int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
  855. {
  856. int qnum;
  857. switch (queue) {
  858. case 0:
  859. qnum = sc->tx.hwq_map[WME_AC_VO];
  860. break;
  861. case 1:
  862. qnum = sc->tx.hwq_map[WME_AC_VI];
  863. break;
  864. case 2:
  865. qnum = sc->tx.hwq_map[WME_AC_BE];
  866. break;
  867. case 3:
  868. qnum = sc->tx.hwq_map[WME_AC_BK];
  869. break;
  870. default:
  871. qnum = sc->tx.hwq_map[WME_AC_BE];
  872. break;
  873. }
  874. return qnum;
  875. }
  876. int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
  877. {
  878. int qnum;
  879. switch (queue) {
  880. case WME_AC_VO:
  881. qnum = 0;
  882. break;
  883. case WME_AC_VI:
  884. qnum = 1;
  885. break;
  886. case WME_AC_BE:
  887. qnum = 2;
  888. break;
  889. case WME_AC_BK:
  890. qnum = 3;
  891. break;
  892. default:
  893. qnum = -1;
  894. break;
  895. }
  896. return qnum;
  897. }
  898. /* XXX: Remove me once we don't depend on ath9k_channel for all
  899. * this redundant data */
  900. void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
  901. struct ath9k_channel *ichan)
  902. {
  903. struct ieee80211_channel *chan = hw->conf.channel;
  904. struct ieee80211_conf *conf = &hw->conf;
  905. ichan->channel = chan->center_freq;
  906. ichan->chan = chan;
  907. if (chan->band == IEEE80211_BAND_2GHZ) {
  908. ichan->chanmode = CHANNEL_G;
  909. ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
  910. } else {
  911. ichan->chanmode = CHANNEL_A;
  912. ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
  913. }
  914. if (conf_is_ht(conf))
  915. ichan->chanmode = ath_get_extchanmode(sc, chan,
  916. conf->channel_type);
  917. }
  918. /**********************/
  919. /* mac80211 callbacks */
  920. /**********************/
  921. static int ath9k_start(struct ieee80211_hw *hw)
  922. {
  923. struct ath_wiphy *aphy = hw->priv;
  924. struct ath_softc *sc = aphy->sc;
  925. struct ath_hw *ah = sc->sc_ah;
  926. struct ath_common *common = ath9k_hw_common(ah);
  927. struct ieee80211_channel *curchan = hw->conf.channel;
  928. struct ath9k_channel *init_channel;
  929. int r;
  930. ath_print(common, ATH_DBG_CONFIG,
  931. "Starting driver with initial channel: %d MHz\n",
  932. curchan->center_freq);
  933. mutex_lock(&sc->mutex);
  934. if (ath9k_wiphy_started(sc)) {
  935. if (sc->chan_idx == curchan->hw_value) {
  936. /*
  937. * Already on the operational channel, the new wiphy
  938. * can be marked active.
  939. */
  940. aphy->state = ATH_WIPHY_ACTIVE;
  941. ieee80211_wake_queues(hw);
  942. } else {
  943. /*
  944. * Another wiphy is on another channel, start the new
  945. * wiphy in paused state.
  946. */
  947. aphy->state = ATH_WIPHY_PAUSED;
  948. ieee80211_stop_queues(hw);
  949. }
  950. mutex_unlock(&sc->mutex);
  951. return 0;
  952. }
  953. aphy->state = ATH_WIPHY_ACTIVE;
  954. /* setup initial channel */
  955. sc->chan_idx = curchan->hw_value;
  956. init_channel = ath_get_curchannel(sc, hw);
  957. /* Reset SERDES registers */
  958. ath9k_hw_configpcipowersave(ah, 0, 0);
  959. /*
  960. * The basic interface to setting the hardware in a good
  961. * state is ``reset''. On return the hardware is known to
  962. * be powered up and with interrupts disabled. This must
  963. * be followed by initialization of the appropriate bits
  964. * and then setup of the interrupt mask.
  965. */
  966. spin_lock_bh(&sc->rx.pcu_lock);
  967. spin_lock_bh(&sc->sc_resetlock);
  968. r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
  969. if (r) {
  970. ath_print(common, ATH_DBG_FATAL,
  971. "Unable to reset hardware; reset status %d "
  972. "(freq %u MHz)\n", r,
  973. curchan->center_freq);
  974. spin_unlock_bh(&sc->sc_resetlock);
  975. spin_unlock_bh(&sc->rx.pcu_lock);
  976. goto mutex_unlock;
  977. }
  978. spin_unlock_bh(&sc->sc_resetlock);
  979. /*
  980. * This is needed only to setup initial state
  981. * but it's best done after a reset.
  982. */
  983. ath_update_txpow(sc);
  984. /*
  985. * Setup the hardware after reset:
  986. * The receive engine is set going.
  987. * Frame transmit is handled entirely
  988. * in the frame output path; there's nothing to do
  989. * here except setup the interrupt mask.
  990. */
  991. if (ath_startrecv(sc) != 0) {
  992. ath_print(common, ATH_DBG_FATAL,
  993. "Unable to start recv logic\n");
  994. r = -EIO;
  995. spin_unlock_bh(&sc->rx.pcu_lock);
  996. goto mutex_unlock;
  997. }
  998. spin_unlock_bh(&sc->rx.pcu_lock);
  999. /* Setup our intr mask. */
  1000. ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
  1001. ATH9K_INT_RXORN | ATH9K_INT_FATAL |
  1002. ATH9K_INT_GLOBAL;
  1003. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  1004. ah->imask |= ATH9K_INT_RXHP |
  1005. ATH9K_INT_RXLP |
  1006. ATH9K_INT_BB_WATCHDOG;
  1007. else
  1008. ah->imask |= ATH9K_INT_RX;
  1009. ah->imask |= ATH9K_INT_GTT;
  1010. if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
  1011. ah->imask |= ATH9K_INT_CST;
  1012. sc->sc_flags &= ~SC_OP_INVALID;
  1013. sc->sc_ah->is_monitoring = false;
  1014. /* Disable BMISS interrupt when we're not associated */
  1015. ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
  1016. ath9k_hw_set_interrupts(ah, ah->imask);
  1017. ieee80211_wake_queues(hw);
  1018. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  1019. if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
  1020. !ah->btcoex_hw.enabled) {
  1021. ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
  1022. AR_STOMP_LOW_WLAN_WGHT);
  1023. ath9k_hw_btcoex_enable(ah);
  1024. if (common->bus_ops->bt_coex_prep)
  1025. common->bus_ops->bt_coex_prep(common);
  1026. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  1027. ath9k_btcoex_timer_resume(sc);
  1028. }
  1029. mutex_unlock:
  1030. mutex_unlock(&sc->mutex);
  1031. return r;
  1032. }
  1033. static int ath9k_tx(struct ieee80211_hw *hw,
  1034. struct sk_buff *skb)
  1035. {
  1036. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  1037. struct ath_wiphy *aphy = hw->priv;
  1038. struct ath_softc *sc = aphy->sc;
  1039. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1040. struct ath_tx_control txctl;
  1041. int padpos, padsize;
  1042. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
  1043. int qnum;
  1044. if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
  1045. ath_print(common, ATH_DBG_XMIT,
  1046. "ath9k: %s: TX in unexpected wiphy state "
  1047. "%d\n", wiphy_name(hw->wiphy), aphy->state);
  1048. goto exit;
  1049. }
  1050. if (sc->ps_enabled) {
  1051. /*
  1052. * mac80211 does not set PM field for normal data frames, so we
  1053. * need to update that based on the current PS mode.
  1054. */
  1055. if (ieee80211_is_data(hdr->frame_control) &&
  1056. !ieee80211_is_nullfunc(hdr->frame_control) &&
  1057. !ieee80211_has_pm(hdr->frame_control)) {
  1058. ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
  1059. "while in PS mode\n");
  1060. hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
  1061. }
  1062. }
  1063. if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
  1064. /*
  1065. * We are using PS-Poll and mac80211 can request TX while in
  1066. * power save mode. Need to wake up hardware for the TX to be
  1067. * completed and if needed, also for RX of buffered frames.
  1068. */
  1069. ath9k_ps_wakeup(sc);
  1070. if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  1071. ath9k_hw_setrxabort(sc->sc_ah, 0);
  1072. if (ieee80211_is_pspoll(hdr->frame_control)) {
  1073. ath_print(common, ATH_DBG_PS,
  1074. "Sending PS-Poll to pick a buffered frame\n");
  1075. sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
  1076. } else {
  1077. ath_print(common, ATH_DBG_PS,
  1078. "Wake up to complete TX\n");
  1079. sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
  1080. }
  1081. /*
  1082. * The actual restore operation will happen only after
  1083. * the sc_flags bit is cleared. We are just dropping
  1084. * the ps_usecount here.
  1085. */
  1086. ath9k_ps_restore(sc);
  1087. }
  1088. memset(&txctl, 0, sizeof(struct ath_tx_control));
  1089. /*
  1090. * As a temporary workaround, assign seq# here; this will likely need
  1091. * to be cleaned up to work better with Beacon transmission and virtual
  1092. * BSSes.
  1093. */
  1094. if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  1095. if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
  1096. sc->tx.seq_no += 0x10;
  1097. hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  1098. hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
  1099. }
  1100. /* Add the padding after the header if this is not already done */
  1101. padpos = ath9k_cmn_padpos(hdr->frame_control);
  1102. padsize = padpos & 3;
  1103. if (padsize && skb->len>padpos) {
  1104. if (skb_headroom(skb) < padsize)
  1105. return -1;
  1106. skb_push(skb, padsize);
  1107. memmove(skb->data, skb->data + padsize, padpos);
  1108. }
  1109. qnum = ath_get_hal_qnum(skb_get_queue_mapping(skb), sc);
  1110. txctl.txq = &sc->tx.txq[qnum];
  1111. ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
  1112. if (ath_tx_start(hw, skb, &txctl) != 0) {
  1113. ath_print(common, ATH_DBG_XMIT, "TX failed\n");
  1114. goto exit;
  1115. }
  1116. return 0;
  1117. exit:
  1118. dev_kfree_skb_any(skb);
  1119. return 0;
  1120. }
  1121. static void ath9k_stop(struct ieee80211_hw *hw)
  1122. {
  1123. struct ath_wiphy *aphy = hw->priv;
  1124. struct ath_softc *sc = aphy->sc;
  1125. struct ath_hw *ah = sc->sc_ah;
  1126. struct ath_common *common = ath9k_hw_common(ah);
  1127. int i;
  1128. mutex_lock(&sc->mutex);
  1129. aphy->state = ATH_WIPHY_INACTIVE;
  1130. if (led_blink)
  1131. cancel_delayed_work_sync(&sc->ath_led_blink_work);
  1132. cancel_delayed_work_sync(&sc->tx_complete_work);
  1133. cancel_work_sync(&sc->paprd_work);
  1134. cancel_work_sync(&sc->hw_check_work);
  1135. for (i = 0; i < sc->num_sec_wiphy; i++) {
  1136. if (sc->sec_wiphy[i])
  1137. break;
  1138. }
  1139. if (i == sc->num_sec_wiphy) {
  1140. cancel_delayed_work_sync(&sc->wiphy_work);
  1141. cancel_work_sync(&sc->chan_work);
  1142. }
  1143. if (sc->sc_flags & SC_OP_INVALID) {
  1144. ath_print(common, ATH_DBG_ANY, "Device not present\n");
  1145. mutex_unlock(&sc->mutex);
  1146. return;
  1147. }
  1148. if (ath9k_wiphy_started(sc)) {
  1149. mutex_unlock(&sc->mutex);
  1150. return; /* another wiphy still in use */
  1151. }
  1152. /* Ensure HW is awake when we try to shut it down. */
  1153. ath9k_ps_wakeup(sc);
  1154. if (ah->btcoex_hw.enabled) {
  1155. ath9k_hw_btcoex_disable(ah);
  1156. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  1157. ath9k_btcoex_timer_pause(sc);
  1158. }
  1159. /* make sure h/w will not generate any interrupt
  1160. * before setting the invalid flag. */
  1161. ath9k_hw_set_interrupts(ah, 0);
  1162. spin_lock_bh(&sc->rx.pcu_lock);
  1163. if (!(sc->sc_flags & SC_OP_INVALID)) {
  1164. ath_drain_all_txq(sc, false);
  1165. ath_stoprecv(sc);
  1166. ath9k_hw_phy_disable(ah);
  1167. } else
  1168. sc->rx.rxlink = NULL;
  1169. spin_unlock_bh(&sc->rx.pcu_lock);
  1170. /* disable HAL and put h/w to sleep */
  1171. ath9k_hw_disable(ah);
  1172. ath9k_hw_configpcipowersave(ah, 1, 1);
  1173. ath9k_ps_restore(sc);
  1174. /* Finally, put the chip in FULL SLEEP mode */
  1175. ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
  1176. sc->sc_flags |= SC_OP_INVALID;
  1177. mutex_unlock(&sc->mutex);
  1178. ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
  1179. }
  1180. static int ath9k_add_interface(struct ieee80211_hw *hw,
  1181. struct ieee80211_vif *vif)
  1182. {
  1183. struct ath_wiphy *aphy = hw->priv;
  1184. struct ath_softc *sc = aphy->sc;
  1185. struct ath_hw *ah = sc->sc_ah;
  1186. struct ath_common *common = ath9k_hw_common(ah);
  1187. struct ath_vif *avp = (void *)vif->drv_priv;
  1188. enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
  1189. int ret = 0;
  1190. mutex_lock(&sc->mutex);
  1191. switch (vif->type) {
  1192. case NL80211_IFTYPE_STATION:
  1193. ic_opmode = NL80211_IFTYPE_STATION;
  1194. break;
  1195. case NL80211_IFTYPE_WDS:
  1196. ic_opmode = NL80211_IFTYPE_WDS;
  1197. break;
  1198. case NL80211_IFTYPE_ADHOC:
  1199. case NL80211_IFTYPE_AP:
  1200. case NL80211_IFTYPE_MESH_POINT:
  1201. if (sc->nbcnvifs >= ATH_BCBUF) {
  1202. ret = -ENOBUFS;
  1203. goto out;
  1204. }
  1205. ic_opmode = vif->type;
  1206. break;
  1207. default:
  1208. ath_print(common, ATH_DBG_FATAL,
  1209. "Interface type %d not yet supported\n", vif->type);
  1210. ret = -EOPNOTSUPP;
  1211. goto out;
  1212. }
  1213. ath_print(common, ATH_DBG_CONFIG,
  1214. "Attach a VIF of type: %d\n", ic_opmode);
  1215. /* Set the VIF opmode */
  1216. avp->av_opmode = ic_opmode;
  1217. avp->av_bslot = -1;
  1218. sc->nvifs++;
  1219. ath9k_set_bssid_mask(hw, vif);
  1220. if (sc->nvifs > 1)
  1221. goto out; /* skip global settings for secondary vif */
  1222. if (ic_opmode == NL80211_IFTYPE_AP) {
  1223. ath9k_hw_set_tsfadjust(ah, 1);
  1224. sc->sc_flags |= SC_OP_TSF_RESET;
  1225. }
  1226. /* Set the device opmode */
  1227. ah->opmode = ic_opmode;
  1228. /*
  1229. * Enable MIB interrupts when there are hardware phy counters.
  1230. * Note we only do this (at the moment) for station mode.
  1231. */
  1232. if ((vif->type == NL80211_IFTYPE_STATION) ||
  1233. (vif->type == NL80211_IFTYPE_ADHOC) ||
  1234. (vif->type == NL80211_IFTYPE_MESH_POINT)) {
  1235. if (ah->config.enable_ani)
  1236. ah->imask |= ATH9K_INT_MIB;
  1237. ah->imask |= ATH9K_INT_TSFOOR;
  1238. }
  1239. ath9k_hw_set_interrupts(ah, ah->imask);
  1240. if (vif->type == NL80211_IFTYPE_AP ||
  1241. vif->type == NL80211_IFTYPE_ADHOC) {
  1242. sc->sc_flags |= SC_OP_ANI_RUN;
  1243. ath_start_ani(common);
  1244. }
  1245. out:
  1246. mutex_unlock(&sc->mutex);
  1247. return ret;
  1248. }
  1249. static void ath9k_remove_interface(struct ieee80211_hw *hw,
  1250. struct ieee80211_vif *vif)
  1251. {
  1252. struct ath_wiphy *aphy = hw->priv;
  1253. struct ath_softc *sc = aphy->sc;
  1254. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1255. struct ath_vif *avp = (void *)vif->drv_priv;
  1256. int i;
  1257. ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
  1258. mutex_lock(&sc->mutex);
  1259. /* Stop ANI */
  1260. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1261. del_timer_sync(&common->ani.timer);
  1262. /* Reclaim beacon resources */
  1263. if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
  1264. (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
  1265. (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
  1266. ath9k_ps_wakeup(sc);
  1267. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1268. ath9k_ps_restore(sc);
  1269. }
  1270. ath_beacon_return(sc, avp);
  1271. sc->sc_flags &= ~SC_OP_BEACONS;
  1272. for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
  1273. if (sc->beacon.bslot[i] == vif) {
  1274. printk(KERN_DEBUG "%s: vif had allocated beacon "
  1275. "slot\n", __func__);
  1276. sc->beacon.bslot[i] = NULL;
  1277. sc->beacon.bslot_aphy[i] = NULL;
  1278. }
  1279. }
  1280. sc->nvifs--;
  1281. mutex_unlock(&sc->mutex);
  1282. }
  1283. static void ath9k_enable_ps(struct ath_softc *sc)
  1284. {
  1285. struct ath_hw *ah = sc->sc_ah;
  1286. sc->ps_enabled = true;
  1287. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1288. if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
  1289. ah->imask |= ATH9K_INT_TIM_TIMER;
  1290. ath9k_hw_set_interrupts(ah, ah->imask);
  1291. }
  1292. ath9k_hw_setrxabort(ah, 1);
  1293. }
  1294. }
  1295. static void ath9k_disable_ps(struct ath_softc *sc)
  1296. {
  1297. struct ath_hw *ah = sc->sc_ah;
  1298. sc->ps_enabled = false;
  1299. ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
  1300. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1301. ath9k_hw_setrxabort(ah, 0);
  1302. sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
  1303. PS_WAIT_FOR_CAB |
  1304. PS_WAIT_FOR_PSPOLL_DATA |
  1305. PS_WAIT_FOR_TX_ACK);
  1306. if (ah->imask & ATH9K_INT_TIM_TIMER) {
  1307. ah->imask &= ~ATH9K_INT_TIM_TIMER;
  1308. ath9k_hw_set_interrupts(ah, ah->imask);
  1309. }
  1310. }
  1311. }
  1312. static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
  1313. {
  1314. struct ath_wiphy *aphy = hw->priv;
  1315. struct ath_softc *sc = aphy->sc;
  1316. struct ath_hw *ah = sc->sc_ah;
  1317. struct ath_common *common = ath9k_hw_common(ah);
  1318. struct ieee80211_conf *conf = &hw->conf;
  1319. bool disable_radio;
  1320. mutex_lock(&sc->mutex);
  1321. /*
  1322. * Leave this as the first check because we need to turn on the
  1323. * radio if it was disabled before prior to processing the rest
  1324. * of the changes. Likewise we must only disable the radio towards
  1325. * the end.
  1326. */
  1327. if (changed & IEEE80211_CONF_CHANGE_IDLE) {
  1328. bool enable_radio;
  1329. bool all_wiphys_idle;
  1330. bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
  1331. spin_lock_bh(&sc->wiphy_lock);
  1332. all_wiphys_idle = ath9k_all_wiphys_idle(sc);
  1333. ath9k_set_wiphy_idle(aphy, idle);
  1334. enable_radio = (!idle && all_wiphys_idle);
  1335. /*
  1336. * After we unlock here its possible another wiphy
  1337. * can be re-renabled so to account for that we will
  1338. * only disable the radio toward the end of this routine
  1339. * if by then all wiphys are still idle.
  1340. */
  1341. spin_unlock_bh(&sc->wiphy_lock);
  1342. if (enable_radio) {
  1343. sc->ps_idle = false;
  1344. ath_radio_enable(sc, hw);
  1345. ath_print(common, ATH_DBG_CONFIG,
  1346. "not-idle: enabling radio\n");
  1347. }
  1348. }
  1349. /*
  1350. * We just prepare to enable PS. We have to wait until our AP has
  1351. * ACK'd our null data frame to disable RX otherwise we'll ignore
  1352. * those ACKs and end up retransmitting the same null data frames.
  1353. * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
  1354. */
  1355. if (changed & IEEE80211_CONF_CHANGE_PS) {
  1356. unsigned long flags;
  1357. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  1358. if (conf->flags & IEEE80211_CONF_PS)
  1359. ath9k_enable_ps(sc);
  1360. else
  1361. ath9k_disable_ps(sc);
  1362. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  1363. }
  1364. if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
  1365. if (conf->flags & IEEE80211_CONF_MONITOR) {
  1366. ath_print(common, ATH_DBG_CONFIG,
  1367. "Monitor mode is enabled\n");
  1368. sc->sc_ah->is_monitoring = true;
  1369. } else {
  1370. ath_print(common, ATH_DBG_CONFIG,
  1371. "Monitor mode is disabled\n");
  1372. sc->sc_ah->is_monitoring = false;
  1373. }
  1374. }
  1375. if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
  1376. struct ieee80211_channel *curchan = hw->conf.channel;
  1377. int pos = curchan->hw_value;
  1378. int old_pos = -1;
  1379. unsigned long flags;
  1380. if (ah->curchan)
  1381. old_pos = ah->curchan - &ah->channels[0];
  1382. aphy->chan_idx = pos;
  1383. aphy->chan_is_ht = conf_is_ht(conf);
  1384. if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
  1385. sc->sc_flags |= SC_OP_OFFCHANNEL;
  1386. else
  1387. sc->sc_flags &= ~SC_OP_OFFCHANNEL;
  1388. if (aphy->state == ATH_WIPHY_SCAN ||
  1389. aphy->state == ATH_WIPHY_ACTIVE)
  1390. ath9k_wiphy_pause_all_forced(sc, aphy);
  1391. else {
  1392. /*
  1393. * Do not change operational channel based on a paused
  1394. * wiphy changes.
  1395. */
  1396. goto skip_chan_change;
  1397. }
  1398. ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
  1399. curchan->center_freq);
  1400. /* XXX: remove me eventualy */
  1401. ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
  1402. ath_update_chainmask(sc, conf_is_ht(conf));
  1403. /* update survey stats for the old channel before switching */
  1404. spin_lock_irqsave(&common->cc_lock, flags);
  1405. ath_update_survey_stats(sc);
  1406. spin_unlock_irqrestore(&common->cc_lock, flags);
  1407. /*
  1408. * If the operating channel changes, change the survey in-use flags
  1409. * along with it.
  1410. * Reset the survey data for the new channel, unless we're switching
  1411. * back to the operating channel from an off-channel operation.
  1412. */
  1413. if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
  1414. sc->cur_survey != &sc->survey[pos]) {
  1415. if (sc->cur_survey)
  1416. sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
  1417. sc->cur_survey = &sc->survey[pos];
  1418. memset(sc->cur_survey, 0, sizeof(struct survey_info));
  1419. sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
  1420. } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
  1421. memset(&sc->survey[pos], 0, sizeof(struct survey_info));
  1422. }
  1423. if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
  1424. ath_print(common, ATH_DBG_FATAL,
  1425. "Unable to set channel\n");
  1426. mutex_unlock(&sc->mutex);
  1427. return -EINVAL;
  1428. }
  1429. /*
  1430. * The most recent snapshot of channel->noisefloor for the old
  1431. * channel is only available after the hardware reset. Copy it to
  1432. * the survey stats now.
  1433. */
  1434. if (old_pos >= 0)
  1435. ath_update_survey_nf(sc, old_pos);
  1436. }
  1437. skip_chan_change:
  1438. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  1439. sc->config.txpowlimit = 2 * conf->power_level;
  1440. ath_update_txpow(sc);
  1441. }
  1442. spin_lock_bh(&sc->wiphy_lock);
  1443. disable_radio = ath9k_all_wiphys_idle(sc);
  1444. spin_unlock_bh(&sc->wiphy_lock);
  1445. if (disable_radio) {
  1446. ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
  1447. sc->ps_idle = true;
  1448. ath_radio_disable(sc, hw);
  1449. }
  1450. mutex_unlock(&sc->mutex);
  1451. return 0;
  1452. }
  1453. #define SUPPORTED_FILTERS \
  1454. (FIF_PROMISC_IN_BSS | \
  1455. FIF_ALLMULTI | \
  1456. FIF_CONTROL | \
  1457. FIF_PSPOLL | \
  1458. FIF_OTHER_BSS | \
  1459. FIF_BCN_PRBRESP_PROMISC | \
  1460. FIF_PROBE_REQ | \
  1461. FIF_FCSFAIL)
  1462. /* FIXME: sc->sc_full_reset ? */
  1463. static void ath9k_configure_filter(struct ieee80211_hw *hw,
  1464. unsigned int changed_flags,
  1465. unsigned int *total_flags,
  1466. u64 multicast)
  1467. {
  1468. struct ath_wiphy *aphy = hw->priv;
  1469. struct ath_softc *sc = aphy->sc;
  1470. u32 rfilt;
  1471. changed_flags &= SUPPORTED_FILTERS;
  1472. *total_flags &= SUPPORTED_FILTERS;
  1473. sc->rx.rxfilter = *total_flags;
  1474. ath9k_ps_wakeup(sc);
  1475. rfilt = ath_calcrxfilter(sc);
  1476. ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
  1477. ath9k_ps_restore(sc);
  1478. ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
  1479. "Set HW RX filter: 0x%x\n", rfilt);
  1480. }
  1481. static int ath9k_sta_add(struct ieee80211_hw *hw,
  1482. struct ieee80211_vif *vif,
  1483. struct ieee80211_sta *sta)
  1484. {
  1485. struct ath_wiphy *aphy = hw->priv;
  1486. struct ath_softc *sc = aphy->sc;
  1487. ath_node_attach(sc, sta);
  1488. return 0;
  1489. }
  1490. static int ath9k_sta_remove(struct ieee80211_hw *hw,
  1491. struct ieee80211_vif *vif,
  1492. struct ieee80211_sta *sta)
  1493. {
  1494. struct ath_wiphy *aphy = hw->priv;
  1495. struct ath_softc *sc = aphy->sc;
  1496. ath_node_detach(sc, sta);
  1497. return 0;
  1498. }
  1499. static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  1500. const struct ieee80211_tx_queue_params *params)
  1501. {
  1502. struct ath_wiphy *aphy = hw->priv;
  1503. struct ath_softc *sc = aphy->sc;
  1504. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1505. struct ath9k_tx_queue_info qi;
  1506. int ret = 0, qnum;
  1507. if (queue >= WME_NUM_AC)
  1508. return 0;
  1509. mutex_lock(&sc->mutex);
  1510. memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
  1511. qi.tqi_aifs = params->aifs;
  1512. qi.tqi_cwmin = params->cw_min;
  1513. qi.tqi_cwmax = params->cw_max;
  1514. qi.tqi_burstTime = params->txop;
  1515. qnum = ath_get_hal_qnum(queue, sc);
  1516. ath_print(common, ATH_DBG_CONFIG,
  1517. "Configure tx [queue/halq] [%d/%d], "
  1518. "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
  1519. queue, qnum, params->aifs, params->cw_min,
  1520. params->cw_max, params->txop);
  1521. ret = ath_txq_update(sc, qnum, &qi);
  1522. if (ret)
  1523. ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
  1524. if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
  1525. if ((qnum == sc->tx.hwq_map[WME_AC_BE]) && !ret)
  1526. ath_beaconq_config(sc);
  1527. mutex_unlock(&sc->mutex);
  1528. return ret;
  1529. }
  1530. static int ath9k_set_key(struct ieee80211_hw *hw,
  1531. enum set_key_cmd cmd,
  1532. struct ieee80211_vif *vif,
  1533. struct ieee80211_sta *sta,
  1534. struct ieee80211_key_conf *key)
  1535. {
  1536. struct ath_wiphy *aphy = hw->priv;
  1537. struct ath_softc *sc = aphy->sc;
  1538. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1539. int ret = 0;
  1540. if (modparam_nohwcrypt)
  1541. return -ENOSPC;
  1542. mutex_lock(&sc->mutex);
  1543. ath9k_ps_wakeup(sc);
  1544. ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
  1545. switch (cmd) {
  1546. case SET_KEY:
  1547. ret = ath_key_config(common, vif, sta, key);
  1548. if (ret >= 0) {
  1549. key->hw_key_idx = ret;
  1550. /* push IV and Michael MIC generation to stack */
  1551. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  1552. if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
  1553. key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  1554. if (sc->sc_ah->sw_mgmt_crypto &&
  1555. key->cipher == WLAN_CIPHER_SUITE_CCMP)
  1556. key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
  1557. ret = 0;
  1558. }
  1559. break;
  1560. case DISABLE_KEY:
  1561. ath_key_delete(common, key);
  1562. break;
  1563. default:
  1564. ret = -EINVAL;
  1565. }
  1566. ath9k_ps_restore(sc);
  1567. mutex_unlock(&sc->mutex);
  1568. return ret;
  1569. }
  1570. static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
  1571. struct ieee80211_vif *vif,
  1572. struct ieee80211_bss_conf *bss_conf,
  1573. u32 changed)
  1574. {
  1575. struct ath_wiphy *aphy = hw->priv;
  1576. struct ath_softc *sc = aphy->sc;
  1577. struct ath_hw *ah = sc->sc_ah;
  1578. struct ath_common *common = ath9k_hw_common(ah);
  1579. struct ath_vif *avp = (void *)vif->drv_priv;
  1580. int slottime;
  1581. int error;
  1582. mutex_lock(&sc->mutex);
  1583. if (changed & BSS_CHANGED_BSSID) {
  1584. /* Set BSSID */
  1585. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1586. memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
  1587. common->curaid = 0;
  1588. ath9k_hw_write_associd(ah);
  1589. /* Set aggregation protection mode parameters */
  1590. sc->config.ath_aggr_prot = 0;
  1591. /* Only legacy IBSS for now */
  1592. if (vif->type == NL80211_IFTYPE_ADHOC)
  1593. ath_update_chainmask(sc, 0);
  1594. ath_print(common, ATH_DBG_CONFIG,
  1595. "BSSID: %pM aid: 0x%x\n",
  1596. common->curbssid, common->curaid);
  1597. /* need to reconfigure the beacon */
  1598. sc->sc_flags &= ~SC_OP_BEACONS ;
  1599. }
  1600. /* Enable transmission of beacons (AP, IBSS, MESH) */
  1601. if ((changed & BSS_CHANGED_BEACON) ||
  1602. ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
  1603. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1604. error = ath_beacon_alloc(aphy, vif);
  1605. if (!error)
  1606. ath_beacon_config(sc, vif);
  1607. }
  1608. if (changed & BSS_CHANGED_ERP_SLOT) {
  1609. if (bss_conf->use_short_slot)
  1610. slottime = 9;
  1611. else
  1612. slottime = 20;
  1613. if (vif->type == NL80211_IFTYPE_AP) {
  1614. /*
  1615. * Defer update, so that connected stations can adjust
  1616. * their settings at the same time.
  1617. * See beacon.c for more details
  1618. */
  1619. sc->beacon.slottime = slottime;
  1620. sc->beacon.updateslot = UPDATE;
  1621. } else {
  1622. ah->slottime = slottime;
  1623. ath9k_hw_init_global_settings(ah);
  1624. }
  1625. }
  1626. /* Disable transmission of beacons */
  1627. if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
  1628. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1629. if (changed & BSS_CHANGED_BEACON_INT) {
  1630. sc->beacon_interval = bss_conf->beacon_int;
  1631. /*
  1632. * In case of AP mode, the HW TSF has to be reset
  1633. * when the beacon interval changes.
  1634. */
  1635. if (vif->type == NL80211_IFTYPE_AP) {
  1636. sc->sc_flags |= SC_OP_TSF_RESET;
  1637. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1638. error = ath_beacon_alloc(aphy, vif);
  1639. if (!error)
  1640. ath_beacon_config(sc, vif);
  1641. } else {
  1642. ath_beacon_config(sc, vif);
  1643. }
  1644. }
  1645. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  1646. ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
  1647. bss_conf->use_short_preamble);
  1648. if (bss_conf->use_short_preamble)
  1649. sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
  1650. else
  1651. sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
  1652. }
  1653. if (changed & BSS_CHANGED_ERP_CTS_PROT) {
  1654. ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
  1655. bss_conf->use_cts_prot);
  1656. if (bss_conf->use_cts_prot &&
  1657. hw->conf.channel->band != IEEE80211_BAND_5GHZ)
  1658. sc->sc_flags |= SC_OP_PROTECT_ENABLE;
  1659. else
  1660. sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
  1661. }
  1662. if (changed & BSS_CHANGED_ASSOC) {
  1663. ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
  1664. bss_conf->assoc);
  1665. ath9k_bss_assoc_info(sc, vif, bss_conf);
  1666. }
  1667. mutex_unlock(&sc->mutex);
  1668. }
  1669. static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
  1670. {
  1671. u64 tsf;
  1672. struct ath_wiphy *aphy = hw->priv;
  1673. struct ath_softc *sc = aphy->sc;
  1674. mutex_lock(&sc->mutex);
  1675. tsf = ath9k_hw_gettsf64(sc->sc_ah);
  1676. mutex_unlock(&sc->mutex);
  1677. return tsf;
  1678. }
  1679. static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
  1680. {
  1681. struct ath_wiphy *aphy = hw->priv;
  1682. struct ath_softc *sc = aphy->sc;
  1683. mutex_lock(&sc->mutex);
  1684. ath9k_hw_settsf64(sc->sc_ah, tsf);
  1685. mutex_unlock(&sc->mutex);
  1686. }
  1687. static void ath9k_reset_tsf(struct ieee80211_hw *hw)
  1688. {
  1689. struct ath_wiphy *aphy = hw->priv;
  1690. struct ath_softc *sc = aphy->sc;
  1691. mutex_lock(&sc->mutex);
  1692. ath9k_ps_wakeup(sc);
  1693. ath9k_hw_reset_tsf(sc->sc_ah);
  1694. ath9k_ps_restore(sc);
  1695. mutex_unlock(&sc->mutex);
  1696. }
  1697. static int ath9k_ampdu_action(struct ieee80211_hw *hw,
  1698. struct ieee80211_vif *vif,
  1699. enum ieee80211_ampdu_mlme_action action,
  1700. struct ieee80211_sta *sta,
  1701. u16 tid, u16 *ssn)
  1702. {
  1703. struct ath_wiphy *aphy = hw->priv;
  1704. struct ath_softc *sc = aphy->sc;
  1705. int ret = 0;
  1706. local_bh_disable();
  1707. switch (action) {
  1708. case IEEE80211_AMPDU_RX_START:
  1709. if (!(sc->sc_flags & SC_OP_RXAGGR))
  1710. ret = -ENOTSUPP;
  1711. break;
  1712. case IEEE80211_AMPDU_RX_STOP:
  1713. break;
  1714. case IEEE80211_AMPDU_TX_START:
  1715. ath9k_ps_wakeup(sc);
  1716. ret = ath_tx_aggr_start(sc, sta, tid, ssn);
  1717. if (!ret)
  1718. ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1719. ath9k_ps_restore(sc);
  1720. break;
  1721. case IEEE80211_AMPDU_TX_STOP:
  1722. ath9k_ps_wakeup(sc);
  1723. ath_tx_aggr_stop(sc, sta, tid);
  1724. ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1725. ath9k_ps_restore(sc);
  1726. break;
  1727. case IEEE80211_AMPDU_TX_OPERATIONAL:
  1728. ath9k_ps_wakeup(sc);
  1729. ath_tx_aggr_resume(sc, sta, tid);
  1730. ath9k_ps_restore(sc);
  1731. break;
  1732. default:
  1733. ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
  1734. "Unknown AMPDU action\n");
  1735. }
  1736. local_bh_enable();
  1737. return ret;
  1738. }
  1739. static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
  1740. struct survey_info *survey)
  1741. {
  1742. struct ath_wiphy *aphy = hw->priv;
  1743. struct ath_softc *sc = aphy->sc;
  1744. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1745. struct ieee80211_supported_band *sband;
  1746. struct ieee80211_channel *chan;
  1747. unsigned long flags;
  1748. int pos;
  1749. spin_lock_irqsave(&common->cc_lock, flags);
  1750. if (idx == 0)
  1751. ath_update_survey_stats(sc);
  1752. sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
  1753. if (sband && idx >= sband->n_channels) {
  1754. idx -= sband->n_channels;
  1755. sband = NULL;
  1756. }
  1757. if (!sband)
  1758. sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
  1759. if (!sband || idx >= sband->n_channels) {
  1760. spin_unlock_irqrestore(&common->cc_lock, flags);
  1761. return -ENOENT;
  1762. }
  1763. chan = &sband->channels[idx];
  1764. pos = chan->hw_value;
  1765. memcpy(survey, &sc->survey[pos], sizeof(*survey));
  1766. survey->channel = chan;
  1767. spin_unlock_irqrestore(&common->cc_lock, flags);
  1768. return 0;
  1769. }
  1770. static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
  1771. {
  1772. struct ath_wiphy *aphy = hw->priv;
  1773. struct ath_softc *sc = aphy->sc;
  1774. mutex_lock(&sc->mutex);
  1775. if (ath9k_wiphy_scanning(sc)) {
  1776. /*
  1777. * There is a race here in mac80211 but fixing it requires
  1778. * we revisit how we handle the scan complete callback.
  1779. * After mac80211 fixes we will not have configured hardware
  1780. * to the home channel nor would we have configured the RX
  1781. * filter yet.
  1782. */
  1783. mutex_unlock(&sc->mutex);
  1784. return;
  1785. }
  1786. aphy->state = ATH_WIPHY_SCAN;
  1787. ath9k_wiphy_pause_all_forced(sc, aphy);
  1788. mutex_unlock(&sc->mutex);
  1789. }
  1790. /*
  1791. * XXX: this requires a revisit after the driver
  1792. * scan_complete gets moved to another place/removed in mac80211.
  1793. */
  1794. static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
  1795. {
  1796. struct ath_wiphy *aphy = hw->priv;
  1797. struct ath_softc *sc = aphy->sc;
  1798. mutex_lock(&sc->mutex);
  1799. aphy->state = ATH_WIPHY_ACTIVE;
  1800. mutex_unlock(&sc->mutex);
  1801. }
  1802. static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
  1803. {
  1804. struct ath_wiphy *aphy = hw->priv;
  1805. struct ath_softc *sc = aphy->sc;
  1806. struct ath_hw *ah = sc->sc_ah;
  1807. mutex_lock(&sc->mutex);
  1808. ah->coverage_class = coverage_class;
  1809. ath9k_hw_init_global_settings(ah);
  1810. mutex_unlock(&sc->mutex);
  1811. }
  1812. struct ieee80211_ops ath9k_ops = {
  1813. .tx = ath9k_tx,
  1814. .start = ath9k_start,
  1815. .stop = ath9k_stop,
  1816. .add_interface = ath9k_add_interface,
  1817. .remove_interface = ath9k_remove_interface,
  1818. .config = ath9k_config,
  1819. .configure_filter = ath9k_configure_filter,
  1820. .sta_add = ath9k_sta_add,
  1821. .sta_remove = ath9k_sta_remove,
  1822. .conf_tx = ath9k_conf_tx,
  1823. .bss_info_changed = ath9k_bss_info_changed,
  1824. .set_key = ath9k_set_key,
  1825. .get_tsf = ath9k_get_tsf,
  1826. .set_tsf = ath9k_set_tsf,
  1827. .reset_tsf = ath9k_reset_tsf,
  1828. .ampdu_action = ath9k_ampdu_action,
  1829. .get_survey = ath9k_get_survey,
  1830. .sw_scan_start = ath9k_sw_scan_start,
  1831. .sw_scan_complete = ath9k_sw_scan_complete,
  1832. .rfkill_poll = ath9k_rfkill_poll_state,
  1833. .set_coverage_class = ath9k_set_coverage_class,
  1834. };