Home Explore Help
Register Sign In
phyus
/
linux-vybrid_public
8
0
Fork 0
Files Issues 0 Pull Requests 0 Wiki
Tree: 5f7f6a4a0d
Branches Tags
linux-vybrid_pu...
/
arch
/
arm
/
mach-s5p6442
/
include
/
mach
/
gpio.h

gpio.h 4.9 KB
History Raw

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123 
  1. /* linux/arch/arm/mach-s5p6442/include/mach/gpio.h
    2. 

  2.  *
    3. 

  3.  * Copyright (c) 2010 Samsung Electronics Co., Ltd.
    4. 

  4.  *		http://www.samsung.com/
    5. 

  5.  *
    6. 

  6.  * S5P6442 - GPIO lib support
    7. 

  7.  *
    8. 

  8.  * This program is free software; you can redistribute it and/or modify
    9. 

  9.  * it under the terms of the GNU General Public License version 2 as
    10. 

  10.  * published by the Free Software Foundation.
    11. 

  11. */
    12. 

  12. 

  13. #ifndef __ASM_ARCH_GPIO_H
    14. 

  14. #define __ASM_ARCH_GPIO_H __FILE__
    15. 

  15. 

  16. #define gpio_get_value	__gpio_get_value
    17. 

  17. #define gpio_set_value	__gpio_set_value
    18. 

  18. #define gpio_cansleep	__gpio_cansleep
    19. 

  19. #define gpio_to_irq	__gpio_to_irq
    20. 

  20. 

  21. /* GPIO bank sizes */
    22. 

  22. #define S5P6442_GPIO_A0_NR	(8)
    23. 

  23. #define S5P6442_GPIO_A1_NR	(2)
    24. 

  24. #define S5P6442_GPIO_B_NR	(4)
    25. 

  25. #define S5P6442_GPIO_C0_NR	(5)
    26. 

  26. #define S5P6442_GPIO_C1_NR	(5)
    27. 

  27. #define S5P6442_GPIO_D0_NR	(2)
    28. 

  28. #define S5P6442_GPIO_D1_NR	(6)
    29. 

  29. #define S5P6442_GPIO_E0_NR	(8)
    30. 

  30. #define S5P6442_GPIO_E1_NR	(5)
    31. 

  31. #define S5P6442_GPIO_F0_NR	(8)
    32. 

  32. #define S5P6442_GPIO_F1_NR	(8)
    33. 

  33. #define S5P6442_GPIO_F2_NR	(8)
    34. 

  34. #define S5P6442_GPIO_F3_NR	(6)
    35. 

  35. #define S5P6442_GPIO_G0_NR	(7)
    36. 

  36. #define S5P6442_GPIO_G1_NR	(7)
    37. 

  37. #define S5P6442_GPIO_G2_NR	(7)
    38. 

  38. #define S5P6442_GPIO_H0_NR	(8)
    39. 

  39. #define S5P6442_GPIO_H1_NR	(8)
    40. 

  40. #define S5P6442_GPIO_H2_NR	(8)
    41. 

  41. #define S5P6442_GPIO_H3_NR	(8)
    42. 

  42. #define S5P6442_GPIO_J0_NR	(8)
    43. 

  43. #define S5P6442_GPIO_J1_NR	(6)
    44. 

  44. #define S5P6442_GPIO_J2_NR	(8)
    45. 

  45. #define S5P6442_GPIO_J3_NR	(8)
    46. 

  46. #define S5P6442_GPIO_J4_NR	(5)
    47. 

  47. 

  48. /* GPIO bank numbers */
    49. 

  49. 

  50. /* CONFIG_S3C_GPIO_SPACE allows the user to select extra
    51. 

  51.  * space for debugging purposes so that any accidental
    52. 

  52.  * change from one gpio bank to another can be caught.
    53. 

  53. */
    54. 

  54. 

  55. #define S5P6442_GPIO_NEXT(__gpio) \
    56. 

  56. 	((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
    57. 

  57. 

  58. enum s5p_gpio_number {
    59. 

  59. 	S5P6442_GPIO_A0_START	= 0,
    60. 

  60. 	S5P6442_GPIO_A1_START	= S5P6442_GPIO_NEXT(S5P6442_GPIO_A0),
    61. 

  61. 	S5P6442_GPIO_B_START	= S5P6442_GPIO_NEXT(S5P6442_GPIO_A1),
    62. 

  62. 	S5P6442_GPIO_C0_START	= S5P6442_GPIO_NEXT(S5P6442_GPIO_B),
    63. 

  63. 	S5P6442_GPIO_C1_START	= S5P6442_GPIO_NEXT(S5P6442_GPIO_C0),
    64. 

  64. 	S5P6442_GPIO_D0_START	= S5P6442_GPIO_NEXT(S5P6442_GPIO_C1),
    65. 

  65. 	S5P6442_GPIO_D1_START	= S5P6442_GPIO_NEXT(S5P6442_GPIO_D0),
    66. 

  66. 	S5P6442_GPIO_E0_START	= S5P6442_GPIO_NEXT(S5P6442_GPIO_D1),
    67. 

  67. 	S5P6442_GPIO_E1_START	= S5P6442_GPIO_NEXT(S5P6442_GPIO_E0),
    68. 

  68. 	S5P6442_GPIO_F0_START	= S5P6442_GPIO_NEXT(S5P6442_GPIO_E1),
    69. 

  69. 	S5P6442_GPIO_F1_START	= S5P6442_GPIO_NEXT(S5P6442_GPIO_F0),
    70. 

  70. 	S5P6442_GPIO_F2_START	= S5P6442_GPIO_NEXT(S5P6442_GPIO_F1),
    71. 

  71. 	S5P6442_GPIO_F3_START	= S5P6442_GPIO_NEXT(S5P6442_GPIO_F2),
    72. 

  72. 	S5P6442_GPIO_G0_START	= S5P6442_GPIO_NEXT(S5P6442_GPIO_F3),
    73. 

  73. 	S5P6442_GPIO_G1_START	= S5P6442_GPIO_NEXT(S5P6442_GPIO_G0),
    74. 

  74. 	S5P6442_GPIO_G2_START	= S5P6442_GPIO_NEXT(S5P6442_GPIO_G1),
    75. 

  75. 	S5P6442_GPIO_H0_START	= S5P6442_GPIO_NEXT(S5P6442_GPIO_G2),
    76. 

  76. 	S5P6442_GPIO_H1_START	= S5P6442_GPIO_NEXT(S5P6442_GPIO_H0),
    77. 

  77. 	S5P6442_GPIO_H2_START	= S5P6442_GPIO_NEXT(S5P6442_GPIO_H1),
    78. 

  78. 	S5P6442_GPIO_H3_START	= S5P6442_GPIO_NEXT(S5P6442_GPIO_H2),
    79. 

  79. 	S5P6442_GPIO_J0_START	= S5P6442_GPIO_NEXT(S5P6442_GPIO_H3),
    80. 

  80. 	S5P6442_GPIO_J1_START	= S5P6442_GPIO_NEXT(S5P6442_GPIO_J0),
    81. 

  81. 	S5P6442_GPIO_J2_START	= S5P6442_GPIO_NEXT(S5P6442_GPIO_J1),
    82. 

  82. 	S5P6442_GPIO_J3_START	= S5P6442_GPIO_NEXT(S5P6442_GPIO_J2),
    83. 

  83. 	S5P6442_GPIO_J4_START	= S5P6442_GPIO_NEXT(S5P6442_GPIO_J3),
    84. 

  84. };
    85. 

  85. 

  86. /* S5P6442 GPIO number definitions. */
    87. 

  87. #define S5P6442_GPA0(_nr)	(S5P6442_GPIO_A0_START + (_nr))
    88. 

  88. #define S5P6442_GPA1(_nr)	(S5P6442_GPIO_A1_START + (_nr))
    89. 

  89. #define S5P6442_GPB(_nr)	(S5P6442_GPIO_B_START + (_nr))
    90. 

  90. #define S5P6442_GPC0(_nr)	(S5P6442_GPIO_C0_START + (_nr))
    91. 

  91. #define S5P6442_GPC1(_nr)	(S5P6442_GPIO_C1_START + (_nr))
    92. 

  92. #define S5P6442_GPD0(_nr)	(S5P6442_GPIO_D0_START + (_nr))
    93. 

  93. #define S5P6442_GPD1(_nr)	(S5P6442_GPIO_D1_START + (_nr))
    94. 

  94. #define S5P6442_GPE0(_nr)	(S5P6442_GPIO_E0_START + (_nr))
    95. 

  95. #define S5P6442_GPE1(_nr)	(S5P6442_GPIO_E1_START + (_nr))
    96. 

  96. #define S5P6442_GPF0(_nr)	(S5P6442_GPIO_F0_START + (_nr))
    97. 

  97. #define S5P6442_GPF1(_nr)	(S5P6442_GPIO_F1_START + (_nr))
    98. 

  98. #define S5P6442_GPF2(_nr)	(S5P6442_GPIO_F2_START + (_nr))
    99. 

  99. #define S5P6442_GPF3(_nr)	(S5P6442_GPIO_F3_START + (_nr))
    100. 

  100. #define S5P6442_GPG0(_nr)	(S5P6442_GPIO_G0_START + (_nr))
    101. 

  101. #define S5P6442_GPG1(_nr)	(S5P6442_GPIO_G1_START + (_nr))
    102. 

  102. #define S5P6442_GPG2(_nr)	(S5P6442_GPIO_G2_START + (_nr))
    103. 

  103. #define S5P6442_GPH0(_nr)	(S5P6442_GPIO_H0_START + (_nr))
    104. 

  104. #define S5P6442_GPH1(_nr)	(S5P6442_GPIO_H1_START + (_nr))
    105. 

  105. #define S5P6442_GPH2(_nr)	(S5P6442_GPIO_H2_START + (_nr))
    106. 

  106. #define S5P6442_GPH3(_nr)	(S5P6442_GPIO_H3_START + (_nr))
    107. 

  107. #define S5P6442_GPJ0(_nr)	(S5P6442_GPIO_J0_START + (_nr))
    108. 

  108. #define S5P6442_GPJ1(_nr)	(S5P6442_GPIO_J1_START + (_nr))
    109. 

  109. #define S5P6442_GPJ2(_nr)	(S5P6442_GPIO_J2_START + (_nr))
    110. 

  110. #define S5P6442_GPJ3(_nr)	(S5P6442_GPIO_J3_START + (_nr))
    111. 

  111. #define S5P6442_GPJ4(_nr)	(S5P6442_GPIO_J4_START + (_nr))
    112. 

  112. 

  113. /* the end of the S5P6442 specific gpios */
    114. 

  114. #define S5P6442_GPIO_END	(S5P6442_GPJ4(S5P6442_GPIO_J4_NR) + 1)
    115. 

  115. #define S3C_GPIO_END		S5P6442_GPIO_END
    116. 

  116. 

  117. /* define the number of gpios we need to the one after the GPJ4() range */
    118. 

  118. #define ARCH_NR_GPIOS		(S5P6442_GPJ4(S5P6442_GPIO_J4_NR) +	\
    119. 

  119. 				 CONFIG_SAMSUNG_GPIO_EXTRA + 1)
    120. 

  120. 

  121. #include <asm-generic/gpio.h>
    122. 

  122. 

  123. #endif /* __ASM_ARCH_GPIO_H */
    124.