ti_am335x_tscadc.c 8.1 KB

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  1. /*
  2. * TI Touch Screen / ADC MFD driver
  3. *
  4. * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License as
  8. * published by the Free Software Foundation version 2.
  9. *
  10. * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  11. * kind, whether express or implied; without even the implied warranty
  12. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. */
  15. #include <linux/module.h>
  16. #include <linux/init.h>
  17. #include <linux/slab.h>
  18. #include <linux/err.h>
  19. #include <linux/io.h>
  20. #include <linux/clk.h>
  21. #include <linux/regmap.h>
  22. #include <linux/mfd/core.h>
  23. #include <linux/pm_runtime.h>
  24. #include <linux/of.h>
  25. #include <linux/of_device.h>
  26. #include <linux/mfd/ti_am335x_tscadc.h>
  27. static unsigned int tscadc_readl(struct ti_tscadc_dev *tsadc, unsigned int reg)
  28. {
  29. unsigned int val;
  30. regmap_read(tsadc->regmap_tscadc, reg, &val);
  31. return val;
  32. }
  33. static void tscadc_writel(struct ti_tscadc_dev *tsadc, unsigned int reg,
  34. unsigned int val)
  35. {
  36. regmap_write(tsadc->regmap_tscadc, reg, val);
  37. }
  38. static const struct regmap_config tscadc_regmap_config = {
  39. .name = "ti_tscadc",
  40. .reg_bits = 32,
  41. .reg_stride = 4,
  42. .val_bits = 32,
  43. };
  44. void am335x_tsc_se_update(struct ti_tscadc_dev *tsadc)
  45. {
  46. tscadc_writel(tsadc, REG_SE, tsadc->reg_se_cache);
  47. }
  48. EXPORT_SYMBOL_GPL(am335x_tsc_se_update);
  49. void am335x_tsc_se_set(struct ti_tscadc_dev *tsadc, u32 val)
  50. {
  51. spin_lock(&tsadc->reg_lock);
  52. tsadc->reg_se_cache |= val;
  53. spin_unlock(&tsadc->reg_lock);
  54. am335x_tsc_se_update(tsadc);
  55. }
  56. EXPORT_SYMBOL_GPL(am335x_tsc_se_set);
  57. void am335x_tsc_se_clr(struct ti_tscadc_dev *tsadc, u32 val)
  58. {
  59. spin_lock(&tsadc->reg_lock);
  60. tsadc->reg_se_cache &= ~val;
  61. spin_unlock(&tsadc->reg_lock);
  62. am335x_tsc_se_update(tsadc);
  63. }
  64. EXPORT_SYMBOL_GPL(am335x_tsc_se_clr);
  65. static void tscadc_idle_config(struct ti_tscadc_dev *config)
  66. {
  67. unsigned int idleconfig;
  68. idleconfig = STEPCONFIG_YNN | STEPCONFIG_INM_ADCREFM |
  69. STEPCONFIG_INP_ADCREFM | STEPCONFIG_YPN;
  70. tscadc_writel(config, REG_IDLECONFIG, idleconfig);
  71. }
  72. static int ti_tscadc_probe(struct platform_device *pdev)
  73. {
  74. struct ti_tscadc_dev *tscadc;
  75. struct resource *res;
  76. struct clk *clk;
  77. struct device_node *node = pdev->dev.of_node;
  78. struct mfd_cell *cell;
  79. int err, ctrl;
  80. int clk_value, clock_rate;
  81. int tsc_wires = 0, adc_channels = 0, total_channels;
  82. if (!pdev->dev.of_node) {
  83. dev_err(&pdev->dev, "Could not find valid DT data.\n");
  84. return -EINVAL;
  85. }
  86. node = of_get_child_by_name(pdev->dev.of_node, "tsc");
  87. of_property_read_u32(node, "ti,wires", &tsc_wires);
  88. node = of_get_child_by_name(pdev->dev.of_node, "adc");
  89. of_property_read_u32(node, "ti,adc-channels", &adc_channels);
  90. total_channels = tsc_wires + adc_channels;
  91. if (total_channels > 8) {
  92. dev_err(&pdev->dev, "Number of i/p channels more than 8\n");
  93. return -EINVAL;
  94. }
  95. if (total_channels == 0) {
  96. dev_err(&pdev->dev, "Need atleast one channel.\n");
  97. return -EINVAL;
  98. }
  99. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  100. if (!res) {
  101. dev_err(&pdev->dev, "no memory resource defined.\n");
  102. return -EINVAL;
  103. }
  104. /* Allocate memory for device */
  105. tscadc = devm_kzalloc(&pdev->dev,
  106. sizeof(struct ti_tscadc_dev), GFP_KERNEL);
  107. if (!tscadc) {
  108. dev_err(&pdev->dev, "failed to allocate memory.\n");
  109. return -ENOMEM;
  110. }
  111. tscadc->dev = &pdev->dev;
  112. err = platform_get_irq(pdev, 0);
  113. if (err < 0) {
  114. dev_err(&pdev->dev, "no irq ID is specified.\n");
  115. goto ret;
  116. } else
  117. tscadc->irq = err;
  118. res = devm_request_mem_region(&pdev->dev,
  119. res->start, resource_size(res), pdev->name);
  120. if (!res) {
  121. dev_err(&pdev->dev, "failed to reserve registers.\n");
  122. return -EBUSY;
  123. }
  124. tscadc->tscadc_base = devm_ioremap(&pdev->dev,
  125. res->start, resource_size(res));
  126. if (!tscadc->tscadc_base) {
  127. dev_err(&pdev->dev, "failed to map registers.\n");
  128. return -ENOMEM;
  129. }
  130. tscadc->regmap_tscadc = devm_regmap_init_mmio(&pdev->dev,
  131. tscadc->tscadc_base, &tscadc_regmap_config);
  132. if (IS_ERR(tscadc->regmap_tscadc)) {
  133. dev_err(&pdev->dev, "regmap init failed\n");
  134. err = PTR_ERR(tscadc->regmap_tscadc);
  135. goto ret;
  136. }
  137. spin_lock_init(&tscadc->reg_lock);
  138. pm_runtime_enable(&pdev->dev);
  139. pm_runtime_get_sync(&pdev->dev);
  140. /*
  141. * The TSC_ADC_Subsystem has 2 clock domains
  142. * OCP_CLK and ADC_CLK.
  143. * The ADC clock is expected to run at target of 3MHz,
  144. * and expected to capture 12-bit data at a rate of 200 KSPS.
  145. * The TSC_ADC_SS controller design assumes the OCP clock is
  146. * at least 6x faster than the ADC clock.
  147. */
  148. clk = clk_get(&pdev->dev, "adc_tsc_fck");
  149. if (IS_ERR(clk)) {
  150. dev_err(&pdev->dev, "failed to get TSC fck\n");
  151. err = PTR_ERR(clk);
  152. goto err_disable_clk;
  153. }
  154. clock_rate = clk_get_rate(clk);
  155. clk_put(clk);
  156. clk_value = clock_rate / ADC_CLK;
  157. if (clk_value < MAX_CLK_DIV) {
  158. dev_err(&pdev->dev, "clock input less than min clock requirement\n");
  159. err = -EINVAL;
  160. goto err_disable_clk;
  161. }
  162. /* TSCADC_CLKDIV needs to be configured to the value minus 1 */
  163. clk_value = clk_value - 1;
  164. tscadc_writel(tscadc, REG_CLKDIV, clk_value);
  165. /* Set the control register bits */
  166. ctrl = CNTRLREG_STEPCONFIGWRT |
  167. CNTRLREG_TSCENB |
  168. CNTRLREG_STEPID |
  169. CNTRLREG_4WIRE;
  170. tscadc_writel(tscadc, REG_CTRL, ctrl);
  171. /* Set register bits for Idle Config Mode */
  172. tscadc_idle_config(tscadc);
  173. /* Enable the TSC module enable bit */
  174. ctrl = tscadc_readl(tscadc, REG_CTRL);
  175. ctrl |= CNTRLREG_TSCSSENB;
  176. tscadc_writel(tscadc, REG_CTRL, ctrl);
  177. tscadc->used_cells = 0;
  178. tscadc->tsc_cell = -1;
  179. tscadc->adc_cell = -1;
  180. /* TSC Cell */
  181. if (tsc_wires > 0) {
  182. tscadc->tsc_cell = tscadc->used_cells;
  183. cell = &tscadc->cells[tscadc->used_cells++];
  184. cell->name = "TI-am335x-tsc";
  185. cell->of_compatible = "ti,am3359-tsc";
  186. cell->platform_data = &tscadc;
  187. cell->pdata_size = sizeof(tscadc);
  188. }
  189. /* ADC Cell */
  190. if (adc_channels > 0) {
  191. tscadc->adc_cell = tscadc->used_cells;
  192. cell = &tscadc->cells[tscadc->used_cells++];
  193. cell->name = "tiadc";
  194. cell->of_compatible = "ti,am3359-adc";
  195. cell->platform_data = &tscadc;
  196. cell->pdata_size = sizeof(tscadc);
  197. }
  198. err = mfd_add_devices(&pdev->dev, pdev->id, tscadc->cells,
  199. tscadc->used_cells, NULL, 0, NULL);
  200. if (err < 0)
  201. goto err_disable_clk;
  202. device_init_wakeup(&pdev->dev, true);
  203. platform_set_drvdata(pdev, tscadc);
  204. return 0;
  205. err_disable_clk:
  206. pm_runtime_put_sync(&pdev->dev);
  207. pm_runtime_disable(&pdev->dev);
  208. ret:
  209. return err;
  210. }
  211. static int ti_tscadc_remove(struct platform_device *pdev)
  212. {
  213. struct ti_tscadc_dev *tscadc = platform_get_drvdata(pdev);
  214. tscadc_writel(tscadc, REG_SE, 0x00);
  215. pm_runtime_put_sync(&pdev->dev);
  216. pm_runtime_disable(&pdev->dev);
  217. mfd_remove_devices(tscadc->dev);
  218. return 0;
  219. }
  220. #ifdef CONFIG_PM
  221. static int tscadc_suspend(struct device *dev)
  222. {
  223. struct ti_tscadc_dev *tscadc_dev = dev_get_drvdata(dev);
  224. tscadc_writel(tscadc_dev, REG_SE, 0x00);
  225. pm_runtime_put_sync(dev);
  226. return 0;
  227. }
  228. static int tscadc_resume(struct device *dev)
  229. {
  230. struct ti_tscadc_dev *tscadc_dev = dev_get_drvdata(dev);
  231. unsigned int restore, ctrl;
  232. pm_runtime_get_sync(dev);
  233. /* context restore */
  234. ctrl = CNTRLREG_STEPCONFIGWRT | CNTRLREG_TSCENB |
  235. CNTRLREG_STEPID | CNTRLREG_4WIRE;
  236. tscadc_writel(tscadc_dev, REG_CTRL, ctrl);
  237. tscadc_idle_config(tscadc_dev);
  238. am335x_tsc_se_update(tscadc_dev);
  239. restore = tscadc_readl(tscadc_dev, REG_CTRL);
  240. tscadc_writel(tscadc_dev, REG_CTRL,
  241. (restore | CNTRLREG_TSCSSENB));
  242. return 0;
  243. }
  244. static const struct dev_pm_ops tscadc_pm_ops = {
  245. .suspend = tscadc_suspend,
  246. .resume = tscadc_resume,
  247. };
  248. #define TSCADC_PM_OPS (&tscadc_pm_ops)
  249. #else
  250. #define TSCADC_PM_OPS NULL
  251. #endif
  252. static const struct of_device_id ti_tscadc_dt_ids[] = {
  253. { .compatible = "ti,am3359-tscadc", },
  254. { }
  255. };
  256. MODULE_DEVICE_TABLE(of, ti_tscadc_dt_ids);
  257. static struct platform_driver ti_tscadc_driver = {
  258. .driver = {
  259. .name = "ti_am3359-tscadc",
  260. .owner = THIS_MODULE,
  261. .pm = TSCADC_PM_OPS,
  262. .of_match_table = of_match_ptr(ti_tscadc_dt_ids),
  263. },
  264. .probe = ti_tscadc_probe,
  265. .remove = ti_tscadc_remove,
  266. };
  267. module_platform_driver(ti_tscadc_driver);
  268. MODULE_DESCRIPTION("TI touchscreen / ADC MFD controller driver");
  269. MODULE_AUTHOR("Rachna Patil <rachna@ti.com>");
  270. MODULE_LICENSE("GPL");