mmu.c 27 KB

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  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * This module enables machines with Intel VT-x extensions to run virtual
  5. * machines without emulation or binary translation.
  6. *
  7. * MMU support
  8. *
  9. * Copyright (C) 2006 Qumranet, Inc.
  10. *
  11. * Authors:
  12. * Yaniv Kamay <yaniv@qumranet.com>
  13. * Avi Kivity <avi@qumranet.com>
  14. *
  15. * This work is licensed under the terms of the GNU GPL, version 2. See
  16. * the COPYING file in the top-level directory.
  17. *
  18. */
  19. #include <linux/types.h>
  20. #include <linux/string.h>
  21. #include <asm/page.h>
  22. #include <linux/mm.h>
  23. #include <linux/highmem.h>
  24. #include <linux/module.h>
  25. #include "vmx.h"
  26. #include "kvm.h"
  27. #define pgprintk(x...) do { printk(x); } while (0)
  28. #define rmap_printk(x...) do { printk(x); } while (0)
  29. #define ASSERT(x) \
  30. if (!(x)) { \
  31. printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
  32. __FILE__, __LINE__, #x); \
  33. }
  34. #define PT64_PT_BITS 9
  35. #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
  36. #define PT32_PT_BITS 10
  37. #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
  38. #define PT_WRITABLE_SHIFT 1
  39. #define PT_PRESENT_MASK (1ULL << 0)
  40. #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
  41. #define PT_USER_MASK (1ULL << 2)
  42. #define PT_PWT_MASK (1ULL << 3)
  43. #define PT_PCD_MASK (1ULL << 4)
  44. #define PT_ACCESSED_MASK (1ULL << 5)
  45. #define PT_DIRTY_MASK (1ULL << 6)
  46. #define PT_PAGE_SIZE_MASK (1ULL << 7)
  47. #define PT_PAT_MASK (1ULL << 7)
  48. #define PT_GLOBAL_MASK (1ULL << 8)
  49. #define PT64_NX_MASK (1ULL << 63)
  50. #define PT_PAT_SHIFT 7
  51. #define PT_DIR_PAT_SHIFT 12
  52. #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
  53. #define PT32_DIR_PSE36_SIZE 4
  54. #define PT32_DIR_PSE36_SHIFT 13
  55. #define PT32_DIR_PSE36_MASK (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
  56. #define PT32_PTE_COPY_MASK \
  57. (PT_PRESENT_MASK | PT_ACCESSED_MASK | PT_DIRTY_MASK | PT_GLOBAL_MASK)
  58. #define PT64_PTE_COPY_MASK (PT64_NX_MASK | PT32_PTE_COPY_MASK)
  59. #define PT_FIRST_AVAIL_BITS_SHIFT 9
  60. #define PT64_SECOND_AVAIL_BITS_SHIFT 52
  61. #define PT_SHADOW_PS_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
  62. #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
  63. #define PT_SHADOW_WRITABLE_SHIFT (PT_FIRST_AVAIL_BITS_SHIFT + 1)
  64. #define PT_SHADOW_WRITABLE_MASK (1ULL << PT_SHADOW_WRITABLE_SHIFT)
  65. #define PT_SHADOW_USER_SHIFT (PT_SHADOW_WRITABLE_SHIFT + 1)
  66. #define PT_SHADOW_USER_MASK (1ULL << (PT_SHADOW_USER_SHIFT))
  67. #define PT_SHADOW_BITS_OFFSET (PT_SHADOW_WRITABLE_SHIFT - PT_WRITABLE_SHIFT)
  68. #define VALID_PAGE(x) ((x) != INVALID_PAGE)
  69. #define PT64_LEVEL_BITS 9
  70. #define PT64_LEVEL_SHIFT(level) \
  71. ( PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS )
  72. #define PT64_LEVEL_MASK(level) \
  73. (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
  74. #define PT64_INDEX(address, level)\
  75. (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
  76. #define PT32_LEVEL_BITS 10
  77. #define PT32_LEVEL_SHIFT(level) \
  78. ( PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS )
  79. #define PT32_LEVEL_MASK(level) \
  80. (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
  81. #define PT32_INDEX(address, level)\
  82. (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
  83. #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & PAGE_MASK)
  84. #define PT64_DIR_BASE_ADDR_MASK \
  85. (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
  86. #define PT32_BASE_ADDR_MASK PAGE_MASK
  87. #define PT32_DIR_BASE_ADDR_MASK \
  88. (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
  89. #define PFERR_PRESENT_MASK (1U << 0)
  90. #define PFERR_WRITE_MASK (1U << 1)
  91. #define PFERR_USER_MASK (1U << 2)
  92. #define PT64_ROOT_LEVEL 4
  93. #define PT32_ROOT_LEVEL 2
  94. #define PT32E_ROOT_LEVEL 3
  95. #define PT_DIRECTORY_LEVEL 2
  96. #define PT_PAGE_TABLE_LEVEL 1
  97. #define RMAP_EXT 4
  98. struct kvm_rmap_desc {
  99. u64 *shadow_ptes[RMAP_EXT];
  100. struct kvm_rmap_desc *more;
  101. };
  102. static int is_write_protection(struct kvm_vcpu *vcpu)
  103. {
  104. return vcpu->cr0 & CR0_WP_MASK;
  105. }
  106. static int is_cpuid_PSE36(void)
  107. {
  108. return 1;
  109. }
  110. static int is_present_pte(unsigned long pte)
  111. {
  112. return pte & PT_PRESENT_MASK;
  113. }
  114. static int is_writeble_pte(unsigned long pte)
  115. {
  116. return pte & PT_WRITABLE_MASK;
  117. }
  118. static int is_io_pte(unsigned long pte)
  119. {
  120. return pte & PT_SHADOW_IO_MARK;
  121. }
  122. static int is_rmap_pte(u64 pte)
  123. {
  124. return (pte & (PT_WRITABLE_MASK | PT_PRESENT_MASK))
  125. == (PT_WRITABLE_MASK | PT_PRESENT_MASK);
  126. }
  127. /*
  128. * Reverse mapping data structures:
  129. *
  130. * If page->private bit zero is zero, then page->private points to the
  131. * shadow page table entry that points to page_address(page).
  132. *
  133. * If page->private bit zero is one, (then page->private & ~1) points
  134. * to a struct kvm_rmap_desc containing more mappings.
  135. */
  136. static void rmap_add(struct kvm *kvm, u64 *spte)
  137. {
  138. struct page *page;
  139. struct kvm_rmap_desc *desc;
  140. int i;
  141. if (!is_rmap_pte(*spte))
  142. return;
  143. page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
  144. if (!page->private) {
  145. rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
  146. page->private = (unsigned long)spte;
  147. } else if (!(page->private & 1)) {
  148. rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
  149. desc = kzalloc(sizeof *desc, GFP_NOWAIT);
  150. if (!desc)
  151. BUG(); /* FIXME: return error */
  152. desc->shadow_ptes[0] = (u64 *)page->private;
  153. desc->shadow_ptes[1] = spte;
  154. page->private = (unsigned long)desc | 1;
  155. } else {
  156. rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
  157. desc = (struct kvm_rmap_desc *)(page->private & ~1ul);
  158. while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
  159. desc = desc->more;
  160. if (desc->shadow_ptes[RMAP_EXT-1]) {
  161. desc->more = kzalloc(sizeof *desc->more, GFP_NOWAIT);
  162. if (!desc->more)
  163. BUG(); /* FIXME: return error */
  164. desc = desc->more;
  165. }
  166. for (i = 0; desc->shadow_ptes[i]; ++i)
  167. ;
  168. desc->shadow_ptes[i] = spte;
  169. }
  170. }
  171. static void rmap_desc_remove_entry(struct page *page,
  172. struct kvm_rmap_desc *desc,
  173. int i,
  174. struct kvm_rmap_desc *prev_desc)
  175. {
  176. int j;
  177. for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
  178. ;
  179. desc->shadow_ptes[i] = desc->shadow_ptes[j];
  180. desc->shadow_ptes[j] = 0;
  181. if (j != 0)
  182. return;
  183. if (!prev_desc && !desc->more)
  184. page->private = (unsigned long)desc->shadow_ptes[0];
  185. else
  186. if (prev_desc)
  187. prev_desc->more = desc->more;
  188. else
  189. page->private = (unsigned long)desc->more | 1;
  190. kfree(desc);
  191. }
  192. static void rmap_remove(struct kvm *kvm, u64 *spte)
  193. {
  194. struct page *page;
  195. struct kvm_rmap_desc *desc;
  196. struct kvm_rmap_desc *prev_desc;
  197. int i;
  198. if (!is_rmap_pte(*spte))
  199. return;
  200. page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
  201. if (!page->private) {
  202. printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
  203. BUG();
  204. } else if (!(page->private & 1)) {
  205. rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
  206. if ((u64 *)page->private != spte) {
  207. printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
  208. spte, *spte);
  209. BUG();
  210. }
  211. page->private = 0;
  212. } else {
  213. rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
  214. desc = (struct kvm_rmap_desc *)(page->private & ~1ul);
  215. prev_desc = NULL;
  216. while (desc) {
  217. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
  218. if (desc->shadow_ptes[i] == spte) {
  219. rmap_desc_remove_entry(page, desc, i,
  220. prev_desc);
  221. return;
  222. }
  223. prev_desc = desc;
  224. desc = desc->more;
  225. }
  226. BUG();
  227. }
  228. }
  229. static void rmap_write_protect(struct kvm *kvm, u64 gfn)
  230. {
  231. struct page *page;
  232. struct kvm_memory_slot *slot;
  233. struct kvm_rmap_desc *desc;
  234. u64 *spte;
  235. slot = gfn_to_memslot(kvm, gfn);
  236. BUG_ON(!slot);
  237. page = gfn_to_page(slot, gfn);
  238. while (page->private) {
  239. if (!(page->private & 1))
  240. spte = (u64 *)page->private;
  241. else {
  242. desc = (struct kvm_rmap_desc *)(page->private & ~1ul);
  243. spte = desc->shadow_ptes[0];
  244. }
  245. BUG_ON(!spte);
  246. BUG_ON((*spte & PT64_BASE_ADDR_MASK) !=
  247. page_to_pfn(page) << PAGE_SHIFT);
  248. BUG_ON(!(*spte & PT_PRESENT_MASK));
  249. BUG_ON(!(*spte & PT_WRITABLE_MASK));
  250. rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
  251. rmap_remove(kvm, spte);
  252. *spte &= ~(u64)PT_WRITABLE_MASK;
  253. }
  254. }
  255. static void kvm_mmu_free_page(struct kvm_vcpu *vcpu, hpa_t page_hpa)
  256. {
  257. struct kvm_mmu_page *page_head = page_header(page_hpa);
  258. list_del(&page_head->link);
  259. page_head->page_hpa = page_hpa;
  260. list_add(&page_head->link, &vcpu->free_pages);
  261. ++vcpu->kvm->n_free_mmu_pages;
  262. }
  263. static int is_empty_shadow_page(hpa_t page_hpa)
  264. {
  265. u32 *pos;
  266. u32 *end;
  267. for (pos = __va(page_hpa), end = pos + PAGE_SIZE / sizeof(u32);
  268. pos != end; pos++)
  269. if (*pos != 0)
  270. return 0;
  271. return 1;
  272. }
  273. static unsigned kvm_page_table_hashfn(gfn_t gfn)
  274. {
  275. return gfn;
  276. }
  277. static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
  278. u64 *parent_pte)
  279. {
  280. struct kvm_mmu_page *page;
  281. if (list_empty(&vcpu->free_pages))
  282. return NULL;
  283. page = list_entry(vcpu->free_pages.next, struct kvm_mmu_page, link);
  284. list_del(&page->link);
  285. list_add(&page->link, &vcpu->kvm->active_mmu_pages);
  286. ASSERT(is_empty_shadow_page(page->page_hpa));
  287. page->slot_bitmap = 0;
  288. page->global = 1;
  289. page->multimapped = 0;
  290. page->parent_pte = parent_pte;
  291. --vcpu->kvm->n_free_mmu_pages;
  292. return page;
  293. }
  294. static void mmu_page_add_parent_pte(struct kvm_mmu_page *page, u64 *parent_pte)
  295. {
  296. struct kvm_pte_chain *pte_chain;
  297. struct hlist_node *node;
  298. int i;
  299. if (!parent_pte)
  300. return;
  301. if (!page->multimapped) {
  302. u64 *old = page->parent_pte;
  303. if (!old) {
  304. page->parent_pte = parent_pte;
  305. return;
  306. }
  307. page->multimapped = 1;
  308. pte_chain = kzalloc(sizeof(struct kvm_pte_chain), GFP_NOWAIT);
  309. BUG_ON(!pte_chain);
  310. INIT_HLIST_HEAD(&page->parent_ptes);
  311. hlist_add_head(&pte_chain->link, &page->parent_ptes);
  312. pte_chain->parent_ptes[0] = old;
  313. }
  314. hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) {
  315. if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
  316. continue;
  317. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
  318. if (!pte_chain->parent_ptes[i]) {
  319. pte_chain->parent_ptes[i] = parent_pte;
  320. return;
  321. }
  322. }
  323. pte_chain = kzalloc(sizeof(struct kvm_pte_chain), GFP_NOWAIT);
  324. BUG_ON(!pte_chain);
  325. hlist_add_head(&pte_chain->link, &page->parent_ptes);
  326. pte_chain->parent_ptes[0] = parent_pte;
  327. }
  328. static void mmu_page_remove_parent_pte(struct kvm_mmu_page *page,
  329. u64 *parent_pte)
  330. {
  331. struct kvm_pte_chain *pte_chain;
  332. struct hlist_node *node;
  333. int i;
  334. if (!page->multimapped) {
  335. BUG_ON(page->parent_pte != parent_pte);
  336. page->parent_pte = NULL;
  337. return;
  338. }
  339. hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link)
  340. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  341. if (!pte_chain->parent_ptes[i])
  342. break;
  343. if (pte_chain->parent_ptes[i] != parent_pte)
  344. continue;
  345. while (i + 1 < NR_PTE_CHAIN_ENTRIES
  346. && pte_chain->parent_ptes[i + 1]) {
  347. pte_chain->parent_ptes[i]
  348. = pte_chain->parent_ptes[i + 1];
  349. ++i;
  350. }
  351. pte_chain->parent_ptes[i] = NULL;
  352. if (i == 0) {
  353. hlist_del(&pte_chain->link);
  354. kfree(pte_chain);
  355. if (hlist_empty(&page->parent_ptes)) {
  356. page->multimapped = 0;
  357. page->parent_pte = NULL;
  358. }
  359. }
  360. return;
  361. }
  362. BUG();
  363. }
  364. static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm_vcpu *vcpu,
  365. gfn_t gfn)
  366. {
  367. unsigned index;
  368. struct hlist_head *bucket;
  369. struct kvm_mmu_page *page;
  370. struct hlist_node *node;
  371. pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
  372. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  373. bucket = &vcpu->kvm->mmu_page_hash[index];
  374. hlist_for_each_entry(page, node, bucket, hash_link)
  375. if (page->gfn == gfn && !page->role.metaphysical) {
  376. pgprintk("%s: found role %x\n",
  377. __FUNCTION__, page->role.word);
  378. return page;
  379. }
  380. return NULL;
  381. }
  382. static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
  383. gfn_t gfn,
  384. gva_t gaddr,
  385. unsigned level,
  386. int metaphysical,
  387. u64 *parent_pte)
  388. {
  389. union kvm_mmu_page_role role;
  390. unsigned index;
  391. unsigned quadrant;
  392. struct hlist_head *bucket;
  393. struct kvm_mmu_page *page;
  394. struct hlist_node *node;
  395. role.word = 0;
  396. role.glevels = vcpu->mmu.root_level;
  397. role.level = level;
  398. role.metaphysical = metaphysical;
  399. if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) {
  400. quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
  401. quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
  402. role.quadrant = quadrant;
  403. }
  404. pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
  405. gfn, role.word);
  406. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  407. bucket = &vcpu->kvm->mmu_page_hash[index];
  408. hlist_for_each_entry(page, node, bucket, hash_link)
  409. if (page->gfn == gfn && page->role.word == role.word) {
  410. mmu_page_add_parent_pte(page, parent_pte);
  411. pgprintk("%s: found\n", __FUNCTION__);
  412. return page;
  413. }
  414. page = kvm_mmu_alloc_page(vcpu, parent_pte);
  415. if (!page)
  416. return page;
  417. pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
  418. page->gfn = gfn;
  419. page->role = role;
  420. hlist_add_head(&page->hash_link, bucket);
  421. if (!metaphysical)
  422. rmap_write_protect(vcpu->kvm, gfn);
  423. return page;
  424. }
  425. static void kvm_mmu_page_unlink_children(struct kvm_vcpu *vcpu,
  426. struct kvm_mmu_page *page)
  427. {
  428. unsigned i;
  429. u64 *pt;
  430. u64 ent;
  431. pt = __va(page->page_hpa);
  432. if (page->role.level == PT_PAGE_TABLE_LEVEL) {
  433. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  434. if (pt[i] & PT_PRESENT_MASK)
  435. rmap_remove(vcpu->kvm, &pt[i]);
  436. pt[i] = 0;
  437. }
  438. return;
  439. }
  440. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  441. ent = pt[i];
  442. pt[i] = 0;
  443. if (!(ent & PT_PRESENT_MASK))
  444. continue;
  445. ent &= PT64_BASE_ADDR_MASK;
  446. mmu_page_remove_parent_pte(page_header(ent), &pt[i]);
  447. }
  448. }
  449. static void kvm_mmu_put_page(struct kvm_vcpu *vcpu,
  450. struct kvm_mmu_page *page,
  451. u64 *parent_pte)
  452. {
  453. mmu_page_remove_parent_pte(page, parent_pte);
  454. }
  455. static void kvm_mmu_zap_page(struct kvm_vcpu *vcpu,
  456. struct kvm_mmu_page *page)
  457. {
  458. u64 *parent_pte;
  459. while (page->multimapped || page->parent_pte) {
  460. if (!page->multimapped)
  461. parent_pte = page->parent_pte;
  462. else {
  463. struct kvm_pte_chain *chain;
  464. chain = container_of(page->parent_ptes.first,
  465. struct kvm_pte_chain, link);
  466. parent_pte = chain->parent_ptes[0];
  467. }
  468. BUG_ON(!parent_pte);
  469. kvm_mmu_put_page(vcpu, page, parent_pte);
  470. *parent_pte = 0;
  471. }
  472. kvm_mmu_page_unlink_children(vcpu, page);
  473. hlist_del(&page->hash_link);
  474. kvm_mmu_free_page(vcpu, page->page_hpa);
  475. }
  476. static int kvm_mmu_unprotect_page(struct kvm_vcpu *vcpu, gfn_t gfn)
  477. {
  478. unsigned index;
  479. struct hlist_head *bucket;
  480. struct kvm_mmu_page *page;
  481. struct hlist_node *node, *n;
  482. int r;
  483. pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
  484. r = 0;
  485. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  486. bucket = &vcpu->kvm->mmu_page_hash[index];
  487. hlist_for_each_entry_safe(page, node, n, bucket, hash_link)
  488. if (page->gfn == gfn && !page->role.metaphysical) {
  489. pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn,
  490. page->role.word);
  491. kvm_mmu_zap_page(vcpu, page);
  492. r = 1;
  493. }
  494. return r;
  495. }
  496. static void page_header_update_slot(struct kvm *kvm, void *pte, gpa_t gpa)
  497. {
  498. int slot = memslot_id(kvm, gfn_to_memslot(kvm, gpa >> PAGE_SHIFT));
  499. struct kvm_mmu_page *page_head = page_header(__pa(pte));
  500. __set_bit(slot, &page_head->slot_bitmap);
  501. }
  502. hpa_t safe_gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
  503. {
  504. hpa_t hpa = gpa_to_hpa(vcpu, gpa);
  505. return is_error_hpa(hpa) ? bad_page_address | (gpa & ~PAGE_MASK): hpa;
  506. }
  507. hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
  508. {
  509. struct kvm_memory_slot *slot;
  510. struct page *page;
  511. ASSERT((gpa & HPA_ERR_MASK) == 0);
  512. slot = gfn_to_memslot(vcpu->kvm, gpa >> PAGE_SHIFT);
  513. if (!slot)
  514. return gpa | HPA_ERR_MASK;
  515. page = gfn_to_page(slot, gpa >> PAGE_SHIFT);
  516. return ((hpa_t)page_to_pfn(page) << PAGE_SHIFT)
  517. | (gpa & (PAGE_SIZE-1));
  518. }
  519. hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva)
  520. {
  521. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
  522. if (gpa == UNMAPPED_GVA)
  523. return UNMAPPED_GVA;
  524. return gpa_to_hpa(vcpu, gpa);
  525. }
  526. static void release_pt_page_64(struct kvm_vcpu *vcpu, hpa_t page_hpa,
  527. int level)
  528. {
  529. u64 *pos;
  530. u64 *end;
  531. ASSERT(vcpu);
  532. ASSERT(VALID_PAGE(page_hpa));
  533. ASSERT(level <= PT64_ROOT_LEVEL && level > 0);
  534. for (pos = __va(page_hpa), end = pos + PT64_ENT_PER_PAGE;
  535. pos != end; pos++) {
  536. u64 current_ent = *pos;
  537. if (is_present_pte(current_ent)) {
  538. if (level != 1)
  539. release_pt_page_64(vcpu,
  540. current_ent &
  541. PT64_BASE_ADDR_MASK,
  542. level - 1);
  543. else
  544. rmap_remove(vcpu->kvm, pos);
  545. }
  546. *pos = 0;
  547. }
  548. kvm_mmu_free_page(vcpu, page_hpa);
  549. }
  550. static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
  551. {
  552. }
  553. static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, hpa_t p)
  554. {
  555. int level = PT32E_ROOT_LEVEL;
  556. hpa_t table_addr = vcpu->mmu.root_hpa;
  557. for (; ; level--) {
  558. u32 index = PT64_INDEX(v, level);
  559. u64 *table;
  560. u64 pte;
  561. ASSERT(VALID_PAGE(table_addr));
  562. table = __va(table_addr);
  563. if (level == 1) {
  564. pte = table[index];
  565. if (is_present_pte(pte) && is_writeble_pte(pte))
  566. return 0;
  567. mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT);
  568. page_header_update_slot(vcpu->kvm, table, v);
  569. table[index] = p | PT_PRESENT_MASK | PT_WRITABLE_MASK |
  570. PT_USER_MASK;
  571. rmap_add(vcpu->kvm, &table[index]);
  572. return 0;
  573. }
  574. if (table[index] == 0) {
  575. struct kvm_mmu_page *new_table;
  576. gfn_t pseudo_gfn;
  577. pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
  578. >> PAGE_SHIFT;
  579. new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
  580. v, level - 1,
  581. 1, &table[index]);
  582. if (!new_table) {
  583. pgprintk("nonpaging_map: ENOMEM\n");
  584. return -ENOMEM;
  585. }
  586. table[index] = new_table->page_hpa | PT_PRESENT_MASK
  587. | PT_WRITABLE_MASK | PT_USER_MASK;
  588. }
  589. table_addr = table[index] & PT64_BASE_ADDR_MASK;
  590. }
  591. }
  592. static void mmu_free_roots(struct kvm_vcpu *vcpu)
  593. {
  594. int i;
  595. #ifdef CONFIG_X86_64
  596. if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  597. hpa_t root = vcpu->mmu.root_hpa;
  598. ASSERT(VALID_PAGE(root));
  599. vcpu->mmu.root_hpa = INVALID_PAGE;
  600. return;
  601. }
  602. #endif
  603. for (i = 0; i < 4; ++i) {
  604. hpa_t root = vcpu->mmu.pae_root[i];
  605. ASSERT(VALID_PAGE(root));
  606. root &= PT64_BASE_ADDR_MASK;
  607. vcpu->mmu.pae_root[i] = INVALID_PAGE;
  608. }
  609. vcpu->mmu.root_hpa = INVALID_PAGE;
  610. }
  611. static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
  612. {
  613. int i;
  614. gfn_t root_gfn;
  615. root_gfn = vcpu->cr3 >> PAGE_SHIFT;
  616. #ifdef CONFIG_X86_64
  617. if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  618. hpa_t root = vcpu->mmu.root_hpa;
  619. ASSERT(!VALID_PAGE(root));
  620. root = kvm_mmu_get_page(vcpu, root_gfn, 0,
  621. PT64_ROOT_LEVEL, 0, NULL)->page_hpa;
  622. vcpu->mmu.root_hpa = root;
  623. return;
  624. }
  625. #endif
  626. for (i = 0; i < 4; ++i) {
  627. hpa_t root = vcpu->mmu.pae_root[i];
  628. ASSERT(!VALID_PAGE(root));
  629. if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL)
  630. root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT;
  631. else if (vcpu->mmu.root_level == 0)
  632. root_gfn = 0;
  633. root = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
  634. PT32_ROOT_LEVEL, !is_paging(vcpu),
  635. NULL)->page_hpa;
  636. vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK;
  637. }
  638. vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root);
  639. }
  640. static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
  641. {
  642. return vaddr;
  643. }
  644. static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
  645. u32 error_code)
  646. {
  647. gpa_t addr = gva;
  648. hpa_t paddr;
  649. ASSERT(vcpu);
  650. ASSERT(VALID_PAGE(vcpu->mmu.root_hpa));
  651. paddr = gpa_to_hpa(vcpu , addr & PT64_BASE_ADDR_MASK);
  652. if (is_error_hpa(paddr))
  653. return 1;
  654. return nonpaging_map(vcpu, addr & PAGE_MASK, paddr);
  655. }
  656. static void nonpaging_free(struct kvm_vcpu *vcpu)
  657. {
  658. mmu_free_roots(vcpu);
  659. }
  660. static int nonpaging_init_context(struct kvm_vcpu *vcpu)
  661. {
  662. struct kvm_mmu *context = &vcpu->mmu;
  663. context->new_cr3 = nonpaging_new_cr3;
  664. context->page_fault = nonpaging_page_fault;
  665. context->gva_to_gpa = nonpaging_gva_to_gpa;
  666. context->free = nonpaging_free;
  667. context->root_level = 0;
  668. context->shadow_root_level = PT32E_ROOT_LEVEL;
  669. mmu_alloc_roots(vcpu);
  670. ASSERT(VALID_PAGE(context->root_hpa));
  671. kvm_arch_ops->set_cr3(vcpu, context->root_hpa);
  672. return 0;
  673. }
  674. static void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  675. {
  676. ++kvm_stat.tlb_flush;
  677. kvm_arch_ops->tlb_flush(vcpu);
  678. }
  679. static void paging_new_cr3(struct kvm_vcpu *vcpu)
  680. {
  681. pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3);
  682. mmu_free_roots(vcpu);
  683. mmu_alloc_roots(vcpu);
  684. kvm_mmu_flush_tlb(vcpu);
  685. kvm_arch_ops->set_cr3(vcpu, vcpu->mmu.root_hpa);
  686. }
  687. static void mark_pagetable_nonglobal(void *shadow_pte)
  688. {
  689. page_header(__pa(shadow_pte))->global = 0;
  690. }
  691. static inline void set_pte_common(struct kvm_vcpu *vcpu,
  692. u64 *shadow_pte,
  693. gpa_t gaddr,
  694. int dirty,
  695. u64 access_bits,
  696. gfn_t gfn)
  697. {
  698. hpa_t paddr;
  699. *shadow_pte |= access_bits << PT_SHADOW_BITS_OFFSET;
  700. if (!dirty)
  701. access_bits &= ~PT_WRITABLE_MASK;
  702. paddr = gpa_to_hpa(vcpu, gaddr & PT64_BASE_ADDR_MASK);
  703. *shadow_pte |= access_bits;
  704. if (!(*shadow_pte & PT_GLOBAL_MASK))
  705. mark_pagetable_nonglobal(shadow_pte);
  706. if (is_error_hpa(paddr)) {
  707. *shadow_pte |= gaddr;
  708. *shadow_pte |= PT_SHADOW_IO_MARK;
  709. *shadow_pte &= ~PT_PRESENT_MASK;
  710. return;
  711. }
  712. *shadow_pte |= paddr;
  713. if (access_bits & PT_WRITABLE_MASK) {
  714. struct kvm_mmu_page *shadow;
  715. shadow = kvm_mmu_lookup_page(vcpu, gfn);
  716. if (shadow) {
  717. pgprintk("%s: found shadow page for %lx, marking ro\n",
  718. __FUNCTION__, gfn);
  719. access_bits &= ~PT_WRITABLE_MASK;
  720. *shadow_pte &= ~PT_WRITABLE_MASK;
  721. }
  722. }
  723. if (access_bits & PT_WRITABLE_MASK)
  724. mark_page_dirty(vcpu->kvm, gaddr >> PAGE_SHIFT);
  725. page_header_update_slot(vcpu->kvm, shadow_pte, gaddr);
  726. rmap_add(vcpu->kvm, shadow_pte);
  727. }
  728. static void inject_page_fault(struct kvm_vcpu *vcpu,
  729. u64 addr,
  730. u32 err_code)
  731. {
  732. kvm_arch_ops->inject_page_fault(vcpu, addr, err_code);
  733. }
  734. static inline int fix_read_pf(u64 *shadow_ent)
  735. {
  736. if ((*shadow_ent & PT_SHADOW_USER_MASK) &&
  737. !(*shadow_ent & PT_USER_MASK)) {
  738. /*
  739. * If supervisor write protect is disabled, we shadow kernel
  740. * pages as user pages so we can trap the write access.
  741. */
  742. *shadow_ent |= PT_USER_MASK;
  743. *shadow_ent &= ~PT_WRITABLE_MASK;
  744. return 1;
  745. }
  746. return 0;
  747. }
  748. static int may_access(u64 pte, int write, int user)
  749. {
  750. if (user && !(pte & PT_USER_MASK))
  751. return 0;
  752. if (write && !(pte & PT_WRITABLE_MASK))
  753. return 0;
  754. return 1;
  755. }
  756. static void paging_free(struct kvm_vcpu *vcpu)
  757. {
  758. nonpaging_free(vcpu);
  759. }
  760. #define PTTYPE 64
  761. #include "paging_tmpl.h"
  762. #undef PTTYPE
  763. #define PTTYPE 32
  764. #include "paging_tmpl.h"
  765. #undef PTTYPE
  766. static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
  767. {
  768. struct kvm_mmu *context = &vcpu->mmu;
  769. ASSERT(is_pae(vcpu));
  770. context->new_cr3 = paging_new_cr3;
  771. context->page_fault = paging64_page_fault;
  772. context->gva_to_gpa = paging64_gva_to_gpa;
  773. context->free = paging_free;
  774. context->root_level = level;
  775. context->shadow_root_level = level;
  776. mmu_alloc_roots(vcpu);
  777. ASSERT(VALID_PAGE(context->root_hpa));
  778. kvm_arch_ops->set_cr3(vcpu, context->root_hpa |
  779. (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK)));
  780. return 0;
  781. }
  782. static int paging64_init_context(struct kvm_vcpu *vcpu)
  783. {
  784. return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
  785. }
  786. static int paging32_init_context(struct kvm_vcpu *vcpu)
  787. {
  788. struct kvm_mmu *context = &vcpu->mmu;
  789. context->new_cr3 = paging_new_cr3;
  790. context->page_fault = paging32_page_fault;
  791. context->gva_to_gpa = paging32_gva_to_gpa;
  792. context->free = paging_free;
  793. context->root_level = PT32_ROOT_LEVEL;
  794. context->shadow_root_level = PT32E_ROOT_LEVEL;
  795. mmu_alloc_roots(vcpu);
  796. ASSERT(VALID_PAGE(context->root_hpa));
  797. kvm_arch_ops->set_cr3(vcpu, context->root_hpa |
  798. (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK)));
  799. return 0;
  800. }
  801. static int paging32E_init_context(struct kvm_vcpu *vcpu)
  802. {
  803. return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
  804. }
  805. static int init_kvm_mmu(struct kvm_vcpu *vcpu)
  806. {
  807. ASSERT(vcpu);
  808. ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
  809. if (!is_paging(vcpu))
  810. return nonpaging_init_context(vcpu);
  811. else if (is_long_mode(vcpu))
  812. return paging64_init_context(vcpu);
  813. else if (is_pae(vcpu))
  814. return paging32E_init_context(vcpu);
  815. else
  816. return paging32_init_context(vcpu);
  817. }
  818. static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
  819. {
  820. ASSERT(vcpu);
  821. if (VALID_PAGE(vcpu->mmu.root_hpa)) {
  822. vcpu->mmu.free(vcpu);
  823. vcpu->mmu.root_hpa = INVALID_PAGE;
  824. }
  825. }
  826. int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
  827. {
  828. destroy_kvm_mmu(vcpu);
  829. return init_kvm_mmu(vcpu);
  830. }
  831. void kvm_mmu_pre_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes)
  832. {
  833. gfn_t gfn = gpa >> PAGE_SHIFT;
  834. struct kvm_mmu_page *page;
  835. struct kvm_mmu_page *child;
  836. struct hlist_node *node;
  837. struct hlist_head *bucket;
  838. unsigned index;
  839. u64 *spte;
  840. u64 pte;
  841. unsigned offset = offset_in_page(gpa);
  842. unsigned page_offset;
  843. int level;
  844. pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
  845. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  846. bucket = &vcpu->kvm->mmu_page_hash[index];
  847. hlist_for_each_entry(page, node, bucket, hash_link) {
  848. if (page->gfn != gfn || page->role.metaphysical)
  849. continue;
  850. page_offset = offset;
  851. level = page->role.level;
  852. if (page->role.glevels == PT32_ROOT_LEVEL) {
  853. page_offset <<= 1; /* 32->64 */
  854. page_offset &= ~PAGE_MASK;
  855. }
  856. spte = __va(page->page_hpa);
  857. spte += page_offset / sizeof(*spte);
  858. pte = *spte;
  859. if (is_present_pte(pte)) {
  860. if (level == PT_PAGE_TABLE_LEVEL)
  861. rmap_remove(vcpu->kvm, spte);
  862. else {
  863. child = page_header(pte & PT64_BASE_ADDR_MASK);
  864. mmu_page_remove_parent_pte(child, spte);
  865. }
  866. }
  867. *spte = 0;
  868. }
  869. }
  870. void kvm_mmu_post_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes)
  871. {
  872. }
  873. int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
  874. {
  875. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
  876. return kvm_mmu_unprotect_page(vcpu, gpa >> PAGE_SHIFT);
  877. }
  878. void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
  879. {
  880. while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) {
  881. struct kvm_mmu_page *page;
  882. page = container_of(vcpu->kvm->active_mmu_pages.prev,
  883. struct kvm_mmu_page, link);
  884. kvm_mmu_zap_page(vcpu, page);
  885. }
  886. }
  887. EXPORT_SYMBOL_GPL(kvm_mmu_free_some_pages);
  888. static void free_mmu_pages(struct kvm_vcpu *vcpu)
  889. {
  890. while (!list_empty(&vcpu->free_pages)) {
  891. struct kvm_mmu_page *page;
  892. page = list_entry(vcpu->free_pages.next,
  893. struct kvm_mmu_page, link);
  894. list_del(&page->link);
  895. __free_page(pfn_to_page(page->page_hpa >> PAGE_SHIFT));
  896. page->page_hpa = INVALID_PAGE;
  897. }
  898. free_page((unsigned long)vcpu->mmu.pae_root);
  899. }
  900. static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
  901. {
  902. struct page *page;
  903. int i;
  904. ASSERT(vcpu);
  905. for (i = 0; i < KVM_NUM_MMU_PAGES; i++) {
  906. struct kvm_mmu_page *page_header = &vcpu->page_header_buf[i];
  907. INIT_LIST_HEAD(&page_header->link);
  908. if ((page = alloc_page(GFP_KERNEL)) == NULL)
  909. goto error_1;
  910. page->private = (unsigned long)page_header;
  911. page_header->page_hpa = (hpa_t)page_to_pfn(page) << PAGE_SHIFT;
  912. memset(__va(page_header->page_hpa), 0, PAGE_SIZE);
  913. list_add(&page_header->link, &vcpu->free_pages);
  914. ++vcpu->kvm->n_free_mmu_pages;
  915. }
  916. /*
  917. * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
  918. * Therefore we need to allocate shadow page tables in the first
  919. * 4GB of memory, which happens to fit the DMA32 zone.
  920. */
  921. page = alloc_page(GFP_KERNEL | __GFP_DMA32);
  922. if (!page)
  923. goto error_1;
  924. vcpu->mmu.pae_root = page_address(page);
  925. for (i = 0; i < 4; ++i)
  926. vcpu->mmu.pae_root[i] = INVALID_PAGE;
  927. return 0;
  928. error_1:
  929. free_mmu_pages(vcpu);
  930. return -ENOMEM;
  931. }
  932. int kvm_mmu_create(struct kvm_vcpu *vcpu)
  933. {
  934. ASSERT(vcpu);
  935. ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
  936. ASSERT(list_empty(&vcpu->free_pages));
  937. return alloc_mmu_pages(vcpu);
  938. }
  939. int kvm_mmu_setup(struct kvm_vcpu *vcpu)
  940. {
  941. ASSERT(vcpu);
  942. ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
  943. ASSERT(!list_empty(&vcpu->free_pages));
  944. return init_kvm_mmu(vcpu);
  945. }
  946. void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
  947. {
  948. ASSERT(vcpu);
  949. destroy_kvm_mmu(vcpu);
  950. free_mmu_pages(vcpu);
  951. }
  952. void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
  953. {
  954. struct kvm_mmu_page *page;
  955. list_for_each_entry(page, &kvm->active_mmu_pages, link) {
  956. int i;
  957. u64 *pt;
  958. if (!test_bit(slot, &page->slot_bitmap))
  959. continue;
  960. pt = __va(page->page_hpa);
  961. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  962. /* avoid RMW */
  963. if (pt[i] & PT_WRITABLE_MASK) {
  964. rmap_remove(kvm, &pt[i]);
  965. pt[i] &= ~PT_WRITABLE_MASK;
  966. }
  967. }
  968. }