e1000_ethtool.c 50 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19. *******************************************************************************/
  20. /* ethtool support for e1000 */
  21. #include "e1000.h"
  22. #include <asm/uaccess.h>
  23. extern char e1000_driver_name[];
  24. extern char e1000_driver_version[];
  25. extern int e1000_up(struct e1000_adapter *adapter);
  26. extern void e1000_down(struct e1000_adapter *adapter);
  27. extern void e1000_reset(struct e1000_adapter *adapter);
  28. extern int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
  29. extern int e1000_setup_rx_resources(struct e1000_adapter *adapter);
  30. extern int e1000_setup_tx_resources(struct e1000_adapter *adapter);
  31. extern void e1000_free_rx_resources(struct e1000_adapter *adapter);
  32. extern void e1000_free_tx_resources(struct e1000_adapter *adapter);
  33. extern void e1000_update_stats(struct e1000_adapter *adapter);
  34. struct e1000_stats {
  35. char stat_string[ETH_GSTRING_LEN];
  36. int sizeof_stat;
  37. int stat_offset;
  38. };
  39. #define E1000_STAT(m) sizeof(((struct e1000_adapter *)0)->m), \
  40. offsetof(struct e1000_adapter, m)
  41. static const struct e1000_stats e1000_gstrings_stats[] = {
  42. { "rx_packets", E1000_STAT(net_stats.rx_packets) },
  43. { "tx_packets", E1000_STAT(net_stats.tx_packets) },
  44. { "rx_bytes", E1000_STAT(net_stats.rx_bytes) },
  45. { "tx_bytes", E1000_STAT(net_stats.tx_bytes) },
  46. { "rx_errors", E1000_STAT(net_stats.rx_errors) },
  47. { "tx_errors", E1000_STAT(net_stats.tx_errors) },
  48. { "rx_dropped", E1000_STAT(net_stats.rx_dropped) },
  49. { "tx_dropped", E1000_STAT(net_stats.tx_dropped) },
  50. { "multicast", E1000_STAT(net_stats.multicast) },
  51. { "collisions", E1000_STAT(net_stats.collisions) },
  52. { "rx_length_errors", E1000_STAT(net_stats.rx_length_errors) },
  53. { "rx_over_errors", E1000_STAT(net_stats.rx_over_errors) },
  54. { "rx_crc_errors", E1000_STAT(net_stats.rx_crc_errors) },
  55. { "rx_frame_errors", E1000_STAT(net_stats.rx_frame_errors) },
  56. { "rx_fifo_errors", E1000_STAT(net_stats.rx_fifo_errors) },
  57. { "rx_no_buffer_count", E1000_STAT(stats.rnbc) },
  58. { "rx_missed_errors", E1000_STAT(net_stats.rx_missed_errors) },
  59. { "tx_aborted_errors", E1000_STAT(net_stats.tx_aborted_errors) },
  60. { "tx_carrier_errors", E1000_STAT(net_stats.tx_carrier_errors) },
  61. { "tx_fifo_errors", E1000_STAT(net_stats.tx_fifo_errors) },
  62. { "tx_heartbeat_errors", E1000_STAT(net_stats.tx_heartbeat_errors) },
  63. { "tx_window_errors", E1000_STAT(net_stats.tx_window_errors) },
  64. { "tx_abort_late_coll", E1000_STAT(stats.latecol) },
  65. { "tx_deferred_ok", E1000_STAT(stats.dc) },
  66. { "tx_single_coll_ok", E1000_STAT(stats.scc) },
  67. { "tx_multi_coll_ok", E1000_STAT(stats.mcc) },
  68. { "rx_long_length_errors", E1000_STAT(stats.roc) },
  69. { "rx_short_length_errors", E1000_STAT(stats.ruc) },
  70. { "rx_align_errors", E1000_STAT(stats.algnerrc) },
  71. { "tx_tcp_seg_good", E1000_STAT(stats.tsctc) },
  72. { "tx_tcp_seg_failed", E1000_STAT(stats.tsctfc) },
  73. { "rx_flow_control_xon", E1000_STAT(stats.xonrxc) },
  74. { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) },
  75. { "tx_flow_control_xon", E1000_STAT(stats.xontxc) },
  76. { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) },
  77. { "rx_long_byte_count", E1000_STAT(stats.gorcl) },
  78. { "rx_csum_offload_good", E1000_STAT(hw_csum_good) },
  79. { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) }
  80. };
  81. #define E1000_STATS_LEN \
  82. sizeof(e1000_gstrings_stats) / sizeof(struct e1000_stats)
  83. static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
  84. "Register test (offline)", "Eeprom test (offline)",
  85. "Interrupt test (offline)", "Loopback test (offline)",
  86. "Link test (on/offline)"
  87. };
  88. #define E1000_TEST_LEN sizeof(e1000_gstrings_test) / ETH_GSTRING_LEN
  89. static int
  90. e1000_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
  91. {
  92. struct e1000_adapter *adapter = netdev->priv;
  93. struct e1000_hw *hw = &adapter->hw;
  94. if(hw->media_type == e1000_media_type_copper) {
  95. ecmd->supported = (SUPPORTED_10baseT_Half |
  96. SUPPORTED_10baseT_Full |
  97. SUPPORTED_100baseT_Half |
  98. SUPPORTED_100baseT_Full |
  99. SUPPORTED_1000baseT_Full|
  100. SUPPORTED_Autoneg |
  101. SUPPORTED_TP);
  102. ecmd->advertising = ADVERTISED_TP;
  103. if(hw->autoneg == 1) {
  104. ecmd->advertising |= ADVERTISED_Autoneg;
  105. /* the e1000 autoneg seems to match ethtool nicely */
  106. ecmd->advertising |= hw->autoneg_advertised;
  107. }
  108. ecmd->port = PORT_TP;
  109. ecmd->phy_address = hw->phy_addr;
  110. if(hw->mac_type == e1000_82543)
  111. ecmd->transceiver = XCVR_EXTERNAL;
  112. else
  113. ecmd->transceiver = XCVR_INTERNAL;
  114. } else {
  115. ecmd->supported = (SUPPORTED_1000baseT_Full |
  116. SUPPORTED_FIBRE |
  117. SUPPORTED_Autoneg);
  118. ecmd->advertising = (SUPPORTED_1000baseT_Full |
  119. SUPPORTED_FIBRE |
  120. SUPPORTED_Autoneg);
  121. ecmd->port = PORT_FIBRE;
  122. if(hw->mac_type >= e1000_82545)
  123. ecmd->transceiver = XCVR_INTERNAL;
  124. else
  125. ecmd->transceiver = XCVR_EXTERNAL;
  126. }
  127. if(netif_carrier_ok(adapter->netdev)) {
  128. e1000_get_speed_and_duplex(hw, &adapter->link_speed,
  129. &adapter->link_duplex);
  130. ecmd->speed = adapter->link_speed;
  131. /* unfortunatly FULL_DUPLEX != DUPLEX_FULL
  132. * and HALF_DUPLEX != DUPLEX_HALF */
  133. if(adapter->link_duplex == FULL_DUPLEX)
  134. ecmd->duplex = DUPLEX_FULL;
  135. else
  136. ecmd->duplex = DUPLEX_HALF;
  137. } else {
  138. ecmd->speed = -1;
  139. ecmd->duplex = -1;
  140. }
  141. ecmd->autoneg = ((hw->media_type == e1000_media_type_fiber) ||
  142. hw->autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
  143. return 0;
  144. }
  145. static int
  146. e1000_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
  147. {
  148. struct e1000_adapter *adapter = netdev->priv;
  149. struct e1000_hw *hw = &adapter->hw;
  150. if(ecmd->autoneg == AUTONEG_ENABLE) {
  151. hw->autoneg = 1;
  152. hw->autoneg_advertised = 0x002F;
  153. ecmd->advertising = 0x002F;
  154. } else
  155. if(e1000_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex))
  156. return -EINVAL;
  157. /* reset the link */
  158. if(netif_running(adapter->netdev)) {
  159. e1000_down(adapter);
  160. e1000_reset(adapter);
  161. e1000_up(adapter);
  162. } else
  163. e1000_reset(adapter);
  164. return 0;
  165. }
  166. static void
  167. e1000_get_pauseparam(struct net_device *netdev,
  168. struct ethtool_pauseparam *pause)
  169. {
  170. struct e1000_adapter *adapter = netdev->priv;
  171. struct e1000_hw *hw = &adapter->hw;
  172. pause->autoneg =
  173. (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
  174. if(hw->fc == e1000_fc_rx_pause)
  175. pause->rx_pause = 1;
  176. else if(hw->fc == e1000_fc_tx_pause)
  177. pause->tx_pause = 1;
  178. else if(hw->fc == e1000_fc_full) {
  179. pause->rx_pause = 1;
  180. pause->tx_pause = 1;
  181. }
  182. }
  183. static int
  184. e1000_set_pauseparam(struct net_device *netdev,
  185. struct ethtool_pauseparam *pause)
  186. {
  187. struct e1000_adapter *adapter = netdev->priv;
  188. struct e1000_hw *hw = &adapter->hw;
  189. adapter->fc_autoneg = pause->autoneg;
  190. if(pause->rx_pause && pause->tx_pause)
  191. hw->fc = e1000_fc_full;
  192. else if(pause->rx_pause && !pause->tx_pause)
  193. hw->fc = e1000_fc_rx_pause;
  194. else if(!pause->rx_pause && pause->tx_pause)
  195. hw->fc = e1000_fc_tx_pause;
  196. else if(!pause->rx_pause && !pause->tx_pause)
  197. hw->fc = e1000_fc_none;
  198. hw->original_fc = hw->fc;
  199. if(adapter->fc_autoneg == AUTONEG_ENABLE) {
  200. if(netif_running(adapter->netdev)) {
  201. e1000_down(adapter);
  202. e1000_up(adapter);
  203. } else
  204. e1000_reset(adapter);
  205. }
  206. else
  207. return ((hw->media_type == e1000_media_type_fiber) ?
  208. e1000_setup_link(hw) : e1000_force_mac_fc(hw));
  209. return 0;
  210. }
  211. static uint32_t
  212. e1000_get_rx_csum(struct net_device *netdev)
  213. {
  214. struct e1000_adapter *adapter = netdev->priv;
  215. return adapter->rx_csum;
  216. }
  217. static int
  218. e1000_set_rx_csum(struct net_device *netdev, uint32_t data)
  219. {
  220. struct e1000_adapter *adapter = netdev->priv;
  221. adapter->rx_csum = data;
  222. if(netif_running(netdev)) {
  223. e1000_down(adapter);
  224. e1000_up(adapter);
  225. } else
  226. e1000_reset(adapter);
  227. return 0;
  228. }
  229. static uint32_t
  230. e1000_get_tx_csum(struct net_device *netdev)
  231. {
  232. return (netdev->features & NETIF_F_HW_CSUM) != 0;
  233. }
  234. static int
  235. e1000_set_tx_csum(struct net_device *netdev, uint32_t data)
  236. {
  237. struct e1000_adapter *adapter = netdev->priv;
  238. if(adapter->hw.mac_type < e1000_82543) {
  239. if (!data)
  240. return -EINVAL;
  241. return 0;
  242. }
  243. if (data)
  244. netdev->features |= NETIF_F_HW_CSUM;
  245. else
  246. netdev->features &= ~NETIF_F_HW_CSUM;
  247. return 0;
  248. }
  249. #ifdef NETIF_F_TSO
  250. static int
  251. e1000_set_tso(struct net_device *netdev, uint32_t data)
  252. {
  253. struct e1000_adapter *adapter = netdev->priv;
  254. if ((adapter->hw.mac_type < e1000_82544) ||
  255. (adapter->hw.mac_type == e1000_82547))
  256. return data ? -EINVAL : 0;
  257. if (data)
  258. netdev->features |= NETIF_F_TSO;
  259. else
  260. netdev->features &= ~NETIF_F_TSO;
  261. return 0;
  262. }
  263. #endif /* NETIF_F_TSO */
  264. static uint32_t
  265. e1000_get_msglevel(struct net_device *netdev)
  266. {
  267. struct e1000_adapter *adapter = netdev->priv;
  268. return adapter->msg_enable;
  269. }
  270. static void
  271. e1000_set_msglevel(struct net_device *netdev, uint32_t data)
  272. {
  273. struct e1000_adapter *adapter = netdev->priv;
  274. adapter->msg_enable = data;
  275. }
  276. static int
  277. e1000_get_regs_len(struct net_device *netdev)
  278. {
  279. #define E1000_REGS_LEN 32
  280. return E1000_REGS_LEN * sizeof(uint32_t);
  281. }
  282. static void
  283. e1000_get_regs(struct net_device *netdev,
  284. struct ethtool_regs *regs, void *p)
  285. {
  286. struct e1000_adapter *adapter = netdev->priv;
  287. struct e1000_hw *hw = &adapter->hw;
  288. uint32_t *regs_buff = p;
  289. uint16_t phy_data;
  290. memset(p, 0, E1000_REGS_LEN * sizeof(uint32_t));
  291. regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
  292. regs_buff[0] = E1000_READ_REG(hw, CTRL);
  293. regs_buff[1] = E1000_READ_REG(hw, STATUS);
  294. regs_buff[2] = E1000_READ_REG(hw, RCTL);
  295. regs_buff[3] = E1000_READ_REG(hw, RDLEN);
  296. regs_buff[4] = E1000_READ_REG(hw, RDH);
  297. regs_buff[5] = E1000_READ_REG(hw, RDT);
  298. regs_buff[6] = E1000_READ_REG(hw, RDTR);
  299. regs_buff[7] = E1000_READ_REG(hw, TCTL);
  300. regs_buff[8] = E1000_READ_REG(hw, TDLEN);
  301. regs_buff[9] = E1000_READ_REG(hw, TDH);
  302. regs_buff[10] = E1000_READ_REG(hw, TDT);
  303. regs_buff[11] = E1000_READ_REG(hw, TIDV);
  304. regs_buff[12] = adapter->hw.phy_type; /* PHY type (IGP=1, M88=0) */
  305. if(hw->phy_type == e1000_phy_igp) {
  306. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  307. IGP01E1000_PHY_AGC_A);
  308. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A &
  309. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  310. regs_buff[13] = (uint32_t)phy_data; /* cable length */
  311. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  312. IGP01E1000_PHY_AGC_B);
  313. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B &
  314. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  315. regs_buff[14] = (uint32_t)phy_data; /* cable length */
  316. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  317. IGP01E1000_PHY_AGC_C);
  318. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C &
  319. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  320. regs_buff[15] = (uint32_t)phy_data; /* cable length */
  321. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  322. IGP01E1000_PHY_AGC_D);
  323. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D &
  324. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  325. regs_buff[16] = (uint32_t)phy_data; /* cable length */
  326. regs_buff[17] = 0; /* extended 10bt distance (not needed) */
  327. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
  328. e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS &
  329. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  330. regs_buff[18] = (uint32_t)phy_data; /* cable polarity */
  331. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  332. IGP01E1000_PHY_PCS_INIT_REG);
  333. e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG &
  334. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  335. regs_buff[19] = (uint32_t)phy_data; /* cable polarity */
  336. regs_buff[20] = 0; /* polarity correction enabled (always) */
  337. regs_buff[22] = 0; /* phy receive errors (unavailable) */
  338. regs_buff[23] = regs_buff[18]; /* mdix mode */
  339. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
  340. } else {
  341. e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
  342. regs_buff[13] = (uint32_t)phy_data; /* cable length */
  343. regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  344. regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  345. regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  346. e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
  347. regs_buff[17] = (uint32_t)phy_data; /* extended 10bt distance */
  348. regs_buff[18] = regs_buff[13]; /* cable polarity */
  349. regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  350. regs_buff[20] = regs_buff[17]; /* polarity correction */
  351. /* phy receive errors */
  352. regs_buff[22] = adapter->phy_stats.receive_errors;
  353. regs_buff[23] = regs_buff[13]; /* mdix mode */
  354. }
  355. regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */
  356. e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
  357. regs_buff[24] = (uint32_t)phy_data; /* phy local receiver status */
  358. regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
  359. if(hw->mac_type >= e1000_82540 &&
  360. hw->media_type == e1000_media_type_copper) {
  361. regs_buff[26] = E1000_READ_REG(hw, MANC);
  362. }
  363. }
  364. static int
  365. e1000_get_eeprom_len(struct net_device *netdev)
  366. {
  367. struct e1000_adapter *adapter = netdev->priv;
  368. return adapter->hw.eeprom.word_size * 2;
  369. }
  370. static int
  371. e1000_get_eeprom(struct net_device *netdev,
  372. struct ethtool_eeprom *eeprom, uint8_t *bytes)
  373. {
  374. struct e1000_adapter *adapter = netdev->priv;
  375. struct e1000_hw *hw = &adapter->hw;
  376. uint16_t *eeprom_buff;
  377. int first_word, last_word;
  378. int ret_val = 0;
  379. uint16_t i;
  380. if(eeprom->len == 0)
  381. return -EINVAL;
  382. eeprom->magic = hw->vendor_id | (hw->device_id << 16);
  383. first_word = eeprom->offset >> 1;
  384. last_word = (eeprom->offset + eeprom->len - 1) >> 1;
  385. eeprom_buff = kmalloc(sizeof(uint16_t) *
  386. (last_word - first_word + 1), GFP_KERNEL);
  387. if(!eeprom_buff)
  388. return -ENOMEM;
  389. if(hw->eeprom.type == e1000_eeprom_spi)
  390. ret_val = e1000_read_eeprom(hw, first_word,
  391. last_word - first_word + 1,
  392. eeprom_buff);
  393. else {
  394. for (i = 0; i < last_word - first_word + 1; i++)
  395. if((ret_val = e1000_read_eeprom(hw, first_word + i, 1,
  396. &eeprom_buff[i])))
  397. break;
  398. }
  399. /* Device's eeprom is always little-endian, word addressable */
  400. for (i = 0; i < last_word - first_word + 1; i++)
  401. le16_to_cpus(&eeprom_buff[i]);
  402. memcpy(bytes, (uint8_t *)eeprom_buff + (eeprom->offset & 1),
  403. eeprom->len);
  404. kfree(eeprom_buff);
  405. return ret_val;
  406. }
  407. static int
  408. e1000_set_eeprom(struct net_device *netdev,
  409. struct ethtool_eeprom *eeprom, uint8_t *bytes)
  410. {
  411. struct e1000_adapter *adapter = netdev->priv;
  412. struct e1000_hw *hw = &adapter->hw;
  413. uint16_t *eeprom_buff;
  414. void *ptr;
  415. int max_len, first_word, last_word, ret_val = 0;
  416. uint16_t i;
  417. if(eeprom->len == 0)
  418. return -EOPNOTSUPP;
  419. if(eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
  420. return -EFAULT;
  421. max_len = hw->eeprom.word_size * 2;
  422. first_word = eeprom->offset >> 1;
  423. last_word = (eeprom->offset + eeprom->len - 1) >> 1;
  424. eeprom_buff = kmalloc(max_len, GFP_KERNEL);
  425. if(!eeprom_buff)
  426. return -ENOMEM;
  427. ptr = (void *)eeprom_buff;
  428. if(eeprom->offset & 1) {
  429. /* need read/modify/write of first changed EEPROM word */
  430. /* only the second byte of the word is being modified */
  431. ret_val = e1000_read_eeprom(hw, first_word, 1,
  432. &eeprom_buff[0]);
  433. ptr++;
  434. }
  435. if(((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
  436. /* need read/modify/write of last changed EEPROM word */
  437. /* only the first byte of the word is being modified */
  438. ret_val = e1000_read_eeprom(hw, last_word, 1,
  439. &eeprom_buff[last_word - first_word]);
  440. }
  441. /* Device's eeprom is always little-endian, word addressable */
  442. for (i = 0; i < last_word - first_word + 1; i++)
  443. le16_to_cpus(&eeprom_buff[i]);
  444. memcpy(ptr, bytes, eeprom->len);
  445. for (i = 0; i < last_word - first_word + 1; i++)
  446. eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
  447. ret_val = e1000_write_eeprom(hw, first_word,
  448. last_word - first_word + 1, eeprom_buff);
  449. /* Update the checksum over the first part of the EEPROM if needed */
  450. if((ret_val == 0) && first_word <= EEPROM_CHECKSUM_REG)
  451. e1000_update_eeprom_checksum(hw);
  452. kfree(eeprom_buff);
  453. return ret_val;
  454. }
  455. static void
  456. e1000_get_drvinfo(struct net_device *netdev,
  457. struct ethtool_drvinfo *drvinfo)
  458. {
  459. struct e1000_adapter *adapter = netdev->priv;
  460. strncpy(drvinfo->driver, e1000_driver_name, 32);
  461. strncpy(drvinfo->version, e1000_driver_version, 32);
  462. strncpy(drvinfo->fw_version, "N/A", 32);
  463. strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
  464. drvinfo->n_stats = E1000_STATS_LEN;
  465. drvinfo->testinfo_len = E1000_TEST_LEN;
  466. drvinfo->regdump_len = e1000_get_regs_len(netdev);
  467. drvinfo->eedump_len = e1000_get_eeprom_len(netdev);
  468. }
  469. static void
  470. e1000_get_ringparam(struct net_device *netdev,
  471. struct ethtool_ringparam *ring)
  472. {
  473. struct e1000_adapter *adapter = netdev->priv;
  474. e1000_mac_type mac_type = adapter->hw.mac_type;
  475. struct e1000_desc_ring *txdr = &adapter->tx_ring;
  476. struct e1000_desc_ring *rxdr = &adapter->rx_ring;
  477. ring->rx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_RXD :
  478. E1000_MAX_82544_RXD;
  479. ring->tx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_TXD :
  480. E1000_MAX_82544_TXD;
  481. ring->rx_mini_max_pending = 0;
  482. ring->rx_jumbo_max_pending = 0;
  483. ring->rx_pending = rxdr->count;
  484. ring->tx_pending = txdr->count;
  485. ring->rx_mini_pending = 0;
  486. ring->rx_jumbo_pending = 0;
  487. }
  488. static int
  489. e1000_set_ringparam(struct net_device *netdev,
  490. struct ethtool_ringparam *ring)
  491. {
  492. struct e1000_adapter *adapter = netdev->priv;
  493. e1000_mac_type mac_type = adapter->hw.mac_type;
  494. struct e1000_desc_ring *txdr = &adapter->tx_ring;
  495. struct e1000_desc_ring *rxdr = &adapter->rx_ring;
  496. struct e1000_desc_ring tx_old, tx_new, rx_old, rx_new;
  497. int err;
  498. tx_old = adapter->tx_ring;
  499. rx_old = adapter->rx_ring;
  500. if((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
  501. return -EINVAL;
  502. if(netif_running(adapter->netdev))
  503. e1000_down(adapter);
  504. rxdr->count = max(ring->rx_pending,(uint32_t)E1000_MIN_RXD);
  505. rxdr->count = min(rxdr->count,(uint32_t)(mac_type < e1000_82544 ?
  506. E1000_MAX_RXD : E1000_MAX_82544_RXD));
  507. E1000_ROUNDUP(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE);
  508. txdr->count = max(ring->tx_pending,(uint32_t)E1000_MIN_TXD);
  509. txdr->count = min(txdr->count,(uint32_t)(mac_type < e1000_82544 ?
  510. E1000_MAX_TXD : E1000_MAX_82544_TXD));
  511. E1000_ROUNDUP(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE);
  512. if(netif_running(adapter->netdev)) {
  513. /* Try to get new resources before deleting old */
  514. if((err = e1000_setup_rx_resources(adapter)))
  515. goto err_setup_rx;
  516. if((err = e1000_setup_tx_resources(adapter)))
  517. goto err_setup_tx;
  518. /* save the new, restore the old in order to free it,
  519. * then restore the new back again */
  520. rx_new = adapter->rx_ring;
  521. tx_new = adapter->tx_ring;
  522. adapter->rx_ring = rx_old;
  523. adapter->tx_ring = tx_old;
  524. e1000_free_rx_resources(adapter);
  525. e1000_free_tx_resources(adapter);
  526. adapter->rx_ring = rx_new;
  527. adapter->tx_ring = tx_new;
  528. if((err = e1000_up(adapter)))
  529. return err;
  530. }
  531. return 0;
  532. err_setup_tx:
  533. e1000_free_rx_resources(adapter);
  534. err_setup_rx:
  535. adapter->rx_ring = rx_old;
  536. adapter->tx_ring = tx_old;
  537. e1000_up(adapter);
  538. return err;
  539. }
  540. #define REG_PATTERN_TEST(R, M, W) \
  541. { \
  542. uint32_t pat, value; \
  543. uint32_t test[] = \
  544. {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; \
  545. for(pat = 0; pat < sizeof(test)/sizeof(test[0]); pat++) { \
  546. E1000_WRITE_REG(&adapter->hw, R, (test[pat] & W)); \
  547. value = E1000_READ_REG(&adapter->hw, R); \
  548. if(value != (test[pat] & W & M)) { \
  549. *data = (adapter->hw.mac_type < e1000_82543) ? \
  550. E1000_82542_##R : E1000_##R; \
  551. return 1; \
  552. } \
  553. } \
  554. }
  555. #define REG_SET_AND_CHECK(R, M, W) \
  556. { \
  557. uint32_t value; \
  558. E1000_WRITE_REG(&adapter->hw, R, W & M); \
  559. value = E1000_READ_REG(&adapter->hw, R); \
  560. if ((W & M) != (value & M)) { \
  561. *data = (adapter->hw.mac_type < e1000_82543) ? \
  562. E1000_82542_##R : E1000_##R; \
  563. return 1; \
  564. } \
  565. }
  566. static int
  567. e1000_reg_test(struct e1000_adapter *adapter, uint64_t *data)
  568. {
  569. uint32_t value;
  570. uint32_t i;
  571. /* The status register is Read Only, so a write should fail.
  572. * Some bits that get toggled are ignored.
  573. */
  574. value = (E1000_READ_REG(&adapter->hw, STATUS) & (0xFFFFF833));
  575. E1000_WRITE_REG(&adapter->hw, STATUS, (0xFFFFFFFF));
  576. if(value != (E1000_READ_REG(&adapter->hw, STATUS) & (0xFFFFF833))) {
  577. *data = 1;
  578. return 1;
  579. }
  580. REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
  581. REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF);
  582. REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF);
  583. REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF);
  584. REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF);
  585. REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
  586. REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF);
  587. REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF);
  588. REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF);
  589. REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8);
  590. REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF);
  591. REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
  592. REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
  593. REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF);
  594. REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000);
  595. REG_SET_AND_CHECK(RCTL, 0x06DFB3FE, 0x003FFFFB);
  596. REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000);
  597. if(adapter->hw.mac_type >= e1000_82543) {
  598. REG_SET_AND_CHECK(RCTL, 0x06DFB3FE, 0xFFFFFFFF);
  599. REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
  600. REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF);
  601. REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
  602. REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF);
  603. for(i = 0; i < E1000_RAR_ENTRIES; i++) {
  604. REG_PATTERN_TEST(RA + ((i << 1) << 2), 0xFFFFFFFF,
  605. 0xFFFFFFFF);
  606. REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 0x8003FFFF,
  607. 0xFFFFFFFF);
  608. }
  609. } else {
  610. REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF);
  611. REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF);
  612. REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF);
  613. REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF);
  614. }
  615. for(i = 0; i < E1000_MC_TBL_SIZE; i++)
  616. REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF);
  617. *data = 0;
  618. return 0;
  619. }
  620. static int
  621. e1000_eeprom_test(struct e1000_adapter *adapter, uint64_t *data)
  622. {
  623. uint16_t temp;
  624. uint16_t checksum = 0;
  625. uint16_t i;
  626. *data = 0;
  627. /* Read and add up the contents of the EEPROM */
  628. for(i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) {
  629. if((e1000_read_eeprom(&adapter->hw, i, 1, &temp)) < 0) {
  630. *data = 1;
  631. break;
  632. }
  633. checksum += temp;
  634. }
  635. /* If Checksum is not Correct return error else test passed */
  636. if((checksum != (uint16_t) EEPROM_SUM) && !(*data))
  637. *data = 2;
  638. return *data;
  639. }
  640. static irqreturn_t
  641. e1000_test_intr(int irq,
  642. void *data,
  643. struct pt_regs *regs)
  644. {
  645. struct net_device *netdev = (struct net_device *) data;
  646. struct e1000_adapter *adapter = netdev->priv;
  647. adapter->test_icr |= E1000_READ_REG(&adapter->hw, ICR);
  648. return IRQ_HANDLED;
  649. }
  650. static int
  651. e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data)
  652. {
  653. struct net_device *netdev = adapter->netdev;
  654. uint32_t mask, i=0, shared_int = TRUE;
  655. uint32_t irq = adapter->pdev->irq;
  656. *data = 0;
  657. /* Hook up test interrupt handler just for this test */
  658. if(!request_irq(irq, &e1000_test_intr, 0, netdev->name, netdev)) {
  659. shared_int = FALSE;
  660. } else if(request_irq(irq, &e1000_test_intr, SA_SHIRQ,
  661. netdev->name, netdev)){
  662. *data = 1;
  663. return -1;
  664. }
  665. /* Disable all the interrupts */
  666. E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
  667. msec_delay(10);
  668. /* Test each interrupt */
  669. for(; i < 10; i++) {
  670. /* Interrupt to test */
  671. mask = 1 << i;
  672. if(!shared_int) {
  673. /* Disable the interrupt to be reported in
  674. * the cause register and then force the same
  675. * interrupt and see if one gets posted. If
  676. * an interrupt was posted to the bus, the
  677. * test failed.
  678. */
  679. adapter->test_icr = 0;
  680. E1000_WRITE_REG(&adapter->hw, IMC, mask);
  681. E1000_WRITE_REG(&adapter->hw, ICS, mask);
  682. msec_delay(10);
  683. if(adapter->test_icr & mask) {
  684. *data = 3;
  685. break;
  686. }
  687. }
  688. /* Enable the interrupt to be reported in
  689. * the cause register and then force the same
  690. * interrupt and see if one gets posted. If
  691. * an interrupt was not posted to the bus, the
  692. * test failed.
  693. */
  694. adapter->test_icr = 0;
  695. E1000_WRITE_REG(&adapter->hw, IMS, mask);
  696. E1000_WRITE_REG(&adapter->hw, ICS, mask);
  697. msec_delay(10);
  698. if(!(adapter->test_icr & mask)) {
  699. *data = 4;
  700. break;
  701. }
  702. if(!shared_int) {
  703. /* Disable the other interrupts to be reported in
  704. * the cause register and then force the other
  705. * interrupts and see if any get posted. If
  706. * an interrupt was posted to the bus, the
  707. * test failed.
  708. */
  709. adapter->test_icr = 0;
  710. E1000_WRITE_REG(&adapter->hw, IMC, ~mask & 0x00007FFF);
  711. E1000_WRITE_REG(&adapter->hw, ICS, ~mask & 0x00007FFF);
  712. msec_delay(10);
  713. if(adapter->test_icr) {
  714. *data = 5;
  715. break;
  716. }
  717. }
  718. }
  719. /* Disable all the interrupts */
  720. E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
  721. msec_delay(10);
  722. /* Unhook test interrupt handler */
  723. free_irq(irq, netdev);
  724. return *data;
  725. }
  726. static void
  727. e1000_free_desc_rings(struct e1000_adapter *adapter)
  728. {
  729. struct e1000_desc_ring *txdr = &adapter->test_tx_ring;
  730. struct e1000_desc_ring *rxdr = &adapter->test_rx_ring;
  731. struct pci_dev *pdev = adapter->pdev;
  732. int i;
  733. if(txdr->desc && txdr->buffer_info) {
  734. for(i = 0; i < txdr->count; i++) {
  735. if(txdr->buffer_info[i].dma)
  736. pci_unmap_single(pdev, txdr->buffer_info[i].dma,
  737. txdr->buffer_info[i].length,
  738. PCI_DMA_TODEVICE);
  739. if(txdr->buffer_info[i].skb)
  740. dev_kfree_skb(txdr->buffer_info[i].skb);
  741. }
  742. }
  743. if(rxdr->desc && rxdr->buffer_info) {
  744. for(i = 0; i < rxdr->count; i++) {
  745. if(rxdr->buffer_info[i].dma)
  746. pci_unmap_single(pdev, rxdr->buffer_info[i].dma,
  747. rxdr->buffer_info[i].length,
  748. PCI_DMA_FROMDEVICE);
  749. if(rxdr->buffer_info[i].skb)
  750. dev_kfree_skb(rxdr->buffer_info[i].skb);
  751. }
  752. }
  753. if(txdr->desc)
  754. pci_free_consistent(pdev, txdr->size, txdr->desc, txdr->dma);
  755. if(rxdr->desc)
  756. pci_free_consistent(pdev, rxdr->size, rxdr->desc, rxdr->dma);
  757. if(txdr->buffer_info)
  758. kfree(txdr->buffer_info);
  759. if(rxdr->buffer_info)
  760. kfree(rxdr->buffer_info);
  761. return;
  762. }
  763. static int
  764. e1000_setup_desc_rings(struct e1000_adapter *adapter)
  765. {
  766. struct e1000_desc_ring *txdr = &adapter->test_tx_ring;
  767. struct e1000_desc_ring *rxdr = &adapter->test_rx_ring;
  768. struct pci_dev *pdev = adapter->pdev;
  769. uint32_t rctl;
  770. int size, i, ret_val;
  771. /* Setup Tx descriptor ring and Tx buffers */
  772. if(!txdr->count)
  773. txdr->count = E1000_DEFAULT_TXD;
  774. size = txdr->count * sizeof(struct e1000_buffer);
  775. if(!(txdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
  776. ret_val = 1;
  777. goto err_nomem;
  778. }
  779. memset(txdr->buffer_info, 0, size);
  780. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  781. E1000_ROUNDUP(txdr->size, 4096);
  782. if(!(txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma))) {
  783. ret_val = 2;
  784. goto err_nomem;
  785. }
  786. memset(txdr->desc, 0, txdr->size);
  787. txdr->next_to_use = txdr->next_to_clean = 0;
  788. E1000_WRITE_REG(&adapter->hw, TDBAL,
  789. ((uint64_t) txdr->dma & 0x00000000FFFFFFFF));
  790. E1000_WRITE_REG(&adapter->hw, TDBAH, ((uint64_t) txdr->dma >> 32));
  791. E1000_WRITE_REG(&adapter->hw, TDLEN,
  792. txdr->count * sizeof(struct e1000_tx_desc));
  793. E1000_WRITE_REG(&adapter->hw, TDH, 0);
  794. E1000_WRITE_REG(&adapter->hw, TDT, 0);
  795. E1000_WRITE_REG(&adapter->hw, TCTL,
  796. E1000_TCTL_PSP | E1000_TCTL_EN |
  797. E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
  798. E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT);
  799. for(i = 0; i < txdr->count; i++) {
  800. struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i);
  801. struct sk_buff *skb;
  802. unsigned int size = 1024;
  803. if(!(skb = alloc_skb(size, GFP_KERNEL))) {
  804. ret_val = 3;
  805. goto err_nomem;
  806. }
  807. skb_put(skb, size);
  808. txdr->buffer_info[i].skb = skb;
  809. txdr->buffer_info[i].length = skb->len;
  810. txdr->buffer_info[i].dma =
  811. pci_map_single(pdev, skb->data, skb->len,
  812. PCI_DMA_TODEVICE);
  813. tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma);
  814. tx_desc->lower.data = cpu_to_le32(skb->len);
  815. tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
  816. E1000_TXD_CMD_IFCS |
  817. E1000_TXD_CMD_RPS);
  818. tx_desc->upper.data = 0;
  819. }
  820. /* Setup Rx descriptor ring and Rx buffers */
  821. if(!rxdr->count)
  822. rxdr->count = E1000_DEFAULT_RXD;
  823. size = rxdr->count * sizeof(struct e1000_buffer);
  824. if(!(rxdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
  825. ret_val = 4;
  826. goto err_nomem;
  827. }
  828. memset(rxdr->buffer_info, 0, size);
  829. rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc);
  830. if(!(rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma))) {
  831. ret_val = 5;
  832. goto err_nomem;
  833. }
  834. memset(rxdr->desc, 0, rxdr->size);
  835. rxdr->next_to_use = rxdr->next_to_clean = 0;
  836. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  837. E1000_WRITE_REG(&adapter->hw, RCTL, rctl & ~E1000_RCTL_EN);
  838. E1000_WRITE_REG(&adapter->hw, RDBAL,
  839. ((uint64_t) rxdr->dma & 0xFFFFFFFF));
  840. E1000_WRITE_REG(&adapter->hw, RDBAH, ((uint64_t) rxdr->dma >> 32));
  841. E1000_WRITE_REG(&adapter->hw, RDLEN, rxdr->size);
  842. E1000_WRITE_REG(&adapter->hw, RDH, 0);
  843. E1000_WRITE_REG(&adapter->hw, RDT, 0);
  844. rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
  845. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  846. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  847. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  848. for(i = 0; i < rxdr->count; i++) {
  849. struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i);
  850. struct sk_buff *skb;
  851. if(!(skb = alloc_skb(E1000_RXBUFFER_2048 + NET_IP_ALIGN,
  852. GFP_KERNEL))) {
  853. ret_val = 6;
  854. goto err_nomem;
  855. }
  856. skb_reserve(skb, NET_IP_ALIGN);
  857. rxdr->buffer_info[i].skb = skb;
  858. rxdr->buffer_info[i].length = E1000_RXBUFFER_2048;
  859. rxdr->buffer_info[i].dma =
  860. pci_map_single(pdev, skb->data, E1000_RXBUFFER_2048,
  861. PCI_DMA_FROMDEVICE);
  862. rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma);
  863. memset(skb->data, 0x00, skb->len);
  864. }
  865. return 0;
  866. err_nomem:
  867. e1000_free_desc_rings(adapter);
  868. return ret_val;
  869. }
  870. static void
  871. e1000_phy_disable_receiver(struct e1000_adapter *adapter)
  872. {
  873. /* Write out to PHY registers 29 and 30 to disable the Receiver. */
  874. e1000_write_phy_reg(&adapter->hw, 29, 0x001F);
  875. e1000_write_phy_reg(&adapter->hw, 30, 0x8FFC);
  876. e1000_write_phy_reg(&adapter->hw, 29, 0x001A);
  877. e1000_write_phy_reg(&adapter->hw, 30, 0x8FF0);
  878. }
  879. static void
  880. e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter)
  881. {
  882. uint16_t phy_reg;
  883. /* Because we reset the PHY above, we need to re-force TX_CLK in the
  884. * Extended PHY Specific Control Register to 25MHz clock. This
  885. * value defaults back to a 2.5MHz clock when the PHY is reset.
  886. */
  887. e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
  888. phy_reg |= M88E1000_EPSCR_TX_CLK_25;
  889. e1000_write_phy_reg(&adapter->hw,
  890. M88E1000_EXT_PHY_SPEC_CTRL, phy_reg);
  891. /* In addition, because of the s/w reset above, we need to enable
  892. * CRS on TX. This must be set for both full and half duplex
  893. * operation.
  894. */
  895. e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
  896. phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
  897. e1000_write_phy_reg(&adapter->hw,
  898. M88E1000_PHY_SPEC_CTRL, phy_reg);
  899. }
  900. static int
  901. e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter)
  902. {
  903. uint32_t ctrl_reg;
  904. uint16_t phy_reg;
  905. /* Setup the Device Control Register for PHY loopback test. */
  906. ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
  907. ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */
  908. E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
  909. E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
  910. E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */
  911. E1000_CTRL_FD); /* Force Duplex to FULL */
  912. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
  913. /* Read the PHY Specific Control Register (0x10) */
  914. e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
  915. /* Clear Auto-Crossover bits in PHY Specific Control Register
  916. * (bits 6:5).
  917. */
  918. phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE;
  919. e1000_write_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, phy_reg);
  920. /* Perform software reset on the PHY */
  921. e1000_phy_reset(&adapter->hw);
  922. /* Have to setup TX_CLK and TX_CRS after software reset */
  923. e1000_phy_reset_clk_and_crs(adapter);
  924. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8100);
  925. /* Wait for reset to complete. */
  926. udelay(500);
  927. /* Have to setup TX_CLK and TX_CRS after software reset */
  928. e1000_phy_reset_clk_and_crs(adapter);
  929. /* Write out to PHY registers 29 and 30 to disable the Receiver. */
  930. e1000_phy_disable_receiver(adapter);
  931. /* Set the loopback bit in the PHY control register. */
  932. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
  933. phy_reg |= MII_CR_LOOPBACK;
  934. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
  935. /* Setup TX_CLK and TX_CRS one more time. */
  936. e1000_phy_reset_clk_and_crs(adapter);
  937. /* Check Phy Configuration */
  938. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
  939. if(phy_reg != 0x4100)
  940. return 9;
  941. e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
  942. if(phy_reg != 0x0070)
  943. return 10;
  944. e1000_read_phy_reg(&adapter->hw, 29, &phy_reg);
  945. if(phy_reg != 0x001A)
  946. return 11;
  947. return 0;
  948. }
  949. static int
  950. e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
  951. {
  952. uint32_t ctrl_reg = 0;
  953. uint32_t stat_reg = 0;
  954. adapter->hw.autoneg = FALSE;
  955. if(adapter->hw.phy_type == e1000_phy_m88) {
  956. /* Auto-MDI/MDIX Off */
  957. e1000_write_phy_reg(&adapter->hw,
  958. M88E1000_PHY_SPEC_CTRL, 0x0808);
  959. /* reset to update Auto-MDI/MDIX */
  960. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x9140);
  961. /* autoneg off */
  962. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8140);
  963. }
  964. /* force 1000, set loopback */
  965. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x4140);
  966. /* Now set up the MAC to the same speed/duplex as the PHY. */
  967. ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
  968. ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
  969. ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
  970. E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
  971. E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
  972. E1000_CTRL_FD); /* Force Duplex to FULL */
  973. if(adapter->hw.media_type == e1000_media_type_copper &&
  974. adapter->hw.phy_type == e1000_phy_m88) {
  975. ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
  976. } else {
  977. /* Set the ILOS bit on the fiber Nic is half
  978. * duplex link is detected. */
  979. stat_reg = E1000_READ_REG(&adapter->hw, STATUS);
  980. if((stat_reg & E1000_STATUS_FD) == 0)
  981. ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
  982. }
  983. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
  984. /* Disable the receiver on the PHY so when a cable is plugged in, the
  985. * PHY does not begin to autoneg when a cable is reconnected to the NIC.
  986. */
  987. if(adapter->hw.phy_type == e1000_phy_m88)
  988. e1000_phy_disable_receiver(adapter);
  989. udelay(500);
  990. return 0;
  991. }
  992. static int
  993. e1000_set_phy_loopback(struct e1000_adapter *adapter)
  994. {
  995. uint16_t phy_reg = 0;
  996. uint16_t count = 0;
  997. switch (adapter->hw.mac_type) {
  998. case e1000_82543:
  999. if(adapter->hw.media_type == e1000_media_type_copper) {
  1000. /* Attempt to setup Loopback mode on Non-integrated PHY.
  1001. * Some PHY registers get corrupted at random, so
  1002. * attempt this 10 times.
  1003. */
  1004. while(e1000_nonintegrated_phy_loopback(adapter) &&
  1005. count++ < 10);
  1006. if(count < 11)
  1007. return 0;
  1008. }
  1009. break;
  1010. case e1000_82544:
  1011. case e1000_82540:
  1012. case e1000_82545:
  1013. case e1000_82545_rev_3:
  1014. case e1000_82546:
  1015. case e1000_82546_rev_3:
  1016. case e1000_82541:
  1017. case e1000_82541_rev_2:
  1018. case e1000_82547:
  1019. case e1000_82547_rev_2:
  1020. return e1000_integrated_phy_loopback(adapter);
  1021. break;
  1022. default:
  1023. /* Default PHY loopback work is to read the MII
  1024. * control register and assert bit 14 (loopback mode).
  1025. */
  1026. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
  1027. phy_reg |= MII_CR_LOOPBACK;
  1028. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
  1029. return 0;
  1030. break;
  1031. }
  1032. return 8;
  1033. }
  1034. static int
  1035. e1000_setup_loopback_test(struct e1000_adapter *adapter)
  1036. {
  1037. uint32_t rctl;
  1038. if(adapter->hw.media_type == e1000_media_type_fiber ||
  1039. adapter->hw.media_type == e1000_media_type_internal_serdes) {
  1040. if(adapter->hw.mac_type == e1000_82545 ||
  1041. adapter->hw.mac_type == e1000_82546 ||
  1042. adapter->hw.mac_type == e1000_82545_rev_3 ||
  1043. adapter->hw.mac_type == e1000_82546_rev_3)
  1044. return e1000_set_phy_loopback(adapter);
  1045. else {
  1046. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1047. rctl |= E1000_RCTL_LBM_TCVR;
  1048. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1049. return 0;
  1050. }
  1051. } else if(adapter->hw.media_type == e1000_media_type_copper)
  1052. return e1000_set_phy_loopback(adapter);
  1053. return 7;
  1054. }
  1055. static void
  1056. e1000_loopback_cleanup(struct e1000_adapter *adapter)
  1057. {
  1058. uint32_t rctl;
  1059. uint16_t phy_reg;
  1060. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1061. rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
  1062. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1063. if(adapter->hw.media_type == e1000_media_type_copper ||
  1064. ((adapter->hw.media_type == e1000_media_type_fiber ||
  1065. adapter->hw.media_type == e1000_media_type_internal_serdes) &&
  1066. (adapter->hw.mac_type == e1000_82545 ||
  1067. adapter->hw.mac_type == e1000_82546 ||
  1068. adapter->hw.mac_type == e1000_82545_rev_3 ||
  1069. adapter->hw.mac_type == e1000_82546_rev_3))) {
  1070. adapter->hw.autoneg = TRUE;
  1071. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
  1072. if(phy_reg & MII_CR_LOOPBACK) {
  1073. phy_reg &= ~MII_CR_LOOPBACK;
  1074. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
  1075. e1000_phy_reset(&adapter->hw);
  1076. }
  1077. }
  1078. }
  1079. static void
  1080. e1000_create_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
  1081. {
  1082. memset(skb->data, 0xFF, frame_size);
  1083. frame_size = (frame_size % 2) ? (frame_size - 1) : frame_size;
  1084. memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
  1085. memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
  1086. memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
  1087. }
  1088. static int
  1089. e1000_check_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
  1090. {
  1091. frame_size = (frame_size % 2) ? (frame_size - 1) : frame_size;
  1092. if(*(skb->data + 3) == 0xFF) {
  1093. if((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
  1094. (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
  1095. return 0;
  1096. }
  1097. }
  1098. return 13;
  1099. }
  1100. static int
  1101. e1000_run_loopback_test(struct e1000_adapter *adapter)
  1102. {
  1103. struct e1000_desc_ring *txdr = &adapter->test_tx_ring;
  1104. struct e1000_desc_ring *rxdr = &adapter->test_rx_ring;
  1105. struct pci_dev *pdev = adapter->pdev;
  1106. int i, j, k, l, lc, good_cnt, ret_val=0;
  1107. unsigned long time;
  1108. E1000_WRITE_REG(&adapter->hw, RDT, rxdr->count - 1);
  1109. /* Calculate the loop count based on the largest descriptor ring
  1110. * The idea is to wrap the largest ring a number of times using 64
  1111. * send/receive pairs during each loop
  1112. */
  1113. if(rxdr->count <= txdr->count)
  1114. lc = ((txdr->count / 64) * 2) + 1;
  1115. else
  1116. lc = ((rxdr->count / 64) * 2) + 1;
  1117. k = l = 0;
  1118. for(j = 0; j <= lc; j++) { /* loop count loop */
  1119. for(i = 0; i < 64; i++) { /* send the packets */
  1120. e1000_create_lbtest_frame(txdr->buffer_info[i].skb,
  1121. 1024);
  1122. pci_dma_sync_single_for_device(pdev,
  1123. txdr->buffer_info[k].dma,
  1124. txdr->buffer_info[k].length,
  1125. PCI_DMA_TODEVICE);
  1126. if(unlikely(++k == txdr->count)) k = 0;
  1127. }
  1128. E1000_WRITE_REG(&adapter->hw, TDT, k);
  1129. msec_delay(200);
  1130. time = jiffies; /* set the start time for the receive */
  1131. good_cnt = 0;
  1132. do { /* receive the sent packets */
  1133. pci_dma_sync_single_for_cpu(pdev,
  1134. rxdr->buffer_info[l].dma,
  1135. rxdr->buffer_info[l].length,
  1136. PCI_DMA_FROMDEVICE);
  1137. ret_val = e1000_check_lbtest_frame(
  1138. rxdr->buffer_info[l].skb,
  1139. 1024);
  1140. if(!ret_val)
  1141. good_cnt++;
  1142. if(unlikely(++l == rxdr->count)) l = 0;
  1143. /* time + 20 msecs (200 msecs on 2.4) is more than
  1144. * enough time to complete the receives, if it's
  1145. * exceeded, break and error off
  1146. */
  1147. } while (good_cnt < 64 && jiffies < (time + 20));
  1148. if(good_cnt != 64) {
  1149. ret_val = 13; /* ret_val is the same as mis-compare */
  1150. break;
  1151. }
  1152. if(jiffies >= (time + 2)) {
  1153. ret_val = 14; /* error code for time out error */
  1154. break;
  1155. }
  1156. } /* end loop count loop */
  1157. return ret_val;
  1158. }
  1159. static int
  1160. e1000_loopback_test(struct e1000_adapter *adapter, uint64_t *data)
  1161. {
  1162. if((*data = e1000_setup_desc_rings(adapter))) goto err_loopback;
  1163. if((*data = e1000_setup_loopback_test(adapter))) goto err_loopback;
  1164. *data = e1000_run_loopback_test(adapter);
  1165. e1000_loopback_cleanup(adapter);
  1166. e1000_free_desc_rings(adapter);
  1167. err_loopback:
  1168. return *data;
  1169. }
  1170. static int
  1171. e1000_link_test(struct e1000_adapter *adapter, uint64_t *data)
  1172. {
  1173. *data = 0;
  1174. if (adapter->hw.media_type == e1000_media_type_internal_serdes) {
  1175. int i = 0;
  1176. adapter->hw.serdes_link_down = TRUE;
  1177. /* On some blade server designs, link establishment
  1178. * could take as long as 2-3 minutes */
  1179. do {
  1180. e1000_check_for_link(&adapter->hw);
  1181. if (adapter->hw.serdes_link_down == FALSE)
  1182. return *data;
  1183. msec_delay(20);
  1184. } while (i++ < 3750);
  1185. *data = 1;
  1186. } else {
  1187. e1000_check_for_link(&adapter->hw);
  1188. if(adapter->hw.autoneg) /* if auto_neg is set wait for it */
  1189. msec_delay(4000);
  1190. if(!(E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) {
  1191. *data = 1;
  1192. }
  1193. }
  1194. return *data;
  1195. }
  1196. static int
  1197. e1000_diag_test_count(struct net_device *netdev)
  1198. {
  1199. return E1000_TEST_LEN;
  1200. }
  1201. static void
  1202. e1000_diag_test(struct net_device *netdev,
  1203. struct ethtool_test *eth_test, uint64_t *data)
  1204. {
  1205. struct e1000_adapter *adapter = netdev->priv;
  1206. boolean_t if_running = netif_running(netdev);
  1207. if(eth_test->flags == ETH_TEST_FL_OFFLINE) {
  1208. /* Offline tests */
  1209. /* save speed, duplex, autoneg settings */
  1210. uint16_t autoneg_advertised = adapter->hw.autoneg_advertised;
  1211. uint8_t forced_speed_duplex = adapter->hw.forced_speed_duplex;
  1212. uint8_t autoneg = adapter->hw.autoneg;
  1213. /* Link test performed before hardware reset so autoneg doesn't
  1214. * interfere with test result */
  1215. if(e1000_link_test(adapter, &data[4]))
  1216. eth_test->flags |= ETH_TEST_FL_FAILED;
  1217. if(if_running)
  1218. e1000_down(adapter);
  1219. else
  1220. e1000_reset(adapter);
  1221. if(e1000_reg_test(adapter, &data[0]))
  1222. eth_test->flags |= ETH_TEST_FL_FAILED;
  1223. e1000_reset(adapter);
  1224. if(e1000_eeprom_test(adapter, &data[1]))
  1225. eth_test->flags |= ETH_TEST_FL_FAILED;
  1226. e1000_reset(adapter);
  1227. if(e1000_intr_test(adapter, &data[2]))
  1228. eth_test->flags |= ETH_TEST_FL_FAILED;
  1229. e1000_reset(adapter);
  1230. if(e1000_loopback_test(adapter, &data[3]))
  1231. eth_test->flags |= ETH_TEST_FL_FAILED;
  1232. /* restore speed, duplex, autoneg settings */
  1233. adapter->hw.autoneg_advertised = autoneg_advertised;
  1234. adapter->hw.forced_speed_duplex = forced_speed_duplex;
  1235. adapter->hw.autoneg = autoneg;
  1236. e1000_reset(adapter);
  1237. if(if_running)
  1238. e1000_up(adapter);
  1239. } else {
  1240. /* Online tests */
  1241. if(e1000_link_test(adapter, &data[4]))
  1242. eth_test->flags |= ETH_TEST_FL_FAILED;
  1243. /* Offline tests aren't run; pass by default */
  1244. data[0] = 0;
  1245. data[1] = 0;
  1246. data[2] = 0;
  1247. data[3] = 0;
  1248. }
  1249. }
  1250. static void
  1251. e1000_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
  1252. {
  1253. struct e1000_adapter *adapter = netdev->priv;
  1254. struct e1000_hw *hw = &adapter->hw;
  1255. switch(adapter->hw.device_id) {
  1256. case E1000_DEV_ID_82542:
  1257. case E1000_DEV_ID_82543GC_FIBER:
  1258. case E1000_DEV_ID_82543GC_COPPER:
  1259. case E1000_DEV_ID_82544EI_FIBER:
  1260. case E1000_DEV_ID_82546EB_QUAD_COPPER:
  1261. case E1000_DEV_ID_82545EM_FIBER:
  1262. case E1000_DEV_ID_82545EM_COPPER:
  1263. wol->supported = 0;
  1264. wol->wolopts = 0;
  1265. return;
  1266. case E1000_DEV_ID_82546EB_FIBER:
  1267. case E1000_DEV_ID_82546GB_FIBER:
  1268. /* Wake events only supported on port A for dual fiber */
  1269. if(E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1) {
  1270. wol->supported = 0;
  1271. wol->wolopts = 0;
  1272. return;
  1273. }
  1274. /* Fall Through */
  1275. default:
  1276. wol->supported = WAKE_UCAST | WAKE_MCAST |
  1277. WAKE_BCAST | WAKE_MAGIC;
  1278. wol->wolopts = 0;
  1279. if(adapter->wol & E1000_WUFC_EX)
  1280. wol->wolopts |= WAKE_UCAST;
  1281. if(adapter->wol & E1000_WUFC_MC)
  1282. wol->wolopts |= WAKE_MCAST;
  1283. if(adapter->wol & E1000_WUFC_BC)
  1284. wol->wolopts |= WAKE_BCAST;
  1285. if(adapter->wol & E1000_WUFC_MAG)
  1286. wol->wolopts |= WAKE_MAGIC;
  1287. return;
  1288. }
  1289. }
  1290. static int
  1291. e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
  1292. {
  1293. struct e1000_adapter *adapter = netdev->priv;
  1294. struct e1000_hw *hw = &adapter->hw;
  1295. switch(adapter->hw.device_id) {
  1296. case E1000_DEV_ID_82542:
  1297. case E1000_DEV_ID_82543GC_FIBER:
  1298. case E1000_DEV_ID_82543GC_COPPER:
  1299. case E1000_DEV_ID_82544EI_FIBER:
  1300. case E1000_DEV_ID_82546EB_QUAD_COPPER:
  1301. case E1000_DEV_ID_82545EM_FIBER:
  1302. case E1000_DEV_ID_82545EM_COPPER:
  1303. return wol->wolopts ? -EOPNOTSUPP : 0;
  1304. case E1000_DEV_ID_82546EB_FIBER:
  1305. case E1000_DEV_ID_82546GB_FIBER:
  1306. /* Wake events only supported on port A for dual fiber */
  1307. if(E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1)
  1308. return wol->wolopts ? -EOPNOTSUPP : 0;
  1309. /* Fall Through */
  1310. default:
  1311. if(wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
  1312. return -EOPNOTSUPP;
  1313. adapter->wol = 0;
  1314. if(wol->wolopts & WAKE_UCAST)
  1315. adapter->wol |= E1000_WUFC_EX;
  1316. if(wol->wolopts & WAKE_MCAST)
  1317. adapter->wol |= E1000_WUFC_MC;
  1318. if(wol->wolopts & WAKE_BCAST)
  1319. adapter->wol |= E1000_WUFC_BC;
  1320. if(wol->wolopts & WAKE_MAGIC)
  1321. adapter->wol |= E1000_WUFC_MAG;
  1322. }
  1323. return 0;
  1324. }
  1325. /* toggle LED 4 times per second = 2 "blinks" per second */
  1326. #define E1000_ID_INTERVAL (HZ/4)
  1327. /* bit defines for adapter->led_status */
  1328. #define E1000_LED_ON 0
  1329. static void
  1330. e1000_led_blink_callback(unsigned long data)
  1331. {
  1332. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1333. if(test_and_change_bit(E1000_LED_ON, &adapter->led_status))
  1334. e1000_led_off(&adapter->hw);
  1335. else
  1336. e1000_led_on(&adapter->hw);
  1337. mod_timer(&adapter->blink_timer, jiffies + E1000_ID_INTERVAL);
  1338. }
  1339. static int
  1340. e1000_phys_id(struct net_device *netdev, uint32_t data)
  1341. {
  1342. struct e1000_adapter *adapter = netdev->priv;
  1343. if(!data || data > (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ))
  1344. data = (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ);
  1345. if(!adapter->blink_timer.function) {
  1346. init_timer(&adapter->blink_timer);
  1347. adapter->blink_timer.function = e1000_led_blink_callback;
  1348. adapter->blink_timer.data = (unsigned long) adapter;
  1349. }
  1350. e1000_setup_led(&adapter->hw);
  1351. mod_timer(&adapter->blink_timer, jiffies);
  1352. msleep_interruptible(data * 1000);
  1353. del_timer_sync(&adapter->blink_timer);
  1354. e1000_led_off(&adapter->hw);
  1355. clear_bit(E1000_LED_ON, &adapter->led_status);
  1356. e1000_cleanup_led(&adapter->hw);
  1357. return 0;
  1358. }
  1359. static int
  1360. e1000_nway_reset(struct net_device *netdev)
  1361. {
  1362. struct e1000_adapter *adapter = netdev->priv;
  1363. if(netif_running(netdev)) {
  1364. e1000_down(adapter);
  1365. e1000_up(adapter);
  1366. }
  1367. return 0;
  1368. }
  1369. static int
  1370. e1000_get_stats_count(struct net_device *netdev)
  1371. {
  1372. return E1000_STATS_LEN;
  1373. }
  1374. static void
  1375. e1000_get_ethtool_stats(struct net_device *netdev,
  1376. struct ethtool_stats *stats, uint64_t *data)
  1377. {
  1378. struct e1000_adapter *adapter = netdev->priv;
  1379. int i;
  1380. e1000_update_stats(adapter);
  1381. for(i = 0; i < E1000_STATS_LEN; i++) {
  1382. char *p = (char *)adapter+e1000_gstrings_stats[i].stat_offset;
  1383. data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
  1384. sizeof(uint64_t)) ? *(uint64_t *)p : *(uint32_t *)p;
  1385. }
  1386. }
  1387. static void
  1388. e1000_get_strings(struct net_device *netdev, uint32_t stringset, uint8_t *data)
  1389. {
  1390. int i;
  1391. switch(stringset) {
  1392. case ETH_SS_TEST:
  1393. memcpy(data, *e1000_gstrings_test,
  1394. E1000_TEST_LEN*ETH_GSTRING_LEN);
  1395. break;
  1396. case ETH_SS_STATS:
  1397. for (i=0; i < E1000_STATS_LEN; i++) {
  1398. memcpy(data + i * ETH_GSTRING_LEN,
  1399. e1000_gstrings_stats[i].stat_string,
  1400. ETH_GSTRING_LEN);
  1401. }
  1402. break;
  1403. }
  1404. }
  1405. struct ethtool_ops e1000_ethtool_ops = {
  1406. .get_settings = e1000_get_settings,
  1407. .set_settings = e1000_set_settings,
  1408. .get_drvinfo = e1000_get_drvinfo,
  1409. .get_regs_len = e1000_get_regs_len,
  1410. .get_regs = e1000_get_regs,
  1411. .get_wol = e1000_get_wol,
  1412. .set_wol = e1000_set_wol,
  1413. .get_msglevel = e1000_get_msglevel,
  1414. .set_msglevel = e1000_set_msglevel,
  1415. .nway_reset = e1000_nway_reset,
  1416. .get_link = ethtool_op_get_link,
  1417. .get_eeprom_len = e1000_get_eeprom_len,
  1418. .get_eeprom = e1000_get_eeprom,
  1419. .set_eeprom = e1000_set_eeprom,
  1420. .get_ringparam = e1000_get_ringparam,
  1421. .set_ringparam = e1000_set_ringparam,
  1422. .get_pauseparam = e1000_get_pauseparam,
  1423. .set_pauseparam = e1000_set_pauseparam,
  1424. .get_rx_csum = e1000_get_rx_csum,
  1425. .set_rx_csum = e1000_set_rx_csum,
  1426. .get_tx_csum = e1000_get_tx_csum,
  1427. .set_tx_csum = e1000_set_tx_csum,
  1428. .get_sg = ethtool_op_get_sg,
  1429. .set_sg = ethtool_op_set_sg,
  1430. #ifdef NETIF_F_TSO
  1431. .get_tso = ethtool_op_get_tso,
  1432. .set_tso = e1000_set_tso,
  1433. #endif
  1434. .self_test_count = e1000_diag_test_count,
  1435. .self_test = e1000_diag_test,
  1436. .get_strings = e1000_get_strings,
  1437. .phys_id = e1000_phys_id,
  1438. .get_stats_count = e1000_get_stats_count,
  1439. .get_ethtool_stats = e1000_get_ethtool_stats,
  1440. };
  1441. void e1000_set_ethtool_ops(struct net_device *netdev)
  1442. {
  1443. SET_ETHTOOL_OPS(netdev, &e1000_ethtool_ops);
  1444. }