smartreflex.c 30 KB

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  1. /*
  2. * OMAP SmartReflex Voltage Control
  3. *
  4. * Author: Thara Gopinath <thara@ti.com>
  5. *
  6. * Copyright (C) 2010 Texas Instruments, Inc.
  7. * Thara Gopinath <thara@ti.com>
  8. *
  9. * Copyright (C) 2008 Nokia Corporation
  10. * Kalle Jokiniemi
  11. *
  12. * Copyright (C) 2007 Texas Instruments, Inc.
  13. * Lesly A M <x0080970@ti.com>
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License version 2 as
  17. * published by the Free Software Foundation.
  18. */
  19. #include <linux/module.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/clk.h>
  22. #include <linux/io.h>
  23. #include <linux/debugfs.h>
  24. #include <linux/delay.h>
  25. #include <linux/slab.h>
  26. #include <linux/pm_runtime.h>
  27. #include <linux/power/smartreflex.h>
  28. #include "common.h"
  29. #include "pm.h"
  30. #define SMARTREFLEX_NAME_LEN 16
  31. #define NVALUE_NAME_LEN 40
  32. #define SR_DISABLE_TIMEOUT 200
  33. /* sr_list contains all the instances of smartreflex module */
  34. static LIST_HEAD(sr_list);
  35. static struct omap_sr_class_data *sr_class;
  36. static struct omap_sr_pmic_data *sr_pmic_data;
  37. static struct dentry *sr_dbg_dir;
  38. static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value)
  39. {
  40. __raw_writel(value, (sr->base + offset));
  41. }
  42. static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32 mask,
  43. u32 value)
  44. {
  45. u32 reg_val;
  46. /*
  47. * Smartreflex error config register is special as it contains
  48. * certain status bits which if written a 1 into means a clear
  49. * of those bits. So in order to make sure no accidental write of
  50. * 1 happens to those status bits, do a clear of them in the read
  51. * value. This mean this API doesn't rewrite values in these bits
  52. * if they are currently set, but does allow the caller to write
  53. * those bits.
  54. */
  55. if (sr->ip_type == SR_TYPE_V1 && offset == ERRCONFIG_V1)
  56. mask |= ERRCONFIG_STATUS_V1_MASK;
  57. else if (sr->ip_type == SR_TYPE_V2 && offset == ERRCONFIG_V2)
  58. mask |= ERRCONFIG_VPBOUNDINTST_V2;
  59. reg_val = __raw_readl(sr->base + offset);
  60. reg_val &= ~mask;
  61. value &= mask;
  62. reg_val |= value;
  63. __raw_writel(reg_val, (sr->base + offset));
  64. }
  65. static inline u32 sr_read_reg(struct omap_sr *sr, unsigned offset)
  66. {
  67. return __raw_readl(sr->base + offset);
  68. }
  69. static struct omap_sr *_sr_lookup(struct voltagedomain *voltdm)
  70. {
  71. struct omap_sr *sr_info;
  72. if (!voltdm) {
  73. pr_err("%s: Null voltage domain passed!\n", __func__);
  74. return ERR_PTR(-EINVAL);
  75. }
  76. list_for_each_entry(sr_info, &sr_list, node) {
  77. if (voltdm == sr_info->voltdm)
  78. return sr_info;
  79. }
  80. return ERR_PTR(-ENODATA);
  81. }
  82. static irqreturn_t sr_interrupt(int irq, void *data)
  83. {
  84. struct omap_sr *sr_info = data;
  85. u32 status = 0;
  86. switch (sr_info->ip_type) {
  87. case SR_TYPE_V1:
  88. /* Read the status bits */
  89. status = sr_read_reg(sr_info, ERRCONFIG_V1);
  90. /* Clear them by writing back */
  91. sr_write_reg(sr_info, ERRCONFIG_V1, status);
  92. break;
  93. case SR_TYPE_V2:
  94. /* Read the status bits */
  95. status = sr_read_reg(sr_info, IRQSTATUS);
  96. /* Clear them by writing back */
  97. sr_write_reg(sr_info, IRQSTATUS, status);
  98. break;
  99. default:
  100. dev_err(&sr_info->pdev->dev, "UNKNOWN IP type %d\n",
  101. sr_info->ip_type);
  102. return IRQ_NONE;
  103. }
  104. if (sr_class->notify)
  105. sr_class->notify(sr_info, status);
  106. return IRQ_HANDLED;
  107. }
  108. static void sr_set_clk_length(struct omap_sr *sr)
  109. {
  110. struct clk *sys_ck;
  111. u32 sys_clk_speed;
  112. if (cpu_is_omap34xx())
  113. sys_ck = clk_get(NULL, "sys_ck");
  114. else
  115. sys_ck = clk_get(NULL, "sys_clkin_ck");
  116. if (IS_ERR(sys_ck)) {
  117. dev_err(&sr->pdev->dev, "%s: unable to get sys clk\n",
  118. __func__);
  119. return;
  120. }
  121. sys_clk_speed = clk_get_rate(sys_ck);
  122. clk_put(sys_ck);
  123. switch (sys_clk_speed) {
  124. case 12000000:
  125. sr->clk_length = SRCLKLENGTH_12MHZ_SYSCLK;
  126. break;
  127. case 13000000:
  128. sr->clk_length = SRCLKLENGTH_13MHZ_SYSCLK;
  129. break;
  130. case 19200000:
  131. sr->clk_length = SRCLKLENGTH_19MHZ_SYSCLK;
  132. break;
  133. case 26000000:
  134. sr->clk_length = SRCLKLENGTH_26MHZ_SYSCLK;
  135. break;
  136. case 38400000:
  137. sr->clk_length = SRCLKLENGTH_38MHZ_SYSCLK;
  138. break;
  139. default:
  140. dev_err(&sr->pdev->dev, "%s: Invalid sysclk value: %d\n",
  141. __func__, sys_clk_speed);
  142. break;
  143. }
  144. }
  145. static void sr_set_regfields(struct omap_sr *sr)
  146. {
  147. /*
  148. * For time being these values are defined in smartreflex.h
  149. * and populated during init. May be they can be moved to board
  150. * file or pmic specific data structure. In that case these structure
  151. * fields will have to be populated using the pdata or pmic structure.
  152. */
  153. if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
  154. sr->err_weight = OMAP3430_SR_ERRWEIGHT;
  155. sr->err_maxlimit = OMAP3430_SR_ERRMAXLIMIT;
  156. sr->accum_data = OMAP3430_SR_ACCUMDATA;
  157. if (!(strcmp(sr->name, "smartreflex_mpu_iva"))) {
  158. sr->senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT;
  159. sr->senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT;
  160. } else {
  161. sr->senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT;
  162. sr->senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT;
  163. }
  164. }
  165. }
  166. static void sr_start_vddautocomp(struct omap_sr *sr)
  167. {
  168. if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
  169. dev_warn(&sr->pdev->dev,
  170. "%s: smartreflex class driver not registered\n",
  171. __func__);
  172. return;
  173. }
  174. if (!sr_class->enable(sr))
  175. sr->autocomp_active = true;
  176. }
  177. static void sr_stop_vddautocomp(struct omap_sr *sr)
  178. {
  179. if (!sr_class || !(sr_class->disable)) {
  180. dev_warn(&sr->pdev->dev,
  181. "%s: smartreflex class driver not registered\n",
  182. __func__);
  183. return;
  184. }
  185. if (sr->autocomp_active) {
  186. sr_class->disable(sr, 1);
  187. sr->autocomp_active = false;
  188. }
  189. }
  190. /*
  191. * This function handles the intializations which have to be done
  192. * only when both sr device and class driver regiter has
  193. * completed. This will be attempted to be called from both sr class
  194. * driver register and sr device intializtion API's. Only one call
  195. * will ultimately succeed.
  196. *
  197. * Currently this function registers interrupt handler for a particular SR
  198. * if smartreflex class driver is already registered and has
  199. * requested for interrupts and the SR interrupt line in present.
  200. */
  201. static int sr_late_init(struct omap_sr *sr_info)
  202. {
  203. struct omap_sr_data *pdata = sr_info->pdev->dev.platform_data;
  204. struct resource *mem;
  205. int ret = 0;
  206. if (sr_class->notify && sr_class->notify_flags && sr_info->irq) {
  207. ret = request_irq(sr_info->irq, sr_interrupt,
  208. 0, sr_info->name, sr_info);
  209. if (ret)
  210. goto error;
  211. disable_irq(sr_info->irq);
  212. }
  213. if (pdata && pdata->enable_on_init)
  214. sr_start_vddautocomp(sr_info);
  215. return ret;
  216. error:
  217. iounmap(sr_info->base);
  218. mem = platform_get_resource(sr_info->pdev, IORESOURCE_MEM, 0);
  219. release_mem_region(mem->start, resource_size(mem));
  220. list_del(&sr_info->node);
  221. dev_err(&sr_info->pdev->dev, "%s: ERROR in registering"
  222. "interrupt handler. Smartreflex will"
  223. "not function as desired\n", __func__);
  224. kfree(sr_info);
  225. return ret;
  226. }
  227. static void sr_v1_disable(struct omap_sr *sr)
  228. {
  229. int timeout = 0;
  230. int errconf_val = ERRCONFIG_MCUACCUMINTST | ERRCONFIG_MCUVALIDINTST |
  231. ERRCONFIG_MCUBOUNDINTST;
  232. /* Enable MCUDisableAcknowledge interrupt */
  233. sr_modify_reg(sr, ERRCONFIG_V1,
  234. ERRCONFIG_MCUDISACKINTEN, ERRCONFIG_MCUDISACKINTEN);
  235. /* SRCONFIG - disable SR */
  236. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
  237. /* Disable all other SR interrupts and clear the status as needed */
  238. if (sr_read_reg(sr, ERRCONFIG_V1) & ERRCONFIG_VPBOUNDINTST_V1)
  239. errconf_val |= ERRCONFIG_VPBOUNDINTST_V1;
  240. sr_modify_reg(sr, ERRCONFIG_V1,
  241. (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
  242. ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_VPBOUNDINTEN_V1),
  243. errconf_val);
  244. /*
  245. * Wait for SR to be disabled.
  246. * wait until ERRCONFIG.MCUDISACKINTST = 1. Typical latency is 1us.
  247. */
  248. sr_test_cond_timeout((sr_read_reg(sr, ERRCONFIG_V1) &
  249. ERRCONFIG_MCUDISACKINTST), SR_DISABLE_TIMEOUT,
  250. timeout);
  251. if (timeout >= SR_DISABLE_TIMEOUT)
  252. dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
  253. __func__);
  254. /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
  255. sr_modify_reg(sr, ERRCONFIG_V1, ERRCONFIG_MCUDISACKINTEN,
  256. ERRCONFIG_MCUDISACKINTST);
  257. }
  258. static void sr_v2_disable(struct omap_sr *sr)
  259. {
  260. int timeout = 0;
  261. /* Enable MCUDisableAcknowledge interrupt */
  262. sr_write_reg(sr, IRQENABLE_SET, IRQENABLE_MCUDISABLEACKINT);
  263. /* SRCONFIG - disable SR */
  264. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
  265. /*
  266. * Disable all other SR interrupts and clear the status
  267. * write to status register ONLY on need basis - only if status
  268. * is set.
  269. */
  270. if (sr_read_reg(sr, ERRCONFIG_V2) & ERRCONFIG_VPBOUNDINTST_V2)
  271. sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2,
  272. ERRCONFIG_VPBOUNDINTST_V2);
  273. else
  274. sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2,
  275. 0x0);
  276. sr_write_reg(sr, IRQENABLE_CLR, (IRQENABLE_MCUACCUMINT |
  277. IRQENABLE_MCUVALIDINT |
  278. IRQENABLE_MCUBOUNDSINT));
  279. sr_write_reg(sr, IRQSTATUS, (IRQSTATUS_MCUACCUMINT |
  280. IRQSTATUS_MCVALIDINT |
  281. IRQSTATUS_MCBOUNDSINT));
  282. /*
  283. * Wait for SR to be disabled.
  284. * wait until IRQSTATUS.MCUDISACKINTST = 1. Typical latency is 1us.
  285. */
  286. sr_test_cond_timeout((sr_read_reg(sr, IRQSTATUS) &
  287. IRQSTATUS_MCUDISABLEACKINT), SR_DISABLE_TIMEOUT,
  288. timeout);
  289. if (timeout >= SR_DISABLE_TIMEOUT)
  290. dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
  291. __func__);
  292. /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
  293. sr_write_reg(sr, IRQENABLE_CLR, IRQENABLE_MCUDISABLEACKINT);
  294. sr_write_reg(sr, IRQSTATUS, IRQSTATUS_MCUDISABLEACKINT);
  295. }
  296. static struct omap_sr_nvalue_table *sr_retrieve_nvalue_row(
  297. struct omap_sr *sr, u32 efuse_offs)
  298. {
  299. int i;
  300. if (!sr->nvalue_table) {
  301. dev_warn(&sr->pdev->dev, "%s: Missing ntarget value table\n",
  302. __func__);
  303. return NULL;
  304. }
  305. for (i = 0; i < sr->nvalue_count; i++) {
  306. if (sr->nvalue_table[i].efuse_offs == efuse_offs)
  307. return &sr->nvalue_table[i];
  308. }
  309. return NULL;
  310. }
  311. /* Public Functions */
  312. /**
  313. * sr_configure_errgen() - Configures the smrtreflex to perform AVS using the
  314. * error generator module.
  315. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  316. *
  317. * This API is to be called from the smartreflex class driver to
  318. * configure the error generator module inside the smartreflex module.
  319. * SR settings if using the ERROR module inside Smartreflex.
  320. * SR CLASS 3 by default uses only the ERROR module where as
  321. * SR CLASS 2 can choose between ERROR module and MINMAXAVG
  322. * module. Returns 0 on success and error value in case of failure.
  323. */
  324. int sr_configure_errgen(struct voltagedomain *voltdm)
  325. {
  326. u32 sr_config, sr_errconfig, errconfig_offs;
  327. u32 vpboundint_en, vpboundint_st;
  328. u32 senp_en = 0, senn_en = 0;
  329. u8 senp_shift, senn_shift;
  330. struct omap_sr *sr = _sr_lookup(voltdm);
  331. if (IS_ERR(sr)) {
  332. pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
  333. return PTR_ERR(sr);
  334. }
  335. if (!sr->clk_length)
  336. sr_set_clk_length(sr);
  337. senp_en = sr->senp_mod;
  338. senn_en = sr->senn_mod;
  339. sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
  340. SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN;
  341. switch (sr->ip_type) {
  342. case SR_TYPE_V1:
  343. sr_config |= SRCONFIG_DELAYCTRL;
  344. senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
  345. senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
  346. errconfig_offs = ERRCONFIG_V1;
  347. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
  348. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
  349. break;
  350. case SR_TYPE_V2:
  351. senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
  352. senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
  353. errconfig_offs = ERRCONFIG_V2;
  354. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
  355. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
  356. break;
  357. default:
  358. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
  359. "module without specifying the ip\n", __func__);
  360. return -EINVAL;
  361. }
  362. sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
  363. sr_write_reg(sr, SRCONFIG, sr_config);
  364. sr_errconfig = (sr->err_weight << ERRCONFIG_ERRWEIGHT_SHIFT) |
  365. (sr->err_maxlimit << ERRCONFIG_ERRMAXLIMIT_SHIFT) |
  366. (sr->err_minlimit << ERRCONFIG_ERRMINLIMIT_SHIFT);
  367. sr_modify_reg(sr, errconfig_offs, (SR_ERRWEIGHT_MASK |
  368. SR_ERRMAXLIMIT_MASK | SR_ERRMINLIMIT_MASK),
  369. sr_errconfig);
  370. /* Enabling the interrupts if the ERROR module is used */
  371. sr_modify_reg(sr, errconfig_offs, (vpboundint_en | vpboundint_st),
  372. vpboundint_en);
  373. return 0;
  374. }
  375. /**
  376. * sr_disable_errgen() - Disables SmartReflex AVS module's errgen component
  377. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  378. *
  379. * This API is to be called from the smartreflex class driver to
  380. * disable the error generator module inside the smartreflex module.
  381. *
  382. * Returns 0 on success and error value in case of failure.
  383. */
  384. int sr_disable_errgen(struct voltagedomain *voltdm)
  385. {
  386. u32 errconfig_offs;
  387. u32 vpboundint_en, vpboundint_st;
  388. struct omap_sr *sr = _sr_lookup(voltdm);
  389. if (IS_ERR(sr)) {
  390. pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
  391. return PTR_ERR(sr);
  392. }
  393. switch (sr->ip_type) {
  394. case SR_TYPE_V1:
  395. errconfig_offs = ERRCONFIG_V1;
  396. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
  397. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
  398. break;
  399. case SR_TYPE_V2:
  400. errconfig_offs = ERRCONFIG_V2;
  401. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
  402. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
  403. break;
  404. default:
  405. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
  406. "module without specifying the ip\n", __func__);
  407. return -EINVAL;
  408. }
  409. /* Disable the interrupts of ERROR module */
  410. sr_modify_reg(sr, errconfig_offs, vpboundint_en | vpboundint_st, 0);
  411. /* Disable the Sensor and errorgen */
  412. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN, 0);
  413. return 0;
  414. }
  415. /**
  416. * sr_configure_minmax() - Configures the smrtreflex to perform AVS using the
  417. * minmaxavg module.
  418. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  419. *
  420. * This API is to be called from the smartreflex class driver to
  421. * configure the minmaxavg module inside the smartreflex module.
  422. * SR settings if using the ERROR module inside Smartreflex.
  423. * SR CLASS 3 by default uses only the ERROR module where as
  424. * SR CLASS 2 can choose between ERROR module and MINMAXAVG
  425. * module. Returns 0 on success and error value in case of failure.
  426. */
  427. int sr_configure_minmax(struct voltagedomain *voltdm)
  428. {
  429. u32 sr_config, sr_avgwt;
  430. u32 senp_en = 0, senn_en = 0;
  431. u8 senp_shift, senn_shift;
  432. struct omap_sr *sr = _sr_lookup(voltdm);
  433. if (IS_ERR(sr)) {
  434. pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
  435. return PTR_ERR(sr);
  436. }
  437. if (!sr->clk_length)
  438. sr_set_clk_length(sr);
  439. senp_en = sr->senp_mod;
  440. senn_en = sr->senn_mod;
  441. sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
  442. SRCONFIG_SENENABLE |
  443. (sr->accum_data << SRCONFIG_ACCUMDATA_SHIFT);
  444. switch (sr->ip_type) {
  445. case SR_TYPE_V1:
  446. sr_config |= SRCONFIG_DELAYCTRL;
  447. senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
  448. senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
  449. break;
  450. case SR_TYPE_V2:
  451. senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
  452. senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
  453. break;
  454. default:
  455. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
  456. "module without specifying the ip\n", __func__);
  457. return -EINVAL;
  458. }
  459. sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
  460. sr_write_reg(sr, SRCONFIG, sr_config);
  461. sr_avgwt = (sr->senp_avgweight << AVGWEIGHT_SENPAVGWEIGHT_SHIFT) |
  462. (sr->senn_avgweight << AVGWEIGHT_SENNAVGWEIGHT_SHIFT);
  463. sr_write_reg(sr, AVGWEIGHT, sr_avgwt);
  464. /*
  465. * Enabling the interrupts if MINMAXAVG module is used.
  466. * TODO: check if all the interrupts are mandatory
  467. */
  468. switch (sr->ip_type) {
  469. case SR_TYPE_V1:
  470. sr_modify_reg(sr, ERRCONFIG_V1,
  471. (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
  472. ERRCONFIG_MCUBOUNDINTEN),
  473. (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUACCUMINTST |
  474. ERRCONFIG_MCUVALIDINTEN | ERRCONFIG_MCUVALIDINTST |
  475. ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_MCUBOUNDINTST));
  476. break;
  477. case SR_TYPE_V2:
  478. sr_write_reg(sr, IRQSTATUS,
  479. IRQSTATUS_MCUACCUMINT | IRQSTATUS_MCVALIDINT |
  480. IRQSTATUS_MCBOUNDSINT | IRQSTATUS_MCUDISABLEACKINT);
  481. sr_write_reg(sr, IRQENABLE_SET,
  482. IRQENABLE_MCUACCUMINT | IRQENABLE_MCUVALIDINT |
  483. IRQENABLE_MCUBOUNDSINT | IRQENABLE_MCUDISABLEACKINT);
  484. break;
  485. default:
  486. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
  487. "module without specifying the ip\n", __func__);
  488. return -EINVAL;
  489. }
  490. return 0;
  491. }
  492. /**
  493. * sr_enable() - Enables the smartreflex module.
  494. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  495. * @volt: The voltage at which the Voltage domain associated with
  496. * the smartreflex module is operating at.
  497. * This is required only to program the correct Ntarget value.
  498. *
  499. * This API is to be called from the smartreflex class driver to
  500. * enable a smartreflex module. Returns 0 on success. Returns error
  501. * value if the voltage passed is wrong or if ntarget value is wrong.
  502. */
  503. int sr_enable(struct voltagedomain *voltdm, unsigned long volt)
  504. {
  505. struct omap_volt_data *volt_data;
  506. struct omap_sr *sr = _sr_lookup(voltdm);
  507. struct omap_sr_nvalue_table *nvalue_row;
  508. int ret;
  509. if (IS_ERR(sr)) {
  510. pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
  511. return PTR_ERR(sr);
  512. }
  513. volt_data = omap_voltage_get_voltdata(sr->voltdm, volt);
  514. if (IS_ERR(volt_data)) {
  515. dev_warn(&sr->pdev->dev, "%s: Unable to get voltage table"
  516. "for nominal voltage %ld\n", __func__, volt);
  517. return PTR_ERR(volt_data);
  518. }
  519. nvalue_row = sr_retrieve_nvalue_row(sr, volt_data->sr_efuse_offs);
  520. if (!nvalue_row) {
  521. dev_warn(&sr->pdev->dev, "%s: failure getting SR data for this voltage %ld\n",
  522. __func__, volt);
  523. return -ENODATA;
  524. }
  525. /* errminlimit is opp dependent and hence linked to voltage */
  526. sr->err_minlimit = nvalue_row->errminlimit;
  527. pm_runtime_get_sync(&sr->pdev->dev);
  528. /* Check if SR is already enabled. If yes do nothing */
  529. if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE)
  530. return 0;
  531. /* Configure SR */
  532. ret = sr_class->configure(sr);
  533. if (ret)
  534. return ret;
  535. sr_write_reg(sr, NVALUERECIPROCAL, nvalue_row->nvalue);
  536. /* SRCONFIG - enable SR */
  537. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, SRCONFIG_SRENABLE);
  538. return 0;
  539. }
  540. /**
  541. * sr_disable() - Disables the smartreflex module.
  542. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  543. *
  544. * This API is to be called from the smartreflex class driver to
  545. * disable a smartreflex module.
  546. */
  547. void sr_disable(struct voltagedomain *voltdm)
  548. {
  549. struct omap_sr *sr = _sr_lookup(voltdm);
  550. if (IS_ERR(sr)) {
  551. pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
  552. return;
  553. }
  554. /* Check if SR clocks are already disabled. If yes do nothing */
  555. if (pm_runtime_suspended(&sr->pdev->dev))
  556. return;
  557. /*
  558. * Disable SR if only it is indeed enabled. Else just
  559. * disable the clocks.
  560. */
  561. if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE) {
  562. switch (sr->ip_type) {
  563. case SR_TYPE_V1:
  564. sr_v1_disable(sr);
  565. break;
  566. case SR_TYPE_V2:
  567. sr_v2_disable(sr);
  568. break;
  569. default:
  570. dev_err(&sr->pdev->dev, "UNKNOWN IP type %d\n",
  571. sr->ip_type);
  572. }
  573. }
  574. pm_runtime_put_sync_suspend(&sr->pdev->dev);
  575. }
  576. /**
  577. * sr_register_class() - API to register a smartreflex class parameters.
  578. * @class_data: The structure containing various sr class specific data.
  579. *
  580. * This API is to be called by the smartreflex class driver to register itself
  581. * with the smartreflex driver during init. Returns 0 on success else the
  582. * error value.
  583. */
  584. int sr_register_class(struct omap_sr_class_data *class_data)
  585. {
  586. struct omap_sr *sr_info;
  587. if (!class_data) {
  588. pr_warning("%s:, Smartreflex class data passed is NULL\n",
  589. __func__);
  590. return -EINVAL;
  591. }
  592. if (sr_class) {
  593. pr_warning("%s: Smartreflex class driver already registered\n",
  594. __func__);
  595. return -EBUSY;
  596. }
  597. sr_class = class_data;
  598. /*
  599. * Call into late init to do intializations that require
  600. * both sr driver and sr class driver to be initiallized.
  601. */
  602. list_for_each_entry(sr_info, &sr_list, node)
  603. sr_late_init(sr_info);
  604. return 0;
  605. }
  606. /**
  607. * omap_sr_enable() - API to enable SR clocks and to call into the
  608. * registered smartreflex class enable API.
  609. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  610. *
  611. * This API is to be called from the kernel in order to enable
  612. * a particular smartreflex module. This API will do the initial
  613. * configurations to turn on the smartreflex module and in turn call
  614. * into the registered smartreflex class enable API.
  615. */
  616. void omap_sr_enable(struct voltagedomain *voltdm)
  617. {
  618. struct omap_sr *sr = _sr_lookup(voltdm);
  619. if (IS_ERR(sr)) {
  620. pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
  621. return;
  622. }
  623. if (!sr->autocomp_active)
  624. return;
  625. if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
  626. dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
  627. "registered\n", __func__);
  628. return;
  629. }
  630. sr_class->enable(sr);
  631. }
  632. /**
  633. * omap_sr_disable() - API to disable SR without resetting the voltage
  634. * processor voltage
  635. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  636. *
  637. * This API is to be called from the kernel in order to disable
  638. * a particular smartreflex module. This API will in turn call
  639. * into the registered smartreflex class disable API. This API will tell
  640. * the smartreflex class disable not to reset the VP voltage after
  641. * disabling smartreflex.
  642. */
  643. void omap_sr_disable(struct voltagedomain *voltdm)
  644. {
  645. struct omap_sr *sr = _sr_lookup(voltdm);
  646. if (IS_ERR(sr)) {
  647. pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
  648. return;
  649. }
  650. if (!sr->autocomp_active)
  651. return;
  652. if (!sr_class || !(sr_class->disable)) {
  653. dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
  654. "registered\n", __func__);
  655. return;
  656. }
  657. sr_class->disable(sr, 0);
  658. }
  659. /**
  660. * omap_sr_disable_reset_volt() - API to disable SR and reset the
  661. * voltage processor voltage
  662. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  663. *
  664. * This API is to be called from the kernel in order to disable
  665. * a particular smartreflex module. This API will in turn call
  666. * into the registered smartreflex class disable API. This API will tell
  667. * the smartreflex class disable to reset the VP voltage after
  668. * disabling smartreflex.
  669. */
  670. void omap_sr_disable_reset_volt(struct voltagedomain *voltdm)
  671. {
  672. struct omap_sr *sr = _sr_lookup(voltdm);
  673. if (IS_ERR(sr)) {
  674. pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
  675. return;
  676. }
  677. if (!sr->autocomp_active)
  678. return;
  679. if (!sr_class || !(sr_class->disable)) {
  680. dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
  681. "registered\n", __func__);
  682. return;
  683. }
  684. sr_class->disable(sr, 1);
  685. }
  686. /**
  687. * omap_sr_register_pmic() - API to register pmic specific info.
  688. * @pmic_data: The structure containing pmic specific data.
  689. *
  690. * This API is to be called from the PMIC specific code to register with
  691. * smartreflex driver pmic specific info. Currently the only info required
  692. * is the smartreflex init on the PMIC side.
  693. */
  694. void omap_sr_register_pmic(struct omap_sr_pmic_data *pmic_data)
  695. {
  696. if (!pmic_data) {
  697. pr_warning("%s: Trying to register NULL PMIC data structure"
  698. "with smartreflex\n", __func__);
  699. return;
  700. }
  701. sr_pmic_data = pmic_data;
  702. }
  703. /* PM Debug FS entries to enable and disable smartreflex. */
  704. static int omap_sr_autocomp_show(void *data, u64 *val)
  705. {
  706. struct omap_sr *sr_info = data;
  707. if (!sr_info) {
  708. pr_warning("%s: omap_sr struct not found\n", __func__);
  709. return -EINVAL;
  710. }
  711. *val = sr_info->autocomp_active;
  712. return 0;
  713. }
  714. static int omap_sr_autocomp_store(void *data, u64 val)
  715. {
  716. struct omap_sr *sr_info = data;
  717. if (!sr_info) {
  718. pr_warning("%s: omap_sr struct not found\n", __func__);
  719. return -EINVAL;
  720. }
  721. /* Sanity check */
  722. if (val > 1) {
  723. pr_warning("%s: Invalid argument %lld\n", __func__, val);
  724. return -EINVAL;
  725. }
  726. /* control enable/disable only if there is a delta in value */
  727. if (sr_info->autocomp_active != val) {
  728. if (!val)
  729. sr_stop_vddautocomp(sr_info);
  730. else
  731. sr_start_vddautocomp(sr_info);
  732. }
  733. return 0;
  734. }
  735. DEFINE_SIMPLE_ATTRIBUTE(pm_sr_fops, omap_sr_autocomp_show,
  736. omap_sr_autocomp_store, "%llu\n");
  737. static int __init omap_sr_probe(struct platform_device *pdev)
  738. {
  739. struct omap_sr *sr_info;
  740. struct omap_sr_data *pdata = pdev->dev.platform_data;
  741. struct resource *mem, *irq;
  742. struct dentry *nvalue_dir;
  743. int i, ret = 0;
  744. sr_info = kzalloc(sizeof(struct omap_sr), GFP_KERNEL);
  745. if (!sr_info) {
  746. dev_err(&pdev->dev, "%s: unable to allocate sr_info\n",
  747. __func__);
  748. return -ENOMEM;
  749. }
  750. platform_set_drvdata(pdev, sr_info);
  751. if (!pdata) {
  752. dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
  753. ret = -EINVAL;
  754. goto err_free_devinfo;
  755. }
  756. mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  757. if (!mem) {
  758. dev_err(&pdev->dev, "%s: no mem resource\n", __func__);
  759. ret = -ENODEV;
  760. goto err_free_devinfo;
  761. }
  762. mem = request_mem_region(mem->start, resource_size(mem),
  763. dev_name(&pdev->dev));
  764. if (!mem) {
  765. dev_err(&pdev->dev, "%s: no mem region\n", __func__);
  766. ret = -EBUSY;
  767. goto err_free_devinfo;
  768. }
  769. irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  770. pm_runtime_enable(&pdev->dev);
  771. pm_runtime_irq_safe(&pdev->dev);
  772. sr_info->name = kasprintf(GFP_KERNEL, "%s", pdata->name);
  773. if (!sr_info->name) {
  774. dev_err(&pdev->dev, "%s: Unable to alloc SR instance name\n",
  775. __func__);
  776. ret = -ENOMEM;
  777. goto err_release_region;
  778. }
  779. sr_info->pdev = pdev;
  780. sr_info->srid = pdev->id;
  781. sr_info->voltdm = pdata->voltdm;
  782. sr_info->nvalue_table = pdata->nvalue_table;
  783. sr_info->nvalue_count = pdata->nvalue_count;
  784. sr_info->senn_mod = pdata->senn_mod;
  785. sr_info->senp_mod = pdata->senp_mod;
  786. sr_info->autocomp_active = false;
  787. sr_info->ip_type = pdata->ip_type;
  788. sr_info->base = ioremap(mem->start, resource_size(mem));
  789. if (!sr_info->base) {
  790. dev_err(&pdev->dev, "%s: ioremap fail\n", __func__);
  791. ret = -ENOMEM;
  792. goto err_release_region;
  793. }
  794. if (irq)
  795. sr_info->irq = irq->start;
  796. sr_set_clk_length(sr_info);
  797. sr_set_regfields(sr_info);
  798. list_add(&sr_info->node, &sr_list);
  799. /*
  800. * Call into late init to do intializations that require
  801. * both sr driver and sr class driver to be initiallized.
  802. */
  803. if (sr_class) {
  804. ret = sr_late_init(sr_info);
  805. if (ret) {
  806. pr_warning("%s: Error in SR late init\n", __func__);
  807. goto err_iounmap;
  808. }
  809. }
  810. dev_info(&pdev->dev, "%s: SmartReflex driver initialized\n", __func__);
  811. if (!sr_dbg_dir) {
  812. sr_dbg_dir = debugfs_create_dir("smartreflex", NULL);
  813. if (IS_ERR_OR_NULL(sr_dbg_dir)) {
  814. ret = PTR_ERR(sr_dbg_dir);
  815. pr_err("%s:sr debugfs dir creation failed(%d)\n",
  816. __func__, ret);
  817. goto err_iounmap;
  818. }
  819. }
  820. sr_info->dbg_dir = debugfs_create_dir(sr_info->name, sr_dbg_dir);
  821. if (IS_ERR_OR_NULL(sr_info->dbg_dir)) {
  822. dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n",
  823. __func__);
  824. ret = PTR_ERR(sr_info->dbg_dir);
  825. goto err_free_name;
  826. }
  827. (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUSR,
  828. sr_info->dbg_dir, (void *)sr_info, &pm_sr_fops);
  829. (void) debugfs_create_x32("errweight", S_IRUGO, sr_info->dbg_dir,
  830. &sr_info->err_weight);
  831. (void) debugfs_create_x32("errmaxlimit", S_IRUGO, sr_info->dbg_dir,
  832. &sr_info->err_maxlimit);
  833. (void) debugfs_create_x32("errminlimit", S_IRUGO, sr_info->dbg_dir,
  834. &sr_info->err_minlimit);
  835. nvalue_dir = debugfs_create_dir("nvalue", sr_info->dbg_dir);
  836. if (IS_ERR_OR_NULL(nvalue_dir)) {
  837. dev_err(&pdev->dev, "%s: Unable to create debugfs directory"
  838. "for n-values\n", __func__);
  839. ret = PTR_ERR(nvalue_dir);
  840. goto err_debugfs;
  841. }
  842. if (sr_info->nvalue_count == 0 || !sr_info->nvalue_table) {
  843. dev_warn(&pdev->dev, "%s: %s: No Voltage table for the corresponding vdd. Cannot create debugfs entries for n-values\n",
  844. __func__, sr_info->name);
  845. ret = -ENODATA;
  846. goto err_debugfs;
  847. }
  848. for (i = 0; i < sr_info->nvalue_count; i++) {
  849. char name[NVALUE_NAME_LEN + 1];
  850. snprintf(name, sizeof(name), "volt_%lu",
  851. sr_info->nvalue_table[i].volt_nominal);
  852. (void) debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir,
  853. &(sr_info->nvalue_table[i].nvalue));
  854. }
  855. return ret;
  856. err_debugfs:
  857. debugfs_remove_recursive(sr_info->dbg_dir);
  858. err_free_name:
  859. kfree(sr_info->name);
  860. err_iounmap:
  861. list_del(&sr_info->node);
  862. iounmap(sr_info->base);
  863. err_release_region:
  864. release_mem_region(mem->start, resource_size(mem));
  865. err_free_devinfo:
  866. kfree(sr_info);
  867. return ret;
  868. }
  869. static int __devexit omap_sr_remove(struct platform_device *pdev)
  870. {
  871. struct omap_sr_data *pdata = pdev->dev.platform_data;
  872. struct omap_sr *sr_info;
  873. struct resource *mem;
  874. if (!pdata) {
  875. dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
  876. return -EINVAL;
  877. }
  878. sr_info = _sr_lookup(pdata->voltdm);
  879. if (IS_ERR(sr_info)) {
  880. dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
  881. __func__);
  882. return PTR_ERR(sr_info);
  883. }
  884. if (sr_info->autocomp_active)
  885. sr_stop_vddautocomp(sr_info);
  886. if (sr_info->dbg_dir)
  887. debugfs_remove_recursive(sr_info->dbg_dir);
  888. list_del(&sr_info->node);
  889. iounmap(sr_info->base);
  890. kfree(sr_info->name);
  891. kfree(sr_info);
  892. mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  893. release_mem_region(mem->start, resource_size(mem));
  894. return 0;
  895. }
  896. static void __devexit omap_sr_shutdown(struct platform_device *pdev)
  897. {
  898. struct omap_sr_data *pdata = pdev->dev.platform_data;
  899. struct omap_sr *sr_info;
  900. if (!pdata) {
  901. dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
  902. return;
  903. }
  904. sr_info = _sr_lookup(pdata->voltdm);
  905. if (IS_ERR(sr_info)) {
  906. dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
  907. __func__);
  908. return;
  909. }
  910. if (sr_info->autocomp_active)
  911. sr_stop_vddautocomp(sr_info);
  912. return;
  913. }
  914. static struct platform_driver smartreflex_driver = {
  915. .remove = __devexit_p(omap_sr_remove),
  916. .shutdown = __devexit_p(omap_sr_shutdown),
  917. .driver = {
  918. .name = "smartreflex",
  919. },
  920. };
  921. static int __init sr_init(void)
  922. {
  923. int ret = 0;
  924. /*
  925. * sr_init is a late init. If by then a pmic specific API is not
  926. * registered either there is no need for anything to be done on
  927. * the PMIC side or somebody has forgotten to register a PMIC
  928. * handler. Warn for the second condition.
  929. */
  930. if (sr_pmic_data && sr_pmic_data->sr_pmic_init)
  931. sr_pmic_data->sr_pmic_init();
  932. else
  933. pr_warning("%s: No PMIC hook to init smartreflex\n", __func__);
  934. ret = platform_driver_probe(&smartreflex_driver, omap_sr_probe);
  935. if (ret) {
  936. pr_err("%s: platform driver register failed for SR\n",
  937. __func__);
  938. return ret;
  939. }
  940. return 0;
  941. }
  942. late_initcall(sr_init);
  943. static void __exit sr_exit(void)
  944. {
  945. platform_driver_unregister(&smartreflex_driver);
  946. }
  947. module_exit(sr_exit);
  948. MODULE_DESCRIPTION("OMAP Smartreflex Driver");
  949. MODULE_LICENSE("GPL");
  950. MODULE_ALIAS("platform:" DRIVER_NAME);
  951. MODULE_AUTHOR("Texas Instruments Inc");