it8172_setup.c 9.2 KB

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  1. /*
  2. * BRIEF MODULE DESCRIPTION
  3. * IT8172/QED5231 board setup.
  4. *
  5. * Copyright 2000 MontaVista Software Inc.
  6. * Author: MontaVista Software, Inc.
  7. * ppopov@mvista.com or source@mvista.com
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. *
  14. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  15. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  16. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  17. * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  18. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  19. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  20. * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  21. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  22. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  23. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  24. *
  25. * You should have received a copy of the GNU General Public License along
  26. * with this program; if not, write to the Free Software Foundation, Inc.,
  27. * 675 Mass Ave, Cambridge, MA 02139, USA.
  28. */
  29. #include <linux/config.h>
  30. #include <linux/init.h>
  31. #include <linux/sched.h>
  32. #include <linux/ioport.h>
  33. #include <linux/serial_reg.h>
  34. #include <linux/major.h>
  35. #include <linux/kdev_t.h>
  36. #include <linux/root_dev.h>
  37. #include <linux/pm.h>
  38. #include <asm/cpu.h>
  39. #include <asm/time.h>
  40. #include <asm/io.h>
  41. #include <asm/bootinfo.h>
  42. #include <asm/irq.h>
  43. #include <asm/mipsregs.h>
  44. #include <asm/reboot.h>
  45. #include <asm/traps.h>
  46. #include <asm/it8172/it8172.h>
  47. #include <asm/it8712.h>
  48. extern struct resource ioport_resource;
  49. #ifdef CONFIG_SERIO_I8042
  50. int init_8712_keyboard(void);
  51. #endif
  52. extern int SearchIT8712(void);
  53. extern void InitLPCInterface(void);
  54. extern char * __init prom_getcmdline(void);
  55. extern void it8172_restart(char *command);
  56. extern void it8172_halt(void);
  57. extern void it8172_power_off(void);
  58. extern void (*board_time_init)(void);
  59. extern void (*board_timer_setup)(struct irqaction *irq);
  60. extern void it8172_time_init(void);
  61. extern void it8172_timer_setup(struct irqaction *irq);
  62. #ifdef CONFIG_IT8172_REVC
  63. struct {
  64. struct resource ram;
  65. struct resource pci_mem;
  66. struct resource pci_io;
  67. struct resource flash;
  68. struct resource boot;
  69. } it8172_resources = {
  70. {
  71. .start = 0, /* to be initted */
  72. .end = 0,
  73. .name = "RAM",
  74. .flags = IORESOURCE_MEM
  75. }, {
  76. .start = 0x10000000,
  77. .end = 0x13FFFFFF,
  78. .name = "PCI Mem",
  79. .flags = IORESOURCE_MEM
  80. }, {
  81. .start = 0x14000000,
  82. .end = 0x17FFFFFF
  83. .name = "PCI I/O",
  84. }, {
  85. .start = 0x08000000,
  86. .end = 0x0CFFFFFF
  87. .name = "Flash",
  88. }, {
  89. .start = 0x1FC00000,
  90. .end = 0x1FFFFFFF
  91. .name = "Boot ROM",
  92. }
  93. };
  94. #else
  95. struct {
  96. struct resource ram;
  97. struct resource pci_mem0;
  98. struct resource pci_mem1;
  99. struct resource pci_io;
  100. struct resource pci_mem2;
  101. struct resource pci_mem3;
  102. struct resource flash;
  103. struct resource boot;
  104. } it8172_resources = {
  105. {
  106. .start = 0, /* to be initted */
  107. .end = 0,
  108. .name = "RAM",
  109. .flags = IORESOURCE_MEM
  110. }, {
  111. .start = 0x0C000000,
  112. .end = 0x0FFFFFFF,
  113. .name = "PCI Mem0",
  114. .flags = IORESOURCE_MEM
  115. }, {
  116. .start = 0x10000000,
  117. .end = 0x13FFFFFF,
  118. .name = "PCI Mem1",
  119. .flags = IORESOURCE_MEM
  120. }, {
  121. .start = 0x14000000,
  122. .end = 0x17FFFFFF
  123. .name = "PCI I/O",
  124. }, {
  125. .start = 0x1A000000,
  126. .end = 0x1BFFFFFF,
  127. .name = "PCI Mem2",
  128. .flags = IORESOURCE_MEM
  129. }, {
  130. .start = 0x1C000000,
  131. .end = 0x1FBFFFFF,
  132. .name = "PCI Mem3",
  133. .flags = IORESOURCE_MEM
  134. }, {
  135. .start = 0x08000000,
  136. .end = 0x0CFFFFFF
  137. .name = "Flash",
  138. }, {
  139. .start = 0x1FC00000,
  140. .end = 0x1FFFFFFF
  141. .name = "Boot ROM",
  142. }
  143. };
  144. #endif
  145. void __init it8172_init_ram_resource(unsigned long memsize)
  146. {
  147. it8172_resources.ram.end = memsize;
  148. }
  149. void __init plat_setup(void)
  150. {
  151. unsigned short dsr;
  152. char *argptr;
  153. argptr = prom_getcmdline();
  154. #ifdef CONFIG_SERIAL_CONSOLE
  155. if ((argptr = strstr(argptr, "console=")) == NULL) {
  156. argptr = prom_getcmdline();
  157. strcat(argptr, " console=ttyS0,115200");
  158. }
  159. #endif
  160. clear_c0_status(ST0_FR);
  161. board_time_init = it8172_time_init;
  162. board_timer_setup = it8172_timer_setup;
  163. _machine_restart = it8172_restart;
  164. _machine_halt = it8172_halt;
  165. pm_power_off = it8172_power_off;
  166. /*
  167. * IO/MEM resources.
  168. *
  169. * revisit this area.
  170. */
  171. set_io_port_base(KSEG1);
  172. ioport_resource.start = it8172_resources.pci_io.start;
  173. ioport_resource.end = it8172_resources.pci_io.end;
  174. #ifdef CONFIG_IT8172_REVC
  175. iomem_resource.start = it8172_resources.pci_mem.start;
  176. iomem_resource.end = it8172_resources.pci_mem.end;
  177. #else
  178. iomem_resource.start = it8172_resources.pci_mem0.start;
  179. iomem_resource.end = it8172_resources.pci_mem3.end;
  180. #endif
  181. #ifdef CONFIG_BLK_DEV_INITRD
  182. ROOT_DEV = Root_RAM0;
  183. #endif
  184. /*
  185. * Pull enabled devices out of standby
  186. */
  187. IT_IO_READ16(IT_PM_DSR, dsr);
  188. /*
  189. * Fixme: This breaks when these drivers are modules!!!
  190. */
  191. #ifdef CONFIG_SOUND_IT8172
  192. dsr &= ~IT_PM_DSR_ACSB;
  193. #else
  194. dsr |= IT_PM_DSR_ACSB;
  195. #endif
  196. #ifdef CONFIG_BLK_DEV_IT8172
  197. dsr &= ~IT_PM_DSR_IDESB;
  198. #else
  199. dsr |= IT_PM_DSR_IDESB;
  200. #endif
  201. IT_IO_WRITE16(IT_PM_DSR, dsr);
  202. InitLPCInterface();
  203. #ifdef CONFIG_MIPS_ITE8172
  204. if (SearchIT8712()) {
  205. printk("Found IT8712 Super IO\n");
  206. /* enable IT8712 serial port */
  207. LPCSetConfig(LDN_SERIAL1, 0x30, 0x01); /* enable */
  208. LPCSetConfig(LDN_SERIAL1, 0x23, 0x01); /* clock selection */
  209. #ifdef CONFIG_SERIO_I8042
  210. if (init_8712_keyboard()) {
  211. printk("Unable to initialize keyboard\n");
  212. LPCSetConfig(LDN_KEYBOARD, 0x30, 0x0); /* disable keyboard */
  213. } else {
  214. LPCSetConfig(LDN_KEYBOARD, 0x30, 0x1); /* enable keyboard */
  215. LPCSetConfig(LDN_KEYBOARD, 0xf0, 0x2);
  216. LPCSetConfig(LDN_KEYBOARD, 0x71, 0x3);
  217. LPCSetConfig(LDN_MOUSE, 0x30, 0x1); /* enable mouse */
  218. LPCSetConfig(0x4, 0x30, 0x1);
  219. LPCSetConfig(0x4, 0xf4, LPCGetConfig(0x4, 0xf4) | 0x80);
  220. if ((LPCGetConfig(LDN_KEYBOARD, 0x30) == 0) ||
  221. (LPCGetConfig(LDN_MOUSE, 0x30) == 0))
  222. printk("Error: keyboard or mouse not enabled\n");
  223. }
  224. #endif
  225. }
  226. else {
  227. printk("IT8712 Super IO not found\n");
  228. }
  229. #endif
  230. #ifdef CONFIG_IT8172_CIR
  231. {
  232. unsigned long data;
  233. //printk("Enabling CIR0\n");
  234. IT_IO_READ16(IT_PM_DSR, data);
  235. data &= ~IT_PM_DSR_CIR0SB;
  236. IT_IO_WRITE16(IT_PM_DSR, data);
  237. //printk("DSR register: %x\n", (unsigned)IT_IO_READ16(IT_PM_DSR, data));
  238. }
  239. #endif
  240. #ifdef CONFIG_IT8172_SCR0
  241. {
  242. unsigned i;
  243. /* Enable Smart Card Reader 0 */
  244. /* First power it up */
  245. IT_IO_READ16(IT_PM_DSR, i);
  246. i &= ~IT_PM_DSR_SCR0SB;
  247. IT_IO_WRITE16(IT_PM_DSR, i);
  248. /* Then initialize its registers */
  249. outb(( IT_SCR_SFR_GATE_UART_OFF << IT_SCR_SFR_GATE_UART_BIT
  250. |IT_SCR_SFR_FET_CHARGE_213_US << IT_SCR_SFR_FET_CHARGE_BIT
  251. |IT_SCR_SFR_CARD_FREQ_3_5_MHZ << IT_SCR_SFR_CARD_FREQ_BIT
  252. |IT_SCR_SFR_FET_ACTIVE_INVERT << IT_SCR_SFR_FET_ACTIVE_BIT
  253. |IT_SCR_SFR_ENABLE_ON << IT_SCR_SFR_ENABLE_BIT),
  254. IT8172_PCI_IO_BASE + IT_SCR0_BASE + IT_SCR_SFR);
  255. outb(IT_SCR_SCDR_RESET_MODE_ASYNC << IT_SCR_SCDR_RESET_MODE_BIT,
  256. IT8172_PCI_IO_BASE + IT_SCR0_BASE + IT_SCR_SCDR);
  257. }
  258. #endif /* CONFIG_IT8172_SCR0 */
  259. #ifdef CONFIG_IT8172_SCR1
  260. {
  261. unsigned i;
  262. /* Enable Smart Card Reader 1 */
  263. /* First power it up */
  264. IT_IO_READ16(IT_PM_DSR, i);
  265. i &= ~IT_PM_DSR_SCR1SB;
  266. IT_IO_WRITE16(IT_PM_DSR, i);
  267. /* Then initialize its registers */
  268. outb(( IT_SCR_SFR_GATE_UART_OFF << IT_SCR_SFR_GATE_UART_BIT
  269. |IT_SCR_SFR_FET_CHARGE_213_US << IT_SCR_SFR_FET_CHARGE_BIT
  270. |IT_SCR_SFR_CARD_FREQ_3_5_MHZ << IT_SCR_SFR_CARD_FREQ_BIT
  271. |IT_SCR_SFR_FET_ACTIVE_INVERT << IT_SCR_SFR_FET_ACTIVE_BIT
  272. |IT_SCR_SFR_ENABLE_ON << IT_SCR_SFR_ENABLE_BIT),
  273. IT8172_PCI_IO_BASE + IT_SCR1_BASE + IT_SCR_SFR);
  274. outb(IT_SCR_SCDR_RESET_MODE_ASYNC << IT_SCR_SCDR_RESET_MODE_BIT,
  275. IT8172_PCI_IO_BASE + IT_SCR1_BASE + IT_SCR_SCDR);
  276. }
  277. #endif /* CONFIG_IT8172_SCR1 */
  278. }
  279. #ifdef CONFIG_SERIO_I8042
  280. /*
  281. * According to the ITE Special BIOS Note for waking up the
  282. * keyboard controller...
  283. */
  284. static int init_8712_keyboard(void)
  285. {
  286. unsigned int cmd_port = 0x14000064;
  287. unsigned int data_port = 0x14000060;
  288. ^^^^^^^^^^^
  289. Somebody here doesn't grok the concept of io ports.
  290. unsigned char data;
  291. int i;
  292. outb(0xaa, cmd_port); /* send self-test cmd */
  293. i = 0;
  294. while (!(inb(cmd_port) & 0x1)) { /* wait output buffer full */
  295. i++;
  296. if (i > 0xffffff)
  297. return 1;
  298. }
  299. data = inb(data_port);
  300. outb(0xcb, cmd_port); /* set ps2 mode */
  301. while (inb(cmd_port) & 0x2) { /* wait while input buffer full */
  302. i++;
  303. if (i > 0xffffff)
  304. return 1;
  305. }
  306. outb(0x01, data_port);
  307. while (inb(cmd_port) & 0x2) { /* wait while input buffer full */
  308. i++;
  309. if (i > 0xffffff)
  310. return 1;
  311. }
  312. outb(0x60, cmd_port); /* write 8042 command byte */
  313. while (inb(cmd_port) & 0x2) { /* wait while input buffer full */
  314. i++;
  315. if (i > 0xffffff)
  316. return 1;
  317. }
  318. outb(0x45, data_port); /* at interface, keyboard enabled, system flag */
  319. while (inb(cmd_port) & 0x2) { /* wait while input buffer full */
  320. i++;
  321. if (i > 0xffffff)
  322. return 1;
  323. }
  324. outb(0xae, cmd_port); /* enable interface */
  325. return 0;
  326. }
  327. #endif