mthca_provider.c 22 KB

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  1. /*
  2. * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
  3. * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
  4. * Copyright (c) 2005 Cisco Systems. All rights reserved.
  5. *
  6. * This software is available to you under a choice of one of two
  7. * licenses. You may choose to be licensed under the terms of the GNU
  8. * General Public License (GPL) Version 2, available from the file
  9. * COPYING in the main directory of this source tree, or the
  10. * OpenIB.org BSD license below:
  11. *
  12. * Redistribution and use in source and binary forms, with or
  13. * without modification, are permitted provided that the following
  14. * conditions are met:
  15. *
  16. * - Redistributions of source code must retain the above
  17. * copyright notice, this list of conditions and the following
  18. * disclaimer.
  19. *
  20. * - Redistributions in binary form must reproduce the above
  21. * copyright notice, this list of conditions and the following
  22. * disclaimer in the documentation and/or other materials
  23. * provided with the distribution.
  24. *
  25. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  26. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  27. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  28. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  29. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  30. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  31. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  32. * SOFTWARE.
  33. *
  34. * $Id: mthca_provider.c 1397 2004-12-28 05:09:00Z roland $
  35. */
  36. #include <ib_smi.h>
  37. #include "mthca_dev.h"
  38. #include "mthca_cmd.h"
  39. #include "mthca_user.h"
  40. #include "mthca_memfree.h"
  41. static int mthca_query_device(struct ib_device *ibdev,
  42. struct ib_device_attr *props)
  43. {
  44. struct ib_smp *in_mad = NULL;
  45. struct ib_smp *out_mad = NULL;
  46. int err = -ENOMEM;
  47. struct mthca_dev* mdev = to_mdev(ibdev);
  48. u8 status;
  49. in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
  50. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  51. if (!in_mad || !out_mad)
  52. goto out;
  53. memset(props, 0, sizeof *props);
  54. props->fw_ver = mdev->fw_ver;
  55. memset(in_mad, 0, sizeof *in_mad);
  56. in_mad->base_version = 1;
  57. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  58. in_mad->class_version = 1;
  59. in_mad->method = IB_MGMT_METHOD_GET;
  60. in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
  61. err = mthca_MAD_IFC(mdev, 1, 1,
  62. 1, NULL, NULL, in_mad, out_mad,
  63. &status);
  64. if (err)
  65. goto out;
  66. if (status) {
  67. err = -EINVAL;
  68. goto out;
  69. }
  70. props->device_cap_flags = mdev->device_cap_flags;
  71. props->vendor_id = be32_to_cpup((u32 *) (out_mad->data + 36)) &
  72. 0xffffff;
  73. props->vendor_part_id = be16_to_cpup((u16 *) (out_mad->data + 30));
  74. props->hw_ver = be16_to_cpup((u16 *) (out_mad->data + 32));
  75. memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
  76. memcpy(&props->node_guid, out_mad->data + 12, 8);
  77. props->max_mr_size = ~0ull;
  78. props->max_qp = mdev->limits.num_qps - mdev->limits.reserved_qps;
  79. props->max_qp_wr = 0xffff;
  80. props->max_sge = mdev->limits.max_sg;
  81. props->max_cq = mdev->limits.num_cqs - mdev->limits.reserved_cqs;
  82. props->max_cqe = 0xffff;
  83. props->max_mr = mdev->limits.num_mpts - mdev->limits.reserved_mrws;
  84. props->max_pd = mdev->limits.num_pds - mdev->limits.reserved_pds;
  85. props->max_qp_rd_atom = 1 << mdev->qp_table.rdb_shift;
  86. props->max_qp_init_rd_atom = 1 << mdev->qp_table.rdb_shift;
  87. props->local_ca_ack_delay = mdev->limits.local_ca_ack_delay;
  88. err = 0;
  89. out:
  90. kfree(in_mad);
  91. kfree(out_mad);
  92. return err;
  93. }
  94. static int mthca_query_port(struct ib_device *ibdev,
  95. u8 port, struct ib_port_attr *props)
  96. {
  97. struct ib_smp *in_mad = NULL;
  98. struct ib_smp *out_mad = NULL;
  99. int err = -ENOMEM;
  100. u8 status;
  101. in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
  102. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  103. if (!in_mad || !out_mad)
  104. goto out;
  105. memset(in_mad, 0, sizeof *in_mad);
  106. in_mad->base_version = 1;
  107. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  108. in_mad->class_version = 1;
  109. in_mad->method = IB_MGMT_METHOD_GET;
  110. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  111. in_mad->attr_mod = cpu_to_be32(port);
  112. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  113. port, NULL, NULL, in_mad, out_mad,
  114. &status);
  115. if (err)
  116. goto out;
  117. if (status) {
  118. err = -EINVAL;
  119. goto out;
  120. }
  121. props->lid = be16_to_cpup((u16 *) (out_mad->data + 16));
  122. props->lmc = out_mad->data[34] & 0x7;
  123. props->sm_lid = be16_to_cpup((u16 *) (out_mad->data + 18));
  124. props->sm_sl = out_mad->data[36] & 0xf;
  125. props->state = out_mad->data[32] & 0xf;
  126. props->phys_state = out_mad->data[33] >> 4;
  127. props->port_cap_flags = be32_to_cpup((u32 *) (out_mad->data + 20));
  128. props->gid_tbl_len = to_mdev(ibdev)->limits.gid_table_len;
  129. props->pkey_tbl_len = to_mdev(ibdev)->limits.pkey_table_len;
  130. props->qkey_viol_cntr = be16_to_cpup((u16 *) (out_mad->data + 48));
  131. props->active_width = out_mad->data[31] & 0xf;
  132. props->active_speed = out_mad->data[35] >> 4;
  133. out:
  134. kfree(in_mad);
  135. kfree(out_mad);
  136. return err;
  137. }
  138. static int mthca_modify_port(struct ib_device *ibdev,
  139. u8 port, int port_modify_mask,
  140. struct ib_port_modify *props)
  141. {
  142. struct mthca_set_ib_param set_ib;
  143. struct ib_port_attr attr;
  144. int err;
  145. u8 status;
  146. if (down_interruptible(&to_mdev(ibdev)->cap_mask_mutex))
  147. return -ERESTARTSYS;
  148. err = mthca_query_port(ibdev, port, &attr);
  149. if (err)
  150. goto out;
  151. set_ib.set_si_guid = 0;
  152. set_ib.reset_qkey_viol = !!(port_modify_mask & IB_PORT_RESET_QKEY_CNTR);
  153. set_ib.cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
  154. ~props->clr_port_cap_mask;
  155. err = mthca_SET_IB(to_mdev(ibdev), &set_ib, port, &status);
  156. if (err)
  157. goto out;
  158. if (status) {
  159. err = -EINVAL;
  160. goto out;
  161. }
  162. out:
  163. up(&to_mdev(ibdev)->cap_mask_mutex);
  164. return err;
  165. }
  166. static int mthca_query_pkey(struct ib_device *ibdev,
  167. u8 port, u16 index, u16 *pkey)
  168. {
  169. struct ib_smp *in_mad = NULL;
  170. struct ib_smp *out_mad = NULL;
  171. int err = -ENOMEM;
  172. u8 status;
  173. in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
  174. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  175. if (!in_mad || !out_mad)
  176. goto out;
  177. memset(in_mad, 0, sizeof *in_mad);
  178. in_mad->base_version = 1;
  179. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  180. in_mad->class_version = 1;
  181. in_mad->method = IB_MGMT_METHOD_GET;
  182. in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
  183. in_mad->attr_mod = cpu_to_be32(index / 32);
  184. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  185. port, NULL, NULL, in_mad, out_mad,
  186. &status);
  187. if (err)
  188. goto out;
  189. if (status) {
  190. err = -EINVAL;
  191. goto out;
  192. }
  193. *pkey = be16_to_cpu(((u16 *) out_mad->data)[index % 32]);
  194. out:
  195. kfree(in_mad);
  196. kfree(out_mad);
  197. return err;
  198. }
  199. static int mthca_query_gid(struct ib_device *ibdev, u8 port,
  200. int index, union ib_gid *gid)
  201. {
  202. struct ib_smp *in_mad = NULL;
  203. struct ib_smp *out_mad = NULL;
  204. int err = -ENOMEM;
  205. u8 status;
  206. in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
  207. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  208. if (!in_mad || !out_mad)
  209. goto out;
  210. memset(in_mad, 0, sizeof *in_mad);
  211. in_mad->base_version = 1;
  212. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  213. in_mad->class_version = 1;
  214. in_mad->method = IB_MGMT_METHOD_GET;
  215. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  216. in_mad->attr_mod = cpu_to_be32(port);
  217. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  218. port, NULL, NULL, in_mad, out_mad,
  219. &status);
  220. if (err)
  221. goto out;
  222. if (status) {
  223. err = -EINVAL;
  224. goto out;
  225. }
  226. memcpy(gid->raw, out_mad->data + 8, 8);
  227. memset(in_mad, 0, sizeof *in_mad);
  228. in_mad->base_version = 1;
  229. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  230. in_mad->class_version = 1;
  231. in_mad->method = IB_MGMT_METHOD_GET;
  232. in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
  233. in_mad->attr_mod = cpu_to_be32(index / 8);
  234. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  235. port, NULL, NULL, in_mad, out_mad,
  236. &status);
  237. if (err)
  238. goto out;
  239. if (status) {
  240. err = -EINVAL;
  241. goto out;
  242. }
  243. memcpy(gid->raw + 8, out_mad->data + (index % 8) * 16, 8);
  244. out:
  245. kfree(in_mad);
  246. kfree(out_mad);
  247. return err;
  248. }
  249. static struct ib_ucontext *mthca_alloc_ucontext(struct ib_device *ibdev,
  250. struct ib_udata *udata)
  251. {
  252. struct mthca_alloc_ucontext_resp uresp;
  253. struct mthca_ucontext *context;
  254. int err;
  255. memset(&uresp, 0, sizeof uresp);
  256. uresp.qp_tab_size = to_mdev(ibdev)->limits.num_qps;
  257. if (mthca_is_memfree(to_mdev(ibdev)))
  258. uresp.uarc_size = to_mdev(ibdev)->uar_table.uarc_size;
  259. else
  260. uresp.uarc_size = 0;
  261. context = kmalloc(sizeof *context, GFP_KERNEL);
  262. if (!context)
  263. return ERR_PTR(-ENOMEM);
  264. err = mthca_uar_alloc(to_mdev(ibdev), &context->uar);
  265. if (err) {
  266. kfree(context);
  267. return ERR_PTR(err);
  268. }
  269. context->db_tab = mthca_init_user_db_tab(to_mdev(ibdev));
  270. if (IS_ERR(context->db_tab)) {
  271. err = PTR_ERR(context->db_tab);
  272. mthca_uar_free(to_mdev(ibdev), &context->uar);
  273. kfree(context);
  274. return ERR_PTR(err);
  275. }
  276. if (ib_copy_to_udata(udata, &uresp, sizeof uresp)) {
  277. mthca_cleanup_user_db_tab(to_mdev(ibdev), &context->uar, context->db_tab);
  278. mthca_uar_free(to_mdev(ibdev), &context->uar);
  279. kfree(context);
  280. return ERR_PTR(-EFAULT);
  281. }
  282. return &context->ibucontext;
  283. }
  284. static int mthca_dealloc_ucontext(struct ib_ucontext *context)
  285. {
  286. mthca_cleanup_user_db_tab(to_mdev(context->device), &to_mucontext(context)->uar,
  287. to_mucontext(context)->db_tab);
  288. mthca_uar_free(to_mdev(context->device), &to_mucontext(context)->uar);
  289. kfree(to_mucontext(context));
  290. return 0;
  291. }
  292. static struct ib_pd *mthca_alloc_pd(struct ib_device *ibdev,
  293. struct ib_ucontext *context,
  294. struct ib_udata *udata)
  295. {
  296. struct mthca_pd *pd;
  297. int err;
  298. pd = kmalloc(sizeof *pd, GFP_KERNEL);
  299. if (!pd)
  300. return ERR_PTR(-ENOMEM);
  301. err = mthca_pd_alloc(to_mdev(ibdev), pd);
  302. if (err) {
  303. kfree(pd);
  304. return ERR_PTR(err);
  305. }
  306. return &pd->ibpd;
  307. }
  308. static int mthca_dealloc_pd(struct ib_pd *pd)
  309. {
  310. mthca_pd_free(to_mdev(pd->device), to_mpd(pd));
  311. kfree(pd);
  312. return 0;
  313. }
  314. static struct ib_ah *mthca_ah_create(struct ib_pd *pd,
  315. struct ib_ah_attr *ah_attr)
  316. {
  317. int err;
  318. struct mthca_ah *ah;
  319. ah = kmalloc(sizeof *ah, GFP_ATOMIC);
  320. if (!ah)
  321. return ERR_PTR(-ENOMEM);
  322. err = mthca_create_ah(to_mdev(pd->device), to_mpd(pd), ah_attr, ah);
  323. if (err) {
  324. kfree(ah);
  325. return ERR_PTR(err);
  326. }
  327. return &ah->ibah;
  328. }
  329. static int mthca_ah_destroy(struct ib_ah *ah)
  330. {
  331. mthca_destroy_ah(to_mdev(ah->device), to_mah(ah));
  332. kfree(ah);
  333. return 0;
  334. }
  335. static struct ib_qp *mthca_create_qp(struct ib_pd *pd,
  336. struct ib_qp_init_attr *init_attr,
  337. struct ib_udata *udata)
  338. {
  339. struct mthca_qp *qp;
  340. int err;
  341. switch (init_attr->qp_type) {
  342. case IB_QPT_RC:
  343. case IB_QPT_UC:
  344. case IB_QPT_UD:
  345. {
  346. qp = kmalloc(sizeof *qp, GFP_KERNEL);
  347. if (!qp)
  348. return ERR_PTR(-ENOMEM);
  349. qp->sq.max = init_attr->cap.max_send_wr;
  350. qp->rq.max = init_attr->cap.max_recv_wr;
  351. qp->sq.max_gs = init_attr->cap.max_send_sge;
  352. qp->rq.max_gs = init_attr->cap.max_recv_sge;
  353. err = mthca_alloc_qp(to_mdev(pd->device), to_mpd(pd),
  354. to_mcq(init_attr->send_cq),
  355. to_mcq(init_attr->recv_cq),
  356. init_attr->qp_type, init_attr->sq_sig_type,
  357. qp);
  358. qp->ibqp.qp_num = qp->qpn;
  359. break;
  360. }
  361. case IB_QPT_SMI:
  362. case IB_QPT_GSI:
  363. {
  364. qp = kmalloc(sizeof (struct mthca_sqp), GFP_KERNEL);
  365. if (!qp)
  366. return ERR_PTR(-ENOMEM);
  367. qp->sq.max = init_attr->cap.max_send_wr;
  368. qp->rq.max = init_attr->cap.max_recv_wr;
  369. qp->sq.max_gs = init_attr->cap.max_send_sge;
  370. qp->rq.max_gs = init_attr->cap.max_recv_sge;
  371. qp->ibqp.qp_num = init_attr->qp_type == IB_QPT_SMI ? 0 : 1;
  372. err = mthca_alloc_sqp(to_mdev(pd->device), to_mpd(pd),
  373. to_mcq(init_attr->send_cq),
  374. to_mcq(init_attr->recv_cq),
  375. init_attr->sq_sig_type,
  376. qp->ibqp.qp_num, init_attr->port_num,
  377. to_msqp(qp));
  378. break;
  379. }
  380. default:
  381. /* Don't support raw QPs */
  382. return ERR_PTR(-ENOSYS);
  383. }
  384. if (err) {
  385. kfree(qp);
  386. return ERR_PTR(err);
  387. }
  388. init_attr->cap.max_inline_data = 0;
  389. return &qp->ibqp;
  390. }
  391. static int mthca_destroy_qp(struct ib_qp *qp)
  392. {
  393. mthca_free_qp(to_mdev(qp->device), to_mqp(qp));
  394. kfree(qp);
  395. return 0;
  396. }
  397. static struct ib_cq *mthca_create_cq(struct ib_device *ibdev, int entries,
  398. struct ib_ucontext *context,
  399. struct ib_udata *udata)
  400. {
  401. struct mthca_cq *cq;
  402. int nent;
  403. int err;
  404. cq = kmalloc(sizeof *cq, GFP_KERNEL);
  405. if (!cq)
  406. return ERR_PTR(-ENOMEM);
  407. for (nent = 1; nent <= entries; nent <<= 1)
  408. ; /* nothing */
  409. err = mthca_init_cq(to_mdev(ibdev), nent, cq);
  410. if (err) {
  411. kfree(cq);
  412. cq = ERR_PTR(err);
  413. }
  414. return &cq->ibcq;
  415. }
  416. static int mthca_destroy_cq(struct ib_cq *cq)
  417. {
  418. mthca_free_cq(to_mdev(cq->device), to_mcq(cq));
  419. kfree(cq);
  420. return 0;
  421. }
  422. static inline u32 convert_access(int acc)
  423. {
  424. return (acc & IB_ACCESS_REMOTE_ATOMIC ? MTHCA_MPT_FLAG_ATOMIC : 0) |
  425. (acc & IB_ACCESS_REMOTE_WRITE ? MTHCA_MPT_FLAG_REMOTE_WRITE : 0) |
  426. (acc & IB_ACCESS_REMOTE_READ ? MTHCA_MPT_FLAG_REMOTE_READ : 0) |
  427. (acc & IB_ACCESS_LOCAL_WRITE ? MTHCA_MPT_FLAG_LOCAL_WRITE : 0) |
  428. MTHCA_MPT_FLAG_LOCAL_READ;
  429. }
  430. static struct ib_mr *mthca_get_dma_mr(struct ib_pd *pd, int acc)
  431. {
  432. struct mthca_mr *mr;
  433. int err;
  434. mr = kmalloc(sizeof *mr, GFP_KERNEL);
  435. if (!mr)
  436. return ERR_PTR(-ENOMEM);
  437. err = mthca_mr_alloc_notrans(to_mdev(pd->device),
  438. to_mpd(pd)->pd_num,
  439. convert_access(acc), mr);
  440. if (err) {
  441. kfree(mr);
  442. return ERR_PTR(err);
  443. }
  444. return &mr->ibmr;
  445. }
  446. static struct ib_mr *mthca_reg_phys_mr(struct ib_pd *pd,
  447. struct ib_phys_buf *buffer_list,
  448. int num_phys_buf,
  449. int acc,
  450. u64 *iova_start)
  451. {
  452. struct mthca_mr *mr;
  453. u64 *page_list;
  454. u64 total_size;
  455. u64 mask;
  456. int shift;
  457. int npages;
  458. int err;
  459. int i, j, n;
  460. /* First check that we have enough alignment */
  461. if ((*iova_start & ~PAGE_MASK) != (buffer_list[0].addr & ~PAGE_MASK))
  462. return ERR_PTR(-EINVAL);
  463. if (num_phys_buf > 1 &&
  464. ((buffer_list[0].addr + buffer_list[0].size) & ~PAGE_MASK))
  465. return ERR_PTR(-EINVAL);
  466. mask = 0;
  467. total_size = 0;
  468. for (i = 0; i < num_phys_buf; ++i) {
  469. if (i != 0 && buffer_list[i].addr & ~PAGE_MASK)
  470. return ERR_PTR(-EINVAL);
  471. if (i != 0 && i != num_phys_buf - 1 &&
  472. (buffer_list[i].size & ~PAGE_MASK))
  473. return ERR_PTR(-EINVAL);
  474. total_size += buffer_list[i].size;
  475. if (i > 0)
  476. mask |= buffer_list[i].addr;
  477. }
  478. /* Find largest page shift we can use to cover buffers */
  479. for (shift = PAGE_SHIFT; shift < 31; ++shift)
  480. if (num_phys_buf > 1) {
  481. if ((1ULL << shift) & mask)
  482. break;
  483. } else {
  484. if (1ULL << shift >=
  485. buffer_list[0].size +
  486. (buffer_list[0].addr & ((1ULL << shift) - 1)))
  487. break;
  488. }
  489. buffer_list[0].size += buffer_list[0].addr & ((1ULL << shift) - 1);
  490. buffer_list[0].addr &= ~0ull << shift;
  491. mr = kmalloc(sizeof *mr, GFP_KERNEL);
  492. if (!mr)
  493. return ERR_PTR(-ENOMEM);
  494. npages = 0;
  495. for (i = 0; i < num_phys_buf; ++i)
  496. npages += (buffer_list[i].size + (1ULL << shift) - 1) >> shift;
  497. if (!npages)
  498. return &mr->ibmr;
  499. page_list = kmalloc(npages * sizeof *page_list, GFP_KERNEL);
  500. if (!page_list) {
  501. kfree(mr);
  502. return ERR_PTR(-ENOMEM);
  503. }
  504. n = 0;
  505. for (i = 0; i < num_phys_buf; ++i)
  506. for (j = 0;
  507. j < (buffer_list[i].size + (1ULL << shift) - 1) >> shift;
  508. ++j)
  509. page_list[n++] = buffer_list[i].addr + ((u64) j << shift);
  510. mthca_dbg(to_mdev(pd->device), "Registering memory at %llx (iova %llx) "
  511. "in PD %x; shift %d, npages %d.\n",
  512. (unsigned long long) buffer_list[0].addr,
  513. (unsigned long long) *iova_start,
  514. to_mpd(pd)->pd_num,
  515. shift, npages);
  516. err = mthca_mr_alloc_phys(to_mdev(pd->device),
  517. to_mpd(pd)->pd_num,
  518. page_list, shift, npages,
  519. *iova_start, total_size,
  520. convert_access(acc), mr);
  521. if (err) {
  522. kfree(page_list);
  523. kfree(mr);
  524. return ERR_PTR(err);
  525. }
  526. kfree(page_list);
  527. return &mr->ibmr;
  528. }
  529. static int mthca_dereg_mr(struct ib_mr *mr)
  530. {
  531. struct mthca_mr *mmr = to_mmr(mr);
  532. mthca_free_mr(to_mdev(mr->device), mmr);
  533. kfree(mmr);
  534. return 0;
  535. }
  536. static struct ib_fmr *mthca_alloc_fmr(struct ib_pd *pd, int mr_access_flags,
  537. struct ib_fmr_attr *fmr_attr)
  538. {
  539. struct mthca_fmr *fmr;
  540. int err;
  541. fmr = kmalloc(sizeof *fmr, GFP_KERNEL);
  542. if (!fmr)
  543. return ERR_PTR(-ENOMEM);
  544. memcpy(&fmr->attr, fmr_attr, sizeof *fmr_attr);
  545. err = mthca_fmr_alloc(to_mdev(pd->device), to_mpd(pd)->pd_num,
  546. convert_access(mr_access_flags), fmr);
  547. if (err) {
  548. kfree(fmr);
  549. return ERR_PTR(err);
  550. }
  551. return &fmr->ibmr;
  552. }
  553. static int mthca_dealloc_fmr(struct ib_fmr *fmr)
  554. {
  555. struct mthca_fmr *mfmr = to_mfmr(fmr);
  556. int err;
  557. err = mthca_free_fmr(to_mdev(fmr->device), mfmr);
  558. if (err)
  559. return err;
  560. kfree(mfmr);
  561. return 0;
  562. }
  563. static int mthca_unmap_fmr(struct list_head *fmr_list)
  564. {
  565. struct ib_fmr *fmr;
  566. int err;
  567. u8 status;
  568. struct mthca_dev *mdev = NULL;
  569. list_for_each_entry(fmr, fmr_list, list) {
  570. if (mdev && to_mdev(fmr->device) != mdev)
  571. return -EINVAL;
  572. mdev = to_mdev(fmr->device);
  573. }
  574. if (!mdev)
  575. return 0;
  576. if (mthca_is_memfree(mdev)) {
  577. list_for_each_entry(fmr, fmr_list, list)
  578. mthca_arbel_fmr_unmap(mdev, to_mfmr(fmr));
  579. wmb();
  580. } else
  581. list_for_each_entry(fmr, fmr_list, list)
  582. mthca_tavor_fmr_unmap(mdev, to_mfmr(fmr));
  583. err = mthca_SYNC_TPT(mdev, &status);
  584. if (err)
  585. return err;
  586. if (status)
  587. return -EINVAL;
  588. return 0;
  589. }
  590. static ssize_t show_rev(struct class_device *cdev, char *buf)
  591. {
  592. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  593. return sprintf(buf, "%x\n", dev->rev_id);
  594. }
  595. static ssize_t show_fw_ver(struct class_device *cdev, char *buf)
  596. {
  597. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  598. return sprintf(buf, "%x.%x.%x\n", (int) (dev->fw_ver >> 32),
  599. (int) (dev->fw_ver >> 16) & 0xffff,
  600. (int) dev->fw_ver & 0xffff);
  601. }
  602. static ssize_t show_hca(struct class_device *cdev, char *buf)
  603. {
  604. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  605. switch (dev->pdev->device) {
  606. case PCI_DEVICE_ID_MELLANOX_TAVOR:
  607. return sprintf(buf, "MT23108\n");
  608. case PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT:
  609. return sprintf(buf, "MT25208 (MT23108 compat mode)\n");
  610. case PCI_DEVICE_ID_MELLANOX_ARBEL:
  611. return sprintf(buf, "MT25208\n");
  612. case PCI_DEVICE_ID_MELLANOX_SINAI:
  613. case PCI_DEVICE_ID_MELLANOX_SINAI_OLD:
  614. return sprintf(buf, "MT25204\n");
  615. default:
  616. return sprintf(buf, "unknown\n");
  617. }
  618. }
  619. static CLASS_DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
  620. static CLASS_DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
  621. static CLASS_DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
  622. static struct class_device_attribute *mthca_class_attributes[] = {
  623. &class_device_attr_hw_rev,
  624. &class_device_attr_fw_ver,
  625. &class_device_attr_hca_type
  626. };
  627. int mthca_register_device(struct mthca_dev *dev)
  628. {
  629. int ret;
  630. int i;
  631. strlcpy(dev->ib_dev.name, "mthca%d", IB_DEVICE_NAME_MAX);
  632. dev->ib_dev.owner = THIS_MODULE;
  633. dev->ib_dev.node_type = IB_NODE_CA;
  634. dev->ib_dev.phys_port_cnt = dev->limits.num_ports;
  635. dev->ib_dev.dma_device = &dev->pdev->dev;
  636. dev->ib_dev.class_dev.dev = &dev->pdev->dev;
  637. dev->ib_dev.query_device = mthca_query_device;
  638. dev->ib_dev.query_port = mthca_query_port;
  639. dev->ib_dev.modify_port = mthca_modify_port;
  640. dev->ib_dev.query_pkey = mthca_query_pkey;
  641. dev->ib_dev.query_gid = mthca_query_gid;
  642. dev->ib_dev.alloc_ucontext = mthca_alloc_ucontext;
  643. dev->ib_dev.dealloc_ucontext = mthca_dealloc_ucontext;
  644. dev->ib_dev.alloc_pd = mthca_alloc_pd;
  645. dev->ib_dev.dealloc_pd = mthca_dealloc_pd;
  646. dev->ib_dev.create_ah = mthca_ah_create;
  647. dev->ib_dev.destroy_ah = mthca_ah_destroy;
  648. dev->ib_dev.create_qp = mthca_create_qp;
  649. dev->ib_dev.modify_qp = mthca_modify_qp;
  650. dev->ib_dev.destroy_qp = mthca_destroy_qp;
  651. dev->ib_dev.create_cq = mthca_create_cq;
  652. dev->ib_dev.destroy_cq = mthca_destroy_cq;
  653. dev->ib_dev.poll_cq = mthca_poll_cq;
  654. dev->ib_dev.get_dma_mr = mthca_get_dma_mr;
  655. dev->ib_dev.reg_phys_mr = mthca_reg_phys_mr;
  656. dev->ib_dev.dereg_mr = mthca_dereg_mr;
  657. if (dev->mthca_flags & MTHCA_FLAG_FMR) {
  658. dev->ib_dev.alloc_fmr = mthca_alloc_fmr;
  659. dev->ib_dev.unmap_fmr = mthca_unmap_fmr;
  660. dev->ib_dev.dealloc_fmr = mthca_dealloc_fmr;
  661. if (mthca_is_memfree(dev))
  662. dev->ib_dev.map_phys_fmr = mthca_arbel_map_phys_fmr;
  663. else
  664. dev->ib_dev.map_phys_fmr = mthca_tavor_map_phys_fmr;
  665. }
  666. dev->ib_dev.attach_mcast = mthca_multicast_attach;
  667. dev->ib_dev.detach_mcast = mthca_multicast_detach;
  668. dev->ib_dev.process_mad = mthca_process_mad;
  669. if (mthca_is_memfree(dev)) {
  670. dev->ib_dev.req_notify_cq = mthca_arbel_arm_cq;
  671. dev->ib_dev.post_send = mthca_arbel_post_send;
  672. dev->ib_dev.post_recv = mthca_arbel_post_receive;
  673. } else {
  674. dev->ib_dev.req_notify_cq = mthca_tavor_arm_cq;
  675. dev->ib_dev.post_send = mthca_tavor_post_send;
  676. dev->ib_dev.post_recv = mthca_tavor_post_receive;
  677. }
  678. init_MUTEX(&dev->cap_mask_mutex);
  679. ret = ib_register_device(&dev->ib_dev);
  680. if (ret)
  681. return ret;
  682. for (i = 0; i < ARRAY_SIZE(mthca_class_attributes); ++i) {
  683. ret = class_device_create_file(&dev->ib_dev.class_dev,
  684. mthca_class_attributes[i]);
  685. if (ret) {
  686. ib_unregister_device(&dev->ib_dev);
  687. return ret;
  688. }
  689. }
  690. return 0;
  691. }
  692. void mthca_unregister_device(struct mthca_dev *dev)
  693. {
  694. ib_unregister_device(&dev->ib_dev);
  695. }