setup.c 4.8 KB

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  1. /*
  2. * linux/arch/sh/boards/se/7722/setup.c
  3. *
  4. * Copyright (C) 2007 Nobuhiro Iwamatsu
  5. * Copyright (C) 2012 Paul Mundt
  6. *
  7. * Hitachi UL SolutionEngine 7722 Support.
  8. *
  9. * This file is subject to the terms and conditions of the GNU General Public
  10. * License. See the file "COPYING" in the main directory of this archive
  11. * for more details.
  12. *
  13. */
  14. #include <linux/init.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/ata_platform.h>
  17. #include <linux/input.h>
  18. #include <linux/input/sh_keysc.h>
  19. #include <linux/irqdomain.h>
  20. #include <linux/smc91x.h>
  21. #include <mach-se/mach/se7722.h>
  22. #include <mach-se/mach/mrshpc.h>
  23. #include <asm/machvec.h>
  24. #include <asm/clock.h>
  25. #include <asm/io.h>
  26. #include <asm/heartbeat.h>
  27. #include <cpu/sh7722.h>
  28. /* Heartbeat */
  29. static struct resource heartbeat_resource = {
  30. .start = PA_LED,
  31. .end = PA_LED,
  32. .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
  33. };
  34. static struct platform_device heartbeat_device = {
  35. .name = "heartbeat",
  36. .id = -1,
  37. .num_resources = 1,
  38. .resource = &heartbeat_resource,
  39. };
  40. /* SMC91x */
  41. static struct smc91x_platdata smc91x_info = {
  42. .flags = SMC91X_USE_16BIT,
  43. };
  44. static struct resource smc91x_eth_resources[] = {
  45. [0] = {
  46. .name = "smc91x-regs" ,
  47. .start = PA_LAN + 0x300,
  48. .end = PA_LAN + 0x300 + 0x10 ,
  49. .flags = IORESOURCE_MEM,
  50. },
  51. [1] = {
  52. /* Filled in later */
  53. .flags = IORESOURCE_IRQ,
  54. },
  55. };
  56. static struct platform_device smc91x_eth_device = {
  57. .name = "smc91x",
  58. .id = 0,
  59. .dev = {
  60. .dma_mask = NULL, /* don't use dma */
  61. .coherent_dma_mask = 0xffffffff,
  62. .platform_data = &smc91x_info,
  63. },
  64. .num_resources = ARRAY_SIZE(smc91x_eth_resources),
  65. .resource = smc91x_eth_resources,
  66. };
  67. static struct resource cf_ide_resources[] = {
  68. [0] = {
  69. .start = PA_MRSHPC_IO + 0x1f0,
  70. .end = PA_MRSHPC_IO + 0x1f0 + 8 ,
  71. .flags = IORESOURCE_IO,
  72. },
  73. [1] = {
  74. .start = PA_MRSHPC_IO + 0x1f0 + 0x206,
  75. .end = PA_MRSHPC_IO + 0x1f0 +8 + 0x206 + 8,
  76. .flags = IORESOURCE_IO,
  77. },
  78. [2] = {
  79. /* Filled in later */
  80. .flags = IORESOURCE_IRQ,
  81. },
  82. };
  83. static struct platform_device cf_ide_device = {
  84. .name = "pata_platform",
  85. .id = -1,
  86. .num_resources = ARRAY_SIZE(cf_ide_resources),
  87. .resource = cf_ide_resources,
  88. };
  89. static struct sh_keysc_info sh_keysc_info = {
  90. .mode = SH_KEYSC_MODE_1, /* KEYOUT0->5, KEYIN0->4 */
  91. .scan_timing = 3,
  92. .delay = 5,
  93. .keycodes = { /* SW1 -> SW30 */
  94. KEY_A, KEY_B, KEY_C, KEY_D, KEY_E,
  95. KEY_F, KEY_G, KEY_H, KEY_I, KEY_J,
  96. KEY_K, KEY_L, KEY_M, KEY_N, KEY_O,
  97. KEY_P, KEY_Q, KEY_R, KEY_S, KEY_T,
  98. KEY_U, KEY_V, KEY_W, KEY_X, KEY_Y,
  99. KEY_Z,
  100. KEY_HOME, KEY_SLEEP, KEY_WAKEUP, KEY_COFFEE, /* life */
  101. },
  102. };
  103. static struct resource sh_keysc_resources[] = {
  104. [0] = {
  105. .start = 0x044b0000,
  106. .end = 0x044b000f,
  107. .flags = IORESOURCE_MEM,
  108. },
  109. [1] = {
  110. .start = 79,
  111. .flags = IORESOURCE_IRQ,
  112. },
  113. };
  114. static struct platform_device sh_keysc_device = {
  115. .name = "sh_keysc",
  116. .id = 0, /* "keysc0" clock */
  117. .num_resources = ARRAY_SIZE(sh_keysc_resources),
  118. .resource = sh_keysc_resources,
  119. .dev = {
  120. .platform_data = &sh_keysc_info,
  121. },
  122. };
  123. static struct platform_device *se7722_devices[] __initdata = {
  124. &heartbeat_device,
  125. &smc91x_eth_device,
  126. &cf_ide_device,
  127. &sh_keysc_device,
  128. };
  129. static int __init se7722_devices_setup(void)
  130. {
  131. mrshpc_setup_windows();
  132. /* Wire-up dynamic vectors */
  133. cf_ide_resources[2].start = cf_ide_resources[2].end =
  134. irq_find_mapping(se7722_irq_domain, SE7722_FPGA_IRQ_MRSHPC0);
  135. smc91x_eth_resources[1].start = smc91x_eth_resources[1].end =
  136. irq_find_mapping(se7722_irq_domain, SE7722_FPGA_IRQ_SMC);
  137. return platform_add_devices(se7722_devices, ARRAY_SIZE(se7722_devices));
  138. }
  139. device_initcall(se7722_devices_setup);
  140. static void __init se7722_setup(char **cmdline_p)
  141. {
  142. __raw_writew(0x010D, FPGA_OUT); /* FPGA */
  143. __raw_writew(0x0000, PORT_PECR); /* PORT E 1 = IRQ5 ,E 0 = BS */
  144. __raw_writew(0x1000, PORT_PJCR); /* PORT J 1 = IRQ1,J 0 =IRQ0 */
  145. /* LCDC I/O */
  146. __raw_writew(0x0020, PORT_PSELD);
  147. /* SIOF1*/
  148. __raw_writew(0x0003, PORT_PSELB);
  149. __raw_writew(0xe000, PORT_PSELC);
  150. __raw_writew(0x0000, PORT_PKCR);
  151. /* LCDC */
  152. __raw_writew(0x4020, PORT_PHCR);
  153. __raw_writew(0x0000, PORT_PLCR);
  154. __raw_writew(0x0000, PORT_PMCR);
  155. __raw_writew(0x0002, PORT_PRCR);
  156. __raw_writew(0x0000, PORT_PXCR); /* LCDC,CS6A */
  157. /* KEYSC */
  158. __raw_writew(0x0A10, PORT_PSELA); /* BS,SHHID2 */
  159. __raw_writew(0x0000, PORT_PYCR);
  160. __raw_writew(0x0000, PORT_PZCR);
  161. __raw_writew(__raw_readw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA);
  162. __raw_writew(__raw_readw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC);
  163. }
  164. /*
  165. * The Machine Vector
  166. */
  167. static struct sh_machine_vector mv_se7722 __initmv = {
  168. .mv_name = "Solution Engine 7722" ,
  169. .mv_setup = se7722_setup ,
  170. .mv_init_irq = init_se7722_IRQ,
  171. };