qla_init.c 107 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2008 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include <linux/delay.h>
  9. #include <linux/vmalloc.h>
  10. #include "qla_devtbl.h"
  11. #ifdef CONFIG_SPARC
  12. #include <asm/prom.h>
  13. #endif
  14. /*
  15. * QLogic ISP2x00 Hardware Support Function Prototypes.
  16. */
  17. static int qla2x00_isp_firmware(scsi_qla_host_t *);
  18. static void qla2x00_resize_request_q(scsi_qla_host_t *);
  19. static int qla2x00_setup_chip(scsi_qla_host_t *);
  20. static void qla2x00_init_response_q_entries(scsi_qla_host_t *);
  21. static int qla2x00_init_rings(scsi_qla_host_t *);
  22. static int qla2x00_fw_ready(scsi_qla_host_t *);
  23. static int qla2x00_configure_hba(scsi_qla_host_t *);
  24. static int qla2x00_configure_loop(scsi_qla_host_t *);
  25. static int qla2x00_configure_local_loop(scsi_qla_host_t *);
  26. static int qla2x00_configure_fabric(scsi_qla_host_t *);
  27. static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
  28. static int qla2x00_device_resync(scsi_qla_host_t *);
  29. static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
  30. uint16_t *);
  31. static int qla2x00_restart_isp(scsi_qla_host_t *);
  32. static int qla2x00_find_new_loop_id(scsi_qla_host_t *ha, fc_port_t *dev);
  33. static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
  34. static int qla84xx_init_chip(scsi_qla_host_t *);
  35. /****************************************************************************/
  36. /* QLogic ISP2x00 Hardware Support Functions. */
  37. /****************************************************************************/
  38. /*
  39. * qla2x00_initialize_adapter
  40. * Initialize board.
  41. *
  42. * Input:
  43. * ha = adapter block pointer.
  44. *
  45. * Returns:
  46. * 0 = success
  47. */
  48. int
  49. qla2x00_initialize_adapter(scsi_qla_host_t *ha)
  50. {
  51. int rval;
  52. /* Clear adapter flags. */
  53. ha->flags.online = 0;
  54. ha->flags.reset_active = 0;
  55. atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
  56. atomic_set(&ha->loop_state, LOOP_DOWN);
  57. ha->device_flags = DFLG_NO_CABLE;
  58. ha->dpc_flags = 0;
  59. ha->flags.management_server_logged_in = 0;
  60. ha->marker_needed = 0;
  61. ha->mbx_flags = 0;
  62. ha->isp_abort_cnt = 0;
  63. ha->beacon_blink_led = 0;
  64. set_bit(REGISTER_FDMI_NEEDED, &ha->dpc_flags);
  65. qla_printk(KERN_INFO, ha, "Configuring PCI space...\n");
  66. rval = ha->isp_ops->pci_config(ha);
  67. if (rval) {
  68. DEBUG2(printk("scsi(%ld): Unable to configure PCI space.\n",
  69. ha->host_no));
  70. return (rval);
  71. }
  72. ha->isp_ops->reset_chip(ha);
  73. ha->isp_ops->get_flash_version(ha, ha->request_ring);
  74. qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n");
  75. ha->isp_ops->nvram_config(ha);
  76. if (ha->flags.disable_serdes) {
  77. /* Mask HBA via NVRAM settings? */
  78. qla_printk(KERN_INFO, ha, "Masking HBA WWPN "
  79. "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
  80. ha->port_name[0], ha->port_name[1],
  81. ha->port_name[2], ha->port_name[3],
  82. ha->port_name[4], ha->port_name[5],
  83. ha->port_name[6], ha->port_name[7]);
  84. return QLA_FUNCTION_FAILED;
  85. }
  86. qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n");
  87. if (qla2x00_isp_firmware(ha) != QLA_SUCCESS) {
  88. rval = ha->isp_ops->chip_diag(ha);
  89. if (rval)
  90. return (rval);
  91. rval = qla2x00_setup_chip(ha);
  92. if (rval)
  93. return (rval);
  94. qla2xxx_get_flash_info(ha);
  95. }
  96. if (IS_QLA84XX(ha)) {
  97. ha->cs84xx = qla84xx_get_chip(ha);
  98. if (!ha->cs84xx) {
  99. qla_printk(KERN_ERR, ha,
  100. "Unable to configure ISP84XX.\n");
  101. return QLA_FUNCTION_FAILED;
  102. }
  103. }
  104. rval = qla2x00_init_rings(ha);
  105. return (rval);
  106. }
  107. /**
  108. * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
  109. * @ha: HA context
  110. *
  111. * Returns 0 on success.
  112. */
  113. int
  114. qla2100_pci_config(scsi_qla_host_t *ha)
  115. {
  116. uint16_t w;
  117. uint32_t d;
  118. unsigned long flags;
  119. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  120. pci_set_master(ha->pdev);
  121. pci_try_set_mwi(ha->pdev);
  122. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  123. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  124. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  125. /* Reset expansion ROM address decode enable */
  126. pci_read_config_dword(ha->pdev, PCI_ROM_ADDRESS, &d);
  127. d &= ~PCI_ROM_ADDRESS_ENABLE;
  128. pci_write_config_dword(ha->pdev, PCI_ROM_ADDRESS, d);
  129. /* Get PCI bus information. */
  130. spin_lock_irqsave(&ha->hardware_lock, flags);
  131. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  132. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  133. return QLA_SUCCESS;
  134. }
  135. /**
  136. * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
  137. * @ha: HA context
  138. *
  139. * Returns 0 on success.
  140. */
  141. int
  142. qla2300_pci_config(scsi_qla_host_t *ha)
  143. {
  144. uint16_t w;
  145. uint32_t d;
  146. unsigned long flags = 0;
  147. uint32_t cnt;
  148. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  149. pci_set_master(ha->pdev);
  150. pci_try_set_mwi(ha->pdev);
  151. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  152. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  153. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  154. w &= ~PCI_COMMAND_INTX_DISABLE;
  155. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  156. /*
  157. * If this is a 2300 card and not 2312, reset the
  158. * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
  159. * the 2310 also reports itself as a 2300 so we need to get the
  160. * fb revision level -- a 6 indicates it really is a 2300 and
  161. * not a 2310.
  162. */
  163. if (IS_QLA2300(ha)) {
  164. spin_lock_irqsave(&ha->hardware_lock, flags);
  165. /* Pause RISC. */
  166. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  167. for (cnt = 0; cnt < 30000; cnt++) {
  168. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
  169. break;
  170. udelay(10);
  171. }
  172. /* Select FPM registers. */
  173. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  174. RD_REG_WORD(&reg->ctrl_status);
  175. /* Get the fb rev level */
  176. ha->fb_rev = RD_FB_CMD_REG(ha, reg);
  177. if (ha->fb_rev == FPM_2300)
  178. pci_clear_mwi(ha->pdev);
  179. /* Deselect FPM registers. */
  180. WRT_REG_WORD(&reg->ctrl_status, 0x0);
  181. RD_REG_WORD(&reg->ctrl_status);
  182. /* Release RISC module. */
  183. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  184. for (cnt = 0; cnt < 30000; cnt++) {
  185. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
  186. break;
  187. udelay(10);
  188. }
  189. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  190. }
  191. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  192. /* Reset expansion ROM address decode enable */
  193. pci_read_config_dword(ha->pdev, PCI_ROM_ADDRESS, &d);
  194. d &= ~PCI_ROM_ADDRESS_ENABLE;
  195. pci_write_config_dword(ha->pdev, PCI_ROM_ADDRESS, d);
  196. /* Get PCI bus information. */
  197. spin_lock_irqsave(&ha->hardware_lock, flags);
  198. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  199. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  200. return QLA_SUCCESS;
  201. }
  202. /**
  203. * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
  204. * @ha: HA context
  205. *
  206. * Returns 0 on success.
  207. */
  208. int
  209. qla24xx_pci_config(scsi_qla_host_t *ha)
  210. {
  211. uint16_t w;
  212. uint32_t d;
  213. unsigned long flags = 0;
  214. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  215. pci_set_master(ha->pdev);
  216. pci_try_set_mwi(ha->pdev);
  217. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  218. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  219. w &= ~PCI_COMMAND_INTX_DISABLE;
  220. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  221. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  222. /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
  223. if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
  224. pcix_set_mmrbc(ha->pdev, 2048);
  225. /* PCIe -- adjust Maximum Read Request Size (2048). */
  226. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  227. pcie_set_readrq(ha->pdev, 2048);
  228. /* Reset expansion ROM address decode enable */
  229. pci_read_config_dword(ha->pdev, PCI_ROM_ADDRESS, &d);
  230. d &= ~PCI_ROM_ADDRESS_ENABLE;
  231. pci_write_config_dword(ha->pdev, PCI_ROM_ADDRESS, d);
  232. ha->chip_revision = ha->pdev->revision;
  233. /* Get PCI bus information. */
  234. spin_lock_irqsave(&ha->hardware_lock, flags);
  235. ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
  236. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  237. return QLA_SUCCESS;
  238. }
  239. /**
  240. * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
  241. * @ha: HA context
  242. *
  243. * Returns 0 on success.
  244. */
  245. int
  246. qla25xx_pci_config(scsi_qla_host_t *ha)
  247. {
  248. uint16_t w;
  249. uint32_t d;
  250. pci_set_master(ha->pdev);
  251. pci_try_set_mwi(ha->pdev);
  252. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  253. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  254. w &= ~PCI_COMMAND_INTX_DISABLE;
  255. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  256. /* PCIe -- adjust Maximum Read Request Size (2048). */
  257. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  258. pcie_set_readrq(ha->pdev, 2048);
  259. /* Reset expansion ROM address decode enable */
  260. pci_read_config_dword(ha->pdev, PCI_ROM_ADDRESS, &d);
  261. d &= ~PCI_ROM_ADDRESS_ENABLE;
  262. pci_write_config_dword(ha->pdev, PCI_ROM_ADDRESS, d);
  263. ha->chip_revision = ha->pdev->revision;
  264. return QLA_SUCCESS;
  265. }
  266. /**
  267. * qla2x00_isp_firmware() - Choose firmware image.
  268. * @ha: HA context
  269. *
  270. * Returns 0 on success.
  271. */
  272. static int
  273. qla2x00_isp_firmware(scsi_qla_host_t *ha)
  274. {
  275. int rval;
  276. /* Assume loading risc code */
  277. rval = QLA_FUNCTION_FAILED;
  278. if (ha->flags.disable_risc_code_load) {
  279. DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n",
  280. ha->host_no));
  281. qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n");
  282. /* Verify checksum of loaded RISC code. */
  283. rval = qla2x00_verify_checksum(ha, ha->fw_srisc_address);
  284. }
  285. if (rval) {
  286. DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n",
  287. ha->host_no));
  288. }
  289. return (rval);
  290. }
  291. /**
  292. * qla2x00_reset_chip() - Reset ISP chip.
  293. * @ha: HA context
  294. *
  295. * Returns 0 on success.
  296. */
  297. void
  298. qla2x00_reset_chip(scsi_qla_host_t *ha)
  299. {
  300. unsigned long flags = 0;
  301. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  302. uint32_t cnt;
  303. uint16_t cmd;
  304. ha->isp_ops->disable_intrs(ha);
  305. spin_lock_irqsave(&ha->hardware_lock, flags);
  306. /* Turn off master enable */
  307. cmd = 0;
  308. pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
  309. cmd &= ~PCI_COMMAND_MASTER;
  310. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  311. if (!IS_QLA2100(ha)) {
  312. /* Pause RISC. */
  313. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  314. if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
  315. for (cnt = 0; cnt < 30000; cnt++) {
  316. if ((RD_REG_WORD(&reg->hccr) &
  317. HCCR_RISC_PAUSE) != 0)
  318. break;
  319. udelay(100);
  320. }
  321. } else {
  322. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  323. udelay(10);
  324. }
  325. /* Select FPM registers. */
  326. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  327. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  328. /* FPM Soft Reset. */
  329. WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
  330. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  331. /* Toggle Fpm Reset. */
  332. if (!IS_QLA2200(ha)) {
  333. WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
  334. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  335. }
  336. /* Select frame buffer registers. */
  337. WRT_REG_WORD(&reg->ctrl_status, 0x10);
  338. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  339. /* Reset frame buffer FIFOs. */
  340. if (IS_QLA2200(ha)) {
  341. WRT_FB_CMD_REG(ha, reg, 0xa000);
  342. RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
  343. } else {
  344. WRT_FB_CMD_REG(ha, reg, 0x00fc);
  345. /* Read back fb_cmd until zero or 3 seconds max */
  346. for (cnt = 0; cnt < 3000; cnt++) {
  347. if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
  348. break;
  349. udelay(100);
  350. }
  351. }
  352. /* Select RISC module registers. */
  353. WRT_REG_WORD(&reg->ctrl_status, 0);
  354. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  355. /* Reset RISC processor. */
  356. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  357. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  358. /* Release RISC processor. */
  359. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  360. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  361. }
  362. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  363. WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
  364. /* Reset ISP chip. */
  365. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  366. /* Wait for RISC to recover from reset. */
  367. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  368. /*
  369. * It is necessary to for a delay here since the card doesn't
  370. * respond to PCI reads during a reset. On some architectures
  371. * this will result in an MCA.
  372. */
  373. udelay(20);
  374. for (cnt = 30000; cnt; cnt--) {
  375. if ((RD_REG_WORD(&reg->ctrl_status) &
  376. CSR_ISP_SOFT_RESET) == 0)
  377. break;
  378. udelay(100);
  379. }
  380. } else
  381. udelay(10);
  382. /* Reset RISC processor. */
  383. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  384. WRT_REG_WORD(&reg->semaphore, 0);
  385. /* Release RISC processor. */
  386. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  387. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  388. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  389. for (cnt = 0; cnt < 30000; cnt++) {
  390. if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
  391. break;
  392. udelay(100);
  393. }
  394. } else
  395. udelay(100);
  396. /* Turn on master enable */
  397. cmd |= PCI_COMMAND_MASTER;
  398. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  399. /* Disable RISC pause on FPM parity error. */
  400. if (!IS_QLA2100(ha)) {
  401. WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
  402. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  403. }
  404. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  405. }
  406. /**
  407. * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
  408. * @ha: HA context
  409. *
  410. * Returns 0 on success.
  411. */
  412. static inline void
  413. qla24xx_reset_risc(scsi_qla_host_t *ha)
  414. {
  415. int hw_evt = 0;
  416. unsigned long flags = 0;
  417. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  418. uint32_t cnt, d2;
  419. uint16_t wd;
  420. spin_lock_irqsave(&ha->hardware_lock, flags);
  421. /* Reset RISC. */
  422. WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  423. for (cnt = 0; cnt < 30000; cnt++) {
  424. if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
  425. break;
  426. udelay(10);
  427. }
  428. WRT_REG_DWORD(&reg->ctrl_status,
  429. CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  430. pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
  431. udelay(100);
  432. /* Wait for firmware to complete NVRAM accesses. */
  433. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  434. for (cnt = 10000 ; cnt && d2; cnt--) {
  435. udelay(5);
  436. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  437. barrier();
  438. }
  439. if (cnt == 0)
  440. hw_evt = 1;
  441. /* Wait for soft-reset to complete. */
  442. d2 = RD_REG_DWORD(&reg->ctrl_status);
  443. for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
  444. udelay(5);
  445. d2 = RD_REG_DWORD(&reg->ctrl_status);
  446. barrier();
  447. }
  448. if (cnt == 0 || hw_evt)
  449. qla2xxx_hw_event_log(ha, HW_EVENT_RESET_ERR,
  450. RD_REG_WORD(&reg->mailbox1), RD_REG_WORD(&reg->mailbox2),
  451. RD_REG_WORD(&reg->mailbox3));
  452. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  453. RD_REG_DWORD(&reg->hccr);
  454. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  455. RD_REG_DWORD(&reg->hccr);
  456. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
  457. RD_REG_DWORD(&reg->hccr);
  458. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  459. for (cnt = 6000000 ; cnt && d2; cnt--) {
  460. udelay(5);
  461. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  462. barrier();
  463. }
  464. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  465. }
  466. /**
  467. * qla24xx_reset_chip() - Reset ISP24xx chip.
  468. * @ha: HA context
  469. *
  470. * Returns 0 on success.
  471. */
  472. void
  473. qla24xx_reset_chip(scsi_qla_host_t *ha)
  474. {
  475. ha->isp_ops->disable_intrs(ha);
  476. /* Perform RISC reset. */
  477. qla24xx_reset_risc(ha);
  478. }
  479. /**
  480. * qla2x00_chip_diag() - Test chip for proper operation.
  481. * @ha: HA context
  482. *
  483. * Returns 0 on success.
  484. */
  485. int
  486. qla2x00_chip_diag(scsi_qla_host_t *ha)
  487. {
  488. int rval;
  489. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  490. unsigned long flags = 0;
  491. uint16_t data;
  492. uint32_t cnt;
  493. uint16_t mb[5];
  494. /* Assume a failed state */
  495. rval = QLA_FUNCTION_FAILED;
  496. DEBUG3(printk("scsi(%ld): Testing device at %lx.\n",
  497. ha->host_no, (u_long)&reg->flash_address));
  498. spin_lock_irqsave(&ha->hardware_lock, flags);
  499. /* Reset ISP chip. */
  500. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  501. /*
  502. * We need to have a delay here since the card will not respond while
  503. * in reset causing an MCA on some architectures.
  504. */
  505. udelay(20);
  506. data = qla2x00_debounce_register(&reg->ctrl_status);
  507. for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
  508. udelay(5);
  509. data = RD_REG_WORD(&reg->ctrl_status);
  510. barrier();
  511. }
  512. if (!cnt)
  513. goto chip_diag_failed;
  514. DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n",
  515. ha->host_no));
  516. /* Reset RISC processor. */
  517. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  518. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  519. /* Workaround for QLA2312 PCI parity error */
  520. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  521. data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
  522. for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
  523. udelay(5);
  524. data = RD_MAILBOX_REG(ha, reg, 0);
  525. barrier();
  526. }
  527. } else
  528. udelay(10);
  529. if (!cnt)
  530. goto chip_diag_failed;
  531. /* Check product ID of chip */
  532. DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", ha->host_no));
  533. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  534. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  535. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  536. mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
  537. if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
  538. mb[3] != PROD_ID_3) {
  539. qla_printk(KERN_WARNING, ha,
  540. "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]);
  541. goto chip_diag_failed;
  542. }
  543. ha->product_id[0] = mb[1];
  544. ha->product_id[1] = mb[2];
  545. ha->product_id[2] = mb[3];
  546. ha->product_id[3] = mb[4];
  547. /* Adjust fw RISC transfer size */
  548. if (ha->request_q_length > 1024)
  549. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
  550. else
  551. ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
  552. ha->request_q_length;
  553. if (IS_QLA2200(ha) &&
  554. RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
  555. /* Limit firmware transfer size with a 2200A */
  556. DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n",
  557. ha->host_no));
  558. ha->device_type |= DT_ISP2200A;
  559. ha->fw_transfer_size = 128;
  560. }
  561. /* Wrap Incoming Mailboxes Test. */
  562. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  563. DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", ha->host_no));
  564. rval = qla2x00_mbx_reg_test(ha);
  565. if (rval) {
  566. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  567. ha->host_no));
  568. qla_printk(KERN_WARNING, ha,
  569. "Failed mailbox send register test\n");
  570. }
  571. else {
  572. /* Flag a successful rval */
  573. rval = QLA_SUCCESS;
  574. }
  575. spin_lock_irqsave(&ha->hardware_lock, flags);
  576. chip_diag_failed:
  577. if (rval)
  578. DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED "
  579. "****\n", ha->host_no));
  580. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  581. return (rval);
  582. }
  583. /**
  584. * qla24xx_chip_diag() - Test ISP24xx for proper operation.
  585. * @ha: HA context
  586. *
  587. * Returns 0 on success.
  588. */
  589. int
  590. qla24xx_chip_diag(scsi_qla_host_t *ha)
  591. {
  592. int rval;
  593. /* Perform RISC reset. */
  594. qla24xx_reset_risc(ha);
  595. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
  596. rval = qla2x00_mbx_reg_test(ha);
  597. if (rval) {
  598. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  599. ha->host_no));
  600. qla_printk(KERN_WARNING, ha,
  601. "Failed mailbox send register test\n");
  602. } else {
  603. /* Flag a successful rval */
  604. rval = QLA_SUCCESS;
  605. }
  606. return rval;
  607. }
  608. void
  609. qla2x00_alloc_fw_dump(scsi_qla_host_t *ha)
  610. {
  611. int rval;
  612. uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
  613. eft_size, fce_size;
  614. dma_addr_t tc_dma;
  615. void *tc;
  616. if (ha->fw_dump) {
  617. qla_printk(KERN_WARNING, ha,
  618. "Firmware dump previously allocated.\n");
  619. return;
  620. }
  621. ha->fw_dumped = 0;
  622. fixed_size = mem_size = eft_size = fce_size = 0;
  623. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  624. fixed_size = sizeof(struct qla2100_fw_dump);
  625. } else if (IS_QLA23XX(ha)) {
  626. fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
  627. mem_size = (ha->fw_memory_size - 0x11000 + 1) *
  628. sizeof(uint16_t);
  629. } else if (IS_FWI2_CAPABLE(ha)) {
  630. fixed_size = IS_QLA25XX(ha) ?
  631. offsetof(struct qla25xx_fw_dump, ext_mem):
  632. offsetof(struct qla24xx_fw_dump, ext_mem);
  633. mem_size = (ha->fw_memory_size - 0x100000 + 1) *
  634. sizeof(uint32_t);
  635. /* Allocate memory for Fibre Channel Event Buffer. */
  636. if (!IS_QLA25XX(ha))
  637. goto try_eft;
  638. tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
  639. GFP_KERNEL);
  640. if (!tc) {
  641. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  642. "(%d KB) for FCE.\n", FCE_SIZE / 1024);
  643. goto try_eft;
  644. }
  645. memset(tc, 0, FCE_SIZE);
  646. rval = qla2x00_enable_fce_trace(ha, tc_dma, FCE_NUM_BUFFERS,
  647. ha->fce_mb, &ha->fce_bufs);
  648. if (rval) {
  649. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  650. "FCE (%d).\n", rval);
  651. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
  652. tc_dma);
  653. ha->flags.fce_enabled = 0;
  654. goto try_eft;
  655. }
  656. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for FCE...\n",
  657. FCE_SIZE / 1024);
  658. fce_size = sizeof(struct qla2xxx_fce_chain) + EFT_SIZE;
  659. ha->flags.fce_enabled = 1;
  660. ha->fce_dma = tc_dma;
  661. ha->fce = tc;
  662. try_eft:
  663. /* Allocate memory for Extended Trace Buffer. */
  664. tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
  665. GFP_KERNEL);
  666. if (!tc) {
  667. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  668. "(%d KB) for EFT.\n", EFT_SIZE / 1024);
  669. goto cont_alloc;
  670. }
  671. memset(tc, 0, EFT_SIZE);
  672. rval = qla2x00_enable_eft_trace(ha, tc_dma, EFT_NUM_BUFFERS);
  673. if (rval) {
  674. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  675. "EFT (%d).\n", rval);
  676. dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
  677. tc_dma);
  678. goto cont_alloc;
  679. }
  680. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for EFT...\n",
  681. EFT_SIZE / 1024);
  682. eft_size = EFT_SIZE;
  683. ha->eft_dma = tc_dma;
  684. ha->eft = tc;
  685. }
  686. cont_alloc:
  687. req_q_size = ha->request_q_length * sizeof(request_t);
  688. rsp_q_size = ha->response_q_length * sizeof(response_t);
  689. dump_size = offsetof(struct qla2xxx_fw_dump, isp);
  690. dump_size += fixed_size + mem_size + req_q_size + rsp_q_size +
  691. eft_size + fce_size;
  692. ha->fw_dump = vmalloc(dump_size);
  693. if (!ha->fw_dump) {
  694. qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for "
  695. "firmware dump!!!\n", dump_size / 1024);
  696. if (ha->eft) {
  697. dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
  698. ha->eft_dma);
  699. ha->eft = NULL;
  700. ha->eft_dma = 0;
  701. }
  702. return;
  703. }
  704. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware dump...\n",
  705. dump_size / 1024);
  706. ha->fw_dump_len = dump_size;
  707. ha->fw_dump->signature[0] = 'Q';
  708. ha->fw_dump->signature[1] = 'L';
  709. ha->fw_dump->signature[2] = 'G';
  710. ha->fw_dump->signature[3] = 'C';
  711. ha->fw_dump->version = __constant_htonl(1);
  712. ha->fw_dump->fixed_size = htonl(fixed_size);
  713. ha->fw_dump->mem_size = htonl(mem_size);
  714. ha->fw_dump->req_q_size = htonl(req_q_size);
  715. ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
  716. ha->fw_dump->eft_size = htonl(eft_size);
  717. ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
  718. ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
  719. ha->fw_dump->header_size =
  720. htonl(offsetof(struct qla2xxx_fw_dump, isp));
  721. }
  722. /**
  723. * qla2x00_resize_request_q() - Resize request queue given available ISP memory.
  724. * @ha: HA context
  725. *
  726. * Returns 0 on success.
  727. */
  728. static void
  729. qla2x00_resize_request_q(scsi_qla_host_t *ha)
  730. {
  731. int rval;
  732. uint16_t fw_iocb_cnt = 0;
  733. uint16_t request_q_length = REQUEST_ENTRY_CNT_2XXX_EXT_MEM;
  734. dma_addr_t request_dma;
  735. request_t *request_ring;
  736. /* Valid only on recent ISPs. */
  737. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  738. return;
  739. /* Retrieve IOCB counts available to the firmware. */
  740. rval = qla2x00_get_resource_cnts(ha, NULL, NULL, NULL, &fw_iocb_cnt,
  741. &ha->max_npiv_vports);
  742. if (rval)
  743. return;
  744. /* No point in continuing if current settings are sufficient. */
  745. if (fw_iocb_cnt < 1024)
  746. return;
  747. if (ha->request_q_length >= request_q_length)
  748. return;
  749. /* Attempt to claim larger area for request queue. */
  750. request_ring = dma_alloc_coherent(&ha->pdev->dev,
  751. (request_q_length + 1) * sizeof(request_t), &request_dma,
  752. GFP_KERNEL);
  753. if (request_ring == NULL)
  754. return;
  755. /* Resize successful, report extensions. */
  756. qla_printk(KERN_INFO, ha, "Extended memory detected (%d KB)...\n",
  757. (ha->fw_memory_size + 1) / 1024);
  758. qla_printk(KERN_INFO, ha, "Resizing request queue depth "
  759. "(%d -> %d)...\n", ha->request_q_length, request_q_length);
  760. /* Clear old allocations. */
  761. dma_free_coherent(&ha->pdev->dev,
  762. (ha->request_q_length + 1) * sizeof(request_t), ha->request_ring,
  763. ha->request_dma);
  764. /* Begin using larger queue. */
  765. ha->request_q_length = request_q_length;
  766. ha->request_ring = request_ring;
  767. ha->request_dma = request_dma;
  768. }
  769. /**
  770. * qla2x00_setup_chip() - Load and start RISC firmware.
  771. * @ha: HA context
  772. *
  773. * Returns 0 on success.
  774. */
  775. static int
  776. qla2x00_setup_chip(scsi_qla_host_t *ha)
  777. {
  778. int rval;
  779. uint32_t srisc_address = 0;
  780. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  781. unsigned long flags;
  782. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  783. /* Disable SRAM, Instruction RAM and GP RAM parity. */
  784. spin_lock_irqsave(&ha->hardware_lock, flags);
  785. WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
  786. RD_REG_WORD(&reg->hccr);
  787. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  788. }
  789. /* Load firmware sequences */
  790. rval = ha->isp_ops->load_risc(ha, &srisc_address);
  791. if (rval == QLA_SUCCESS) {
  792. DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC "
  793. "code.\n", ha->host_no));
  794. rval = qla2x00_verify_checksum(ha, srisc_address);
  795. if (rval == QLA_SUCCESS) {
  796. /* Start firmware execution. */
  797. DEBUG(printk("scsi(%ld): Checksum OK, start "
  798. "firmware.\n", ha->host_no));
  799. rval = qla2x00_execute_fw(ha, srisc_address);
  800. /* Retrieve firmware information. */
  801. if (rval == QLA_SUCCESS && ha->fw_major_version == 0) {
  802. qla2x00_get_fw_version(ha,
  803. &ha->fw_major_version,
  804. &ha->fw_minor_version,
  805. &ha->fw_subminor_version,
  806. &ha->fw_attributes, &ha->fw_memory_size);
  807. qla2x00_resize_request_q(ha);
  808. ha->flags.npiv_supported = 0;
  809. if ((IS_QLA24XX(ha) || IS_QLA25XX(ha)) &&
  810. (ha->fw_attributes & BIT_2)) {
  811. ha->flags.npiv_supported = 1;
  812. if ((!ha->max_npiv_vports) ||
  813. ((ha->max_npiv_vports + 1) %
  814. MIN_MULTI_ID_FABRIC))
  815. ha->max_npiv_vports =
  816. MIN_MULTI_ID_FABRIC - 1;
  817. }
  818. if (ql2xallocfwdump)
  819. qla2x00_alloc_fw_dump(ha);
  820. }
  821. } else {
  822. DEBUG2(printk(KERN_INFO
  823. "scsi(%ld): ISP Firmware failed checksum.\n",
  824. ha->host_no));
  825. }
  826. }
  827. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  828. /* Enable proper parity. */
  829. spin_lock_irqsave(&ha->hardware_lock, flags);
  830. if (IS_QLA2300(ha))
  831. /* SRAM parity */
  832. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
  833. else
  834. /* SRAM, Instruction RAM and GP RAM parity */
  835. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
  836. RD_REG_WORD(&reg->hccr);
  837. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  838. }
  839. if (rval) {
  840. DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n",
  841. ha->host_no));
  842. }
  843. return (rval);
  844. }
  845. /**
  846. * qla2x00_init_response_q_entries() - Initializes response queue entries.
  847. * @ha: HA context
  848. *
  849. * Beginning of request ring has initialization control block already built
  850. * by nvram config routine.
  851. *
  852. * Returns 0 on success.
  853. */
  854. static void
  855. qla2x00_init_response_q_entries(scsi_qla_host_t *ha)
  856. {
  857. uint16_t cnt;
  858. response_t *pkt;
  859. pkt = ha->response_ring_ptr;
  860. for (cnt = 0; cnt < ha->response_q_length; cnt++) {
  861. pkt->signature = RESPONSE_PROCESSED;
  862. pkt++;
  863. }
  864. }
  865. /**
  866. * qla2x00_update_fw_options() - Read and process firmware options.
  867. * @ha: HA context
  868. *
  869. * Returns 0 on success.
  870. */
  871. void
  872. qla2x00_update_fw_options(scsi_qla_host_t *ha)
  873. {
  874. uint16_t swing, emphasis, tx_sens, rx_sens;
  875. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  876. qla2x00_get_fw_options(ha, ha->fw_options);
  877. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  878. return;
  879. /* Serial Link options. */
  880. DEBUG3(printk("scsi(%ld): Serial link options:\n",
  881. ha->host_no));
  882. DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options,
  883. sizeof(ha->fw_seriallink_options)));
  884. ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
  885. if (ha->fw_seriallink_options[3] & BIT_2) {
  886. ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
  887. /* 1G settings */
  888. swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
  889. emphasis = (ha->fw_seriallink_options[2] &
  890. (BIT_4 | BIT_3)) >> 3;
  891. tx_sens = ha->fw_seriallink_options[0] &
  892. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  893. rx_sens = (ha->fw_seriallink_options[0] &
  894. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  895. ha->fw_options[10] = (emphasis << 14) | (swing << 8);
  896. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  897. if (rx_sens == 0x0)
  898. rx_sens = 0x3;
  899. ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
  900. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  901. ha->fw_options[10] |= BIT_5 |
  902. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  903. (tx_sens & (BIT_1 | BIT_0));
  904. /* 2G settings */
  905. swing = (ha->fw_seriallink_options[2] &
  906. (BIT_7 | BIT_6 | BIT_5)) >> 5;
  907. emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
  908. tx_sens = ha->fw_seriallink_options[1] &
  909. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  910. rx_sens = (ha->fw_seriallink_options[1] &
  911. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  912. ha->fw_options[11] = (emphasis << 14) | (swing << 8);
  913. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  914. if (rx_sens == 0x0)
  915. rx_sens = 0x3;
  916. ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
  917. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  918. ha->fw_options[11] |= BIT_5 |
  919. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  920. (tx_sens & (BIT_1 | BIT_0));
  921. }
  922. /* FCP2 options. */
  923. /* Return command IOCBs without waiting for an ABTS to complete. */
  924. ha->fw_options[3] |= BIT_13;
  925. /* LED scheme. */
  926. if (ha->flags.enable_led_scheme)
  927. ha->fw_options[2] |= BIT_12;
  928. /* Detect ISP6312. */
  929. if (IS_QLA6312(ha))
  930. ha->fw_options[2] |= BIT_13;
  931. /* Update firmware options. */
  932. qla2x00_set_fw_options(ha, ha->fw_options);
  933. }
  934. void
  935. qla24xx_update_fw_options(scsi_qla_host_t *ha)
  936. {
  937. int rval;
  938. /* Update Serial Link options. */
  939. if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
  940. return;
  941. rval = qla2x00_set_serdes_params(ha,
  942. le16_to_cpu(ha->fw_seriallink_options24[1]),
  943. le16_to_cpu(ha->fw_seriallink_options24[2]),
  944. le16_to_cpu(ha->fw_seriallink_options24[3]));
  945. if (rval != QLA_SUCCESS) {
  946. qla_printk(KERN_WARNING, ha,
  947. "Unable to update Serial Link options (%x).\n", rval);
  948. }
  949. }
  950. void
  951. qla2x00_config_rings(struct scsi_qla_host *ha)
  952. {
  953. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  954. /* Setup ring parameters in initialization control block. */
  955. ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
  956. ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
  957. ha->init_cb->request_q_length = cpu_to_le16(ha->request_q_length);
  958. ha->init_cb->response_q_length = cpu_to_le16(ha->response_q_length);
  959. ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(ha->request_dma));
  960. ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(ha->request_dma));
  961. ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(ha->response_dma));
  962. ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(ha->response_dma));
  963. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
  964. WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
  965. WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
  966. WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
  967. RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
  968. }
  969. void
  970. qla24xx_config_rings(struct scsi_qla_host *ha)
  971. {
  972. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  973. struct init_cb_24xx *icb;
  974. /* Setup ring parameters in initialization control block. */
  975. icb = (struct init_cb_24xx *)ha->init_cb;
  976. icb->request_q_outpointer = __constant_cpu_to_le16(0);
  977. icb->response_q_inpointer = __constant_cpu_to_le16(0);
  978. icb->request_q_length = cpu_to_le16(ha->request_q_length);
  979. icb->response_q_length = cpu_to_le16(ha->response_q_length);
  980. icb->request_q_address[0] = cpu_to_le32(LSD(ha->request_dma));
  981. icb->request_q_address[1] = cpu_to_le32(MSD(ha->request_dma));
  982. icb->response_q_address[0] = cpu_to_le32(LSD(ha->response_dma));
  983. icb->response_q_address[1] = cpu_to_le32(MSD(ha->response_dma));
  984. WRT_REG_DWORD(&reg->req_q_in, 0);
  985. WRT_REG_DWORD(&reg->req_q_out, 0);
  986. WRT_REG_DWORD(&reg->rsp_q_in, 0);
  987. WRT_REG_DWORD(&reg->rsp_q_out, 0);
  988. RD_REG_DWORD(&reg->rsp_q_out);
  989. }
  990. /**
  991. * qla2x00_init_rings() - Initializes firmware.
  992. * @ha: HA context
  993. *
  994. * Beginning of request ring has initialization control block already built
  995. * by nvram config routine.
  996. *
  997. * Returns 0 on success.
  998. */
  999. static int
  1000. qla2x00_init_rings(scsi_qla_host_t *ha)
  1001. {
  1002. int rval;
  1003. unsigned long flags = 0;
  1004. int cnt;
  1005. struct mid_init_cb_24xx *mid_init_cb =
  1006. (struct mid_init_cb_24xx *) ha->init_cb;
  1007. spin_lock_irqsave(&ha->hardware_lock, flags);
  1008. /* Clear outstanding commands array. */
  1009. for (cnt = 0; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
  1010. ha->outstanding_cmds[cnt] = NULL;
  1011. ha->current_outstanding_cmd = 0;
  1012. /* Clear RSCN queue. */
  1013. ha->rscn_in_ptr = 0;
  1014. ha->rscn_out_ptr = 0;
  1015. /* Initialize firmware. */
  1016. ha->request_ring_ptr = ha->request_ring;
  1017. ha->req_ring_index = 0;
  1018. ha->req_q_cnt = ha->request_q_length;
  1019. ha->response_ring_ptr = ha->response_ring;
  1020. ha->rsp_ring_index = 0;
  1021. /* Initialize response queue entries */
  1022. qla2x00_init_response_q_entries(ha);
  1023. ha->isp_ops->config_rings(ha);
  1024. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1025. /* Update any ISP specific firmware options before initialization. */
  1026. ha->isp_ops->update_fw_options(ha);
  1027. DEBUG(printk("scsi(%ld): Issue init firmware.\n", ha->host_no));
  1028. if (ha->flags.npiv_supported)
  1029. mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
  1030. mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
  1031. rval = qla2x00_init_firmware(ha, ha->init_cb_size);
  1032. if (rval) {
  1033. DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n",
  1034. ha->host_no));
  1035. } else {
  1036. DEBUG3(printk("scsi(%ld): Init firmware -- success.\n",
  1037. ha->host_no));
  1038. }
  1039. return (rval);
  1040. }
  1041. /**
  1042. * qla2x00_fw_ready() - Waits for firmware ready.
  1043. * @ha: HA context
  1044. *
  1045. * Returns 0 on success.
  1046. */
  1047. static int
  1048. qla2x00_fw_ready(scsi_qla_host_t *ha)
  1049. {
  1050. int rval;
  1051. unsigned long wtime, mtime, cs84xx_time;
  1052. uint16_t min_wait; /* Minimum wait time if loop is down */
  1053. uint16_t wait_time; /* Wait time if loop is coming ready */
  1054. uint16_t state[3];
  1055. rval = QLA_SUCCESS;
  1056. /* 20 seconds for loop down. */
  1057. min_wait = 20;
  1058. /*
  1059. * Firmware should take at most one RATOV to login, plus 5 seconds for
  1060. * our own processing.
  1061. */
  1062. if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
  1063. wait_time = min_wait;
  1064. }
  1065. /* Min wait time if loop down */
  1066. mtime = jiffies + (min_wait * HZ);
  1067. /* wait time before firmware ready */
  1068. wtime = jiffies + (wait_time * HZ);
  1069. /* Wait for ISP to finish LIP */
  1070. if (!ha->flags.init_done)
  1071. qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n");
  1072. DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n",
  1073. ha->host_no));
  1074. do {
  1075. rval = qla2x00_get_firmware_state(ha, state);
  1076. if (rval == QLA_SUCCESS) {
  1077. if (state[0] < FSTATE_LOSS_OF_SYNC) {
  1078. ha->device_flags &= ~DFLG_NO_CABLE;
  1079. }
  1080. if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
  1081. DEBUG16(printk("scsi(%ld): fw_state=%x "
  1082. "84xx=%x.\n", ha->host_no, state[0],
  1083. state[2]));
  1084. if ((state[2] & FSTATE_LOGGED_IN) &&
  1085. (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
  1086. DEBUG16(printk("scsi(%ld): Sending "
  1087. "verify iocb.\n", ha->host_no));
  1088. cs84xx_time = jiffies;
  1089. rval = qla84xx_init_chip(ha);
  1090. if (rval != QLA_SUCCESS)
  1091. break;
  1092. /* Add time taken to initialize. */
  1093. cs84xx_time = jiffies - cs84xx_time;
  1094. wtime += cs84xx_time;
  1095. mtime += cs84xx_time;
  1096. DEBUG16(printk("scsi(%ld): Increasing "
  1097. "wait time by %ld. New time %ld\n",
  1098. ha->host_no, cs84xx_time, wtime));
  1099. }
  1100. } else if (state[0] == FSTATE_READY) {
  1101. DEBUG(printk("scsi(%ld): F/W Ready - OK \n",
  1102. ha->host_no));
  1103. qla2x00_get_retry_cnt(ha, &ha->retry_count,
  1104. &ha->login_timeout, &ha->r_a_tov);
  1105. rval = QLA_SUCCESS;
  1106. break;
  1107. }
  1108. rval = QLA_FUNCTION_FAILED;
  1109. if (atomic_read(&ha->loop_down_timer) &&
  1110. state[0] != FSTATE_READY) {
  1111. /* Loop down. Timeout on min_wait for states
  1112. * other than Wait for Login.
  1113. */
  1114. if (time_after_eq(jiffies, mtime)) {
  1115. qla_printk(KERN_INFO, ha,
  1116. "Cable is unplugged...\n");
  1117. ha->device_flags |= DFLG_NO_CABLE;
  1118. break;
  1119. }
  1120. }
  1121. } else {
  1122. /* Mailbox cmd failed. Timeout on min_wait. */
  1123. if (time_after_eq(jiffies, mtime))
  1124. break;
  1125. }
  1126. if (time_after_eq(jiffies, wtime))
  1127. break;
  1128. /* Delay for a while */
  1129. msleep(500);
  1130. DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1131. ha->host_no, state[0], jiffies));
  1132. } while (1);
  1133. DEBUG(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1134. ha->host_no, state[0], jiffies));
  1135. if (rval) {
  1136. DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n",
  1137. ha->host_no));
  1138. }
  1139. return (rval);
  1140. }
  1141. /*
  1142. * qla2x00_configure_hba
  1143. * Setup adapter context.
  1144. *
  1145. * Input:
  1146. * ha = adapter state pointer.
  1147. *
  1148. * Returns:
  1149. * 0 = success
  1150. *
  1151. * Context:
  1152. * Kernel context.
  1153. */
  1154. static int
  1155. qla2x00_configure_hba(scsi_qla_host_t *ha)
  1156. {
  1157. int rval;
  1158. uint16_t loop_id;
  1159. uint16_t topo;
  1160. uint16_t sw_cap;
  1161. uint8_t al_pa;
  1162. uint8_t area;
  1163. uint8_t domain;
  1164. char connect_type[22];
  1165. /* Get host addresses. */
  1166. rval = qla2x00_get_adapter_id(ha,
  1167. &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
  1168. if (rval != QLA_SUCCESS) {
  1169. if (LOOP_TRANSITION(ha) || atomic_read(&ha->loop_down_timer) ||
  1170. (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
  1171. DEBUG2(printk("%s(%ld) Loop is in a transition state\n",
  1172. __func__, ha->host_no));
  1173. } else {
  1174. qla_printk(KERN_WARNING, ha,
  1175. "ERROR -- Unable to get host loop ID.\n");
  1176. set_bit(ISP_ABORT_NEEDED, &ha->dpc_flags);
  1177. }
  1178. return (rval);
  1179. }
  1180. if (topo == 4) {
  1181. qla_printk(KERN_INFO, ha,
  1182. "Cannot get topology - retrying.\n");
  1183. return (QLA_FUNCTION_FAILED);
  1184. }
  1185. ha->loop_id = loop_id;
  1186. /* initialize */
  1187. ha->min_external_loopid = SNS_FIRST_LOOP_ID;
  1188. ha->operating_mode = LOOP;
  1189. ha->switch_cap = 0;
  1190. switch (topo) {
  1191. case 0:
  1192. DEBUG3(printk("scsi(%ld): HBA in NL topology.\n",
  1193. ha->host_no));
  1194. ha->current_topology = ISP_CFG_NL;
  1195. strcpy(connect_type, "(Loop)");
  1196. break;
  1197. case 1:
  1198. DEBUG3(printk("scsi(%ld): HBA in FL topology.\n",
  1199. ha->host_no));
  1200. ha->switch_cap = sw_cap;
  1201. ha->current_topology = ISP_CFG_FL;
  1202. strcpy(connect_type, "(FL_Port)");
  1203. break;
  1204. case 2:
  1205. DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n",
  1206. ha->host_no));
  1207. ha->operating_mode = P2P;
  1208. ha->current_topology = ISP_CFG_N;
  1209. strcpy(connect_type, "(N_Port-to-N_Port)");
  1210. break;
  1211. case 3:
  1212. DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n",
  1213. ha->host_no));
  1214. ha->switch_cap = sw_cap;
  1215. ha->operating_mode = P2P;
  1216. ha->current_topology = ISP_CFG_F;
  1217. strcpy(connect_type, "(F_Port)");
  1218. break;
  1219. default:
  1220. DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. "
  1221. "Using NL.\n",
  1222. ha->host_no, topo));
  1223. ha->current_topology = ISP_CFG_NL;
  1224. strcpy(connect_type, "(Loop)");
  1225. break;
  1226. }
  1227. /* Save Host port and loop ID. */
  1228. /* byte order - Big Endian */
  1229. ha->d_id.b.domain = domain;
  1230. ha->d_id.b.area = area;
  1231. ha->d_id.b.al_pa = al_pa;
  1232. if (!ha->flags.init_done)
  1233. qla_printk(KERN_INFO, ha,
  1234. "Topology - %s, Host Loop address 0x%x\n",
  1235. connect_type, ha->loop_id);
  1236. if (rval) {
  1237. DEBUG2_3(printk("scsi(%ld): FAILED.\n", ha->host_no));
  1238. } else {
  1239. DEBUG3(printk("scsi(%ld): exiting normally.\n", ha->host_no));
  1240. }
  1241. return(rval);
  1242. }
  1243. static inline void
  1244. qla2x00_set_model_info(scsi_qla_host_t *ha, uint8_t *model, size_t len, char *def)
  1245. {
  1246. char *st, *en;
  1247. uint16_t index;
  1248. if (memcmp(model, BINZERO, len) != 0) {
  1249. strncpy(ha->model_number, model, len);
  1250. st = en = ha->model_number;
  1251. en += len - 1;
  1252. while (en > st) {
  1253. if (*en != 0x20 && *en != 0x00)
  1254. break;
  1255. *en-- = '\0';
  1256. }
  1257. index = (ha->pdev->subsystem_device & 0xff);
  1258. if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1259. index < QLA_MODEL_NAMES)
  1260. strncpy(ha->model_desc,
  1261. qla2x00_model_name[index * 2 + 1],
  1262. sizeof(ha->model_desc) - 1);
  1263. } else {
  1264. index = (ha->pdev->subsystem_device & 0xff);
  1265. if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1266. index < QLA_MODEL_NAMES) {
  1267. strcpy(ha->model_number,
  1268. qla2x00_model_name[index * 2]);
  1269. strncpy(ha->model_desc,
  1270. qla2x00_model_name[index * 2 + 1],
  1271. sizeof(ha->model_desc) - 1);
  1272. } else {
  1273. strcpy(ha->model_number, def);
  1274. }
  1275. }
  1276. if (IS_FWI2_CAPABLE(ha))
  1277. qla2xxx_get_vpd_field(ha, "\x82", ha->model_desc,
  1278. sizeof(ha->model_desc));
  1279. }
  1280. /* On sparc systems, obtain port and node WWN from firmware
  1281. * properties.
  1282. */
  1283. static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *ha, nvram_t *nv)
  1284. {
  1285. #ifdef CONFIG_SPARC
  1286. struct pci_dev *pdev = ha->pdev;
  1287. struct device_node *dp = pci_device_to_OF_node(pdev);
  1288. const u8 *val;
  1289. int len;
  1290. val = of_get_property(dp, "port-wwn", &len);
  1291. if (val && len >= WWN_SIZE)
  1292. memcpy(nv->port_name, val, WWN_SIZE);
  1293. val = of_get_property(dp, "node-wwn", &len);
  1294. if (val && len >= WWN_SIZE)
  1295. memcpy(nv->node_name, val, WWN_SIZE);
  1296. #endif
  1297. }
  1298. /*
  1299. * NVRAM configuration for ISP 2xxx
  1300. *
  1301. * Input:
  1302. * ha = adapter block pointer.
  1303. *
  1304. * Output:
  1305. * initialization control block in response_ring
  1306. * host adapters parameters in host adapter block
  1307. *
  1308. * Returns:
  1309. * 0 = success.
  1310. */
  1311. int
  1312. qla2x00_nvram_config(scsi_qla_host_t *ha)
  1313. {
  1314. int rval;
  1315. uint8_t chksum = 0;
  1316. uint16_t cnt;
  1317. uint8_t *dptr1, *dptr2;
  1318. init_cb_t *icb = ha->init_cb;
  1319. nvram_t *nv = ha->nvram;
  1320. uint8_t *ptr = ha->nvram;
  1321. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1322. rval = QLA_SUCCESS;
  1323. /* Determine NVRAM starting address. */
  1324. ha->nvram_size = sizeof(nvram_t);
  1325. ha->nvram_base = 0;
  1326. if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
  1327. if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
  1328. ha->nvram_base = 0x80;
  1329. /* Get NVRAM data and calculate checksum. */
  1330. ha->isp_ops->read_nvram(ha, ptr, ha->nvram_base, ha->nvram_size);
  1331. for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
  1332. chksum += *ptr++;
  1333. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", ha->host_no));
  1334. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  1335. /* Bad NVRAM data, set defaults parameters. */
  1336. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
  1337. nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
  1338. /* Reset NVRAM data. */
  1339. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  1340. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  1341. nv->nvram_version);
  1342. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  1343. "invalid -- WWPN) defaults.\n");
  1344. if (chksum)
  1345. qla2xxx_hw_event_log(ha, HW_EVENT_NVRAM_CHKSUM_ERR, 0,
  1346. MSW(chksum), LSW(chksum));
  1347. /*
  1348. * Set default initialization control block.
  1349. */
  1350. memset(nv, 0, ha->nvram_size);
  1351. nv->parameter_block_version = ICB_VERSION;
  1352. if (IS_QLA23XX(ha)) {
  1353. nv->firmware_options[0] = BIT_2 | BIT_1;
  1354. nv->firmware_options[1] = BIT_7 | BIT_5;
  1355. nv->add_firmware_options[0] = BIT_5;
  1356. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1357. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1358. nv->special_options[1] = BIT_7;
  1359. } else if (IS_QLA2200(ha)) {
  1360. nv->firmware_options[0] = BIT_2 | BIT_1;
  1361. nv->firmware_options[1] = BIT_7 | BIT_5;
  1362. nv->add_firmware_options[0] = BIT_5;
  1363. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1364. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1365. } else if (IS_QLA2100(ha)) {
  1366. nv->firmware_options[0] = BIT_3 | BIT_1;
  1367. nv->firmware_options[1] = BIT_5;
  1368. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1369. }
  1370. nv->max_iocb_allocation = __constant_cpu_to_le16(256);
  1371. nv->execution_throttle = __constant_cpu_to_le16(16);
  1372. nv->retry_count = 8;
  1373. nv->retry_delay = 1;
  1374. nv->port_name[0] = 33;
  1375. nv->port_name[3] = 224;
  1376. nv->port_name[4] = 139;
  1377. qla2xxx_nvram_wwn_from_ofw(ha, nv);
  1378. nv->login_timeout = 4;
  1379. /*
  1380. * Set default host adapter parameters
  1381. */
  1382. nv->host_p[1] = BIT_2;
  1383. nv->reset_delay = 5;
  1384. nv->port_down_retry_count = 8;
  1385. nv->max_luns_per_target = __constant_cpu_to_le16(8);
  1386. nv->link_down_timeout = 60;
  1387. rval = 1;
  1388. }
  1389. #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
  1390. /*
  1391. * The SN2 does not provide BIOS emulation which means you can't change
  1392. * potentially bogus BIOS settings. Force the use of default settings
  1393. * for link rate and frame size. Hope that the rest of the settings
  1394. * are valid.
  1395. */
  1396. if (ia64_platform_is("sn2")) {
  1397. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1398. if (IS_QLA23XX(ha))
  1399. nv->special_options[1] = BIT_7;
  1400. }
  1401. #endif
  1402. /* Reset Initialization control block */
  1403. memset(icb, 0, ha->init_cb_size);
  1404. /*
  1405. * Setup driver NVRAM options.
  1406. */
  1407. nv->firmware_options[0] |= (BIT_6 | BIT_1);
  1408. nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
  1409. nv->firmware_options[1] |= (BIT_5 | BIT_0);
  1410. nv->firmware_options[1] &= ~BIT_4;
  1411. if (IS_QLA23XX(ha)) {
  1412. nv->firmware_options[0] |= BIT_2;
  1413. nv->firmware_options[0] &= ~BIT_3;
  1414. nv->add_firmware_options[1] |= BIT_5 | BIT_4;
  1415. if (IS_QLA2300(ha)) {
  1416. if (ha->fb_rev == FPM_2310) {
  1417. strcpy(ha->model_number, "QLA2310");
  1418. } else {
  1419. strcpy(ha->model_number, "QLA2300");
  1420. }
  1421. } else {
  1422. qla2x00_set_model_info(ha, nv->model_number,
  1423. sizeof(nv->model_number), "QLA23xx");
  1424. }
  1425. } else if (IS_QLA2200(ha)) {
  1426. nv->firmware_options[0] |= BIT_2;
  1427. /*
  1428. * 'Point-to-point preferred, else loop' is not a safe
  1429. * connection mode setting.
  1430. */
  1431. if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
  1432. (BIT_5 | BIT_4)) {
  1433. /* Force 'loop preferred, else point-to-point'. */
  1434. nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
  1435. nv->add_firmware_options[0] |= BIT_5;
  1436. }
  1437. strcpy(ha->model_number, "QLA22xx");
  1438. } else /*if (IS_QLA2100(ha))*/ {
  1439. strcpy(ha->model_number, "QLA2100");
  1440. }
  1441. /*
  1442. * Copy over NVRAM RISC parameter block to initialization control block.
  1443. */
  1444. dptr1 = (uint8_t *)icb;
  1445. dptr2 = (uint8_t *)&nv->parameter_block_version;
  1446. cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
  1447. while (cnt--)
  1448. *dptr1++ = *dptr2++;
  1449. /* Copy 2nd half. */
  1450. dptr1 = (uint8_t *)icb->add_firmware_options;
  1451. cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
  1452. while (cnt--)
  1453. *dptr1++ = *dptr2++;
  1454. /* Use alternate WWN? */
  1455. if (nv->host_p[1] & BIT_7) {
  1456. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  1457. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  1458. }
  1459. /* Prepare nodename */
  1460. if ((icb->firmware_options[1] & BIT_6) == 0) {
  1461. /*
  1462. * Firmware will apply the following mask if the nodename was
  1463. * not provided.
  1464. */
  1465. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  1466. icb->node_name[0] &= 0xF0;
  1467. }
  1468. /*
  1469. * Set host adapter parameters.
  1470. */
  1471. if (nv->host_p[0] & BIT_7)
  1472. ql2xextended_error_logging = 1;
  1473. ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
  1474. /* Always load RISC code on non ISP2[12]00 chips. */
  1475. if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
  1476. ha->flags.disable_risc_code_load = 0;
  1477. ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
  1478. ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
  1479. ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
  1480. ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
  1481. ha->flags.disable_serdes = 0;
  1482. ha->operating_mode =
  1483. (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
  1484. memcpy(ha->fw_seriallink_options, nv->seriallink_options,
  1485. sizeof(ha->fw_seriallink_options));
  1486. /* save HBA serial number */
  1487. ha->serial0 = icb->port_name[5];
  1488. ha->serial1 = icb->port_name[6];
  1489. ha->serial2 = icb->port_name[7];
  1490. ha->node_name = icb->node_name;
  1491. ha->port_name = icb->port_name;
  1492. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  1493. ha->retry_count = nv->retry_count;
  1494. /* Set minimum login_timeout to 4 seconds. */
  1495. if (nv->login_timeout < ql2xlogintimeout)
  1496. nv->login_timeout = ql2xlogintimeout;
  1497. if (nv->login_timeout < 4)
  1498. nv->login_timeout = 4;
  1499. ha->login_timeout = nv->login_timeout;
  1500. icb->login_timeout = nv->login_timeout;
  1501. /* Set minimum RATOV to 100 tenths of a second. */
  1502. ha->r_a_tov = 100;
  1503. ha->loop_reset_delay = nv->reset_delay;
  1504. /* Link Down Timeout = 0:
  1505. *
  1506. * When Port Down timer expires we will start returning
  1507. * I/O's to OS with "DID_NO_CONNECT".
  1508. *
  1509. * Link Down Timeout != 0:
  1510. *
  1511. * The driver waits for the link to come up after link down
  1512. * before returning I/Os to OS with "DID_NO_CONNECT".
  1513. */
  1514. if (nv->link_down_timeout == 0) {
  1515. ha->loop_down_abort_time =
  1516. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  1517. } else {
  1518. ha->link_down_timeout = nv->link_down_timeout;
  1519. ha->loop_down_abort_time =
  1520. (LOOP_DOWN_TIME - ha->link_down_timeout);
  1521. }
  1522. /*
  1523. * Need enough time to try and get the port back.
  1524. */
  1525. ha->port_down_retry_count = nv->port_down_retry_count;
  1526. if (qlport_down_retry)
  1527. ha->port_down_retry_count = qlport_down_retry;
  1528. /* Set login_retry_count */
  1529. ha->login_retry_count = nv->retry_count;
  1530. if (ha->port_down_retry_count == nv->port_down_retry_count &&
  1531. ha->port_down_retry_count > 3)
  1532. ha->login_retry_count = ha->port_down_retry_count;
  1533. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  1534. ha->login_retry_count = ha->port_down_retry_count;
  1535. if (ql2xloginretrycount)
  1536. ha->login_retry_count = ql2xloginretrycount;
  1537. icb->lun_enables = __constant_cpu_to_le16(0);
  1538. icb->command_resource_count = 0;
  1539. icb->immediate_notify_resource_count = 0;
  1540. icb->timeout = __constant_cpu_to_le16(0);
  1541. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  1542. /* Enable RIO */
  1543. icb->firmware_options[0] &= ~BIT_3;
  1544. icb->add_firmware_options[0] &=
  1545. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1546. icb->add_firmware_options[0] |= BIT_2;
  1547. icb->response_accumulation_timer = 3;
  1548. icb->interrupt_delay_timer = 5;
  1549. ha->flags.process_response_queue = 1;
  1550. } else {
  1551. /* Enable ZIO. */
  1552. if (!ha->flags.init_done) {
  1553. ha->zio_mode = icb->add_firmware_options[0] &
  1554. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1555. ha->zio_timer = icb->interrupt_delay_timer ?
  1556. icb->interrupt_delay_timer: 2;
  1557. }
  1558. icb->add_firmware_options[0] &=
  1559. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1560. ha->flags.process_response_queue = 0;
  1561. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  1562. ha->zio_mode = QLA_ZIO_MODE_6;
  1563. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer "
  1564. "delay (%d us).\n", ha->host_no, ha->zio_mode,
  1565. ha->zio_timer * 100));
  1566. qla_printk(KERN_INFO, ha,
  1567. "ZIO mode %d enabled; timer delay (%d us).\n",
  1568. ha->zio_mode, ha->zio_timer * 100);
  1569. icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
  1570. icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
  1571. ha->flags.process_response_queue = 1;
  1572. }
  1573. }
  1574. if (rval) {
  1575. DEBUG2_3(printk(KERN_WARNING
  1576. "scsi(%ld): NVRAM configuration failed!\n", ha->host_no));
  1577. }
  1578. return (rval);
  1579. }
  1580. static void
  1581. qla2x00_rport_del(void *data)
  1582. {
  1583. fc_port_t *fcport = data;
  1584. struct fc_rport *rport;
  1585. spin_lock_irq(fcport->ha->host->host_lock);
  1586. rport = fcport->drport;
  1587. fcport->drport = NULL;
  1588. spin_unlock_irq(fcport->ha->host->host_lock);
  1589. if (rport)
  1590. fc_remote_port_delete(rport);
  1591. }
  1592. /**
  1593. * qla2x00_alloc_fcport() - Allocate a generic fcport.
  1594. * @ha: HA context
  1595. * @flags: allocation flags
  1596. *
  1597. * Returns a pointer to the allocated fcport, or NULL, if none available.
  1598. */
  1599. static fc_port_t *
  1600. qla2x00_alloc_fcport(scsi_qla_host_t *ha, gfp_t flags)
  1601. {
  1602. fc_port_t *fcport;
  1603. fcport = kzalloc(sizeof(fc_port_t), flags);
  1604. if (!fcport)
  1605. return NULL;
  1606. /* Setup fcport template structure. */
  1607. fcport->ha = ha;
  1608. fcport->vp_idx = ha->vp_idx;
  1609. fcport->port_type = FCT_UNKNOWN;
  1610. fcport->loop_id = FC_NO_LOOP_ID;
  1611. atomic_set(&fcport->state, FCS_UNCONFIGURED);
  1612. fcport->flags = FCF_RLC_SUPPORT;
  1613. fcport->supported_classes = FC_COS_UNSPECIFIED;
  1614. return fcport;
  1615. }
  1616. /*
  1617. * qla2x00_configure_loop
  1618. * Updates Fibre Channel Device Database with what is actually on loop.
  1619. *
  1620. * Input:
  1621. * ha = adapter block pointer.
  1622. *
  1623. * Returns:
  1624. * 0 = success.
  1625. * 1 = error.
  1626. * 2 = database was full and device was not configured.
  1627. */
  1628. static int
  1629. qla2x00_configure_loop(scsi_qla_host_t *ha)
  1630. {
  1631. int rval;
  1632. unsigned long flags, save_flags;
  1633. rval = QLA_SUCCESS;
  1634. /* Get Initiator ID */
  1635. if (test_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags)) {
  1636. rval = qla2x00_configure_hba(ha);
  1637. if (rval != QLA_SUCCESS) {
  1638. DEBUG(printk("scsi(%ld): Unable to configure HBA.\n",
  1639. ha->host_no));
  1640. return (rval);
  1641. }
  1642. }
  1643. save_flags = flags = ha->dpc_flags;
  1644. DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n",
  1645. ha->host_no, flags));
  1646. /*
  1647. * If we have both an RSCN and PORT UPDATE pending then handle them
  1648. * both at the same time.
  1649. */
  1650. clear_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
  1651. clear_bit(RSCN_UPDATE, &ha->dpc_flags);
  1652. /* Determine what we need to do */
  1653. if (ha->current_topology == ISP_CFG_FL &&
  1654. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1655. ha->flags.rscn_queue_overflow = 1;
  1656. set_bit(RSCN_UPDATE, &flags);
  1657. } else if (ha->current_topology == ISP_CFG_F &&
  1658. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1659. ha->flags.rscn_queue_overflow = 1;
  1660. set_bit(RSCN_UPDATE, &flags);
  1661. clear_bit(LOCAL_LOOP_UPDATE, &flags);
  1662. } else if (ha->current_topology == ISP_CFG_N) {
  1663. clear_bit(RSCN_UPDATE, &flags);
  1664. } else if (!ha->flags.online ||
  1665. (test_bit(ABORT_ISP_ACTIVE, &flags))) {
  1666. ha->flags.rscn_queue_overflow = 1;
  1667. set_bit(RSCN_UPDATE, &flags);
  1668. set_bit(LOCAL_LOOP_UPDATE, &flags);
  1669. }
  1670. if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
  1671. if (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)) {
  1672. rval = QLA_FUNCTION_FAILED;
  1673. } else {
  1674. rval = qla2x00_configure_local_loop(ha);
  1675. }
  1676. }
  1677. if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
  1678. if (LOOP_TRANSITION(ha)) {
  1679. rval = QLA_FUNCTION_FAILED;
  1680. } else {
  1681. rval = qla2x00_configure_fabric(ha);
  1682. }
  1683. }
  1684. if (rval == QLA_SUCCESS) {
  1685. if (atomic_read(&ha->loop_down_timer) ||
  1686. test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)) {
  1687. rval = QLA_FUNCTION_FAILED;
  1688. } else {
  1689. atomic_set(&ha->loop_state, LOOP_READY);
  1690. DEBUG(printk("scsi(%ld): LOOP READY\n", ha->host_no));
  1691. }
  1692. }
  1693. if (rval) {
  1694. DEBUG2_3(printk("%s(%ld): *** FAILED ***\n",
  1695. __func__, ha->host_no));
  1696. } else {
  1697. DEBUG3(printk("%s: exiting normally\n", __func__));
  1698. }
  1699. /* Restore state if a resync event occured during processing */
  1700. if (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)) {
  1701. if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
  1702. set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
  1703. if (test_bit(RSCN_UPDATE, &save_flags)) {
  1704. ha->flags.rscn_queue_overflow = 1;
  1705. set_bit(RSCN_UPDATE, &ha->dpc_flags);
  1706. }
  1707. }
  1708. return (rval);
  1709. }
  1710. /*
  1711. * qla2x00_configure_local_loop
  1712. * Updates Fibre Channel Device Database with local loop devices.
  1713. *
  1714. * Input:
  1715. * ha = adapter block pointer.
  1716. *
  1717. * Returns:
  1718. * 0 = success.
  1719. */
  1720. static int
  1721. qla2x00_configure_local_loop(scsi_qla_host_t *ha)
  1722. {
  1723. int rval, rval2;
  1724. int found_devs;
  1725. int found;
  1726. fc_port_t *fcport, *new_fcport;
  1727. uint16_t index;
  1728. uint16_t entries;
  1729. char *id_iter;
  1730. uint16_t loop_id;
  1731. uint8_t domain, area, al_pa;
  1732. scsi_qla_host_t *pha = to_qla_parent(ha);
  1733. found_devs = 0;
  1734. new_fcport = NULL;
  1735. entries = MAX_FIBRE_DEVICES;
  1736. DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", ha->host_no));
  1737. DEBUG3(qla2x00_get_fcal_position_map(ha, NULL));
  1738. /* Get list of logged in devices. */
  1739. memset(ha->gid_list, 0, GID_LIST_SIZE);
  1740. rval = qla2x00_get_id_list(ha, ha->gid_list, ha->gid_list_dma,
  1741. &entries);
  1742. if (rval != QLA_SUCCESS)
  1743. goto cleanup_allocation;
  1744. DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n",
  1745. ha->host_no, entries));
  1746. DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list,
  1747. entries * sizeof(struct gid_list_info)));
  1748. /* Allocate temporary fcport for any new fcports discovered. */
  1749. new_fcport = qla2x00_alloc_fcport(ha, GFP_KERNEL);
  1750. if (new_fcport == NULL) {
  1751. rval = QLA_MEMORY_ALLOC_FAILED;
  1752. goto cleanup_allocation;
  1753. }
  1754. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  1755. /*
  1756. * Mark local devices that were present with FCF_DEVICE_LOST for now.
  1757. */
  1758. list_for_each_entry(fcport, &pha->fcports, list) {
  1759. if (fcport->vp_idx != ha->vp_idx)
  1760. continue;
  1761. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  1762. fcport->port_type != FCT_BROADCAST &&
  1763. (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  1764. DEBUG(printk("scsi(%ld): Marking port lost, "
  1765. "loop_id=0x%04x\n",
  1766. ha->host_no, fcport->loop_id));
  1767. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  1768. fcport->flags &= ~FCF_FARP_DONE;
  1769. }
  1770. }
  1771. /* Add devices to port list. */
  1772. id_iter = (char *)ha->gid_list;
  1773. for (index = 0; index < entries; index++) {
  1774. domain = ((struct gid_list_info *)id_iter)->domain;
  1775. area = ((struct gid_list_info *)id_iter)->area;
  1776. al_pa = ((struct gid_list_info *)id_iter)->al_pa;
  1777. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  1778. loop_id = (uint16_t)
  1779. ((struct gid_list_info *)id_iter)->loop_id_2100;
  1780. else
  1781. loop_id = le16_to_cpu(
  1782. ((struct gid_list_info *)id_iter)->loop_id);
  1783. id_iter += ha->gid_list_info_size;
  1784. /* Bypass reserved domain fields. */
  1785. if ((domain & 0xf0) == 0xf0)
  1786. continue;
  1787. /* Bypass if not same domain and area of adapter. */
  1788. if (area && domain &&
  1789. (area != ha->d_id.b.area || domain != ha->d_id.b.domain))
  1790. continue;
  1791. /* Bypass invalid local loop ID. */
  1792. if (loop_id > LAST_LOCAL_LOOP_ID)
  1793. continue;
  1794. /* Fill in member data. */
  1795. new_fcport->d_id.b.domain = domain;
  1796. new_fcport->d_id.b.area = area;
  1797. new_fcport->d_id.b.al_pa = al_pa;
  1798. new_fcport->loop_id = loop_id;
  1799. new_fcport->vp_idx = ha->vp_idx;
  1800. rval2 = qla2x00_get_port_database(ha, new_fcport, 0);
  1801. if (rval2 != QLA_SUCCESS) {
  1802. DEBUG2(printk("scsi(%ld): Failed to retrieve fcport "
  1803. "information -- get_port_database=%x, "
  1804. "loop_id=0x%04x\n",
  1805. ha->host_no, rval2, new_fcport->loop_id));
  1806. DEBUG2(printk("scsi(%ld): Scheduling resync...\n",
  1807. ha->host_no));
  1808. set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
  1809. continue;
  1810. }
  1811. /* Check for matching device in port list. */
  1812. found = 0;
  1813. fcport = NULL;
  1814. list_for_each_entry(fcport, &pha->fcports, list) {
  1815. if (fcport->vp_idx != ha->vp_idx)
  1816. continue;
  1817. if (memcmp(new_fcport->port_name, fcport->port_name,
  1818. WWN_SIZE))
  1819. continue;
  1820. fcport->flags &= ~(FCF_FABRIC_DEVICE |
  1821. FCF_PERSISTENT_BOUND);
  1822. fcport->loop_id = new_fcport->loop_id;
  1823. fcport->port_type = new_fcport->port_type;
  1824. fcport->d_id.b24 = new_fcport->d_id.b24;
  1825. memcpy(fcport->node_name, new_fcport->node_name,
  1826. WWN_SIZE);
  1827. found++;
  1828. break;
  1829. }
  1830. if (!found) {
  1831. /* New device, add to fcports list. */
  1832. new_fcport->flags &= ~FCF_PERSISTENT_BOUND;
  1833. if (ha->parent) {
  1834. new_fcport->ha = ha;
  1835. new_fcport->vp_idx = ha->vp_idx;
  1836. list_add_tail(&new_fcport->vp_fcport,
  1837. &ha->vp_fcports);
  1838. }
  1839. list_add_tail(&new_fcport->list, &pha->fcports);
  1840. /* Allocate a new replacement fcport. */
  1841. fcport = new_fcport;
  1842. new_fcport = qla2x00_alloc_fcport(ha, GFP_KERNEL);
  1843. if (new_fcport == NULL) {
  1844. rval = QLA_MEMORY_ALLOC_FAILED;
  1845. goto cleanup_allocation;
  1846. }
  1847. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  1848. }
  1849. /* Base iIDMA settings on HBA port speed. */
  1850. fcport->fp_speed = ha->link_data_rate;
  1851. qla2x00_update_fcport(ha, fcport);
  1852. found_devs++;
  1853. }
  1854. cleanup_allocation:
  1855. kfree(new_fcport);
  1856. if (rval != QLA_SUCCESS) {
  1857. DEBUG2(printk("scsi(%ld): Configure local loop error exit: "
  1858. "rval=%x\n", ha->host_no, rval));
  1859. }
  1860. if (found_devs) {
  1861. ha->device_flags |= DFLG_LOCAL_DEVICES;
  1862. ha->device_flags &= ~DFLG_RETRY_LOCAL_DEVICES;
  1863. }
  1864. return (rval);
  1865. }
  1866. static void
  1867. qla2x00_iidma_fcport(scsi_qla_host_t *ha, fc_port_t *fcport)
  1868. {
  1869. #define LS_UNKNOWN 2
  1870. static char *link_speeds[5] = { "1", "2", "?", "4", "8" };
  1871. int rval;
  1872. uint16_t mb[6];
  1873. if (!IS_IIDMA_CAPABLE(ha))
  1874. return;
  1875. if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
  1876. fcport->fp_speed > ha->link_data_rate)
  1877. return;
  1878. rval = qla2x00_set_idma_speed(ha, fcport->loop_id, fcport->fp_speed,
  1879. mb);
  1880. if (rval != QLA_SUCCESS) {
  1881. DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA "
  1882. "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n",
  1883. ha->host_no, fcport->port_name[0], fcport->port_name[1],
  1884. fcport->port_name[2], fcport->port_name[3],
  1885. fcport->port_name[4], fcport->port_name[5],
  1886. fcport->port_name[6], fcport->port_name[7], rval,
  1887. fcport->fp_speed, mb[0], mb[1]));
  1888. } else {
  1889. DEBUG2(qla_printk(KERN_INFO, ha,
  1890. "iIDMA adjusted to %s GB/s on "
  1891. "%02x%02x%02x%02x%02x%02x%02x%02x.\n",
  1892. link_speeds[fcport->fp_speed], fcport->port_name[0],
  1893. fcport->port_name[1], fcport->port_name[2],
  1894. fcport->port_name[3], fcport->port_name[4],
  1895. fcport->port_name[5], fcport->port_name[6],
  1896. fcport->port_name[7]));
  1897. }
  1898. }
  1899. static void
  1900. qla2x00_reg_remote_port(scsi_qla_host_t *ha, fc_port_t *fcport)
  1901. {
  1902. struct fc_rport_identifiers rport_ids;
  1903. struct fc_rport *rport;
  1904. if (fcport->drport)
  1905. qla2x00_rport_del(fcport);
  1906. rport_ids.node_name = wwn_to_u64(fcport->node_name);
  1907. rport_ids.port_name = wwn_to_u64(fcport->port_name);
  1908. rport_ids.port_id = fcport->d_id.b.domain << 16 |
  1909. fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
  1910. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  1911. fcport->rport = rport = fc_remote_port_add(ha->host, 0, &rport_ids);
  1912. if (!rport) {
  1913. qla_printk(KERN_WARNING, ha,
  1914. "Unable to allocate fc remote port!\n");
  1915. return;
  1916. }
  1917. spin_lock_irq(fcport->ha->host->host_lock);
  1918. *((fc_port_t **)rport->dd_data) = fcport;
  1919. spin_unlock_irq(fcport->ha->host->host_lock);
  1920. rport->supported_classes = fcport->supported_classes;
  1921. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  1922. if (fcport->port_type == FCT_INITIATOR)
  1923. rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
  1924. if (fcport->port_type == FCT_TARGET)
  1925. rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
  1926. fc_remote_port_rolechg(rport, rport_ids.roles);
  1927. }
  1928. /*
  1929. * qla2x00_update_fcport
  1930. * Updates device on list.
  1931. *
  1932. * Input:
  1933. * ha = adapter block pointer.
  1934. * fcport = port structure pointer.
  1935. *
  1936. * Return:
  1937. * 0 - Success
  1938. * BIT_0 - error
  1939. *
  1940. * Context:
  1941. * Kernel context.
  1942. */
  1943. void
  1944. qla2x00_update_fcport(scsi_qla_host_t *ha, fc_port_t *fcport)
  1945. {
  1946. scsi_qla_host_t *pha = to_qla_parent(ha);
  1947. fcport->ha = ha;
  1948. fcport->login_retry = 0;
  1949. fcport->port_login_retry_count = pha->port_down_retry_count *
  1950. PORT_RETRY_TIME;
  1951. atomic_set(&fcport->port_down_timer, pha->port_down_retry_count *
  1952. PORT_RETRY_TIME);
  1953. fcport->flags &= ~FCF_LOGIN_NEEDED;
  1954. qla2x00_iidma_fcport(ha, fcport);
  1955. atomic_set(&fcport->state, FCS_ONLINE);
  1956. qla2x00_reg_remote_port(ha, fcport);
  1957. }
  1958. /*
  1959. * qla2x00_configure_fabric
  1960. * Setup SNS devices with loop ID's.
  1961. *
  1962. * Input:
  1963. * ha = adapter block pointer.
  1964. *
  1965. * Returns:
  1966. * 0 = success.
  1967. * BIT_0 = error
  1968. */
  1969. static int
  1970. qla2x00_configure_fabric(scsi_qla_host_t *ha)
  1971. {
  1972. int rval, rval2;
  1973. fc_port_t *fcport, *fcptemp;
  1974. uint16_t next_loopid;
  1975. uint16_t mb[MAILBOX_REGISTER_COUNT];
  1976. uint16_t loop_id;
  1977. LIST_HEAD(new_fcports);
  1978. scsi_qla_host_t *pha = to_qla_parent(ha);
  1979. /* If FL port exists, then SNS is present */
  1980. if (IS_FWI2_CAPABLE(ha))
  1981. loop_id = NPH_F_PORT;
  1982. else
  1983. loop_id = SNS_FL_PORT;
  1984. rval = qla2x00_get_port_name(ha, loop_id, ha->fabric_node_name, 1);
  1985. if (rval != QLA_SUCCESS) {
  1986. DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL "
  1987. "Port\n", ha->host_no));
  1988. ha->device_flags &= ~SWITCH_FOUND;
  1989. return (QLA_SUCCESS);
  1990. }
  1991. ha->device_flags |= SWITCH_FOUND;
  1992. /* Mark devices that need re-synchronization. */
  1993. rval2 = qla2x00_device_resync(ha);
  1994. if (rval2 == QLA_RSCNS_HANDLED) {
  1995. /* No point doing the scan, just continue. */
  1996. return (QLA_SUCCESS);
  1997. }
  1998. do {
  1999. /* FDMI support. */
  2000. if (ql2xfdmienable &&
  2001. test_and_clear_bit(REGISTER_FDMI_NEEDED, &ha->dpc_flags))
  2002. qla2x00_fdmi_register(ha);
  2003. /* Ensure we are logged into the SNS. */
  2004. if (IS_FWI2_CAPABLE(ha))
  2005. loop_id = NPH_SNS;
  2006. else
  2007. loop_id = SIMPLE_NAME_SERVER;
  2008. ha->isp_ops->fabric_login(ha, loop_id, 0xff, 0xff,
  2009. 0xfc, mb, BIT_1 | BIT_0);
  2010. if (mb[0] != MBS_COMMAND_COMPLETE) {
  2011. DEBUG2(qla_printk(KERN_INFO, ha,
  2012. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  2013. "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id,
  2014. mb[0], mb[1], mb[2], mb[6], mb[7]));
  2015. return (QLA_SUCCESS);
  2016. }
  2017. if (test_and_clear_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags)) {
  2018. if (qla2x00_rft_id(ha)) {
  2019. /* EMPTY */
  2020. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2021. "TYPE failed.\n", ha->host_no));
  2022. }
  2023. if (qla2x00_rff_id(ha)) {
  2024. /* EMPTY */
  2025. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2026. "Features failed.\n", ha->host_no));
  2027. }
  2028. if (qla2x00_rnn_id(ha)) {
  2029. /* EMPTY */
  2030. DEBUG2(printk("scsi(%ld): Register Node Name "
  2031. "failed.\n", ha->host_no));
  2032. } else if (qla2x00_rsnn_nn(ha)) {
  2033. /* EMPTY */
  2034. DEBUG2(printk("scsi(%ld): Register Symbolic "
  2035. "Node Name failed.\n", ha->host_no));
  2036. }
  2037. }
  2038. rval = qla2x00_find_all_fabric_devs(ha, &new_fcports);
  2039. if (rval != QLA_SUCCESS)
  2040. break;
  2041. /*
  2042. * Logout all previous fabric devices marked lost, except
  2043. * tape devices.
  2044. */
  2045. list_for_each_entry(fcport, &pha->fcports, list) {
  2046. if (fcport->vp_idx !=ha->vp_idx)
  2047. continue;
  2048. if (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags))
  2049. break;
  2050. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
  2051. continue;
  2052. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  2053. qla2x00_mark_device_lost(ha, fcport,
  2054. ql2xplogiabsentdevice, 0);
  2055. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2056. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  2057. fcport->port_type != FCT_INITIATOR &&
  2058. fcport->port_type != FCT_BROADCAST) {
  2059. ha->isp_ops->fabric_logout(ha,
  2060. fcport->loop_id,
  2061. fcport->d_id.b.domain,
  2062. fcport->d_id.b.area,
  2063. fcport->d_id.b.al_pa);
  2064. fcport->loop_id = FC_NO_LOOP_ID;
  2065. }
  2066. }
  2067. }
  2068. /* Starting free loop ID. */
  2069. next_loopid = pha->min_external_loopid;
  2070. /*
  2071. * Scan through our port list and login entries that need to be
  2072. * logged in.
  2073. */
  2074. list_for_each_entry(fcport, &pha->fcports, list) {
  2075. if (fcport->vp_idx != ha->vp_idx)
  2076. continue;
  2077. if (atomic_read(&ha->loop_down_timer) ||
  2078. test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags))
  2079. break;
  2080. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2081. (fcport->flags & FCF_LOGIN_NEEDED) == 0)
  2082. continue;
  2083. if (fcport->loop_id == FC_NO_LOOP_ID) {
  2084. fcport->loop_id = next_loopid;
  2085. rval = qla2x00_find_new_loop_id(
  2086. to_qla_parent(ha), fcport);
  2087. if (rval != QLA_SUCCESS) {
  2088. /* Ran out of IDs to use */
  2089. break;
  2090. }
  2091. }
  2092. /* Login and update database */
  2093. qla2x00_fabric_dev_login(ha, fcport, &next_loopid);
  2094. }
  2095. /* Exit if out of loop IDs. */
  2096. if (rval != QLA_SUCCESS) {
  2097. break;
  2098. }
  2099. /*
  2100. * Login and add the new devices to our port list.
  2101. */
  2102. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2103. if (atomic_read(&ha->loop_down_timer) ||
  2104. test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags))
  2105. break;
  2106. /* Find a new loop ID to use. */
  2107. fcport->loop_id = next_loopid;
  2108. rval = qla2x00_find_new_loop_id(to_qla_parent(ha),
  2109. fcport);
  2110. if (rval != QLA_SUCCESS) {
  2111. /* Ran out of IDs to use */
  2112. break;
  2113. }
  2114. /* Login and update database */
  2115. qla2x00_fabric_dev_login(ha, fcport, &next_loopid);
  2116. if (ha->parent) {
  2117. fcport->ha = ha;
  2118. fcport->vp_idx = ha->vp_idx;
  2119. list_add_tail(&fcport->vp_fcport,
  2120. &ha->vp_fcports);
  2121. list_move_tail(&fcport->list,
  2122. &ha->parent->fcports);
  2123. } else
  2124. list_move_tail(&fcport->list, &ha->fcports);
  2125. }
  2126. } while (0);
  2127. /* Free all new device structures not processed. */
  2128. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2129. list_del(&fcport->list);
  2130. kfree(fcport);
  2131. }
  2132. if (rval) {
  2133. DEBUG2(printk("scsi(%ld): Configure fabric error exit: "
  2134. "rval=%d\n", ha->host_no, rval));
  2135. }
  2136. return (rval);
  2137. }
  2138. /*
  2139. * qla2x00_find_all_fabric_devs
  2140. *
  2141. * Input:
  2142. * ha = adapter block pointer.
  2143. * dev = database device entry pointer.
  2144. *
  2145. * Returns:
  2146. * 0 = success.
  2147. *
  2148. * Context:
  2149. * Kernel context.
  2150. */
  2151. static int
  2152. qla2x00_find_all_fabric_devs(scsi_qla_host_t *ha, struct list_head *new_fcports)
  2153. {
  2154. int rval;
  2155. uint16_t loop_id;
  2156. fc_port_t *fcport, *new_fcport, *fcptemp;
  2157. int found;
  2158. sw_info_t *swl;
  2159. int swl_idx;
  2160. int first_dev, last_dev;
  2161. port_id_t wrap, nxt_d_id;
  2162. int vp_index;
  2163. int empty_vp_index;
  2164. int found_vp;
  2165. scsi_qla_host_t *vha;
  2166. scsi_qla_host_t *pha = to_qla_parent(ha);
  2167. rval = QLA_SUCCESS;
  2168. /* Try GID_PT to get device list, else GAN. */
  2169. swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_ATOMIC);
  2170. if (!swl) {
  2171. /*EMPTY*/
  2172. DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback "
  2173. "on GA_NXT\n", ha->host_no));
  2174. } else {
  2175. if (qla2x00_gid_pt(ha, swl) != QLA_SUCCESS) {
  2176. kfree(swl);
  2177. swl = NULL;
  2178. } else if (qla2x00_gpn_id(ha, swl) != QLA_SUCCESS) {
  2179. kfree(swl);
  2180. swl = NULL;
  2181. } else if (qla2x00_gnn_id(ha, swl) != QLA_SUCCESS) {
  2182. kfree(swl);
  2183. swl = NULL;
  2184. } else if (ql2xiidmaenable &&
  2185. qla2x00_gfpn_id(ha, swl) == QLA_SUCCESS) {
  2186. qla2x00_gpsc(ha, swl);
  2187. }
  2188. }
  2189. swl_idx = 0;
  2190. /* Allocate temporary fcport for any new fcports discovered. */
  2191. new_fcport = qla2x00_alloc_fcport(ha, GFP_KERNEL);
  2192. if (new_fcport == NULL) {
  2193. kfree(swl);
  2194. return (QLA_MEMORY_ALLOC_FAILED);
  2195. }
  2196. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2197. new_fcport->vp_idx = ha->vp_idx;
  2198. /* Set start port ID scan at adapter ID. */
  2199. first_dev = 1;
  2200. last_dev = 0;
  2201. /* Starting free loop ID. */
  2202. loop_id = pha->min_external_loopid;
  2203. for (; loop_id <= ha->last_loop_id; loop_id++) {
  2204. if (qla2x00_is_reserved_id(ha, loop_id))
  2205. continue;
  2206. if (atomic_read(&ha->loop_down_timer) || LOOP_TRANSITION(ha))
  2207. break;
  2208. if (swl != NULL) {
  2209. if (last_dev) {
  2210. wrap.b24 = new_fcport->d_id.b24;
  2211. } else {
  2212. new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
  2213. memcpy(new_fcport->node_name,
  2214. swl[swl_idx].node_name, WWN_SIZE);
  2215. memcpy(new_fcport->port_name,
  2216. swl[swl_idx].port_name, WWN_SIZE);
  2217. memcpy(new_fcport->fabric_port_name,
  2218. swl[swl_idx].fabric_port_name, WWN_SIZE);
  2219. new_fcport->fp_speed = swl[swl_idx].fp_speed;
  2220. if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
  2221. last_dev = 1;
  2222. }
  2223. swl_idx++;
  2224. }
  2225. } else {
  2226. /* Send GA_NXT to the switch */
  2227. rval = qla2x00_ga_nxt(ha, new_fcport);
  2228. if (rval != QLA_SUCCESS) {
  2229. qla_printk(KERN_WARNING, ha,
  2230. "SNS scan failed -- assuming zero-entry "
  2231. "result...\n");
  2232. list_for_each_entry_safe(fcport, fcptemp,
  2233. new_fcports, list) {
  2234. list_del(&fcport->list);
  2235. kfree(fcport);
  2236. }
  2237. rval = QLA_SUCCESS;
  2238. break;
  2239. }
  2240. }
  2241. /* If wrap on switch device list, exit. */
  2242. if (first_dev) {
  2243. wrap.b24 = new_fcport->d_id.b24;
  2244. first_dev = 0;
  2245. } else if (new_fcport->d_id.b24 == wrap.b24) {
  2246. DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n",
  2247. ha->host_no, new_fcport->d_id.b.domain,
  2248. new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa));
  2249. break;
  2250. }
  2251. /* Bypass if same physical adapter. */
  2252. if (new_fcport->d_id.b24 == pha->d_id.b24)
  2253. continue;
  2254. /* Bypass virtual ports of the same host. */
  2255. if (pha->num_vhosts) {
  2256. for_each_mapped_vp_idx(pha, vp_index) {
  2257. empty_vp_index = 1;
  2258. found_vp = 0;
  2259. list_for_each_entry(vha, &pha->vp_list,
  2260. vp_list) {
  2261. if (vp_index == vha->vp_idx) {
  2262. empty_vp_index = 0;
  2263. found_vp = 1;
  2264. break;
  2265. }
  2266. }
  2267. if (empty_vp_index)
  2268. continue;
  2269. if (found_vp &&
  2270. new_fcport->d_id.b24 == vha->d_id.b24)
  2271. break;
  2272. }
  2273. if (vp_index <= pha->max_npiv_vports)
  2274. continue;
  2275. }
  2276. /* Bypass if same domain and area of adapter. */
  2277. if (((new_fcport->d_id.b24 & 0xffff00) ==
  2278. (ha->d_id.b24 & 0xffff00)) && ha->current_topology ==
  2279. ISP_CFG_FL)
  2280. continue;
  2281. /* Bypass reserved domain fields. */
  2282. if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
  2283. continue;
  2284. /* Locate matching device in database. */
  2285. found = 0;
  2286. list_for_each_entry(fcport, &pha->fcports, list) {
  2287. if (new_fcport->vp_idx != fcport->vp_idx)
  2288. continue;
  2289. if (memcmp(new_fcport->port_name, fcport->port_name,
  2290. WWN_SIZE))
  2291. continue;
  2292. found++;
  2293. /* Update port state. */
  2294. memcpy(fcport->fabric_port_name,
  2295. new_fcport->fabric_port_name, WWN_SIZE);
  2296. fcport->fp_speed = new_fcport->fp_speed;
  2297. /*
  2298. * If address the same and state FCS_ONLINE, nothing
  2299. * changed.
  2300. */
  2301. if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
  2302. atomic_read(&fcport->state) == FCS_ONLINE) {
  2303. break;
  2304. }
  2305. /*
  2306. * If device was not a fabric device before.
  2307. */
  2308. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2309. fcport->d_id.b24 = new_fcport->d_id.b24;
  2310. fcport->loop_id = FC_NO_LOOP_ID;
  2311. fcport->flags |= (FCF_FABRIC_DEVICE |
  2312. FCF_LOGIN_NEEDED);
  2313. fcport->flags &= ~FCF_PERSISTENT_BOUND;
  2314. break;
  2315. }
  2316. /*
  2317. * Port ID changed or device was marked to be updated;
  2318. * Log it out if still logged in and mark it for
  2319. * relogin later.
  2320. */
  2321. fcport->d_id.b24 = new_fcport->d_id.b24;
  2322. fcport->flags |= FCF_LOGIN_NEEDED;
  2323. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2324. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  2325. fcport->port_type != FCT_INITIATOR &&
  2326. fcport->port_type != FCT_BROADCAST) {
  2327. ha->isp_ops->fabric_logout(ha, fcport->loop_id,
  2328. fcport->d_id.b.domain, fcport->d_id.b.area,
  2329. fcport->d_id.b.al_pa);
  2330. fcport->loop_id = FC_NO_LOOP_ID;
  2331. }
  2332. break;
  2333. }
  2334. if (found)
  2335. continue;
  2336. /* If device was not in our fcports list, then add it. */
  2337. list_add_tail(&new_fcport->list, new_fcports);
  2338. /* Allocate a new replacement fcport. */
  2339. nxt_d_id.b24 = new_fcport->d_id.b24;
  2340. new_fcport = qla2x00_alloc_fcport(ha, GFP_KERNEL);
  2341. if (new_fcport == NULL) {
  2342. kfree(swl);
  2343. return (QLA_MEMORY_ALLOC_FAILED);
  2344. }
  2345. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2346. new_fcport->d_id.b24 = nxt_d_id.b24;
  2347. new_fcport->vp_idx = ha->vp_idx;
  2348. }
  2349. kfree(swl);
  2350. kfree(new_fcport);
  2351. if (!list_empty(new_fcports))
  2352. ha->device_flags |= DFLG_FABRIC_DEVICES;
  2353. return (rval);
  2354. }
  2355. /*
  2356. * qla2x00_find_new_loop_id
  2357. * Scan through our port list and find a new usable loop ID.
  2358. *
  2359. * Input:
  2360. * ha: adapter state pointer.
  2361. * dev: port structure pointer.
  2362. *
  2363. * Returns:
  2364. * qla2x00 local function return status code.
  2365. *
  2366. * Context:
  2367. * Kernel context.
  2368. */
  2369. static int
  2370. qla2x00_find_new_loop_id(scsi_qla_host_t *ha, fc_port_t *dev)
  2371. {
  2372. int rval;
  2373. int found;
  2374. fc_port_t *fcport;
  2375. uint16_t first_loop_id;
  2376. scsi_qla_host_t *pha = to_qla_parent(ha);
  2377. rval = QLA_SUCCESS;
  2378. /* Save starting loop ID. */
  2379. first_loop_id = dev->loop_id;
  2380. for (;;) {
  2381. /* Skip loop ID if already used by adapter. */
  2382. if (dev->loop_id == ha->loop_id) {
  2383. dev->loop_id++;
  2384. }
  2385. /* Skip reserved loop IDs. */
  2386. while (qla2x00_is_reserved_id(ha, dev->loop_id)) {
  2387. dev->loop_id++;
  2388. }
  2389. /* Reset loop ID if passed the end. */
  2390. if (dev->loop_id > ha->last_loop_id) {
  2391. /* first loop ID. */
  2392. dev->loop_id = ha->min_external_loopid;
  2393. }
  2394. /* Check for loop ID being already in use. */
  2395. found = 0;
  2396. fcport = NULL;
  2397. list_for_each_entry(fcport, &pha->fcports, list) {
  2398. if (fcport->loop_id == dev->loop_id && fcport != dev) {
  2399. /* ID possibly in use */
  2400. found++;
  2401. break;
  2402. }
  2403. }
  2404. /* If not in use then it is free to use. */
  2405. if (!found) {
  2406. break;
  2407. }
  2408. /* ID in use. Try next value. */
  2409. dev->loop_id++;
  2410. /* If wrap around. No free ID to use. */
  2411. if (dev->loop_id == first_loop_id) {
  2412. dev->loop_id = FC_NO_LOOP_ID;
  2413. rval = QLA_FUNCTION_FAILED;
  2414. break;
  2415. }
  2416. }
  2417. return (rval);
  2418. }
  2419. /*
  2420. * qla2x00_device_resync
  2421. * Marks devices in the database that needs resynchronization.
  2422. *
  2423. * Input:
  2424. * ha = adapter block pointer.
  2425. *
  2426. * Context:
  2427. * Kernel context.
  2428. */
  2429. static int
  2430. qla2x00_device_resync(scsi_qla_host_t *ha)
  2431. {
  2432. int rval;
  2433. uint32_t mask;
  2434. fc_port_t *fcport;
  2435. uint32_t rscn_entry;
  2436. uint8_t rscn_out_iter;
  2437. uint8_t format;
  2438. port_id_t d_id;
  2439. scsi_qla_host_t *pha = to_qla_parent(ha);
  2440. rval = QLA_RSCNS_HANDLED;
  2441. while (ha->rscn_out_ptr != ha->rscn_in_ptr ||
  2442. ha->flags.rscn_queue_overflow) {
  2443. rscn_entry = ha->rscn_queue[ha->rscn_out_ptr];
  2444. format = MSB(MSW(rscn_entry));
  2445. d_id.b.domain = LSB(MSW(rscn_entry));
  2446. d_id.b.area = MSB(LSW(rscn_entry));
  2447. d_id.b.al_pa = LSB(LSW(rscn_entry));
  2448. DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = "
  2449. "[%02x/%02x%02x%02x].\n",
  2450. ha->host_no, ha->rscn_out_ptr, format, d_id.b.domain,
  2451. d_id.b.area, d_id.b.al_pa));
  2452. ha->rscn_out_ptr++;
  2453. if (ha->rscn_out_ptr == MAX_RSCN_COUNT)
  2454. ha->rscn_out_ptr = 0;
  2455. /* Skip duplicate entries. */
  2456. for (rscn_out_iter = ha->rscn_out_ptr;
  2457. !ha->flags.rscn_queue_overflow &&
  2458. rscn_out_iter != ha->rscn_in_ptr;
  2459. rscn_out_iter = (rscn_out_iter ==
  2460. (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) {
  2461. if (rscn_entry != ha->rscn_queue[rscn_out_iter])
  2462. break;
  2463. DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue "
  2464. "entry found at [%d].\n", ha->host_no,
  2465. rscn_out_iter));
  2466. ha->rscn_out_ptr = rscn_out_iter;
  2467. }
  2468. /* Queue overflow, set switch default case. */
  2469. if (ha->flags.rscn_queue_overflow) {
  2470. DEBUG(printk("scsi(%ld): device_resync: rscn "
  2471. "overflow.\n", ha->host_no));
  2472. format = 3;
  2473. ha->flags.rscn_queue_overflow = 0;
  2474. }
  2475. switch (format) {
  2476. case 0:
  2477. mask = 0xffffff;
  2478. break;
  2479. case 1:
  2480. mask = 0xffff00;
  2481. break;
  2482. case 2:
  2483. mask = 0xff0000;
  2484. break;
  2485. default:
  2486. mask = 0x0;
  2487. d_id.b24 = 0;
  2488. ha->rscn_out_ptr = ha->rscn_in_ptr;
  2489. break;
  2490. }
  2491. rval = QLA_SUCCESS;
  2492. list_for_each_entry(fcport, &pha->fcports, list) {
  2493. if (fcport->vp_idx != ha->vp_idx)
  2494. continue;
  2495. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2496. (fcport->d_id.b24 & mask) != d_id.b24 ||
  2497. fcport->port_type == FCT_BROADCAST)
  2498. continue;
  2499. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  2500. if (format != 3 ||
  2501. fcport->port_type != FCT_INITIATOR) {
  2502. qla2x00_mark_device_lost(ha, fcport,
  2503. 0, 0);
  2504. }
  2505. }
  2506. fcport->flags &= ~FCF_FARP_DONE;
  2507. }
  2508. }
  2509. return (rval);
  2510. }
  2511. /*
  2512. * qla2x00_fabric_dev_login
  2513. * Login fabric target device and update FC port database.
  2514. *
  2515. * Input:
  2516. * ha: adapter state pointer.
  2517. * fcport: port structure list pointer.
  2518. * next_loopid: contains value of a new loop ID that can be used
  2519. * by the next login attempt.
  2520. *
  2521. * Returns:
  2522. * qla2x00 local function return status code.
  2523. *
  2524. * Context:
  2525. * Kernel context.
  2526. */
  2527. static int
  2528. qla2x00_fabric_dev_login(scsi_qla_host_t *ha, fc_port_t *fcport,
  2529. uint16_t *next_loopid)
  2530. {
  2531. int rval;
  2532. int retry;
  2533. uint8_t opts;
  2534. rval = QLA_SUCCESS;
  2535. retry = 0;
  2536. rval = qla2x00_fabric_login(ha, fcport, next_loopid);
  2537. if (rval == QLA_SUCCESS) {
  2538. /* Send an ADISC to tape devices.*/
  2539. opts = 0;
  2540. if (fcport->flags & FCF_TAPE_PRESENT)
  2541. opts |= BIT_1;
  2542. rval = qla2x00_get_port_database(ha, fcport, opts);
  2543. if (rval != QLA_SUCCESS) {
  2544. ha->isp_ops->fabric_logout(ha, fcport->loop_id,
  2545. fcport->d_id.b.domain, fcport->d_id.b.area,
  2546. fcport->d_id.b.al_pa);
  2547. qla2x00_mark_device_lost(ha, fcport, 1, 0);
  2548. } else {
  2549. qla2x00_update_fcport(ha, fcport);
  2550. }
  2551. }
  2552. return (rval);
  2553. }
  2554. /*
  2555. * qla2x00_fabric_login
  2556. * Issue fabric login command.
  2557. *
  2558. * Input:
  2559. * ha = adapter block pointer.
  2560. * device = pointer to FC device type structure.
  2561. *
  2562. * Returns:
  2563. * 0 - Login successfully
  2564. * 1 - Login failed
  2565. * 2 - Initiator device
  2566. * 3 - Fatal error
  2567. */
  2568. int
  2569. qla2x00_fabric_login(scsi_qla_host_t *ha, fc_port_t *fcport,
  2570. uint16_t *next_loopid)
  2571. {
  2572. int rval;
  2573. int retry;
  2574. uint16_t tmp_loopid;
  2575. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2576. retry = 0;
  2577. tmp_loopid = 0;
  2578. for (;;) {
  2579. DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x "
  2580. "for port %02x%02x%02x.\n",
  2581. ha->host_no, fcport->loop_id, fcport->d_id.b.domain,
  2582. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2583. /* Login fcport on switch. */
  2584. ha->isp_ops->fabric_login(ha, fcport->loop_id,
  2585. fcport->d_id.b.domain, fcport->d_id.b.area,
  2586. fcport->d_id.b.al_pa, mb, BIT_0);
  2587. if (mb[0] == MBS_PORT_ID_USED) {
  2588. /*
  2589. * Device has another loop ID. The firmware team
  2590. * recommends the driver perform an implicit login with
  2591. * the specified ID again. The ID we just used is save
  2592. * here so we return with an ID that can be tried by
  2593. * the next login.
  2594. */
  2595. retry++;
  2596. tmp_loopid = fcport->loop_id;
  2597. fcport->loop_id = mb[1];
  2598. DEBUG(printk("Fabric Login: port in use - next "
  2599. "loop id=0x%04x, port Id=%02x%02x%02x.\n",
  2600. fcport->loop_id, fcport->d_id.b.domain,
  2601. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2602. } else if (mb[0] == MBS_COMMAND_COMPLETE) {
  2603. /*
  2604. * Login succeeded.
  2605. */
  2606. if (retry) {
  2607. /* A retry occurred before. */
  2608. *next_loopid = tmp_loopid;
  2609. } else {
  2610. /*
  2611. * No retry occurred before. Just increment the
  2612. * ID value for next login.
  2613. */
  2614. *next_loopid = (fcport->loop_id + 1);
  2615. }
  2616. if (mb[1] & BIT_0) {
  2617. fcport->port_type = FCT_INITIATOR;
  2618. } else {
  2619. fcport->port_type = FCT_TARGET;
  2620. if (mb[1] & BIT_1) {
  2621. fcport->flags |= FCF_TAPE_PRESENT;
  2622. }
  2623. }
  2624. if (mb[10] & BIT_0)
  2625. fcport->supported_classes |= FC_COS_CLASS2;
  2626. if (mb[10] & BIT_1)
  2627. fcport->supported_classes |= FC_COS_CLASS3;
  2628. rval = QLA_SUCCESS;
  2629. break;
  2630. } else if (mb[0] == MBS_LOOP_ID_USED) {
  2631. /*
  2632. * Loop ID already used, try next loop ID.
  2633. */
  2634. fcport->loop_id++;
  2635. rval = qla2x00_find_new_loop_id(ha, fcport);
  2636. if (rval != QLA_SUCCESS) {
  2637. /* Ran out of loop IDs to use */
  2638. break;
  2639. }
  2640. } else if (mb[0] == MBS_COMMAND_ERROR) {
  2641. /*
  2642. * Firmware possibly timed out during login. If NO
  2643. * retries are left to do then the device is declared
  2644. * dead.
  2645. */
  2646. *next_loopid = fcport->loop_id;
  2647. ha->isp_ops->fabric_logout(ha, fcport->loop_id,
  2648. fcport->d_id.b.domain, fcport->d_id.b.area,
  2649. fcport->d_id.b.al_pa);
  2650. qla2x00_mark_device_lost(ha, fcport, 1, 0);
  2651. rval = 1;
  2652. break;
  2653. } else {
  2654. /*
  2655. * unrecoverable / not handled error
  2656. */
  2657. DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x "
  2658. "loop_id=%x jiffies=%lx.\n",
  2659. __func__, ha->host_no, mb[0],
  2660. fcport->d_id.b.domain, fcport->d_id.b.area,
  2661. fcport->d_id.b.al_pa, fcport->loop_id, jiffies));
  2662. *next_loopid = fcport->loop_id;
  2663. ha->isp_ops->fabric_logout(ha, fcport->loop_id,
  2664. fcport->d_id.b.domain, fcport->d_id.b.area,
  2665. fcport->d_id.b.al_pa);
  2666. fcport->loop_id = FC_NO_LOOP_ID;
  2667. fcport->login_retry = 0;
  2668. rval = 3;
  2669. break;
  2670. }
  2671. }
  2672. return (rval);
  2673. }
  2674. /*
  2675. * qla2x00_local_device_login
  2676. * Issue local device login command.
  2677. *
  2678. * Input:
  2679. * ha = adapter block pointer.
  2680. * loop_id = loop id of device to login to.
  2681. *
  2682. * Returns (Where's the #define!!!!):
  2683. * 0 - Login successfully
  2684. * 1 - Login failed
  2685. * 3 - Fatal error
  2686. */
  2687. int
  2688. qla2x00_local_device_login(scsi_qla_host_t *ha, fc_port_t *fcport)
  2689. {
  2690. int rval;
  2691. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2692. memset(mb, 0, sizeof(mb));
  2693. rval = qla2x00_login_local_device(ha, fcport, mb, BIT_0);
  2694. if (rval == QLA_SUCCESS) {
  2695. /* Interrogate mailbox registers for any errors */
  2696. if (mb[0] == MBS_COMMAND_ERROR)
  2697. rval = 1;
  2698. else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
  2699. /* device not in PCB table */
  2700. rval = 3;
  2701. }
  2702. return (rval);
  2703. }
  2704. /*
  2705. * qla2x00_loop_resync
  2706. * Resync with fibre channel devices.
  2707. *
  2708. * Input:
  2709. * ha = adapter block pointer.
  2710. *
  2711. * Returns:
  2712. * 0 = success
  2713. */
  2714. int
  2715. qla2x00_loop_resync(scsi_qla_host_t *ha)
  2716. {
  2717. int rval;
  2718. uint32_t wait_time;
  2719. rval = QLA_SUCCESS;
  2720. atomic_set(&ha->loop_state, LOOP_UPDATE);
  2721. clear_bit(ISP_ABORT_RETRY, &ha->dpc_flags);
  2722. if (ha->flags.online) {
  2723. if (!(rval = qla2x00_fw_ready(ha))) {
  2724. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  2725. wait_time = 256;
  2726. do {
  2727. atomic_set(&ha->loop_state, LOOP_UPDATE);
  2728. /* Issue a marker after FW becomes ready. */
  2729. qla2x00_marker(ha, 0, 0, MK_SYNC_ALL);
  2730. ha->marker_needed = 0;
  2731. /* Remap devices on Loop. */
  2732. clear_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
  2733. qla2x00_configure_loop(ha);
  2734. wait_time--;
  2735. } while (!atomic_read(&ha->loop_down_timer) &&
  2736. !(test_bit(ISP_ABORT_NEEDED, &ha->dpc_flags)) &&
  2737. wait_time &&
  2738. (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)));
  2739. }
  2740. }
  2741. if (test_bit(ISP_ABORT_NEEDED, &ha->dpc_flags)) {
  2742. return (QLA_FUNCTION_FAILED);
  2743. }
  2744. if (rval) {
  2745. DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
  2746. }
  2747. return (rval);
  2748. }
  2749. void
  2750. qla2x00_update_fcports(scsi_qla_host_t *ha)
  2751. {
  2752. fc_port_t *fcport;
  2753. /* Go with deferred removal of rport references. */
  2754. list_for_each_entry(fcport, &ha->fcports, list)
  2755. if (fcport->drport)
  2756. qla2x00_rport_del(fcport);
  2757. }
  2758. /*
  2759. * qla2x00_abort_isp
  2760. * Resets ISP and aborts all outstanding commands.
  2761. *
  2762. * Input:
  2763. * ha = adapter block pointer.
  2764. *
  2765. * Returns:
  2766. * 0 = success
  2767. */
  2768. int
  2769. qla2x00_abort_isp(scsi_qla_host_t *ha)
  2770. {
  2771. int rval;
  2772. uint8_t status = 0;
  2773. if (ha->flags.online) {
  2774. ha->flags.online = 0;
  2775. clear_bit(ISP_ABORT_NEEDED, &ha->dpc_flags);
  2776. ha->qla_stats.total_isp_aborts++;
  2777. qla_printk(KERN_INFO, ha,
  2778. "Performing ISP error recovery - ha= %p.\n", ha);
  2779. ha->isp_ops->reset_chip(ha);
  2780. atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
  2781. if (atomic_read(&ha->loop_state) != LOOP_DOWN) {
  2782. atomic_set(&ha->loop_state, LOOP_DOWN);
  2783. qla2x00_mark_all_devices_lost(ha, 0);
  2784. } else {
  2785. if (!atomic_read(&ha->loop_down_timer))
  2786. atomic_set(&ha->loop_down_timer,
  2787. LOOP_DOWN_TIME);
  2788. }
  2789. /* Requeue all commands in outstanding command list. */
  2790. qla2x00_abort_all_cmds(ha, DID_RESET << 16);
  2791. ha->isp_ops->get_flash_version(ha, ha->request_ring);
  2792. ha->isp_ops->nvram_config(ha);
  2793. if (!qla2x00_restart_isp(ha)) {
  2794. clear_bit(RESET_MARKER_NEEDED, &ha->dpc_flags);
  2795. if (!atomic_read(&ha->loop_down_timer)) {
  2796. /*
  2797. * Issue marker command only when we are going
  2798. * to start the I/O .
  2799. */
  2800. ha->marker_needed = 1;
  2801. }
  2802. ha->flags.online = 1;
  2803. ha->isp_ops->enable_intrs(ha);
  2804. ha->isp_abort_cnt = 0;
  2805. clear_bit(ISP_ABORT_RETRY, &ha->dpc_flags);
  2806. if (ha->fce) {
  2807. ha->flags.fce_enabled = 1;
  2808. memset(ha->fce, 0,
  2809. fce_calc_size(ha->fce_bufs));
  2810. rval = qla2x00_enable_fce_trace(ha,
  2811. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  2812. &ha->fce_bufs);
  2813. if (rval) {
  2814. qla_printk(KERN_WARNING, ha,
  2815. "Unable to reinitialize FCE "
  2816. "(%d).\n", rval);
  2817. ha->flags.fce_enabled = 0;
  2818. }
  2819. }
  2820. if (ha->eft) {
  2821. memset(ha->eft, 0, EFT_SIZE);
  2822. rval = qla2x00_enable_eft_trace(ha,
  2823. ha->eft_dma, EFT_NUM_BUFFERS);
  2824. if (rval) {
  2825. qla_printk(KERN_WARNING, ha,
  2826. "Unable to reinitialize EFT "
  2827. "(%d).\n", rval);
  2828. }
  2829. }
  2830. } else { /* failed the ISP abort */
  2831. ha->flags.online = 1;
  2832. if (test_bit(ISP_ABORT_RETRY, &ha->dpc_flags)) {
  2833. if (ha->isp_abort_cnt == 0) {
  2834. qla_printk(KERN_WARNING, ha,
  2835. "ISP error recovery failed - "
  2836. "board disabled\n");
  2837. /*
  2838. * The next call disables the board
  2839. * completely.
  2840. */
  2841. ha->isp_ops->reset_adapter(ha);
  2842. ha->flags.online = 0;
  2843. clear_bit(ISP_ABORT_RETRY,
  2844. &ha->dpc_flags);
  2845. status = 0;
  2846. } else { /* schedule another ISP abort */
  2847. ha->isp_abort_cnt--;
  2848. DEBUG(printk("qla%ld: ISP abort - "
  2849. "retry remaining %d\n",
  2850. ha->host_no, ha->isp_abort_cnt));
  2851. status = 1;
  2852. }
  2853. } else {
  2854. ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
  2855. DEBUG(printk("qla2x00(%ld): ISP error recovery "
  2856. "- retrying (%d) more times\n",
  2857. ha->host_no, ha->isp_abort_cnt));
  2858. set_bit(ISP_ABORT_RETRY, &ha->dpc_flags);
  2859. status = 1;
  2860. }
  2861. }
  2862. }
  2863. if (status) {
  2864. qla_printk(KERN_INFO, ha,
  2865. "qla2x00_abort_isp: **** FAILED ****\n");
  2866. } else {
  2867. DEBUG(printk(KERN_INFO
  2868. "qla2x00_abort_isp(%ld): exiting.\n",
  2869. ha->host_no));
  2870. }
  2871. return(status);
  2872. }
  2873. /*
  2874. * qla2x00_restart_isp
  2875. * restarts the ISP after a reset
  2876. *
  2877. * Input:
  2878. * ha = adapter block pointer.
  2879. *
  2880. * Returns:
  2881. * 0 = success
  2882. */
  2883. static int
  2884. qla2x00_restart_isp(scsi_qla_host_t *ha)
  2885. {
  2886. uint8_t status = 0;
  2887. uint32_t wait_time;
  2888. /* If firmware needs to be loaded */
  2889. if (qla2x00_isp_firmware(ha)) {
  2890. ha->flags.online = 0;
  2891. if (!(status = ha->isp_ops->chip_diag(ha)))
  2892. status = qla2x00_setup_chip(ha);
  2893. }
  2894. if (!status && !(status = qla2x00_init_rings(ha))) {
  2895. clear_bit(RESET_MARKER_NEEDED, &ha->dpc_flags);
  2896. if (!(status = qla2x00_fw_ready(ha))) {
  2897. DEBUG(printk("%s(): Start configure loop, "
  2898. "status = %d\n", __func__, status));
  2899. /* Issue a marker after FW becomes ready. */
  2900. qla2x00_marker(ha, 0, 0, MK_SYNC_ALL);
  2901. ha->flags.online = 1;
  2902. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  2903. wait_time = 256;
  2904. do {
  2905. clear_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
  2906. qla2x00_configure_loop(ha);
  2907. wait_time--;
  2908. } while (!atomic_read(&ha->loop_down_timer) &&
  2909. !(test_bit(ISP_ABORT_NEEDED, &ha->dpc_flags)) &&
  2910. wait_time &&
  2911. (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)));
  2912. }
  2913. /* if no cable then assume it's good */
  2914. if ((ha->device_flags & DFLG_NO_CABLE))
  2915. status = 0;
  2916. DEBUG(printk("%s(): Configure loop done, status = 0x%x\n",
  2917. __func__,
  2918. status));
  2919. }
  2920. return (status);
  2921. }
  2922. /*
  2923. * qla2x00_reset_adapter
  2924. * Reset adapter.
  2925. *
  2926. * Input:
  2927. * ha = adapter block pointer.
  2928. */
  2929. void
  2930. qla2x00_reset_adapter(scsi_qla_host_t *ha)
  2931. {
  2932. unsigned long flags = 0;
  2933. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  2934. ha->flags.online = 0;
  2935. ha->isp_ops->disable_intrs(ha);
  2936. spin_lock_irqsave(&ha->hardware_lock, flags);
  2937. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  2938. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  2939. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  2940. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  2941. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2942. }
  2943. void
  2944. qla24xx_reset_adapter(scsi_qla_host_t *ha)
  2945. {
  2946. unsigned long flags = 0;
  2947. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  2948. ha->flags.online = 0;
  2949. ha->isp_ops->disable_intrs(ha);
  2950. spin_lock_irqsave(&ha->hardware_lock, flags);
  2951. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  2952. RD_REG_DWORD(&reg->hccr);
  2953. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  2954. RD_REG_DWORD(&reg->hccr);
  2955. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2956. }
  2957. /* On sparc systems, obtain port and node WWN from firmware
  2958. * properties.
  2959. */
  2960. static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *ha, struct nvram_24xx *nv)
  2961. {
  2962. #ifdef CONFIG_SPARC
  2963. struct pci_dev *pdev = ha->pdev;
  2964. struct device_node *dp = pci_device_to_OF_node(pdev);
  2965. const u8 *val;
  2966. int len;
  2967. val = of_get_property(dp, "port-wwn", &len);
  2968. if (val && len >= WWN_SIZE)
  2969. memcpy(nv->port_name, val, WWN_SIZE);
  2970. val = of_get_property(dp, "node-wwn", &len);
  2971. if (val && len >= WWN_SIZE)
  2972. memcpy(nv->node_name, val, WWN_SIZE);
  2973. #endif
  2974. }
  2975. int
  2976. qla24xx_nvram_config(scsi_qla_host_t *ha)
  2977. {
  2978. int rval;
  2979. struct init_cb_24xx *icb;
  2980. struct nvram_24xx *nv;
  2981. uint32_t *dptr;
  2982. uint8_t *dptr1, *dptr2;
  2983. uint32_t chksum;
  2984. uint16_t cnt;
  2985. rval = QLA_SUCCESS;
  2986. icb = (struct init_cb_24xx *)ha->init_cb;
  2987. nv = ha->nvram;
  2988. /* Determine NVRAM starting address. */
  2989. ha->nvram_size = sizeof(struct nvram_24xx);
  2990. ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
  2991. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  2992. ha->vpd_base = FA_NVRAM_VPD0_ADDR;
  2993. if (PCI_FUNC(ha->pdev->devfn)) {
  2994. ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
  2995. ha->vpd_base = FA_NVRAM_VPD1_ADDR;
  2996. }
  2997. /* Get VPD data into cache */
  2998. ha->vpd = ha->nvram + VPD_OFFSET;
  2999. ha->isp_ops->read_nvram(ha, (uint8_t *)ha->vpd,
  3000. ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
  3001. /* Get NVRAM data into cache and calculate checksum. */
  3002. dptr = (uint32_t *)nv;
  3003. ha->isp_ops->read_nvram(ha, (uint8_t *)dptr, ha->nvram_base,
  3004. ha->nvram_size);
  3005. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3006. chksum += le32_to_cpu(*dptr++);
  3007. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", ha->host_no));
  3008. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3009. /* Bad NVRAM data, set defaults parameters. */
  3010. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3011. || nv->id[3] != ' ' ||
  3012. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3013. /* Reset NVRAM data. */
  3014. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3015. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3016. le16_to_cpu(nv->nvram_version));
  3017. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3018. "invalid -- WWPN) defaults.\n");
  3019. /*
  3020. * Set default initialization control block.
  3021. */
  3022. memset(nv, 0, ha->nvram_size);
  3023. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3024. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3025. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3026. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3027. nv->exchange_count = __constant_cpu_to_le16(0);
  3028. nv->hard_address = __constant_cpu_to_le16(124);
  3029. nv->port_name[0] = 0x21;
  3030. nv->port_name[1] = 0x00 + PCI_FUNC(ha->pdev->devfn);
  3031. nv->port_name[2] = 0x00;
  3032. nv->port_name[3] = 0xe0;
  3033. nv->port_name[4] = 0x8b;
  3034. nv->port_name[5] = 0x1c;
  3035. nv->port_name[6] = 0x55;
  3036. nv->port_name[7] = 0x86;
  3037. nv->node_name[0] = 0x20;
  3038. nv->node_name[1] = 0x00;
  3039. nv->node_name[2] = 0x00;
  3040. nv->node_name[3] = 0xe0;
  3041. nv->node_name[4] = 0x8b;
  3042. nv->node_name[5] = 0x1c;
  3043. nv->node_name[6] = 0x55;
  3044. nv->node_name[7] = 0x86;
  3045. qla24xx_nvram_wwn_from_ofw(ha, nv);
  3046. nv->login_retry_count = __constant_cpu_to_le16(8);
  3047. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3048. nv->login_timeout = __constant_cpu_to_le16(0);
  3049. nv->firmware_options_1 =
  3050. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3051. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3052. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3053. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3054. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3055. nv->efi_parameters = __constant_cpu_to_le32(0);
  3056. nv->reset_delay = 5;
  3057. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3058. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3059. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3060. rval = 1;
  3061. }
  3062. /* Reset Initialization control block */
  3063. memset(icb, 0, sizeof(struct init_cb_24xx));
  3064. /* Copy 1st segment. */
  3065. dptr1 = (uint8_t *)icb;
  3066. dptr2 = (uint8_t *)&nv->version;
  3067. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3068. while (cnt--)
  3069. *dptr1++ = *dptr2++;
  3070. icb->login_retry_count = nv->login_retry_count;
  3071. icb->link_down_on_nos = nv->link_down_on_nos;
  3072. /* Copy 2nd segment. */
  3073. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3074. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3075. cnt = (uint8_t *)&icb->reserved_3 -
  3076. (uint8_t *)&icb->interrupt_delay_timer;
  3077. while (cnt--)
  3078. *dptr1++ = *dptr2++;
  3079. /*
  3080. * Setup driver NVRAM options.
  3081. */
  3082. qla2x00_set_model_info(ha, nv->model_name, sizeof(nv->model_name),
  3083. "QLA2462");
  3084. /* Use alternate WWN? */
  3085. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3086. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3087. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3088. }
  3089. /* Prepare nodename */
  3090. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3091. /*
  3092. * Firmware will apply the following mask if the nodename was
  3093. * not provided.
  3094. */
  3095. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3096. icb->node_name[0] &= 0xF0;
  3097. }
  3098. /* Set host adapter parameters. */
  3099. ha->flags.disable_risc_code_load = 0;
  3100. ha->flags.enable_lip_reset = 0;
  3101. ha->flags.enable_lip_full_login =
  3102. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3103. ha->flags.enable_target_reset =
  3104. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3105. ha->flags.enable_led_scheme = 0;
  3106. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3107. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3108. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3109. memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
  3110. sizeof(ha->fw_seriallink_options24));
  3111. /* save HBA serial number */
  3112. ha->serial0 = icb->port_name[5];
  3113. ha->serial1 = icb->port_name[6];
  3114. ha->serial2 = icb->port_name[7];
  3115. ha->node_name = icb->node_name;
  3116. ha->port_name = icb->port_name;
  3117. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3118. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3119. /* Set minimum login_timeout to 4 seconds. */
  3120. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3121. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3122. if (le16_to_cpu(nv->login_timeout) < 4)
  3123. nv->login_timeout = __constant_cpu_to_le16(4);
  3124. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3125. icb->login_timeout = nv->login_timeout;
  3126. /* Set minimum RATOV to 100 tenths of a second. */
  3127. ha->r_a_tov = 100;
  3128. ha->loop_reset_delay = nv->reset_delay;
  3129. /* Link Down Timeout = 0:
  3130. *
  3131. * When Port Down timer expires we will start returning
  3132. * I/O's to OS with "DID_NO_CONNECT".
  3133. *
  3134. * Link Down Timeout != 0:
  3135. *
  3136. * The driver waits for the link to come up after link down
  3137. * before returning I/Os to OS with "DID_NO_CONNECT".
  3138. */
  3139. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3140. ha->loop_down_abort_time =
  3141. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3142. } else {
  3143. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3144. ha->loop_down_abort_time =
  3145. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3146. }
  3147. /* Need enough time to try and get the port back. */
  3148. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3149. if (qlport_down_retry)
  3150. ha->port_down_retry_count = qlport_down_retry;
  3151. /* Set login_retry_count */
  3152. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3153. if (ha->port_down_retry_count ==
  3154. le16_to_cpu(nv->port_down_retry_count) &&
  3155. ha->port_down_retry_count > 3)
  3156. ha->login_retry_count = ha->port_down_retry_count;
  3157. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3158. ha->login_retry_count = ha->port_down_retry_count;
  3159. if (ql2xloginretrycount)
  3160. ha->login_retry_count = ql2xloginretrycount;
  3161. /* Enable ZIO. */
  3162. if (!ha->flags.init_done) {
  3163. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3164. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3165. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3166. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3167. }
  3168. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3169. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3170. ha->flags.process_response_queue = 0;
  3171. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3172. ha->zio_mode = QLA_ZIO_MODE_6;
  3173. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3174. "(%d us).\n", ha->host_no, ha->zio_mode,
  3175. ha->zio_timer * 100));
  3176. qla_printk(KERN_INFO, ha,
  3177. "ZIO mode %d enabled; timer delay (%d us).\n",
  3178. ha->zio_mode, ha->zio_timer * 100);
  3179. icb->firmware_options_2 |= cpu_to_le32(
  3180. (uint32_t)ha->zio_mode);
  3181. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3182. ha->flags.process_response_queue = 1;
  3183. }
  3184. if (rval) {
  3185. DEBUG2_3(printk(KERN_WARNING
  3186. "scsi(%ld): NVRAM configuration failed!\n", ha->host_no));
  3187. }
  3188. return (rval);
  3189. }
  3190. static int
  3191. qla24xx_load_risc_flash(scsi_qla_host_t *ha, uint32_t *srisc_addr)
  3192. {
  3193. int rval;
  3194. int segments, fragment;
  3195. uint32_t faddr;
  3196. uint32_t *dcode, dlen;
  3197. uint32_t risc_addr;
  3198. uint32_t risc_size;
  3199. uint32_t i;
  3200. rval = QLA_SUCCESS;
  3201. segments = FA_RISC_CODE_SEGMENTS;
  3202. faddr = FA_RISC_CODE_ADDR;
  3203. dcode = (uint32_t *)ha->request_ring;
  3204. *srisc_addr = 0;
  3205. /* Validate firmware image by checking version. */
  3206. qla24xx_read_flash_data(ha, dcode, faddr + 4, 4);
  3207. for (i = 0; i < 4; i++)
  3208. dcode[i] = be32_to_cpu(dcode[i]);
  3209. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3210. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3211. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3212. dcode[3] == 0)) {
  3213. qla_printk(KERN_WARNING, ha,
  3214. "Unable to verify integrity of flash firmware image!\n");
  3215. qla_printk(KERN_WARNING, ha,
  3216. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3217. dcode[1], dcode[2], dcode[3]);
  3218. return QLA_FUNCTION_FAILED;
  3219. }
  3220. while (segments && rval == QLA_SUCCESS) {
  3221. /* Read segment's load information. */
  3222. qla24xx_read_flash_data(ha, dcode, faddr, 4);
  3223. risc_addr = be32_to_cpu(dcode[2]);
  3224. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3225. risc_size = be32_to_cpu(dcode[3]);
  3226. fragment = 0;
  3227. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3228. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3229. if (dlen > risc_size)
  3230. dlen = risc_size;
  3231. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3232. "addr %x, number of dwords 0x%x, offset 0x%x.\n",
  3233. ha->host_no, risc_addr, dlen, faddr));
  3234. qla24xx_read_flash_data(ha, dcode, faddr, dlen);
  3235. for (i = 0; i < dlen; i++)
  3236. dcode[i] = swab32(dcode[i]);
  3237. rval = qla2x00_load_ram(ha, ha->request_dma, risc_addr,
  3238. dlen);
  3239. if (rval) {
  3240. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3241. "segment %d of firmware\n", ha->host_no,
  3242. fragment));
  3243. qla_printk(KERN_WARNING, ha,
  3244. "[ERROR] Failed to load segment %d of "
  3245. "firmware\n", fragment);
  3246. break;
  3247. }
  3248. faddr += dlen;
  3249. risc_addr += dlen;
  3250. risc_size -= dlen;
  3251. fragment++;
  3252. }
  3253. /* Next segment. */
  3254. segments--;
  3255. }
  3256. return rval;
  3257. }
  3258. #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
  3259. int
  3260. qla2x00_load_risc(scsi_qla_host_t *ha, uint32_t *srisc_addr)
  3261. {
  3262. int rval;
  3263. int i, fragment;
  3264. uint16_t *wcode, *fwcode;
  3265. uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
  3266. struct fw_blob *blob;
  3267. /* Load firmware blob. */
  3268. blob = qla2x00_request_firmware(ha);
  3269. if (!blob) {
  3270. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3271. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3272. "from: " QLA_FW_URL ".\n");
  3273. return QLA_FUNCTION_FAILED;
  3274. }
  3275. rval = QLA_SUCCESS;
  3276. wcode = (uint16_t *)ha->request_ring;
  3277. *srisc_addr = 0;
  3278. fwcode = (uint16_t *)blob->fw->data;
  3279. fwclen = 0;
  3280. /* Validate firmware image by checking version. */
  3281. if (blob->fw->size < 8 * sizeof(uint16_t)) {
  3282. qla_printk(KERN_WARNING, ha,
  3283. "Unable to verify integrity of firmware image (%Zd)!\n",
  3284. blob->fw->size);
  3285. goto fail_fw_integrity;
  3286. }
  3287. for (i = 0; i < 4; i++)
  3288. wcode[i] = be16_to_cpu(fwcode[i + 4]);
  3289. if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
  3290. wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
  3291. wcode[2] == 0 && wcode[3] == 0)) {
  3292. qla_printk(KERN_WARNING, ha,
  3293. "Unable to verify integrity of firmware image!\n");
  3294. qla_printk(KERN_WARNING, ha,
  3295. "Firmware data: %04x %04x %04x %04x!\n", wcode[0],
  3296. wcode[1], wcode[2], wcode[3]);
  3297. goto fail_fw_integrity;
  3298. }
  3299. seg = blob->segs;
  3300. while (*seg && rval == QLA_SUCCESS) {
  3301. risc_addr = *seg;
  3302. *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
  3303. risc_size = be16_to_cpu(fwcode[3]);
  3304. /* Validate firmware image size. */
  3305. fwclen += risc_size * sizeof(uint16_t);
  3306. if (blob->fw->size < fwclen) {
  3307. qla_printk(KERN_WARNING, ha,
  3308. "Unable to verify integrity of firmware image "
  3309. "(%Zd)!\n", blob->fw->size);
  3310. goto fail_fw_integrity;
  3311. }
  3312. fragment = 0;
  3313. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3314. wlen = (uint16_t)(ha->fw_transfer_size >> 1);
  3315. if (wlen > risc_size)
  3316. wlen = risc_size;
  3317. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3318. "addr %x, number of words 0x%x.\n", ha->host_no,
  3319. risc_addr, wlen));
  3320. for (i = 0; i < wlen; i++)
  3321. wcode[i] = swab16(fwcode[i]);
  3322. rval = qla2x00_load_ram(ha, ha->request_dma, risc_addr,
  3323. wlen);
  3324. if (rval) {
  3325. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3326. "segment %d of firmware\n", ha->host_no,
  3327. fragment));
  3328. qla_printk(KERN_WARNING, ha,
  3329. "[ERROR] Failed to load segment %d of "
  3330. "firmware\n", fragment);
  3331. break;
  3332. }
  3333. fwcode += wlen;
  3334. risc_addr += wlen;
  3335. risc_size -= wlen;
  3336. fragment++;
  3337. }
  3338. /* Next segment. */
  3339. seg++;
  3340. }
  3341. return rval;
  3342. fail_fw_integrity:
  3343. return QLA_FUNCTION_FAILED;
  3344. }
  3345. int
  3346. qla24xx_load_risc(scsi_qla_host_t *ha, uint32_t *srisc_addr)
  3347. {
  3348. int rval;
  3349. int segments, fragment;
  3350. uint32_t *dcode, dlen;
  3351. uint32_t risc_addr;
  3352. uint32_t risc_size;
  3353. uint32_t i;
  3354. struct fw_blob *blob;
  3355. uint32_t *fwcode, fwclen;
  3356. /* Load firmware blob. */
  3357. blob = qla2x00_request_firmware(ha);
  3358. if (!blob) {
  3359. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3360. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3361. "from: " QLA_FW_URL ".\n");
  3362. /* Try to load RISC code from flash. */
  3363. qla_printk(KERN_ERR, ha, "Attempting to load (potentially "
  3364. "outdated) firmware from flash.\n");
  3365. return qla24xx_load_risc_flash(ha, srisc_addr);
  3366. }
  3367. rval = QLA_SUCCESS;
  3368. segments = FA_RISC_CODE_SEGMENTS;
  3369. dcode = (uint32_t *)ha->request_ring;
  3370. *srisc_addr = 0;
  3371. fwcode = (uint32_t *)blob->fw->data;
  3372. fwclen = 0;
  3373. /* Validate firmware image by checking version. */
  3374. if (blob->fw->size < 8 * sizeof(uint32_t)) {
  3375. qla_printk(KERN_WARNING, ha,
  3376. "Unable to verify integrity of firmware image (%Zd)!\n",
  3377. blob->fw->size);
  3378. goto fail_fw_integrity;
  3379. }
  3380. for (i = 0; i < 4; i++)
  3381. dcode[i] = be32_to_cpu(fwcode[i + 4]);
  3382. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3383. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3384. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3385. dcode[3] == 0)) {
  3386. qla_printk(KERN_WARNING, ha,
  3387. "Unable to verify integrity of firmware image!\n");
  3388. qla_printk(KERN_WARNING, ha,
  3389. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3390. dcode[1], dcode[2], dcode[3]);
  3391. goto fail_fw_integrity;
  3392. }
  3393. while (segments && rval == QLA_SUCCESS) {
  3394. risc_addr = be32_to_cpu(fwcode[2]);
  3395. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3396. risc_size = be32_to_cpu(fwcode[3]);
  3397. /* Validate firmware image size. */
  3398. fwclen += risc_size * sizeof(uint32_t);
  3399. if (blob->fw->size < fwclen) {
  3400. qla_printk(KERN_WARNING, ha,
  3401. "Unable to verify integrity of firmware image "
  3402. "(%Zd)!\n", blob->fw->size);
  3403. goto fail_fw_integrity;
  3404. }
  3405. fragment = 0;
  3406. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3407. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3408. if (dlen > risc_size)
  3409. dlen = risc_size;
  3410. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3411. "addr %x, number of dwords 0x%x.\n", ha->host_no,
  3412. risc_addr, dlen));
  3413. for (i = 0; i < dlen; i++)
  3414. dcode[i] = swab32(fwcode[i]);
  3415. rval = qla2x00_load_ram(ha, ha->request_dma, risc_addr,
  3416. dlen);
  3417. if (rval) {
  3418. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3419. "segment %d of firmware\n", ha->host_no,
  3420. fragment));
  3421. qla_printk(KERN_WARNING, ha,
  3422. "[ERROR] Failed to load segment %d of "
  3423. "firmware\n", fragment);
  3424. break;
  3425. }
  3426. fwcode += dlen;
  3427. risc_addr += dlen;
  3428. risc_size -= dlen;
  3429. fragment++;
  3430. }
  3431. /* Next segment. */
  3432. segments--;
  3433. }
  3434. return rval;
  3435. fail_fw_integrity:
  3436. return QLA_FUNCTION_FAILED;
  3437. }
  3438. void
  3439. qla2x00_try_to_stop_firmware(scsi_qla_host_t *ha)
  3440. {
  3441. int ret, retries;
  3442. if (!IS_FWI2_CAPABLE(ha))
  3443. return;
  3444. if (!ha->fw_major_version)
  3445. return;
  3446. ret = qla2x00_stop_firmware(ha);
  3447. for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
  3448. retries ; retries--) {
  3449. qla2x00_reset_chip(ha);
  3450. if (qla2x00_chip_diag(ha) != QLA_SUCCESS)
  3451. continue;
  3452. if (qla2x00_setup_chip(ha) != QLA_SUCCESS)
  3453. continue;
  3454. qla_printk(KERN_INFO, ha,
  3455. "Attempting retry of stop-firmware command...\n");
  3456. ret = qla2x00_stop_firmware(ha);
  3457. }
  3458. }
  3459. int
  3460. qla24xx_configure_vhba(scsi_qla_host_t *ha)
  3461. {
  3462. int rval = QLA_SUCCESS;
  3463. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3464. if (!ha->parent)
  3465. return -EINVAL;
  3466. rval = qla2x00_fw_ready(ha->parent);
  3467. if (rval == QLA_SUCCESS) {
  3468. clear_bit(RESET_MARKER_NEEDED, &ha->dpc_flags);
  3469. qla2x00_marker(ha, 0, 0, MK_SYNC_ALL);
  3470. }
  3471. ha->flags.management_server_logged_in = 0;
  3472. /* Login to SNS first */
  3473. qla24xx_login_fabric(ha->parent, NPH_SNS, 0xff, 0xff, 0xfc,
  3474. mb, BIT_1);
  3475. if (mb[0] != MBS_COMMAND_COMPLETE) {
  3476. DEBUG15(qla_printk(KERN_INFO, ha,
  3477. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  3478. "mb[2]=%x mb[6]=%x mb[7]=%x\n", NPH_SNS,
  3479. mb[0], mb[1], mb[2], mb[6], mb[7]));
  3480. return (QLA_FUNCTION_FAILED);
  3481. }
  3482. atomic_set(&ha->loop_down_timer, 0);
  3483. atomic_set(&ha->loop_state, LOOP_UP);
  3484. set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
  3485. set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
  3486. rval = qla2x00_loop_resync(ha->parent);
  3487. return rval;
  3488. }
  3489. /* 84XX Support **************************************************************/
  3490. static LIST_HEAD(qla_cs84xx_list);
  3491. static DEFINE_MUTEX(qla_cs84xx_mutex);
  3492. static struct qla_chip_state_84xx *
  3493. qla84xx_get_chip(struct scsi_qla_host *ha)
  3494. {
  3495. struct qla_chip_state_84xx *cs84xx;
  3496. mutex_lock(&qla_cs84xx_mutex);
  3497. /* Find any shared 84xx chip. */
  3498. list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
  3499. if (cs84xx->bus == ha->pdev->bus) {
  3500. kref_get(&cs84xx->kref);
  3501. goto done;
  3502. }
  3503. }
  3504. cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
  3505. if (!cs84xx)
  3506. goto done;
  3507. kref_init(&cs84xx->kref);
  3508. spin_lock_init(&cs84xx->access_lock);
  3509. mutex_init(&cs84xx->fw_update_mutex);
  3510. cs84xx->bus = ha->pdev->bus;
  3511. list_add_tail(&cs84xx->list, &qla_cs84xx_list);
  3512. done:
  3513. mutex_unlock(&qla_cs84xx_mutex);
  3514. return cs84xx;
  3515. }
  3516. static void
  3517. __qla84xx_chip_release(struct kref *kref)
  3518. {
  3519. struct qla_chip_state_84xx *cs84xx =
  3520. container_of(kref, struct qla_chip_state_84xx, kref);
  3521. mutex_lock(&qla_cs84xx_mutex);
  3522. list_del(&cs84xx->list);
  3523. mutex_unlock(&qla_cs84xx_mutex);
  3524. kfree(cs84xx);
  3525. }
  3526. void
  3527. qla84xx_put_chip(struct scsi_qla_host *ha)
  3528. {
  3529. if (ha->cs84xx)
  3530. kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
  3531. }
  3532. static int
  3533. qla84xx_init_chip(scsi_qla_host_t *ha)
  3534. {
  3535. int rval;
  3536. uint16_t status[2];
  3537. mutex_lock(&ha->cs84xx->fw_update_mutex);
  3538. rval = qla84xx_verify_chip(ha, status);
  3539. mutex_unlock(&ha->cs84xx->fw_update_mutex);
  3540. return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
  3541. QLA_SUCCESS;
  3542. }