apply.c 31 KB

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  1. /*
  2. * Copyright (C) 2011 Texas Instruments
  3. * Author: Tomi Valkeinen <tomi.valkeinen@ti.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published by
  7. * the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. #define DSS_SUBSYS_NAME "APPLY"
  18. #include <linux/kernel.h>
  19. #include <linux/slab.h>
  20. #include <linux/spinlock.h>
  21. #include <linux/jiffies.h>
  22. #include <video/omapdss.h>
  23. #include "dss.h"
  24. #include "dss_features.h"
  25. /*
  26. * We have 4 levels of cache for the dispc settings. First two are in SW and
  27. * the latter two in HW.
  28. *
  29. * set_info()
  30. * v
  31. * +--------------------+
  32. * | user_info |
  33. * +--------------------+
  34. * v
  35. * apply()
  36. * v
  37. * +--------------------+
  38. * | info |
  39. * +--------------------+
  40. * v
  41. * write_regs()
  42. * v
  43. * +--------------------+
  44. * | shadow registers |
  45. * +--------------------+
  46. * v
  47. * VFP or lcd/digit_enable
  48. * v
  49. * +--------------------+
  50. * | registers |
  51. * +--------------------+
  52. */
  53. struct ovl_priv_data {
  54. bool user_info_dirty;
  55. struct omap_overlay_info user_info;
  56. bool info_dirty;
  57. struct omap_overlay_info info;
  58. bool shadow_info_dirty;
  59. bool extra_info_dirty;
  60. bool shadow_extra_info_dirty;
  61. bool enabled;
  62. enum omap_channel channel;
  63. u32 fifo_low, fifo_high;
  64. /*
  65. * True if overlay is to be enabled. Used to check and calculate configs
  66. * for the overlay before it is enabled in the HW.
  67. */
  68. bool enabling;
  69. };
  70. struct mgr_priv_data {
  71. bool user_info_dirty;
  72. struct omap_overlay_manager_info user_info;
  73. bool info_dirty;
  74. struct omap_overlay_manager_info info;
  75. bool shadow_info_dirty;
  76. /* If true, GO bit is up and shadow registers cannot be written.
  77. * Never true for manual update displays */
  78. bool busy;
  79. /* If true, dispc output is enabled */
  80. bool updating;
  81. /* If true, a display is enabled using this manager */
  82. bool enabled;
  83. bool extra_info_dirty;
  84. bool shadow_extra_info_dirty;
  85. struct omap_video_timings timings;
  86. };
  87. static struct {
  88. struct ovl_priv_data ovl_priv_data_array[MAX_DSS_OVERLAYS];
  89. struct mgr_priv_data mgr_priv_data_array[MAX_DSS_MANAGERS];
  90. bool fifo_merge_dirty;
  91. bool fifo_merge;
  92. bool irq_enabled;
  93. } dss_data;
  94. /* protects dss_data */
  95. static spinlock_t data_lock;
  96. /* lock for blocking functions */
  97. static DEFINE_MUTEX(apply_lock);
  98. static DECLARE_COMPLETION(extra_updated_completion);
  99. static void dss_register_vsync_isr(void);
  100. static struct ovl_priv_data *get_ovl_priv(struct omap_overlay *ovl)
  101. {
  102. return &dss_data.ovl_priv_data_array[ovl->id];
  103. }
  104. static struct mgr_priv_data *get_mgr_priv(struct omap_overlay_manager *mgr)
  105. {
  106. return &dss_data.mgr_priv_data_array[mgr->id];
  107. }
  108. void dss_apply_init(void)
  109. {
  110. const int num_ovls = dss_feat_get_num_ovls();
  111. int i;
  112. spin_lock_init(&data_lock);
  113. for (i = 0; i < num_ovls; ++i) {
  114. struct ovl_priv_data *op;
  115. op = &dss_data.ovl_priv_data_array[i];
  116. op->info.global_alpha = 255;
  117. switch (i) {
  118. case 0:
  119. op->info.zorder = 0;
  120. break;
  121. case 1:
  122. op->info.zorder =
  123. dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 3 : 0;
  124. break;
  125. case 2:
  126. op->info.zorder =
  127. dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 2 : 0;
  128. break;
  129. case 3:
  130. op->info.zorder =
  131. dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 1 : 0;
  132. break;
  133. }
  134. op->user_info = op->info;
  135. }
  136. }
  137. static bool ovl_manual_update(struct omap_overlay *ovl)
  138. {
  139. return ovl->manager->device->caps & OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE;
  140. }
  141. static bool mgr_manual_update(struct omap_overlay_manager *mgr)
  142. {
  143. return mgr->device->caps & OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE;
  144. }
  145. static int dss_check_settings_low(struct omap_overlay_manager *mgr,
  146. struct omap_dss_device *dssdev, bool applying)
  147. {
  148. struct omap_overlay_info *oi;
  149. struct omap_overlay_manager_info *mi;
  150. struct omap_overlay *ovl;
  151. struct omap_overlay_info *ois[MAX_DSS_OVERLAYS];
  152. struct ovl_priv_data *op;
  153. struct mgr_priv_data *mp;
  154. mp = get_mgr_priv(mgr);
  155. if (!mp->enabled)
  156. return 0;
  157. if (applying && mp->user_info_dirty)
  158. mi = &mp->user_info;
  159. else
  160. mi = &mp->info;
  161. /* collect the infos to be tested into the array */
  162. list_for_each_entry(ovl, &mgr->overlays, list) {
  163. op = get_ovl_priv(ovl);
  164. if (!op->enabled && !op->enabling)
  165. oi = NULL;
  166. else if (applying && op->user_info_dirty)
  167. oi = &op->user_info;
  168. else
  169. oi = &op->info;
  170. ois[ovl->id] = oi;
  171. }
  172. return dss_mgr_check(mgr, dssdev, mi, ois);
  173. }
  174. /*
  175. * check manager and overlay settings using overlay_info from data->info
  176. */
  177. static int dss_check_settings(struct omap_overlay_manager *mgr,
  178. struct omap_dss_device *dssdev)
  179. {
  180. return dss_check_settings_low(mgr, dssdev, false);
  181. }
  182. /*
  183. * check manager and overlay settings using overlay_info from ovl->info if
  184. * dirty and from data->info otherwise
  185. */
  186. static int dss_check_settings_apply(struct omap_overlay_manager *mgr,
  187. struct omap_dss_device *dssdev)
  188. {
  189. return dss_check_settings_low(mgr, dssdev, true);
  190. }
  191. static bool need_isr(void)
  192. {
  193. const int num_mgrs = dss_feat_get_num_mgrs();
  194. int i;
  195. for (i = 0; i < num_mgrs; ++i) {
  196. struct omap_overlay_manager *mgr;
  197. struct mgr_priv_data *mp;
  198. struct omap_overlay *ovl;
  199. mgr = omap_dss_get_overlay_manager(i);
  200. mp = get_mgr_priv(mgr);
  201. if (!mp->enabled)
  202. continue;
  203. if (mgr_manual_update(mgr)) {
  204. /* to catch FRAMEDONE */
  205. if (mp->updating)
  206. return true;
  207. } else {
  208. /* to catch GO bit going down */
  209. if (mp->busy)
  210. return true;
  211. /* to write new values to registers */
  212. if (mp->info_dirty)
  213. return true;
  214. /* to set GO bit */
  215. if (mp->shadow_info_dirty)
  216. return true;
  217. /*
  218. * NOTE: we don't check extra_info flags for disabled
  219. * managers, once the manager is enabled, the extra_info
  220. * related manager changes will be taken in by HW.
  221. */
  222. /* to write new values to registers */
  223. if (mp->extra_info_dirty)
  224. return true;
  225. /* to set GO bit */
  226. if (mp->shadow_extra_info_dirty)
  227. return true;
  228. list_for_each_entry(ovl, &mgr->overlays, list) {
  229. struct ovl_priv_data *op;
  230. op = get_ovl_priv(ovl);
  231. /*
  232. * NOTE: we check extra_info flags even for
  233. * disabled overlays, as extra_infos need to be
  234. * always written.
  235. */
  236. /* to write new values to registers */
  237. if (op->extra_info_dirty)
  238. return true;
  239. /* to set GO bit */
  240. if (op->shadow_extra_info_dirty)
  241. return true;
  242. if (!op->enabled)
  243. continue;
  244. /* to write new values to registers */
  245. if (op->info_dirty)
  246. return true;
  247. /* to set GO bit */
  248. if (op->shadow_info_dirty)
  249. return true;
  250. }
  251. }
  252. }
  253. return false;
  254. }
  255. static bool need_go(struct omap_overlay_manager *mgr)
  256. {
  257. struct omap_overlay *ovl;
  258. struct mgr_priv_data *mp;
  259. struct ovl_priv_data *op;
  260. mp = get_mgr_priv(mgr);
  261. if (mp->shadow_info_dirty || mp->shadow_extra_info_dirty)
  262. return true;
  263. list_for_each_entry(ovl, &mgr->overlays, list) {
  264. op = get_ovl_priv(ovl);
  265. if (op->shadow_info_dirty || op->shadow_extra_info_dirty)
  266. return true;
  267. }
  268. return false;
  269. }
  270. /* returns true if an extra_info field is currently being updated */
  271. static bool extra_info_update_ongoing(void)
  272. {
  273. const int num_mgrs = dss_feat_get_num_mgrs();
  274. int i;
  275. for (i = 0; i < num_mgrs; ++i) {
  276. struct omap_overlay_manager *mgr;
  277. struct omap_overlay *ovl;
  278. struct mgr_priv_data *mp;
  279. mgr = omap_dss_get_overlay_manager(i);
  280. mp = get_mgr_priv(mgr);
  281. if (!mp->enabled)
  282. continue;
  283. if (!mp->updating)
  284. continue;
  285. if (mp->extra_info_dirty || mp->shadow_extra_info_dirty)
  286. return true;
  287. list_for_each_entry(ovl, &mgr->overlays, list) {
  288. struct ovl_priv_data *op = get_ovl_priv(ovl);
  289. if (op->extra_info_dirty || op->shadow_extra_info_dirty)
  290. return true;
  291. }
  292. }
  293. return false;
  294. }
  295. /* wait until no extra_info updates are pending */
  296. static void wait_pending_extra_info_updates(void)
  297. {
  298. bool updating;
  299. unsigned long flags;
  300. unsigned long t;
  301. int r;
  302. spin_lock_irqsave(&data_lock, flags);
  303. updating = extra_info_update_ongoing();
  304. if (!updating) {
  305. spin_unlock_irqrestore(&data_lock, flags);
  306. return;
  307. }
  308. init_completion(&extra_updated_completion);
  309. spin_unlock_irqrestore(&data_lock, flags);
  310. t = msecs_to_jiffies(500);
  311. r = wait_for_completion_timeout(&extra_updated_completion, t);
  312. if (r == 0)
  313. DSSWARN("timeout in wait_pending_extra_info_updates\n");
  314. else if (r < 0)
  315. DSSERR("wait_pending_extra_info_updates failed: %d\n", r);
  316. }
  317. int dss_mgr_wait_for_go(struct omap_overlay_manager *mgr)
  318. {
  319. unsigned long timeout = msecs_to_jiffies(500);
  320. struct mgr_priv_data *mp;
  321. u32 irq;
  322. int r;
  323. int i;
  324. struct omap_dss_device *dssdev = mgr->device;
  325. if (!dssdev || dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
  326. return 0;
  327. if (mgr_manual_update(mgr))
  328. return 0;
  329. r = dispc_runtime_get();
  330. if (r)
  331. return r;
  332. irq = dispc_mgr_get_vsync_irq(mgr->id);
  333. mp = get_mgr_priv(mgr);
  334. i = 0;
  335. while (1) {
  336. unsigned long flags;
  337. bool shadow_dirty, dirty;
  338. spin_lock_irqsave(&data_lock, flags);
  339. dirty = mp->info_dirty;
  340. shadow_dirty = mp->shadow_info_dirty;
  341. spin_unlock_irqrestore(&data_lock, flags);
  342. if (!dirty && !shadow_dirty) {
  343. r = 0;
  344. break;
  345. }
  346. /* 4 iterations is the worst case:
  347. * 1 - initial iteration, dirty = true (between VFP and VSYNC)
  348. * 2 - first VSYNC, dirty = true
  349. * 3 - dirty = false, shadow_dirty = true
  350. * 4 - shadow_dirty = false */
  351. if (i++ == 3) {
  352. DSSERR("mgr(%d)->wait_for_go() not finishing\n",
  353. mgr->id);
  354. r = 0;
  355. break;
  356. }
  357. r = omap_dispc_wait_for_irq_interruptible_timeout(irq, timeout);
  358. if (r == -ERESTARTSYS)
  359. break;
  360. if (r) {
  361. DSSERR("mgr(%d)->wait_for_go() timeout\n", mgr->id);
  362. break;
  363. }
  364. }
  365. dispc_runtime_put();
  366. return r;
  367. }
  368. int dss_mgr_wait_for_go_ovl(struct omap_overlay *ovl)
  369. {
  370. unsigned long timeout = msecs_to_jiffies(500);
  371. struct ovl_priv_data *op;
  372. struct omap_dss_device *dssdev;
  373. u32 irq;
  374. int r;
  375. int i;
  376. if (!ovl->manager)
  377. return 0;
  378. dssdev = ovl->manager->device;
  379. if (!dssdev || dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
  380. return 0;
  381. if (ovl_manual_update(ovl))
  382. return 0;
  383. r = dispc_runtime_get();
  384. if (r)
  385. return r;
  386. irq = dispc_mgr_get_vsync_irq(ovl->manager->id);
  387. op = get_ovl_priv(ovl);
  388. i = 0;
  389. while (1) {
  390. unsigned long flags;
  391. bool shadow_dirty, dirty;
  392. spin_lock_irqsave(&data_lock, flags);
  393. dirty = op->info_dirty;
  394. shadow_dirty = op->shadow_info_dirty;
  395. spin_unlock_irqrestore(&data_lock, flags);
  396. if (!dirty && !shadow_dirty) {
  397. r = 0;
  398. break;
  399. }
  400. /* 4 iterations is the worst case:
  401. * 1 - initial iteration, dirty = true (between VFP and VSYNC)
  402. * 2 - first VSYNC, dirty = true
  403. * 3 - dirty = false, shadow_dirty = true
  404. * 4 - shadow_dirty = false */
  405. if (i++ == 3) {
  406. DSSERR("ovl(%d)->wait_for_go() not finishing\n",
  407. ovl->id);
  408. r = 0;
  409. break;
  410. }
  411. r = omap_dispc_wait_for_irq_interruptible_timeout(irq, timeout);
  412. if (r == -ERESTARTSYS)
  413. break;
  414. if (r) {
  415. DSSERR("ovl(%d)->wait_for_go() timeout\n", ovl->id);
  416. break;
  417. }
  418. }
  419. dispc_runtime_put();
  420. return r;
  421. }
  422. static void dss_ovl_write_regs(struct omap_overlay *ovl)
  423. {
  424. struct ovl_priv_data *op = get_ovl_priv(ovl);
  425. struct omap_overlay_info *oi;
  426. bool ilace, replication;
  427. struct mgr_priv_data *mp;
  428. int r;
  429. DSSDBGF("%d", ovl->id);
  430. if (!op->enabled || !op->info_dirty)
  431. return;
  432. oi = &op->info;
  433. replication = dss_use_replication(ovl->manager->device, oi->color_mode);
  434. ilace = ovl->manager->device->type == OMAP_DISPLAY_TYPE_VENC;
  435. r = dispc_ovl_setup(ovl->id, oi, ilace, replication);
  436. if (r) {
  437. /*
  438. * We can't do much here, as this function can be called from
  439. * vsync interrupt.
  440. */
  441. DSSERR("dispc_ovl_setup failed for ovl %d\n", ovl->id);
  442. /* This will leave fifo configurations in a nonoptimal state */
  443. op->enabled = false;
  444. dispc_ovl_enable(ovl->id, false);
  445. return;
  446. }
  447. mp = get_mgr_priv(ovl->manager);
  448. op->info_dirty = false;
  449. if (mp->updating)
  450. op->shadow_info_dirty = true;
  451. }
  452. static void dss_ovl_write_regs_extra(struct omap_overlay *ovl)
  453. {
  454. struct ovl_priv_data *op = get_ovl_priv(ovl);
  455. struct mgr_priv_data *mp;
  456. DSSDBGF("%d", ovl->id);
  457. if (!op->extra_info_dirty)
  458. return;
  459. /* note: write also when op->enabled == false, so that the ovl gets
  460. * disabled */
  461. dispc_ovl_enable(ovl->id, op->enabled);
  462. dispc_ovl_set_channel_out(ovl->id, op->channel);
  463. dispc_ovl_set_fifo_threshold(ovl->id, op->fifo_low, op->fifo_high);
  464. mp = get_mgr_priv(ovl->manager);
  465. op->extra_info_dirty = false;
  466. if (mp->updating)
  467. op->shadow_extra_info_dirty = true;
  468. }
  469. static void dss_mgr_write_regs(struct omap_overlay_manager *mgr)
  470. {
  471. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  472. struct omap_overlay *ovl;
  473. DSSDBGF("%d", mgr->id);
  474. if (!mp->enabled)
  475. return;
  476. WARN_ON(mp->busy);
  477. /* Commit overlay settings */
  478. list_for_each_entry(ovl, &mgr->overlays, list) {
  479. dss_ovl_write_regs(ovl);
  480. dss_ovl_write_regs_extra(ovl);
  481. }
  482. if (mp->info_dirty) {
  483. dispc_mgr_setup(mgr->id, &mp->info);
  484. mp->info_dirty = false;
  485. if (mp->updating)
  486. mp->shadow_info_dirty = true;
  487. }
  488. }
  489. static void dss_mgr_write_regs_extra(struct omap_overlay_manager *mgr)
  490. {
  491. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  492. DSSDBGF("%d", mgr->id);
  493. if (!mp->extra_info_dirty)
  494. return;
  495. dispc_mgr_set_timings(mgr->id, &mp->timings);
  496. mp->extra_info_dirty = false;
  497. if (mp->updating)
  498. mp->shadow_extra_info_dirty = true;
  499. }
  500. static void dss_write_regs_common(void)
  501. {
  502. const int num_mgrs = omap_dss_get_num_overlay_managers();
  503. int i;
  504. if (!dss_data.fifo_merge_dirty)
  505. return;
  506. for (i = 0; i < num_mgrs; ++i) {
  507. struct omap_overlay_manager *mgr;
  508. struct mgr_priv_data *mp;
  509. mgr = omap_dss_get_overlay_manager(i);
  510. mp = get_mgr_priv(mgr);
  511. if (mp->enabled) {
  512. if (dss_data.fifo_merge_dirty) {
  513. dispc_enable_fifomerge(dss_data.fifo_merge);
  514. dss_data.fifo_merge_dirty = false;
  515. }
  516. if (mp->updating)
  517. mp->shadow_info_dirty = true;
  518. }
  519. }
  520. }
  521. static void dss_write_regs(void)
  522. {
  523. const int num_mgrs = omap_dss_get_num_overlay_managers();
  524. int i;
  525. dss_write_regs_common();
  526. for (i = 0; i < num_mgrs; ++i) {
  527. struct omap_overlay_manager *mgr;
  528. struct mgr_priv_data *mp;
  529. int r;
  530. mgr = omap_dss_get_overlay_manager(i);
  531. mp = get_mgr_priv(mgr);
  532. if (!mp->enabled || mgr_manual_update(mgr) || mp->busy)
  533. continue;
  534. r = dss_check_settings(mgr, mgr->device);
  535. if (r) {
  536. DSSERR("cannot write registers for manager %s: "
  537. "illegal configuration\n", mgr->name);
  538. continue;
  539. }
  540. dss_mgr_write_regs(mgr);
  541. dss_mgr_write_regs_extra(mgr);
  542. }
  543. }
  544. static void dss_set_go_bits(void)
  545. {
  546. const int num_mgrs = omap_dss_get_num_overlay_managers();
  547. int i;
  548. for (i = 0; i < num_mgrs; ++i) {
  549. struct omap_overlay_manager *mgr;
  550. struct mgr_priv_data *mp;
  551. mgr = omap_dss_get_overlay_manager(i);
  552. mp = get_mgr_priv(mgr);
  553. if (!mp->enabled || mgr_manual_update(mgr) || mp->busy)
  554. continue;
  555. if (!need_go(mgr))
  556. continue;
  557. mp->busy = true;
  558. if (!dss_data.irq_enabled && need_isr())
  559. dss_register_vsync_isr();
  560. dispc_mgr_go(mgr->id);
  561. }
  562. }
  563. static void mgr_clear_shadow_dirty(struct omap_overlay_manager *mgr)
  564. {
  565. struct omap_overlay *ovl;
  566. struct mgr_priv_data *mp;
  567. struct ovl_priv_data *op;
  568. mp = get_mgr_priv(mgr);
  569. mp->shadow_info_dirty = false;
  570. mp->shadow_extra_info_dirty = false;
  571. list_for_each_entry(ovl, &mgr->overlays, list) {
  572. op = get_ovl_priv(ovl);
  573. op->shadow_info_dirty = false;
  574. op->shadow_extra_info_dirty = false;
  575. }
  576. }
  577. void dss_mgr_start_update(struct omap_overlay_manager *mgr)
  578. {
  579. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  580. unsigned long flags;
  581. int r;
  582. spin_lock_irqsave(&data_lock, flags);
  583. WARN_ON(mp->updating);
  584. r = dss_check_settings(mgr, mgr->device);
  585. if (r) {
  586. DSSERR("cannot start manual update: illegal configuration\n");
  587. spin_unlock_irqrestore(&data_lock, flags);
  588. return;
  589. }
  590. dss_mgr_write_regs(mgr);
  591. dss_mgr_write_regs_extra(mgr);
  592. dss_write_regs_common();
  593. mp->updating = true;
  594. if (!dss_data.irq_enabled && need_isr())
  595. dss_register_vsync_isr();
  596. dispc_mgr_enable(mgr->id, true);
  597. mgr_clear_shadow_dirty(mgr);
  598. spin_unlock_irqrestore(&data_lock, flags);
  599. }
  600. static void dss_apply_irq_handler(void *data, u32 mask);
  601. static void dss_register_vsync_isr(void)
  602. {
  603. const int num_mgrs = dss_feat_get_num_mgrs();
  604. u32 mask;
  605. int r, i;
  606. mask = 0;
  607. for (i = 0; i < num_mgrs; ++i)
  608. mask |= dispc_mgr_get_vsync_irq(i);
  609. for (i = 0; i < num_mgrs; ++i)
  610. mask |= dispc_mgr_get_framedone_irq(i);
  611. r = omap_dispc_register_isr(dss_apply_irq_handler, NULL, mask);
  612. WARN_ON(r);
  613. dss_data.irq_enabled = true;
  614. }
  615. static void dss_unregister_vsync_isr(void)
  616. {
  617. const int num_mgrs = dss_feat_get_num_mgrs();
  618. u32 mask;
  619. int r, i;
  620. mask = 0;
  621. for (i = 0; i < num_mgrs; ++i)
  622. mask |= dispc_mgr_get_vsync_irq(i);
  623. for (i = 0; i < num_mgrs; ++i)
  624. mask |= dispc_mgr_get_framedone_irq(i);
  625. r = omap_dispc_unregister_isr(dss_apply_irq_handler, NULL, mask);
  626. WARN_ON(r);
  627. dss_data.irq_enabled = false;
  628. }
  629. static void dss_apply_irq_handler(void *data, u32 mask)
  630. {
  631. const int num_mgrs = dss_feat_get_num_mgrs();
  632. int i;
  633. bool extra_updating;
  634. spin_lock(&data_lock);
  635. /* clear busy, updating flags, shadow_dirty flags */
  636. for (i = 0; i < num_mgrs; i++) {
  637. struct omap_overlay_manager *mgr;
  638. struct mgr_priv_data *mp;
  639. bool was_updating;
  640. mgr = omap_dss_get_overlay_manager(i);
  641. mp = get_mgr_priv(mgr);
  642. if (!mp->enabled)
  643. continue;
  644. was_updating = mp->updating;
  645. mp->updating = dispc_mgr_is_enabled(i);
  646. if (!mgr_manual_update(mgr)) {
  647. bool was_busy = mp->busy;
  648. mp->busy = dispc_mgr_go_busy(i);
  649. if (was_busy && !mp->busy)
  650. mgr_clear_shadow_dirty(mgr);
  651. }
  652. }
  653. dss_write_regs();
  654. dss_set_go_bits();
  655. extra_updating = extra_info_update_ongoing();
  656. if (!extra_updating)
  657. complete_all(&extra_updated_completion);
  658. if (!need_isr())
  659. dss_unregister_vsync_isr();
  660. spin_unlock(&data_lock);
  661. }
  662. static void omap_dss_mgr_apply_ovl(struct omap_overlay *ovl)
  663. {
  664. struct ovl_priv_data *op;
  665. op = get_ovl_priv(ovl);
  666. if (!op->user_info_dirty)
  667. return;
  668. op->user_info_dirty = false;
  669. op->info_dirty = true;
  670. op->info = op->user_info;
  671. }
  672. static void omap_dss_mgr_apply_mgr(struct omap_overlay_manager *mgr)
  673. {
  674. struct mgr_priv_data *mp;
  675. mp = get_mgr_priv(mgr);
  676. if (!mp->user_info_dirty)
  677. return;
  678. mp->user_info_dirty = false;
  679. mp->info_dirty = true;
  680. mp->info = mp->user_info;
  681. }
  682. int omap_dss_mgr_apply(struct omap_overlay_manager *mgr)
  683. {
  684. unsigned long flags;
  685. struct omap_overlay *ovl;
  686. int r;
  687. DSSDBG("omap_dss_mgr_apply(%s)\n", mgr->name);
  688. spin_lock_irqsave(&data_lock, flags);
  689. r = dss_check_settings_apply(mgr, mgr->device);
  690. if (r) {
  691. spin_unlock_irqrestore(&data_lock, flags);
  692. DSSERR("failed to apply settings: illegal configuration.\n");
  693. return r;
  694. }
  695. /* Configure overlays */
  696. list_for_each_entry(ovl, &mgr->overlays, list)
  697. omap_dss_mgr_apply_ovl(ovl);
  698. /* Configure manager */
  699. omap_dss_mgr_apply_mgr(mgr);
  700. dss_write_regs();
  701. dss_set_go_bits();
  702. spin_unlock_irqrestore(&data_lock, flags);
  703. return 0;
  704. }
  705. static void dss_apply_ovl_enable(struct omap_overlay *ovl, bool enable)
  706. {
  707. struct ovl_priv_data *op;
  708. op = get_ovl_priv(ovl);
  709. if (op->enabled == enable)
  710. return;
  711. op->enabled = enable;
  712. op->extra_info_dirty = true;
  713. }
  714. static void dss_apply_ovl_fifo_thresholds(struct omap_overlay *ovl,
  715. u32 fifo_low, u32 fifo_high)
  716. {
  717. struct ovl_priv_data *op = get_ovl_priv(ovl);
  718. if (op->fifo_low == fifo_low && op->fifo_high == fifo_high)
  719. return;
  720. op->fifo_low = fifo_low;
  721. op->fifo_high = fifo_high;
  722. op->extra_info_dirty = true;
  723. }
  724. static void dss_apply_fifo_merge(bool use_fifo_merge)
  725. {
  726. if (dss_data.fifo_merge == use_fifo_merge)
  727. return;
  728. dss_data.fifo_merge = use_fifo_merge;
  729. dss_data.fifo_merge_dirty = true;
  730. }
  731. static void dss_ovl_setup_fifo(struct omap_overlay *ovl,
  732. bool use_fifo_merge)
  733. {
  734. struct ovl_priv_data *op = get_ovl_priv(ovl);
  735. struct omap_dss_device *dssdev;
  736. u32 fifo_low, fifo_high;
  737. if (!op->enabled && !op->enabling)
  738. return;
  739. dssdev = ovl->manager->device;
  740. dispc_ovl_compute_fifo_thresholds(ovl->id, &fifo_low, &fifo_high,
  741. use_fifo_merge);
  742. dss_apply_ovl_fifo_thresholds(ovl, fifo_low, fifo_high);
  743. }
  744. static void dss_mgr_setup_fifos(struct omap_overlay_manager *mgr,
  745. bool use_fifo_merge)
  746. {
  747. struct omap_overlay *ovl;
  748. struct mgr_priv_data *mp;
  749. mp = get_mgr_priv(mgr);
  750. if (!mp->enabled)
  751. return;
  752. list_for_each_entry(ovl, &mgr->overlays, list)
  753. dss_ovl_setup_fifo(ovl, use_fifo_merge);
  754. }
  755. static void dss_setup_fifos(bool use_fifo_merge)
  756. {
  757. const int num_mgrs = omap_dss_get_num_overlay_managers();
  758. struct omap_overlay_manager *mgr;
  759. int i;
  760. for (i = 0; i < num_mgrs; ++i) {
  761. mgr = omap_dss_get_overlay_manager(i);
  762. dss_mgr_setup_fifos(mgr, use_fifo_merge);
  763. }
  764. }
  765. static int get_num_used_managers(void)
  766. {
  767. const int num_mgrs = omap_dss_get_num_overlay_managers();
  768. struct omap_overlay_manager *mgr;
  769. struct mgr_priv_data *mp;
  770. int i;
  771. int enabled_mgrs;
  772. enabled_mgrs = 0;
  773. for (i = 0; i < num_mgrs; ++i) {
  774. mgr = omap_dss_get_overlay_manager(i);
  775. mp = get_mgr_priv(mgr);
  776. if (!mp->enabled)
  777. continue;
  778. enabled_mgrs++;
  779. }
  780. return enabled_mgrs;
  781. }
  782. static int get_num_used_overlays(void)
  783. {
  784. const int num_ovls = omap_dss_get_num_overlays();
  785. struct omap_overlay *ovl;
  786. struct ovl_priv_data *op;
  787. struct mgr_priv_data *mp;
  788. int i;
  789. int enabled_ovls;
  790. enabled_ovls = 0;
  791. for (i = 0; i < num_ovls; ++i) {
  792. ovl = omap_dss_get_overlay(i);
  793. op = get_ovl_priv(ovl);
  794. if (!op->enabled && !op->enabling)
  795. continue;
  796. mp = get_mgr_priv(ovl->manager);
  797. if (!mp->enabled)
  798. continue;
  799. enabled_ovls++;
  800. }
  801. return enabled_ovls;
  802. }
  803. static bool get_use_fifo_merge(void)
  804. {
  805. int enabled_mgrs = get_num_used_managers();
  806. int enabled_ovls = get_num_used_overlays();
  807. if (!dss_has_feature(FEAT_FIFO_MERGE))
  808. return false;
  809. /*
  810. * In theory the only requirement for fifomerge is enabled_ovls <= 1.
  811. * However, if we have two managers enabled and set/unset the fifomerge,
  812. * we need to set the GO bits in particular sequence for the managers,
  813. * and wait in between.
  814. *
  815. * This is rather difficult as new apply calls can happen at any time,
  816. * so we simplify the problem by requiring also that enabled_mgrs <= 1.
  817. * In practice this shouldn't matter, because when only one overlay is
  818. * enabled, most likely only one output is enabled.
  819. */
  820. return enabled_mgrs <= 1 && enabled_ovls <= 1;
  821. }
  822. int dss_mgr_enable(struct omap_overlay_manager *mgr)
  823. {
  824. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  825. unsigned long flags;
  826. int r;
  827. bool fifo_merge;
  828. mutex_lock(&apply_lock);
  829. if (mp->enabled)
  830. goto out;
  831. spin_lock_irqsave(&data_lock, flags);
  832. mp->enabled = true;
  833. r = dss_check_settings(mgr, mgr->device);
  834. if (r) {
  835. DSSERR("failed to enable manager %d: check_settings failed\n",
  836. mgr->id);
  837. goto err;
  838. }
  839. /* step 1: setup fifos/fifomerge before enabling the manager */
  840. fifo_merge = get_use_fifo_merge();
  841. dss_setup_fifos(fifo_merge);
  842. dss_apply_fifo_merge(fifo_merge);
  843. dss_write_regs();
  844. dss_set_go_bits();
  845. spin_unlock_irqrestore(&data_lock, flags);
  846. /* wait until fifo config is in */
  847. wait_pending_extra_info_updates();
  848. /* step 2: enable the manager */
  849. spin_lock_irqsave(&data_lock, flags);
  850. if (!mgr_manual_update(mgr))
  851. mp->updating = true;
  852. spin_unlock_irqrestore(&data_lock, flags);
  853. if (!mgr_manual_update(mgr))
  854. dispc_mgr_enable(mgr->id, true);
  855. out:
  856. mutex_unlock(&apply_lock);
  857. return 0;
  858. err:
  859. mp->enabled = false;
  860. spin_unlock_irqrestore(&data_lock, flags);
  861. mutex_unlock(&apply_lock);
  862. return r;
  863. }
  864. void dss_mgr_disable(struct omap_overlay_manager *mgr)
  865. {
  866. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  867. unsigned long flags;
  868. bool fifo_merge;
  869. mutex_lock(&apply_lock);
  870. if (!mp->enabled)
  871. goto out;
  872. if (!mgr_manual_update(mgr))
  873. dispc_mgr_enable(mgr->id, false);
  874. spin_lock_irqsave(&data_lock, flags);
  875. mp->updating = false;
  876. mp->enabled = false;
  877. fifo_merge = get_use_fifo_merge();
  878. dss_setup_fifos(fifo_merge);
  879. dss_apply_fifo_merge(fifo_merge);
  880. dss_write_regs();
  881. dss_set_go_bits();
  882. spin_unlock_irqrestore(&data_lock, flags);
  883. wait_pending_extra_info_updates();
  884. out:
  885. mutex_unlock(&apply_lock);
  886. }
  887. int dss_mgr_set_info(struct omap_overlay_manager *mgr,
  888. struct omap_overlay_manager_info *info)
  889. {
  890. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  891. unsigned long flags;
  892. int r;
  893. r = dss_mgr_simple_check(mgr, info);
  894. if (r)
  895. return r;
  896. spin_lock_irqsave(&data_lock, flags);
  897. mp->user_info = *info;
  898. mp->user_info_dirty = true;
  899. spin_unlock_irqrestore(&data_lock, flags);
  900. return 0;
  901. }
  902. void dss_mgr_get_info(struct omap_overlay_manager *mgr,
  903. struct omap_overlay_manager_info *info)
  904. {
  905. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  906. unsigned long flags;
  907. spin_lock_irqsave(&data_lock, flags);
  908. *info = mp->user_info;
  909. spin_unlock_irqrestore(&data_lock, flags);
  910. }
  911. int dss_mgr_set_device(struct omap_overlay_manager *mgr,
  912. struct omap_dss_device *dssdev)
  913. {
  914. int r;
  915. mutex_lock(&apply_lock);
  916. if (dssdev->manager) {
  917. DSSERR("display '%s' already has a manager '%s'\n",
  918. dssdev->name, dssdev->manager->name);
  919. r = -EINVAL;
  920. goto err;
  921. }
  922. if ((mgr->supported_displays & dssdev->type) == 0) {
  923. DSSERR("display '%s' does not support manager '%s'\n",
  924. dssdev->name, mgr->name);
  925. r = -EINVAL;
  926. goto err;
  927. }
  928. dssdev->manager = mgr;
  929. mgr->device = dssdev;
  930. mutex_unlock(&apply_lock);
  931. return 0;
  932. err:
  933. mutex_unlock(&apply_lock);
  934. return r;
  935. }
  936. int dss_mgr_unset_device(struct omap_overlay_manager *mgr)
  937. {
  938. int r;
  939. mutex_lock(&apply_lock);
  940. if (!mgr->device) {
  941. DSSERR("failed to unset display, display not set.\n");
  942. r = -EINVAL;
  943. goto err;
  944. }
  945. /*
  946. * Don't allow currently enabled displays to have the overlay manager
  947. * pulled out from underneath them
  948. */
  949. if (mgr->device->state != OMAP_DSS_DISPLAY_DISABLED) {
  950. r = -EINVAL;
  951. goto err;
  952. }
  953. mgr->device->manager = NULL;
  954. mgr->device = NULL;
  955. mutex_unlock(&apply_lock);
  956. return 0;
  957. err:
  958. mutex_unlock(&apply_lock);
  959. return r;
  960. }
  961. static void dss_apply_mgr_timings(struct omap_overlay_manager *mgr,
  962. struct omap_video_timings *timings)
  963. {
  964. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  965. mp->timings = *timings;
  966. mp->extra_info_dirty = true;
  967. }
  968. void dss_mgr_set_timings(struct omap_overlay_manager *mgr,
  969. struct omap_video_timings *timings)
  970. {
  971. unsigned long flags;
  972. mutex_lock(&apply_lock);
  973. spin_lock_irqsave(&data_lock, flags);
  974. dss_apply_mgr_timings(mgr, timings);
  975. dss_write_regs();
  976. dss_set_go_bits();
  977. spin_unlock_irqrestore(&data_lock, flags);
  978. wait_pending_extra_info_updates();
  979. mutex_unlock(&apply_lock);
  980. }
  981. int dss_ovl_set_info(struct omap_overlay *ovl,
  982. struct omap_overlay_info *info)
  983. {
  984. struct ovl_priv_data *op = get_ovl_priv(ovl);
  985. unsigned long flags;
  986. int r;
  987. r = dss_ovl_simple_check(ovl, info);
  988. if (r)
  989. return r;
  990. spin_lock_irqsave(&data_lock, flags);
  991. op->user_info = *info;
  992. op->user_info_dirty = true;
  993. spin_unlock_irqrestore(&data_lock, flags);
  994. return 0;
  995. }
  996. void dss_ovl_get_info(struct omap_overlay *ovl,
  997. struct omap_overlay_info *info)
  998. {
  999. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1000. unsigned long flags;
  1001. spin_lock_irqsave(&data_lock, flags);
  1002. *info = op->user_info;
  1003. spin_unlock_irqrestore(&data_lock, flags);
  1004. }
  1005. int dss_ovl_set_manager(struct omap_overlay *ovl,
  1006. struct omap_overlay_manager *mgr)
  1007. {
  1008. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1009. unsigned long flags;
  1010. int r;
  1011. if (!mgr)
  1012. return -EINVAL;
  1013. mutex_lock(&apply_lock);
  1014. if (ovl->manager) {
  1015. DSSERR("overlay '%s' already has a manager '%s'\n",
  1016. ovl->name, ovl->manager->name);
  1017. r = -EINVAL;
  1018. goto err;
  1019. }
  1020. spin_lock_irqsave(&data_lock, flags);
  1021. if (op->enabled) {
  1022. spin_unlock_irqrestore(&data_lock, flags);
  1023. DSSERR("overlay has to be disabled to change the manager\n");
  1024. r = -EINVAL;
  1025. goto err;
  1026. }
  1027. op->channel = mgr->id;
  1028. op->extra_info_dirty = true;
  1029. ovl->manager = mgr;
  1030. list_add_tail(&ovl->list, &mgr->overlays);
  1031. spin_unlock_irqrestore(&data_lock, flags);
  1032. /* XXX: When there is an overlay on a DSI manual update display, and
  1033. * the overlay is first disabled, then moved to tv, and enabled, we
  1034. * seem to get SYNC_LOST_DIGIT error.
  1035. *
  1036. * Waiting doesn't seem to help, but updating the manual update display
  1037. * after disabling the overlay seems to fix this. This hints that the
  1038. * overlay is perhaps somehow tied to the LCD output until the output
  1039. * is updated.
  1040. *
  1041. * Userspace workaround for this is to update the LCD after disabling
  1042. * the overlay, but before moving the overlay to TV.
  1043. */
  1044. mutex_unlock(&apply_lock);
  1045. return 0;
  1046. err:
  1047. mutex_unlock(&apply_lock);
  1048. return r;
  1049. }
  1050. int dss_ovl_unset_manager(struct omap_overlay *ovl)
  1051. {
  1052. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1053. unsigned long flags;
  1054. int r;
  1055. mutex_lock(&apply_lock);
  1056. if (!ovl->manager) {
  1057. DSSERR("failed to detach overlay: manager not set\n");
  1058. r = -EINVAL;
  1059. goto err;
  1060. }
  1061. spin_lock_irqsave(&data_lock, flags);
  1062. if (op->enabled) {
  1063. spin_unlock_irqrestore(&data_lock, flags);
  1064. DSSERR("overlay has to be disabled to unset the manager\n");
  1065. r = -EINVAL;
  1066. goto err;
  1067. }
  1068. op->channel = -1;
  1069. ovl->manager = NULL;
  1070. list_del(&ovl->list);
  1071. spin_unlock_irqrestore(&data_lock, flags);
  1072. mutex_unlock(&apply_lock);
  1073. return 0;
  1074. err:
  1075. mutex_unlock(&apply_lock);
  1076. return r;
  1077. }
  1078. bool dss_ovl_is_enabled(struct omap_overlay *ovl)
  1079. {
  1080. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1081. unsigned long flags;
  1082. bool e;
  1083. spin_lock_irqsave(&data_lock, flags);
  1084. e = op->enabled;
  1085. spin_unlock_irqrestore(&data_lock, flags);
  1086. return e;
  1087. }
  1088. int dss_ovl_enable(struct omap_overlay *ovl)
  1089. {
  1090. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1091. unsigned long flags;
  1092. bool fifo_merge;
  1093. int r;
  1094. mutex_lock(&apply_lock);
  1095. if (op->enabled) {
  1096. r = 0;
  1097. goto err1;
  1098. }
  1099. if (ovl->manager == NULL || ovl->manager->device == NULL) {
  1100. r = -EINVAL;
  1101. goto err1;
  1102. }
  1103. spin_lock_irqsave(&data_lock, flags);
  1104. op->enabling = true;
  1105. r = dss_check_settings(ovl->manager, ovl->manager->device);
  1106. if (r) {
  1107. DSSERR("failed to enable overlay %d: check_settings failed\n",
  1108. ovl->id);
  1109. goto err2;
  1110. }
  1111. /* step 1: configure fifos/fifomerge for currently enabled ovls */
  1112. fifo_merge = get_use_fifo_merge();
  1113. dss_setup_fifos(fifo_merge);
  1114. dss_apply_fifo_merge(fifo_merge);
  1115. dss_write_regs();
  1116. dss_set_go_bits();
  1117. spin_unlock_irqrestore(&data_lock, flags);
  1118. /* wait for fifo configs to go in */
  1119. wait_pending_extra_info_updates();
  1120. /* step 2: enable the overlay */
  1121. spin_lock_irqsave(&data_lock, flags);
  1122. op->enabling = false;
  1123. dss_apply_ovl_enable(ovl, true);
  1124. dss_write_regs();
  1125. dss_set_go_bits();
  1126. spin_unlock_irqrestore(&data_lock, flags);
  1127. /* wait for overlay to be enabled */
  1128. wait_pending_extra_info_updates();
  1129. mutex_unlock(&apply_lock);
  1130. return 0;
  1131. err2:
  1132. op->enabling = false;
  1133. spin_unlock_irqrestore(&data_lock, flags);
  1134. err1:
  1135. mutex_unlock(&apply_lock);
  1136. return r;
  1137. }
  1138. int dss_ovl_disable(struct omap_overlay *ovl)
  1139. {
  1140. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1141. unsigned long flags;
  1142. bool fifo_merge;
  1143. int r;
  1144. mutex_lock(&apply_lock);
  1145. if (!op->enabled) {
  1146. r = 0;
  1147. goto err;
  1148. }
  1149. if (ovl->manager == NULL || ovl->manager->device == NULL) {
  1150. r = -EINVAL;
  1151. goto err;
  1152. }
  1153. /* step 1: disable the overlay */
  1154. spin_lock_irqsave(&data_lock, flags);
  1155. dss_apply_ovl_enable(ovl, false);
  1156. dss_write_regs();
  1157. dss_set_go_bits();
  1158. spin_unlock_irqrestore(&data_lock, flags);
  1159. /* wait for the overlay to be disabled */
  1160. wait_pending_extra_info_updates();
  1161. /* step 2: configure fifos/fifomerge */
  1162. spin_lock_irqsave(&data_lock, flags);
  1163. fifo_merge = get_use_fifo_merge();
  1164. dss_setup_fifos(fifo_merge);
  1165. dss_apply_fifo_merge(fifo_merge);
  1166. dss_write_regs();
  1167. dss_set_go_bits();
  1168. spin_unlock_irqrestore(&data_lock, flags);
  1169. /* wait for fifo config to go in */
  1170. wait_pending_extra_info_updates();
  1171. mutex_unlock(&apply_lock);
  1172. return 0;
  1173. err:
  1174. mutex_unlock(&apply_lock);
  1175. return r;
  1176. }