ipw2100.h 41 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195
  1. /******************************************************************************
  2. Copyright(c) 2003 - 2005 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of version 2 of the GNU General Public License as
  5. published by the Free Software Foundation.
  6. This program is distributed in the hope that it will be useful, but WITHOUT
  7. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  8. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  9. more details.
  10. You should have received a copy of the GNU General Public License along with
  11. this program; if not, write to the Free Software Foundation, Inc., 59
  12. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  13. The full GNU General Public License is included in this distribution in the
  14. file called LICENSE.
  15. Contact Information:
  16. James P. Ketrenos <ipw2100-admin@linux.intel.com>
  17. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  18. ******************************************************************************/
  19. #ifndef _IPW2100_H
  20. #define _IPW2100_H
  21. #include <linux/sched.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/netdevice.h>
  24. #include <linux/etherdevice.h>
  25. #include <linux/list.h>
  26. #include <linux/delay.h>
  27. #include <linux/skbuff.h>
  28. #include <asm/io.h>
  29. #include <linux/socket.h>
  30. #include <linux/if_arp.h>
  31. #include <linux/wireless.h>
  32. #include <linux/version.h>
  33. #include <net/iw_handler.h> // new driver API
  34. #include <net/ieee80211.h>
  35. #include <linux/workqueue.h>
  36. struct ipw2100_priv;
  37. struct ipw2100_tx_packet;
  38. struct ipw2100_rx_packet;
  39. #ifdef CONFIG_IPW_DEBUG
  40. enum { IPW_DEBUG_ENABLED = 1 };
  41. extern u32 ipw2100_debug_level;
  42. #define IPW_DEBUG(level, message...) \
  43. do { \
  44. if (ipw2100_debug_level & (level)) { \
  45. printk(KERN_DEBUG "ipw2100: %c %s ", \
  46. in_interrupt() ? 'I' : 'U', __FUNCTION__); \
  47. printk(message); \
  48. } \
  49. } while (0)
  50. #else
  51. enum { IPW_DEBUG_ENABLED = 0 };
  52. #define IPW_DEBUG(level, message...) do {} while (0)
  53. #endif /* CONFIG_IPW_DEBUG */
  54. #define IPW_DL_UNINIT 0x80000000
  55. #define IPW_DL_NONE 0x00000000
  56. #define IPW_DL_ALL 0x7FFFFFFF
  57. /*
  58. * To use the debug system;
  59. *
  60. * If you are defining a new debug classification, simply add it to the #define
  61. * list here in the form of:
  62. *
  63. * #define IPW_DL_xxxx VALUE
  64. *
  65. * shifting value to the left one bit from the previous entry. xxxx should be
  66. * the name of the classification (for example, WEP)
  67. *
  68. * You then need to either add a IPW2100_xxxx_DEBUG() macro definition for your
  69. * classification, or use IPW_DEBUG(IPW_DL_xxxx, ...) whenever you want
  70. * to send output to that classification.
  71. *
  72. * To add your debug level to the list of levels seen when you perform
  73. *
  74. * % cat /proc/net/ipw2100/debug_level
  75. *
  76. * you simply need to add your entry to the ipw2100_debug_levels array.
  77. *
  78. * If you do not see debug_level in /proc/net/ipw2100 then you do not have
  79. * CONFIG_IPW_DEBUG defined in your kernel configuration
  80. *
  81. */
  82. #define IPW_DL_ERROR (1<<0)
  83. #define IPW_DL_WARNING (1<<1)
  84. #define IPW_DL_INFO (1<<2)
  85. #define IPW_DL_WX (1<<3)
  86. #define IPW_DL_HC (1<<5)
  87. #define IPW_DL_STATE (1<<6)
  88. #define IPW_DL_NOTIF (1<<10)
  89. #define IPW_DL_SCAN (1<<11)
  90. #define IPW_DL_ASSOC (1<<12)
  91. #define IPW_DL_DROP (1<<13)
  92. #define IPW_DL_IOCTL (1<<14)
  93. #define IPW_DL_RF_KILL (1<<17)
  94. #define IPW_DL_MANAGE (1<<15)
  95. #define IPW_DL_FW (1<<16)
  96. #define IPW_DL_FRAG (1<<21)
  97. #define IPW_DL_WEP (1<<22)
  98. #define IPW_DL_TX (1<<23)
  99. #define IPW_DL_RX (1<<24)
  100. #define IPW_DL_ISR (1<<25)
  101. #define IPW_DL_IO (1<<26)
  102. #define IPW_DL_TRACE (1<<28)
  103. #define IPW_DEBUG_ERROR(f, a...) printk(KERN_ERR DRV_NAME ": " f, ## a)
  104. #define IPW_DEBUG_WARNING(f, a...) printk(KERN_WARNING DRV_NAME ": " f, ## a)
  105. #define IPW_DEBUG_INFO(f...) IPW_DEBUG(IPW_DL_INFO, ## f)
  106. #define IPW_DEBUG_WX(f...) IPW_DEBUG(IPW_DL_WX, ## f)
  107. #define IPW_DEBUG_SCAN(f...) IPW_DEBUG(IPW_DL_SCAN, ## f)
  108. #define IPW_DEBUG_NOTIF(f...) IPW_DEBUG(IPW_DL_NOTIF, ## f)
  109. #define IPW_DEBUG_TRACE(f...) IPW_DEBUG(IPW_DL_TRACE, ## f)
  110. #define IPW_DEBUG_RX(f...) IPW_DEBUG(IPW_DL_RX, ## f)
  111. #define IPW_DEBUG_TX(f...) IPW_DEBUG(IPW_DL_TX, ## f)
  112. #define IPW_DEBUG_ISR(f...) IPW_DEBUG(IPW_DL_ISR, ## f)
  113. #define IPW_DEBUG_MANAGEMENT(f...) IPW_DEBUG(IPW_DL_MANAGE, ## f)
  114. #define IPW_DEBUG_WEP(f...) IPW_DEBUG(IPW_DL_WEP, ## f)
  115. #define IPW_DEBUG_HC(f...) IPW_DEBUG(IPW_DL_HC, ## f)
  116. #define IPW_DEBUG_FRAG(f...) IPW_DEBUG(IPW_DL_FRAG, ## f)
  117. #define IPW_DEBUG_FW(f...) IPW_DEBUG(IPW_DL_FW, ## f)
  118. #define IPW_DEBUG_RF_KILL(f...) IPW_DEBUG(IPW_DL_RF_KILL, ## f)
  119. #define IPW_DEBUG_DROP(f...) IPW_DEBUG(IPW_DL_DROP, ## f)
  120. #define IPW_DEBUG_IO(f...) IPW_DEBUG(IPW_DL_IO, ## f)
  121. #define IPW_DEBUG_IOCTL(f...) IPW_DEBUG(IPW_DL_IOCTL, ## f)
  122. #define IPW_DEBUG_STATE(f, a...) IPW_DEBUG(IPW_DL_STATE | IPW_DL_ASSOC | IPW_DL_INFO, f, ## a)
  123. #define IPW_DEBUG_ASSOC(f, a...) IPW_DEBUG(IPW_DL_ASSOC | IPW_DL_INFO, f, ## a)
  124. enum {
  125. IPW_HW_STATE_DISABLED = 1,
  126. IPW_HW_STATE_ENABLED = 0
  127. };
  128. struct ssid_context {
  129. char ssid[IW_ESSID_MAX_SIZE + 1];
  130. int ssid_len;
  131. unsigned char bssid[ETH_ALEN];
  132. int port_type;
  133. int channel;
  134. };
  135. extern const char *port_type_str[];
  136. extern const char *band_str[];
  137. #define NUMBER_OF_BD_PER_COMMAND_PACKET 1
  138. #define NUMBER_OF_BD_PER_DATA_PACKET 2
  139. #define IPW_MAX_BDS 6
  140. #define NUMBER_OF_OVERHEAD_BDS_PER_PACKETR 2
  141. #define NUMBER_OF_BDS_TO_LEAVE_FOR_COMMANDS 1
  142. #define REQUIRED_SPACE_IN_RING_FOR_COMMAND_PACKET \
  143. (IPW_BD_QUEUE_W_R_MIN_SPARE + NUMBER_OF_BD_PER_COMMAND_PACKET)
  144. struct bd_status {
  145. union {
  146. struct { u8 nlf:1, txType:2, intEnabled:1, reserved:4;} fields;
  147. u8 field;
  148. } info;
  149. } __attribute__ ((packed));
  150. struct ipw2100_bd {
  151. u32 host_addr;
  152. u32 buf_length;
  153. struct bd_status status;
  154. /* number of fragments for frame (should be set only for
  155. * 1st TBD) */
  156. u8 num_fragments;
  157. u8 reserved[6];
  158. } __attribute__ ((packed));
  159. #define IPW_BD_QUEUE_LENGTH(n) (1<<n)
  160. #define IPW_BD_ALIGNMENT(L) (L*sizeof(struct ipw2100_bd))
  161. #define IPW_BD_STATUS_TX_FRAME_802_3 0x00
  162. #define IPW_BD_STATUS_TX_FRAME_NOT_LAST_FRAGMENT 0x01
  163. #define IPW_BD_STATUS_TX_FRAME_COMMAND 0x02
  164. #define IPW_BD_STATUS_TX_FRAME_802_11 0x04
  165. #define IPW_BD_STATUS_TX_INTERRUPT_ENABLE 0x08
  166. struct ipw2100_bd_queue {
  167. /* driver (virtual) pointer to queue */
  168. struct ipw2100_bd *drv;
  169. /* firmware (physical) pointer to queue */
  170. dma_addr_t nic;
  171. /* Length of phy memory allocated for BDs */
  172. u32 size;
  173. /* Number of BDs in queue (and in array) */
  174. u32 entries;
  175. /* Number of available BDs (invalid for NIC BDs) */
  176. u32 available;
  177. /* Offset of oldest used BD in array (next one to
  178. * check for completion) */
  179. u32 oldest;
  180. /* Offset of next available (unused) BD */
  181. u32 next;
  182. };
  183. #define RX_QUEUE_LENGTH 256
  184. #define TX_QUEUE_LENGTH 256
  185. #define HW_QUEUE_LENGTH 256
  186. #define TX_PENDED_QUEUE_LENGTH (TX_QUEUE_LENGTH / NUMBER_OF_BD_PER_DATA_PACKET)
  187. #define STATUS_TYPE_MASK 0x0000000f
  188. #define COMMAND_STATUS_VAL 0
  189. #define STATUS_CHANGE_VAL 1
  190. #define P80211_DATA_VAL 2
  191. #define P8023_DATA_VAL 3
  192. #define HOST_NOTIFICATION_VAL 4
  193. #define IPW2100_RSSI_TO_DBM (-98)
  194. struct ipw2100_status {
  195. u32 frame_size;
  196. u16 status_fields;
  197. u8 flags;
  198. #define IPW_STATUS_FLAG_DECRYPTED (1<<0)
  199. #define IPW_STATUS_FLAG_WEP_ENCRYPTED (1<<1)
  200. #define IPW_STATUS_FLAG_CRC_ERROR (1<<2)
  201. u8 rssi;
  202. } __attribute__ ((packed));
  203. struct ipw2100_status_queue {
  204. /* driver (virtual) pointer to queue */
  205. struct ipw2100_status *drv;
  206. /* firmware (physical) pointer to queue */
  207. dma_addr_t nic;
  208. /* Length of phy memory allocated for BDs */
  209. u32 size;
  210. };
  211. #define HOST_COMMAND_PARAMS_REG_LEN 100
  212. #define CMD_STATUS_PARAMS_REG_LEN 3
  213. #define IPW_WPA_CAPABILITIES 0x1
  214. #define IPW_WPA_LISTENINTERVAL 0x2
  215. #define IPW_WPA_AP_ADDRESS 0x4
  216. #define IPW_MAX_VAR_IE_LEN ((HOST_COMMAND_PARAMS_REG_LEN - 4) * sizeof(u32))
  217. struct ipw2100_wpa_assoc_frame {
  218. u16 fixed_ie_mask;
  219. struct {
  220. u16 capab_info;
  221. u16 listen_interval;
  222. u8 current_ap[ETH_ALEN];
  223. } fixed_ies;
  224. u32 var_ie_len;
  225. u8 var_ie[IPW_MAX_VAR_IE_LEN];
  226. };
  227. #define IPW_BSS 1
  228. #define IPW_MONITOR 2
  229. #define IPW_IBSS 3
  230. /**
  231. * @struct _tx_cmd - HWCommand
  232. * @brief H/W command structure.
  233. */
  234. struct ipw2100_cmd_header {
  235. u32 host_command_reg;
  236. u32 host_command_reg1;
  237. u32 sequence;
  238. u32 host_command_len_reg;
  239. u32 host_command_params_reg[HOST_COMMAND_PARAMS_REG_LEN];
  240. u32 cmd_status_reg;
  241. u32 cmd_status_params_reg[CMD_STATUS_PARAMS_REG_LEN];
  242. u32 rxq_base_ptr;
  243. u32 rxq_next_ptr;
  244. u32 rxq_host_ptr;
  245. u32 txq_base_ptr;
  246. u32 txq_next_ptr;
  247. u32 txq_host_ptr;
  248. u32 tx_status_reg;
  249. u32 reserved;
  250. u32 status_change_reg;
  251. u32 reserved1[3];
  252. u32 *ordinal1_ptr;
  253. u32 *ordinal2_ptr;
  254. } __attribute__ ((packed));
  255. struct ipw2100_data_header {
  256. u32 host_command_reg;
  257. u32 host_command_reg1;
  258. u8 encrypted; // BOOLEAN in win! TRUE if frame is enc by driver
  259. u8 needs_encryption; // BOOLEAN in win! TRUE if frma need to be enc in NIC
  260. u8 wep_index; // 0 no key, 1-4 key index, 0xff immediate key
  261. u8 key_size; // 0 no imm key, 0x5 64bit encr, 0xd 128bit encr, 0x10 128bit encr and 128bit IV
  262. u8 key[16];
  263. u8 reserved[10]; // f/w reserved
  264. u8 src_addr[ETH_ALEN];
  265. u8 dst_addr[ETH_ALEN];
  266. u16 fragment_size;
  267. } __attribute__ ((packed));
  268. /* Host command data structure */
  269. struct host_command {
  270. u32 host_command; // COMMAND ID
  271. u32 host_command1; // COMMAND ID
  272. u32 host_command_sequence; // UNIQUE COMMAND NUMBER (ID)
  273. u32 host_command_length; // LENGTH
  274. u32 host_command_parameters[HOST_COMMAND_PARAMS_REG_LEN]; // COMMAND PARAMETERS
  275. } __attribute__ ((packed));
  276. typedef enum {
  277. POWER_ON_RESET,
  278. EXIT_POWER_DOWN_RESET,
  279. SW_RESET,
  280. EEPROM_RW,
  281. SW_RE_INIT
  282. } ipw2100_reset_event;
  283. enum {
  284. COMMAND = 0xCAFE,
  285. DATA,
  286. RX
  287. };
  288. struct ipw2100_tx_packet {
  289. int type;
  290. int index;
  291. union {
  292. struct { /* COMMAND */
  293. struct ipw2100_cmd_header* cmd;
  294. dma_addr_t cmd_phys;
  295. } c_struct;
  296. struct { /* DATA */
  297. struct ipw2100_data_header* data;
  298. dma_addr_t data_phys;
  299. struct ieee80211_txb *txb;
  300. } d_struct;
  301. } info;
  302. int jiffy_start;
  303. struct list_head list;
  304. };
  305. struct ipw2100_rx_packet {
  306. struct ipw2100_rx *rxp;
  307. dma_addr_t dma_addr;
  308. int jiffy_start;
  309. struct sk_buff *skb;
  310. struct list_head list;
  311. };
  312. #define FRAG_DISABLED (1<<31)
  313. #define RTS_DISABLED (1<<31)
  314. #define MAX_RTS_THRESHOLD 2304U
  315. #define MIN_RTS_THRESHOLD 1U
  316. #define DEFAULT_RTS_THRESHOLD 1000U
  317. #define DEFAULT_BEACON_INTERVAL 100U
  318. #define DEFAULT_SHORT_RETRY_LIMIT 7U
  319. #define DEFAULT_LONG_RETRY_LIMIT 4U
  320. struct ipw2100_ordinals {
  321. u32 table1_addr;
  322. u32 table2_addr;
  323. u32 table1_size;
  324. u32 table2_size;
  325. };
  326. /* Host Notification header */
  327. struct ipw2100_notification {
  328. u32 hnhdr_subtype; /* type of host notification */
  329. u32 hnhdr_size; /* size in bytes of data
  330. or number of entries, if table.
  331. Does NOT include header */
  332. } __attribute__ ((packed));
  333. #define MAX_KEY_SIZE 16
  334. #define MAX_KEYS 8
  335. #define IPW2100_WEP_ENABLE (1<<1)
  336. #define IPW2100_WEP_DROP_CLEAR (1<<2)
  337. #define IPW_NONE_CIPHER (1<<0)
  338. #define IPW_WEP40_CIPHER (1<<1)
  339. #define IPW_TKIP_CIPHER (1<<2)
  340. #define IPW_CCMP_CIPHER (1<<4)
  341. #define IPW_WEP104_CIPHER (1<<5)
  342. #define IPW_CKIP_CIPHER (1<<6)
  343. #define IPW_AUTH_OPEN 0
  344. #define IPW_AUTH_SHARED 1
  345. struct statistic {
  346. int value;
  347. int hi;
  348. int lo;
  349. };
  350. #define INIT_STAT(x) do { \
  351. (x)->value = (x)->hi = 0; \
  352. (x)->lo = 0x7fffffff; \
  353. } while (0)
  354. #define SET_STAT(x,y) do { \
  355. (x)->value = y; \
  356. if ((x)->value > (x)->hi) (x)->hi = (x)->value; \
  357. if ((x)->value < (x)->lo) (x)->lo = (x)->value; \
  358. } while (0)
  359. #define INC_STAT(x) do { if (++(x)->value > (x)->hi) (x)->hi = (x)->value; } \
  360. while (0)
  361. #define DEC_STAT(x) do { if (--(x)->value < (x)->lo) (x)->lo = (x)->value; } \
  362. while (0)
  363. #define IPW2100_ERROR_QUEUE 5
  364. /* Power management code: enable or disable? */
  365. enum {
  366. #ifdef CONFIG_PM
  367. IPW2100_PM_DISABLED = 0,
  368. PM_STATE_SIZE = 16,
  369. #else
  370. IPW2100_PM_DISABLED = 1,
  371. PM_STATE_SIZE = 0,
  372. #endif
  373. };
  374. #define STATUS_POWERED (1<<0)
  375. #define STATUS_CMD_ACTIVE (1<<1) /**< host command in progress */
  376. #define STATUS_RUNNING (1<<2) /* Card initialized, but not enabled */
  377. #define STATUS_ENABLED (1<<3) /* Card enabled -- can scan,Tx,Rx */
  378. #define STATUS_STOPPING (1<<4) /* Card is in shutdown phase */
  379. #define STATUS_INITIALIZED (1<<5) /* Card is ready for external calls */
  380. #define STATUS_ASSOCIATING (1<<9) /* Associated, but no BSSID yet */
  381. #define STATUS_ASSOCIATED (1<<10) /* Associated and BSSID valid */
  382. #define STATUS_INT_ENABLED (1<<11)
  383. #define STATUS_RF_KILL_HW (1<<12)
  384. #define STATUS_RF_KILL_SW (1<<13)
  385. #define STATUS_RF_KILL_MASK (STATUS_RF_KILL_HW | STATUS_RF_KILL_SW)
  386. #define STATUS_EXIT_PENDING (1<<14)
  387. #define STATUS_SCAN_PENDING (1<<23)
  388. #define STATUS_SCANNING (1<<24)
  389. #define STATUS_SCAN_ABORTING (1<<25)
  390. #define STATUS_SCAN_COMPLETE (1<<26)
  391. #define STATUS_WX_EVENT_PENDING (1<<27)
  392. #define STATUS_RESET_PENDING (1<<29)
  393. #define STATUS_SECURITY_UPDATED (1<<30) /* Security sync needed */
  394. /* Internal NIC states */
  395. #define IPW_STATE_INITIALIZED (1<<0)
  396. #define IPW_STATE_COUNTRY_FOUND (1<<1)
  397. #define IPW_STATE_ASSOCIATED (1<<2)
  398. #define IPW_STATE_ASSN_LOST (1<<3)
  399. #define IPW_STATE_ASSN_CHANGED (1<<4)
  400. #define IPW_STATE_SCAN_COMPLETE (1<<5)
  401. #define IPW_STATE_ENTERED_PSP (1<<6)
  402. #define IPW_STATE_LEFT_PSP (1<<7)
  403. #define IPW_STATE_RF_KILL (1<<8)
  404. #define IPW_STATE_DISABLED (1<<9)
  405. #define IPW_STATE_POWER_DOWN (1<<10)
  406. #define IPW_STATE_SCANNING (1<<11)
  407. #define CFG_STATIC_CHANNEL (1<<0) /* Restrict assoc. to single channel */
  408. #define CFG_STATIC_ESSID (1<<1) /* Restrict assoc. to single SSID */
  409. #define CFG_STATIC_BSSID (1<<2) /* Restrict assoc. to single BSSID */
  410. #define CFG_CUSTOM_MAC (1<<3)
  411. #define CFG_LONG_PREAMBLE (1<<4)
  412. #define CFG_ASSOCIATE (1<<6)
  413. #define CFG_FIXED_RATE (1<<7)
  414. #define CFG_ADHOC_CREATE (1<<8)
  415. #define CFG_C3_DISABLED (1<<9)
  416. #define CFG_PASSIVE_SCAN (1<<10)
  417. #define CAP_SHARED_KEY (1<<0) /* Off = OPEN */
  418. #define CAP_PRIVACY_ON (1<<1) /* Off = No privacy */
  419. struct ipw2100_priv {
  420. int stop_hang_check; /* Set 1 when shutting down to kill hang_check */
  421. int stop_rf_kill; /* Set 1 when shutting down to kill rf_kill */
  422. struct ieee80211_device *ieee;
  423. unsigned long status;
  424. unsigned long config;
  425. unsigned long capability;
  426. /* Statistics */
  427. int resets;
  428. int reset_backoff;
  429. /* Context */
  430. u8 essid[IW_ESSID_MAX_SIZE];
  431. u8 essid_len;
  432. u8 bssid[ETH_ALEN];
  433. u8 channel;
  434. int last_mode;
  435. int cstate_limit;
  436. unsigned long connect_start;
  437. unsigned long last_reset;
  438. u32 channel_mask;
  439. u32 fatal_error;
  440. u32 fatal_errors[IPW2100_ERROR_QUEUE];
  441. u32 fatal_index;
  442. int eeprom_version;
  443. int firmware_version;
  444. unsigned long hw_features;
  445. int hangs;
  446. u32 last_rtc;
  447. int dump_raw; /* 1 to dump raw bytes in /sys/.../memory */
  448. u8* snapshot[0x30];
  449. u8 mandatory_bssid_mac[ETH_ALEN];
  450. u8 mac_addr[ETH_ALEN];
  451. int power_mode;
  452. /* WEP data */
  453. struct ieee80211_security sec;
  454. int messages_sent;
  455. int short_retry_limit;
  456. int long_retry_limit;
  457. u32 rts_threshold;
  458. u32 frag_threshold;
  459. int in_isr;
  460. u32 tx_rates;
  461. int tx_power;
  462. u32 beacon_interval;
  463. char nick[IW_ESSID_MAX_SIZE + 1];
  464. struct ipw2100_status_queue status_queue;
  465. struct statistic txq_stat;
  466. struct statistic rxq_stat;
  467. struct ipw2100_bd_queue rx_queue;
  468. struct ipw2100_bd_queue tx_queue;
  469. struct ipw2100_rx_packet *rx_buffers;
  470. struct statistic fw_pend_stat;
  471. struct list_head fw_pend_list;
  472. struct statistic msg_free_stat;
  473. struct statistic msg_pend_stat;
  474. struct list_head msg_free_list;
  475. struct list_head msg_pend_list;
  476. struct ipw2100_tx_packet *msg_buffers;
  477. struct statistic tx_free_stat;
  478. struct statistic tx_pend_stat;
  479. struct list_head tx_free_list;
  480. struct list_head tx_pend_list;
  481. struct ipw2100_tx_packet *tx_buffers;
  482. struct ipw2100_ordinals ordinals;
  483. struct pci_dev *pci_dev;
  484. struct proc_dir_entry *dir_dev;
  485. struct net_device *net_dev;
  486. struct iw_statistics wstats;
  487. struct tasklet_struct irq_tasklet;
  488. struct workqueue_struct *workqueue;
  489. struct work_struct reset_work;
  490. struct work_struct security_work;
  491. struct work_struct wx_event_work;
  492. struct work_struct hang_check;
  493. struct work_struct rf_kill;
  494. u32 interrupts;
  495. int tx_interrupts;
  496. int rx_interrupts;
  497. int inta_other;
  498. spinlock_t low_lock;
  499. struct semaphore action_sem;
  500. struct semaphore adapter_sem;
  501. wait_queue_head_t wait_command_queue;
  502. };
  503. /*********************************************************
  504. * Host Command -> From Driver to FW
  505. *********************************************************/
  506. /**
  507. * Host command identifiers
  508. */
  509. #define HOST_COMPLETE 2
  510. #define SYSTEM_CONFIG 6
  511. #define SSID 8
  512. #define MANDATORY_BSSID 9
  513. #define AUTHENTICATION_TYPE 10
  514. #define ADAPTER_ADDRESS 11
  515. #define PORT_TYPE 12
  516. #define INTERNATIONAL_MODE 13
  517. #define CHANNEL 14
  518. #define RTS_THRESHOLD 15
  519. #define FRAG_THRESHOLD 16
  520. #define POWER_MODE 17
  521. #define TX_RATES 18
  522. #define BASIC_TX_RATES 19
  523. #define WEP_KEY_INFO 20
  524. #define WEP_KEY_INDEX 25
  525. #define WEP_FLAGS 26
  526. #define ADD_MULTICAST 27
  527. #define CLEAR_ALL_MULTICAST 28
  528. #define BEACON_INTERVAL 29
  529. #define ATIM_WINDOW 30
  530. #define CLEAR_STATISTICS 31
  531. #define SEND 33
  532. #define TX_POWER_INDEX 36
  533. #define BROADCAST_SCAN 43
  534. #define CARD_DISABLE 44
  535. #define PREFERRED_BSSID 45
  536. #define SET_SCAN_OPTIONS 46
  537. #define SCAN_DWELL_TIME 47
  538. #define SWEEP_TABLE 48
  539. #define AP_OR_STATION_TABLE 49
  540. #define GROUP_ORDINALS 50
  541. #define SHORT_RETRY_LIMIT 51
  542. #define LONG_RETRY_LIMIT 52
  543. #define HOST_PRE_POWER_DOWN 58
  544. #define CARD_DISABLE_PHY_OFF 61
  545. #define MSDU_TX_RATES 62
  546. /* Rogue AP Detection */
  547. #define SET_STATION_STAT_BITS 64
  548. #define CLEAR_STATIONS_STAT_BITS 65
  549. #define LEAP_ROGUE_MODE 66 //TODO tbw replaced by CFG_LEAP_ROGUE_AP
  550. #define SET_SECURITY_INFORMATION 67
  551. #define DISASSOCIATION_BSSID 68
  552. #define SET_WPA_IE 69
  553. /* system configuration bit mask: */
  554. #define IPW_CFG_MONITOR 0x00004
  555. #define IPW_CFG_PREAMBLE_AUTO 0x00010
  556. #define IPW_CFG_IBSS_AUTO_START 0x00020
  557. #define IPW_CFG_LOOPBACK 0x00100
  558. #define IPW_CFG_ANSWER_BCSSID_PROBE 0x00800
  559. #define IPW_CFG_BT_SIDEBAND_SIGNAL 0x02000
  560. #define IPW_CFG_802_1x_ENABLE 0x04000
  561. #define IPW_CFG_BSS_MASK 0x08000
  562. #define IPW_CFG_IBSS_MASK 0x10000
  563. #define IPW_SCAN_NOASSOCIATE (1<<0)
  564. #define IPW_SCAN_MIXED_CELL (1<<1)
  565. /* RESERVED (1<<2) */
  566. #define IPW_SCAN_PASSIVE (1<<3)
  567. #define IPW_NIC_FATAL_ERROR 0x2A7F0
  568. #define IPW_ERROR_ADDR(x) (x & 0x3FFFF)
  569. #define IPW_ERROR_CODE(x) ((x & 0xFF000000) >> 24)
  570. #define IPW2100_ERR_C3_CORRUPTION (0x10 << 24)
  571. #define IPW2100_ERR_MSG_TIMEOUT (0x11 << 24)
  572. #define IPW2100_ERR_FW_LOAD (0x12 << 24)
  573. #define IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND 0x200
  574. #define IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x0D80
  575. #define IPW_MEM_HOST_SHARED_RX_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x40)
  576. #define IPW_MEM_HOST_SHARED_RX_STATUS_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x44)
  577. #define IPW_MEM_HOST_SHARED_RX_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x48)
  578. #define IPW_MEM_HOST_SHARED_RX_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0xa0)
  579. #define IPW_MEM_HOST_SHARED_TX_QUEUE_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x00)
  580. #define IPW_MEM_HOST_SHARED_TX_QUEUE_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x04)
  581. #define IPW_MEM_HOST_SHARED_TX_QUEUE_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x80)
  582. #define IPW_MEM_HOST_SHARED_RX_WRITE_INDEX \
  583. (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x20)
  584. #define IPW_MEM_HOST_SHARED_TX_QUEUE_WRITE_INDEX \
  585. (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND)
  586. #define IPW_MEM_HOST_SHARED_ORDINALS_TABLE_1 (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x180)
  587. #define IPW_MEM_HOST_SHARED_ORDINALS_TABLE_2 (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x184)
  588. #define IPW2100_INTA_TX_TRANSFER (0x00000001) // Bit 0 (LSB)
  589. #define IPW2100_INTA_RX_TRANSFER (0x00000002) // Bit 1
  590. #define IPW2100_INTA_TX_COMPLETE (0x00000004) // Bit 2
  591. #define IPW2100_INTA_EVENT_INTERRUPT (0x00000008) // Bit 3
  592. #define IPW2100_INTA_STATUS_CHANGE (0x00000010) // Bit 4
  593. #define IPW2100_INTA_BEACON_PERIOD_EXPIRED (0x00000020) // Bit 5
  594. #define IPW2100_INTA_SLAVE_MODE_HOST_COMMAND_DONE (0x00010000) // Bit 16
  595. #define IPW2100_INTA_FW_INIT_DONE (0x01000000) // Bit 24
  596. #define IPW2100_INTA_FW_CALIBRATION_CALC (0x02000000) // Bit 25
  597. #define IPW2100_INTA_FATAL_ERROR (0x40000000) // Bit 30
  598. #define IPW2100_INTA_PARITY_ERROR (0x80000000) // Bit 31 (MSB)
  599. #define IPW_AUX_HOST_RESET_REG_PRINCETON_RESET (0x00000001)
  600. #define IPW_AUX_HOST_RESET_REG_FORCE_NMI (0x00000002)
  601. #define IPW_AUX_HOST_RESET_REG_PCI_HOST_CLUSTER_FATAL_NMI (0x00000004)
  602. #define IPW_AUX_HOST_RESET_REG_CORE_FATAL_NMI (0x00000008)
  603. #define IPW_AUX_HOST_RESET_REG_SW_RESET (0x00000080)
  604. #define IPW_AUX_HOST_RESET_REG_MASTER_DISABLED (0x00000100)
  605. #define IPW_AUX_HOST_RESET_REG_STOP_MASTER (0x00000200)
  606. #define IPW_AUX_HOST_GP_CNTRL_BIT_CLOCK_READY (0x00000001) // Bit 0 (LSB)
  607. #define IPW_AUX_HOST_GP_CNTRL_BIT_HOST_ALLOWS_STANDBY (0x00000002) // Bit 1
  608. #define IPW_AUX_HOST_GP_CNTRL_BIT_INIT_DONE (0x00000004) // Bit 2
  609. #define IPW_AUX_HOST_GP_CNTRL_BITS_SYS_CONFIG (0x000007c0) // Bits 6-10
  610. #define IPW_AUX_HOST_GP_CNTRL_BIT_BUS_TYPE (0x00000200) // Bit 9
  611. #define IPW_AUX_HOST_GP_CNTRL_BIT_BAR0_BLOCK_SIZE (0x00000400) // Bit 10
  612. #define IPW_AUX_HOST_GP_CNTRL_BIT_USB_MODE (0x20000000) // Bit 29
  613. #define IPW_AUX_HOST_GP_CNTRL_BIT_HOST_FORCES_SYS_CLK (0x40000000) // Bit 30
  614. #define IPW_AUX_HOST_GP_CNTRL_BIT_FW_FORCES_SYS_CLK (0x80000000) // Bit 31 (MSB)
  615. #define IPW_BIT_GPIO_GPIO1_MASK 0x0000000C
  616. #define IPW_BIT_GPIO_GPIO3_MASK 0x000000C0
  617. #define IPW_BIT_GPIO_GPIO1_ENABLE 0x00000008
  618. #define IPW_BIT_GPIO_RF_KILL 0x00010000
  619. #define IPW_BIT_GPIO_LED_OFF 0x00002000 // Bit 13 = 1
  620. #define IPW_REG_DOMAIN_0_OFFSET 0x0000
  621. #define IPW_REG_DOMAIN_1_OFFSET IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND
  622. #define IPW_REG_INTA IPW_REG_DOMAIN_0_OFFSET + 0x0008
  623. #define IPW_REG_INTA_MASK IPW_REG_DOMAIN_0_OFFSET + 0x000C
  624. #define IPW_REG_INDIRECT_ACCESS_ADDRESS IPW_REG_DOMAIN_0_OFFSET + 0x0010
  625. #define IPW_REG_INDIRECT_ACCESS_DATA IPW_REG_DOMAIN_0_OFFSET + 0x0014
  626. #define IPW_REG_AUTOINCREMENT_ADDRESS IPW_REG_DOMAIN_0_OFFSET + 0x0018
  627. #define IPW_REG_AUTOINCREMENT_DATA IPW_REG_DOMAIN_0_OFFSET + 0x001C
  628. #define IPW_REG_RESET_REG IPW_REG_DOMAIN_0_OFFSET + 0x0020
  629. #define IPW_REG_GP_CNTRL IPW_REG_DOMAIN_0_OFFSET + 0x0024
  630. #define IPW_REG_GPIO IPW_REG_DOMAIN_0_OFFSET + 0x0030
  631. #define IPW_REG_FW_TYPE IPW_REG_DOMAIN_1_OFFSET + 0x0188
  632. #define IPW_REG_FW_VERSION IPW_REG_DOMAIN_1_OFFSET + 0x018C
  633. #define IPW_REG_FW_COMPATABILITY_VERSION IPW_REG_DOMAIN_1_OFFSET + 0x0190
  634. #define IPW_REG_INDIRECT_ADDR_MASK 0x00FFFFFC
  635. #define IPW_INTERRUPT_MASK 0xC1010013
  636. #define IPW2100_CONTROL_REG 0x220000
  637. #define IPW2100_CONTROL_PHY_OFF 0x8
  638. #define IPW2100_COMMAND 0x00300004
  639. #define IPW2100_COMMAND_PHY_ON 0x0
  640. #define IPW2100_COMMAND_PHY_OFF 0x1
  641. /* in DEBUG_AREA, values of memory always 0xd55555d5 */
  642. #define IPW_REG_DOA_DEBUG_AREA_START IPW_REG_DOMAIN_0_OFFSET + 0x0090
  643. #define IPW_REG_DOA_DEBUG_AREA_END IPW_REG_DOMAIN_0_OFFSET + 0x00FF
  644. #define IPW_DATA_DOA_DEBUG_VALUE 0xd55555d5
  645. #define IPW_INTERNAL_REGISTER_HALT_AND_RESET 0x003000e0
  646. #define IPW_WAIT_CLOCK_STABILIZATION_DELAY 50 // micro seconds
  647. #define IPW_WAIT_RESET_ARC_COMPLETE_DELAY 10 // micro seconds
  648. #define IPW_WAIT_RESET_MASTER_ASSERT_COMPLETE_DELAY 10 // micro seconds
  649. // BD ring queue read/write difference
  650. #define IPW_BD_QUEUE_W_R_MIN_SPARE 2
  651. #define IPW_CACHE_LINE_LENGTH_DEFAULT 0x80
  652. #define IPW_CARD_DISABLE_PHY_OFF_COMPLETE_WAIT 100 // 100 milli
  653. #define IPW_PREPARE_POWER_DOWN_COMPLETE_WAIT 100 // 100 milli
  654. #define IPW_HEADER_802_11_SIZE sizeof(struct ieee80211_hdr_3addr)
  655. #define IPW_MAX_80211_PAYLOAD_SIZE 2304U
  656. #define IPW_MAX_802_11_PAYLOAD_LENGTH 2312
  657. #define IPW_MAX_ACCEPTABLE_TX_FRAME_LENGTH 1536
  658. #define IPW_MIN_ACCEPTABLE_RX_FRAME_LENGTH 60
  659. #define IPW_MAX_ACCEPTABLE_RX_FRAME_LENGTH \
  660. (IPW_MAX_ACCEPTABLE_TX_FRAME_LENGTH + IPW_HEADER_802_11_SIZE - \
  661. sizeof(struct ethhdr))
  662. #define IPW_802_11_FCS_LENGTH 4
  663. #define IPW_RX_NIC_BUFFER_LENGTH \
  664. (IPW_MAX_802_11_PAYLOAD_LENGTH + IPW_HEADER_802_11_SIZE + \
  665. IPW_802_11_FCS_LENGTH)
  666. #define IPW_802_11_PAYLOAD_OFFSET \
  667. (sizeof(struct ieee80211_hdr_3addr) + \
  668. sizeof(struct ieee80211_snap_hdr))
  669. struct ipw2100_rx {
  670. union {
  671. unsigned char payload[IPW_RX_NIC_BUFFER_LENGTH];
  672. struct ieee80211_hdr header;
  673. u32 status;
  674. struct ipw2100_notification notification;
  675. struct ipw2100_cmd_header command;
  676. } rx_data;
  677. } __attribute__ ((packed));
  678. /* Bit 0-7 are for 802.11b tx rates - . Bit 5-7 are reserved */
  679. #define TX_RATE_1_MBIT 0x0001
  680. #define TX_RATE_2_MBIT 0x0002
  681. #define TX_RATE_5_5_MBIT 0x0004
  682. #define TX_RATE_11_MBIT 0x0008
  683. #define TX_RATE_MASK 0x000F
  684. #define DEFAULT_TX_RATES 0x000F
  685. #define IPW_POWER_MODE_CAM 0x00 //(always on)
  686. #define IPW_POWER_INDEX_1 0x01
  687. #define IPW_POWER_INDEX_2 0x02
  688. #define IPW_POWER_INDEX_3 0x03
  689. #define IPW_POWER_INDEX_4 0x04
  690. #define IPW_POWER_INDEX_5 0x05
  691. #define IPW_POWER_AUTO 0x06
  692. #define IPW_POWER_MASK 0x0F
  693. #define IPW_POWER_ENABLED 0x10
  694. #define IPW_POWER_LEVEL(x) ((x) & IPW_POWER_MASK)
  695. #define IPW_TX_POWER_AUTO 0
  696. #define IPW_TX_POWER_ENHANCED 1
  697. #define IPW_TX_POWER_DEFAULT 32
  698. #define IPW_TX_POWER_MIN 0
  699. #define IPW_TX_POWER_MAX 16
  700. #define IPW_TX_POWER_MIN_DBM (-12)
  701. #define IPW_TX_POWER_MAX_DBM 16
  702. #define FW_SCAN_DONOT_ASSOCIATE 0x0001 // Dont Attempt to Associate after Scan
  703. #define FW_SCAN_PASSIVE 0x0008 // Force PASSSIVE Scan
  704. #define REG_MIN_CHANNEL 0
  705. #define REG_MAX_CHANNEL 14
  706. #define REG_CHANNEL_MASK 0x00003FFF
  707. #define IPW_IBSS_11B_DEFAULT_MASK 0x87ff
  708. #define DIVERSITY_EITHER 0 // Use both antennas
  709. #define DIVERSITY_ANTENNA_A 1 // Use antenna A
  710. #define DIVERSITY_ANTENNA_B 2 // Use antenna B
  711. #define HOST_COMMAND_WAIT 0
  712. #define HOST_COMMAND_NO_WAIT 1
  713. #define LOCK_NONE 0
  714. #define LOCK_DRIVER 1
  715. #define LOCK_FW 2
  716. #define TYPE_SWEEP_ORD 0x000D
  717. #define TYPE_IBSS_STTN_ORD 0x000E
  718. #define TYPE_BSS_AP_ORD 0x000F
  719. #define TYPE_RAW_BEACON_ENTRY 0x0010
  720. #define TYPE_CALIBRATION_DATA 0x0011
  721. #define TYPE_ROGUE_AP_DATA 0x0012
  722. #define TYPE_ASSOCIATION_REQUEST 0x0013
  723. #define TYPE_REASSOCIATION_REQUEST 0x0014
  724. #define HW_FEATURE_RFKILL (0x0001)
  725. #define RF_KILLSWITCH_OFF (1)
  726. #define RF_KILLSWITCH_ON (0)
  727. #define IPW_COMMAND_POOL_SIZE 40
  728. #define IPW_START_ORD_TAB_1 1
  729. #define IPW_START_ORD_TAB_2 1000
  730. #define IPW_ORD_TAB_1_ENTRY_SIZE sizeof(u32)
  731. #define IS_ORDINAL_TABLE_ONE(mgr,id) \
  732. ((id >= IPW_START_ORD_TAB_1) && (id < mgr->table1_size))
  733. #define IS_ORDINAL_TABLE_TWO(mgr,id) \
  734. ((id >= IPW_START_ORD_TAB_2) && (id < (mgr->table2_size + IPW_START_ORD_TAB_2)))
  735. #define BSS_ID_LENGTH 6
  736. // Fixed size data: Ordinal Table 1
  737. typedef enum _ORDINAL_TABLE_1 { // NS - means Not Supported by FW
  738. // Transmit statistics
  739. IPW_ORD_STAT_TX_HOST_REQUESTS = 1,// # of requested Host Tx's (MSDU)
  740. IPW_ORD_STAT_TX_HOST_COMPLETE, // # of successful Host Tx's (MSDU)
  741. IPW_ORD_STAT_TX_DIR_DATA, // # of successful Directed Tx's (MSDU)
  742. IPW_ORD_STAT_TX_DIR_DATA1 = 4, // # of successful Directed Tx's (MSDU) @ 1MB
  743. IPW_ORD_STAT_TX_DIR_DATA2, // # of successful Directed Tx's (MSDU) @ 2MB
  744. IPW_ORD_STAT_TX_DIR_DATA5_5, // # of successful Directed Tx's (MSDU) @ 5_5MB
  745. IPW_ORD_STAT_TX_DIR_DATA11, // # of successful Directed Tx's (MSDU) @ 11MB
  746. IPW_ORD_STAT_TX_DIR_DATA22, // # of successful Directed Tx's (MSDU) @ 22MB
  747. IPW_ORD_STAT_TX_NODIR_DATA1 = 13,// # of successful Non_Directed Tx's (MSDU) @ 1MB
  748. IPW_ORD_STAT_TX_NODIR_DATA2, // # of successful Non_Directed Tx's (MSDU) @ 2MB
  749. IPW_ORD_STAT_TX_NODIR_DATA5_5, // # of successful Non_Directed Tx's (MSDU) @ 5.5MB
  750. IPW_ORD_STAT_TX_NODIR_DATA11, // # of successful Non_Directed Tx's (MSDU) @ 11MB
  751. IPW_ORD_STAT_NULL_DATA = 21, // # of successful NULL data Tx's
  752. IPW_ORD_STAT_TX_RTS, // # of successful Tx RTS
  753. IPW_ORD_STAT_TX_CTS, // # of successful Tx CTS
  754. IPW_ORD_STAT_TX_ACK, // # of successful Tx ACK
  755. IPW_ORD_STAT_TX_ASSN, // # of successful Association Tx's
  756. IPW_ORD_STAT_TX_ASSN_RESP, // # of successful Association response Tx's
  757. IPW_ORD_STAT_TX_REASSN, // # of successful Reassociation Tx's
  758. IPW_ORD_STAT_TX_REASSN_RESP, // # of successful Reassociation response Tx's
  759. IPW_ORD_STAT_TX_PROBE, // # of probes successfully transmitted
  760. IPW_ORD_STAT_TX_PROBE_RESP, // # of probe responses successfully transmitted
  761. IPW_ORD_STAT_TX_BEACON, // # of tx beacon
  762. IPW_ORD_STAT_TX_ATIM, // # of Tx ATIM
  763. IPW_ORD_STAT_TX_DISASSN, // # of successful Disassociation TX
  764. IPW_ORD_STAT_TX_AUTH, // # of successful Authentication Tx
  765. IPW_ORD_STAT_TX_DEAUTH, // # of successful Deauthentication TX
  766. IPW_ORD_STAT_TX_TOTAL_BYTES = 41,// Total successful Tx data bytes
  767. IPW_ORD_STAT_TX_RETRIES, // # of Tx retries
  768. IPW_ORD_STAT_TX_RETRY1, // # of Tx retries at 1MBPS
  769. IPW_ORD_STAT_TX_RETRY2, // # of Tx retries at 2MBPS
  770. IPW_ORD_STAT_TX_RETRY5_5, // # of Tx retries at 5.5MBPS
  771. IPW_ORD_STAT_TX_RETRY11, // # of Tx retries at 11MBPS
  772. IPW_ORD_STAT_TX_FAILURES = 51, // # of Tx Failures
  773. IPW_ORD_STAT_TX_ABORT_AT_HOP, //NS // # of Tx's aborted at hop time
  774. IPW_ORD_STAT_TX_MAX_TRIES_IN_HOP,// # of times max tries in a hop failed
  775. IPW_ORD_STAT_TX_ABORT_LATE_DMA, //NS // # of times tx aborted due to late dma setup
  776. IPW_ORD_STAT_TX_ABORT_STX, //NS // # of times backoff aborted
  777. IPW_ORD_STAT_TX_DISASSN_FAIL, // # of times disassociation failed
  778. IPW_ORD_STAT_TX_ERR_CTS, // # of missed/bad CTS frames
  779. IPW_ORD_STAT_TX_BPDU, //NS // # of spanning tree BPDUs sent
  780. IPW_ORD_STAT_TX_ERR_ACK, // # of tx err due to acks
  781. // Receive statistics
  782. IPW_ORD_STAT_RX_HOST = 61, // # of packets passed to host
  783. IPW_ORD_STAT_RX_DIR_DATA, // # of directed packets
  784. IPW_ORD_STAT_RX_DIR_DATA1, // # of directed packets at 1MB
  785. IPW_ORD_STAT_RX_DIR_DATA2, // # of directed packets at 2MB
  786. IPW_ORD_STAT_RX_DIR_DATA5_5, // # of directed packets at 5.5MB
  787. IPW_ORD_STAT_RX_DIR_DATA11, // # of directed packets at 11MB
  788. IPW_ORD_STAT_RX_DIR_DATA22, // # of directed packets at 22MB
  789. IPW_ORD_STAT_RX_NODIR_DATA = 71,// # of nondirected packets
  790. IPW_ORD_STAT_RX_NODIR_DATA1, // # of nondirected packets at 1MB
  791. IPW_ORD_STAT_RX_NODIR_DATA2, // # of nondirected packets at 2MB
  792. IPW_ORD_STAT_RX_NODIR_DATA5_5, // # of nondirected packets at 5.5MB
  793. IPW_ORD_STAT_RX_NODIR_DATA11, // # of nondirected packets at 11MB
  794. IPW_ORD_STAT_RX_NULL_DATA = 80, // # of null data rx's
  795. IPW_ORD_STAT_RX_POLL, //NS // # of poll rx
  796. IPW_ORD_STAT_RX_RTS, // # of Rx RTS
  797. IPW_ORD_STAT_RX_CTS, // # of Rx CTS
  798. IPW_ORD_STAT_RX_ACK, // # of Rx ACK
  799. IPW_ORD_STAT_RX_CFEND, // # of Rx CF End
  800. IPW_ORD_STAT_RX_CFEND_ACK, // # of Rx CF End + CF Ack
  801. IPW_ORD_STAT_RX_ASSN, // # of Association Rx's
  802. IPW_ORD_STAT_RX_ASSN_RESP, // # of Association response Rx's
  803. IPW_ORD_STAT_RX_REASSN, // # of Reassociation Rx's
  804. IPW_ORD_STAT_RX_REASSN_RESP, // # of Reassociation response Rx's
  805. IPW_ORD_STAT_RX_PROBE, // # of probe Rx's
  806. IPW_ORD_STAT_RX_PROBE_RESP, // # of probe response Rx's
  807. IPW_ORD_STAT_RX_BEACON, // # of Rx beacon
  808. IPW_ORD_STAT_RX_ATIM, // # of Rx ATIM
  809. IPW_ORD_STAT_RX_DISASSN, // # of disassociation Rx
  810. IPW_ORD_STAT_RX_AUTH, // # of authentication Rx
  811. IPW_ORD_STAT_RX_DEAUTH, // # of deauthentication Rx
  812. IPW_ORD_STAT_RX_TOTAL_BYTES = 101,// Total rx data bytes received
  813. IPW_ORD_STAT_RX_ERR_CRC, // # of packets with Rx CRC error
  814. IPW_ORD_STAT_RX_ERR_CRC1, // # of Rx CRC errors at 1MB
  815. IPW_ORD_STAT_RX_ERR_CRC2, // # of Rx CRC errors at 2MB
  816. IPW_ORD_STAT_RX_ERR_CRC5_5, // # of Rx CRC errors at 5.5MB
  817. IPW_ORD_STAT_RX_ERR_CRC11, // # of Rx CRC errors at 11MB
  818. IPW_ORD_STAT_RX_DUPLICATE1 = 112, // # of duplicate rx packets at 1MB
  819. IPW_ORD_STAT_RX_DUPLICATE2, // # of duplicate rx packets at 2MB
  820. IPW_ORD_STAT_RX_DUPLICATE5_5, // # of duplicate rx packets at 5.5MB
  821. IPW_ORD_STAT_RX_DUPLICATE11, // # of duplicate rx packets at 11MB
  822. IPW_ORD_STAT_RX_DUPLICATE = 119, // # of duplicate rx packets
  823. IPW_ORD_PERS_DB_LOCK = 120, // # locking fw permanent db
  824. IPW_ORD_PERS_DB_SIZE, // # size of fw permanent db
  825. IPW_ORD_PERS_DB_ADDR, // # address of fw permanent db
  826. IPW_ORD_STAT_RX_INVALID_PROTOCOL, // # of rx frames with invalid protocol
  827. IPW_ORD_SYS_BOOT_TIME, // # Boot time
  828. IPW_ORD_STAT_RX_NO_BUFFER, // # of rx frames rejected due to no buffer
  829. IPW_ORD_STAT_RX_ABORT_LATE_DMA, //NS // # of rx frames rejected due to dma setup too late
  830. IPW_ORD_STAT_RX_ABORT_AT_HOP, //NS // # of rx frames aborted due to hop
  831. IPW_ORD_STAT_RX_MISSING_FRAG, // # of rx frames dropped due to missing fragment
  832. IPW_ORD_STAT_RX_ORPHAN_FRAG, // # of rx frames dropped due to non-sequential fragment
  833. IPW_ORD_STAT_RX_ORPHAN_FRAME, // # of rx frames dropped due to unmatched 1st frame
  834. IPW_ORD_STAT_RX_FRAG_AGEOUT, // # of rx frames dropped due to uncompleted frame
  835. IPW_ORD_STAT_RX_BAD_SSID, //NS // Bad SSID (unused)
  836. IPW_ORD_STAT_RX_ICV_ERRORS, // # of ICV errors during decryption
  837. // PSP Statistics
  838. IPW_ORD_STAT_PSP_SUSPENSION = 137,// # of times adapter suspended
  839. IPW_ORD_STAT_PSP_BCN_TIMEOUT, // # of beacon timeout
  840. IPW_ORD_STAT_PSP_POLL_TIMEOUT, // # of poll response timeouts
  841. IPW_ORD_STAT_PSP_NONDIR_TIMEOUT,// # of timeouts waiting for last broadcast/muticast pkt
  842. IPW_ORD_STAT_PSP_RX_DTIMS, // # of PSP DTIMs received
  843. IPW_ORD_STAT_PSP_RX_TIMS, // # of PSP TIMs received
  844. IPW_ORD_STAT_PSP_STATION_ID, // PSP Station ID
  845. // Association and roaming
  846. IPW_ORD_LAST_ASSN_TIME = 147, // RTC time of last association
  847. IPW_ORD_STAT_PERCENT_MISSED_BCNS,// current calculation of % missed beacons
  848. IPW_ORD_STAT_PERCENT_RETRIES, // current calculation of % missed tx retries
  849. IPW_ORD_ASSOCIATED_AP_PTR, // If associated, this is ptr to the associated
  850. // AP table entry. set to 0 if not associated
  851. IPW_ORD_AVAILABLE_AP_CNT, // # of AP's decsribed in the AP table
  852. IPW_ORD_AP_LIST_PTR, // Ptr to list of available APs
  853. IPW_ORD_STAT_AP_ASSNS, // # of associations
  854. IPW_ORD_STAT_ASSN_FAIL, // # of association failures
  855. IPW_ORD_STAT_ASSN_RESP_FAIL, // # of failuresdue to response fail
  856. IPW_ORD_STAT_FULL_SCANS, // # of full scans
  857. IPW_ORD_CARD_DISABLED, // # Card Disabled
  858. IPW_ORD_STAT_ROAM_INHIBIT, // # of times roaming was inhibited due to ongoing activity
  859. IPW_FILLER_40,
  860. IPW_ORD_RSSI_AT_ASSN = 160, // RSSI of associated AP at time of association
  861. IPW_ORD_STAT_ASSN_CAUSE1, // # of reassociations due to no tx from AP in last N
  862. // hops or no prob_ responses in last 3 minutes
  863. IPW_ORD_STAT_ASSN_CAUSE2, // # of reassociations due to poor tx/rx quality
  864. IPW_ORD_STAT_ASSN_CAUSE3, // # of reassociations due to tx/rx quality with excessive
  865. // load at the AP
  866. IPW_ORD_STAT_ASSN_CAUSE4, // # of reassociations due to AP RSSI level fell below
  867. // eligible group
  868. IPW_ORD_STAT_ASSN_CAUSE5, // # of reassociations due to load leveling
  869. IPW_ORD_STAT_ASSN_CAUSE6, //NS // # of reassociations due to dropped by Ap
  870. IPW_FILLER_41,
  871. IPW_FILLER_42,
  872. IPW_FILLER_43,
  873. IPW_ORD_STAT_AUTH_FAIL, // # of times authentication failed
  874. IPW_ORD_STAT_AUTH_RESP_FAIL, // # of times authentication response failed
  875. IPW_ORD_STATION_TABLE_CNT, // # of entries in association table
  876. // Other statistics
  877. IPW_ORD_RSSI_AVG_CURR = 173, // Current avg RSSI
  878. IPW_ORD_STEST_RESULTS_CURR, //NS // Current self test results word
  879. IPW_ORD_STEST_RESULTS_CUM, //NS // Cummulative self test results word
  880. IPW_ORD_SELF_TEST_STATUS, //NS //
  881. IPW_ORD_POWER_MGMT_MODE, // Power mode - 0=CAM, 1=PSP
  882. IPW_ORD_POWER_MGMT_INDEX, //NS //
  883. IPW_ORD_COUNTRY_CODE, // IEEE country code as recv'd from beacon
  884. IPW_ORD_COUNTRY_CHANNELS, // channels suported by country
  885. // IPW_ORD_COUNTRY_CHANNELS:
  886. // For 11b the lower 2-byte are used for channels from 1-14
  887. // and the higher 2-byte are not used.
  888. IPW_ORD_RESET_CNT, // # of adapter resets (warm)
  889. IPW_ORD_BEACON_INTERVAL, // Beacon interval
  890. IPW_ORD_PRINCETON_VERSION = 184, //NS // Princeton Version
  891. IPW_ORD_ANTENNA_DIVERSITY, // TRUE if antenna diversity is disabled
  892. IPW_ORD_CCA_RSSI, //NS // CCA RSSI value (factory programmed)
  893. IPW_ORD_STAT_EEPROM_UPDATE, //NS // # of times config EEPROM updated
  894. IPW_ORD_DTIM_PERIOD, // # of beacon intervals between DTIMs
  895. IPW_ORD_OUR_FREQ, // current radio freq lower digits - channel ID
  896. IPW_ORD_RTC_TIME = 190, // current RTC time
  897. IPW_ORD_PORT_TYPE, // operating mode
  898. IPW_ORD_CURRENT_TX_RATE, // current tx rate
  899. IPW_ORD_SUPPORTED_RATES, // Bitmap of supported tx rates
  900. IPW_ORD_ATIM_WINDOW, // current ATIM Window
  901. IPW_ORD_BASIC_RATES, // bitmap of basic tx rates
  902. IPW_ORD_NIC_HIGHEST_RATE, // bitmap of basic tx rates
  903. IPW_ORD_AP_HIGHEST_RATE, // bitmap of basic tx rates
  904. IPW_ORD_CAPABILITIES, // Management frame capability field
  905. IPW_ORD_AUTH_TYPE, // Type of authentication
  906. IPW_ORD_RADIO_TYPE, // Adapter card platform type
  907. IPW_ORD_RTS_THRESHOLD = 201, // Min length of packet after which RTS handshaking is used
  908. IPW_ORD_INT_MODE, // International mode
  909. IPW_ORD_FRAGMENTATION_THRESHOLD, // protocol frag threshold
  910. IPW_ORD_EEPROM_SRAM_DB_BLOCK_START_ADDRESS, // EEPROM offset in SRAM
  911. IPW_ORD_EEPROM_SRAM_DB_BLOCK_SIZE, // EEPROM size in SRAM
  912. IPW_ORD_EEPROM_SKU_CAPABILITY, // EEPROM SKU Capability 206 =
  913. IPW_ORD_EEPROM_IBSS_11B_CHANNELS, // EEPROM IBSS 11b channel set
  914. IPW_ORD_MAC_VERSION = 209, // MAC Version
  915. IPW_ORD_MAC_REVISION, // MAC Revision
  916. IPW_ORD_RADIO_VERSION, // Radio Version
  917. IPW_ORD_NIC_MANF_DATE_TIME, // MANF Date/Time STAMP
  918. IPW_ORD_UCODE_VERSION, // Ucode Version
  919. IPW_ORD_HW_RF_SWITCH_STATE = 214, // HW RF Kill Switch State
  920. } ORDINALTABLE1;
  921. // ordinal table 2
  922. // Variable length data:
  923. #define IPW_FIRST_VARIABLE_LENGTH_ORDINAL 1001
  924. typedef enum _ORDINAL_TABLE_2 { // NS - means Not Supported by FW
  925. IPW_ORD_STAT_BASE = 1000, // contains number of variable ORDs
  926. IPW_ORD_STAT_ADAPTER_MAC = 1001, // 6 bytes: our adapter MAC address
  927. IPW_ORD_STAT_PREFERRED_BSSID = 1002, // 6 bytes: BSSID of the preferred AP
  928. IPW_ORD_STAT_MANDATORY_BSSID = 1003, // 6 bytes: BSSID of the mandatory AP
  929. IPW_FILL_1, //NS //
  930. IPW_ORD_STAT_COUNTRY_TEXT = 1005, // 36 bytes: Country name text, First two bytes are Country code
  931. IPW_ORD_STAT_ASSN_SSID = 1006, // 32 bytes: ESSID String
  932. IPW_ORD_STATION_TABLE = 1007, // ? bytes: Station/AP table (via Direct SSID Scans)
  933. IPW_ORD_STAT_SWEEP_TABLE = 1008, // ? bytes: Sweep/Host Table table (via Broadcast Scans)
  934. IPW_ORD_STAT_ROAM_LOG = 1009, // ? bytes: Roaming log
  935. IPW_ORD_STAT_RATE_LOG = 1010, //NS // 0 bytes: Rate log
  936. IPW_ORD_STAT_FIFO = 1011, //NS // 0 bytes: Fifo buffer data structures
  937. IPW_ORD_STAT_FW_VER_NUM = 1012, // 14 bytes: fw version ID string as in (a.bb.ccc; "0.08.011")
  938. IPW_ORD_STAT_FW_DATE = 1013, // 14 bytes: fw date string (mmm dd yyyy; "Mar 13 2002")
  939. IPW_ORD_STAT_ASSN_AP_BSSID = 1014, // 6 bytes: MAC address of associated AP
  940. IPW_ORD_STAT_DEBUG = 1015, //NS // ? bytes:
  941. IPW_ORD_STAT_NIC_BPA_NUM = 1016, // 11 bytes: NIC BPA number in ASCII
  942. IPW_ORD_STAT_UCODE_DATE = 1017, // 5 bytes: uCode date
  943. IPW_ORD_SECURITY_NGOTIATION_RESULT = 1018,
  944. } ORDINALTABLE2; // NS - means Not Supported by FW
  945. #define IPW_LAST_VARIABLE_LENGTH_ORDINAL 1018
  946. #ifndef WIRELESS_SPY
  947. #define WIRELESS_SPY // enable iwspy support
  948. #endif
  949. extern struct iw_handler_def ipw2100_wx_handler_def;
  950. extern struct iw_statistics *ipw2100_wx_wireless_stats(struct net_device * dev);
  951. extern void ipw2100_wx_event_work(struct ipw2100_priv *priv);
  952. #define IPW_HOST_FW_SHARED_AREA0 0x0002f200
  953. #define IPW_HOST_FW_SHARED_AREA0_END 0x0002f510 // 0x310 bytes
  954. #define IPW_HOST_FW_SHARED_AREA1 0x0002f610
  955. #define IPW_HOST_FW_SHARED_AREA1_END 0x0002f630 // 0x20 bytes
  956. #define IPW_HOST_FW_SHARED_AREA2 0x0002fa00
  957. #define IPW_HOST_FW_SHARED_AREA2_END 0x0002fa20 // 0x20 bytes
  958. #define IPW_HOST_FW_SHARED_AREA3 0x0002fc00
  959. #define IPW_HOST_FW_SHARED_AREA3_END 0x0002fc10 // 0x10 bytes
  960. #define IPW_HOST_FW_INTERRUPT_AREA 0x0002ff80
  961. #define IPW_HOST_FW_INTERRUPT_AREA_END 0x00030000 // 0x80 bytes
  962. struct ipw2100_fw_chunk {
  963. unsigned char *buf;
  964. long len;
  965. long pos;
  966. struct list_head list;
  967. };
  968. struct ipw2100_fw_chunk_set {
  969. const void *data;
  970. unsigned long size;
  971. };
  972. struct ipw2100_fw {
  973. int version;
  974. struct ipw2100_fw_chunk_set fw;
  975. struct ipw2100_fw_chunk_set uc;
  976. const struct firmware *fw_entry;
  977. };
  978. int ipw2100_get_firmware(struct ipw2100_priv *priv, struct ipw2100_fw *fw);
  979. void ipw2100_release_firmware(struct ipw2100_priv *priv, struct ipw2100_fw *fw);
  980. int ipw2100_fw_download(struct ipw2100_priv *priv, struct ipw2100_fw *fw);
  981. int ipw2100_ucode_download(struct ipw2100_priv *priv, struct ipw2100_fw *fw);
  982. #define MAX_FW_VERSION_LEN 14
  983. int ipw2100_get_fwversion(struct ipw2100_priv *priv, char *buf, size_t max);
  984. int ipw2100_get_ucodeversion(struct ipw2100_priv *priv, char *buf, size_t max);
  985. #endif /* _IPW2100_H */