twl6030-irq.c 10 KB

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  1. /*
  2. * twl6030-irq.c - TWL6030 irq support
  3. *
  4. * Copyright (C) 2005-2009 Texas Instruments, Inc.
  5. *
  6. * Modifications to defer interrupt handling to a kernel thread:
  7. * Copyright (C) 2006 MontaVista Software, Inc.
  8. *
  9. * Based on tlv320aic23.c:
  10. * Copyright (c) by Kai Svahn <kai.svahn@nokia.com>
  11. *
  12. * Code cleanup and modifications to IRQ handler.
  13. * by syed khasim <x0khasim@ti.com>
  14. *
  15. * TWL6030 specific code and IRQ handling changes by
  16. * Jagadeesh Bhaskar Pakaravoor <j-pakaravoor@ti.com>
  17. * Balaji T K <balajitk@ti.com>
  18. *
  19. * This program is free software; you can redistribute it and/or modify
  20. * it under the terms of the GNU General Public License as published by
  21. * the Free Software Foundation; either version 2 of the License, or
  22. * (at your option) any later version.
  23. *
  24. * This program is distributed in the hope that it will be useful,
  25. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  26. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  27. * GNU General Public License for more details.
  28. *
  29. * You should have received a copy of the GNU General Public License
  30. * along with this program; if not, write to the Free Software
  31. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  32. */
  33. #include <linux/init.h>
  34. #include <linux/export.h>
  35. #include <linux/interrupt.h>
  36. #include <linux/irq.h>
  37. #include <linux/kthread.h>
  38. #include <linux/i2c/twl.h>
  39. #include <linux/platform_device.h>
  40. #include "twl-core.h"
  41. /*
  42. * TWL6030 (unlike its predecessors, which had two level interrupt handling)
  43. * three interrupt registers INT_STS_A, INT_STS_B and INT_STS_C.
  44. * It exposes status bits saying who has raised an interrupt. There are
  45. * three mask registers that corresponds to these status registers, that
  46. * enables/disables these interrupts.
  47. *
  48. * We set up IRQs starting at a platform-specified base. An interrupt map table,
  49. * specifies mapping between interrupt number and the associated module.
  50. *
  51. */
  52. static int twl6030_interrupt_mapping[24] = {
  53. PWR_INTR_OFFSET, /* Bit 0 PWRON */
  54. PWR_INTR_OFFSET, /* Bit 1 RPWRON */
  55. PWR_INTR_OFFSET, /* Bit 2 BAT_VLOW */
  56. RTC_INTR_OFFSET, /* Bit 3 RTC_ALARM */
  57. RTC_INTR_OFFSET, /* Bit 4 RTC_PERIOD */
  58. HOTDIE_INTR_OFFSET, /* Bit 5 HOT_DIE */
  59. SMPSLDO_INTR_OFFSET, /* Bit 6 VXXX_SHORT */
  60. SMPSLDO_INTR_OFFSET, /* Bit 7 VMMC_SHORT */
  61. SMPSLDO_INTR_OFFSET, /* Bit 8 VUSIM_SHORT */
  62. BATDETECT_INTR_OFFSET, /* Bit 9 BAT */
  63. SIMDETECT_INTR_OFFSET, /* Bit 10 SIM */
  64. MMCDETECT_INTR_OFFSET, /* Bit 11 MMC */
  65. RSV_INTR_OFFSET, /* Bit 12 Reserved */
  66. MADC_INTR_OFFSET, /* Bit 13 GPADC_RT_EOC */
  67. MADC_INTR_OFFSET, /* Bit 14 GPADC_SW_EOC */
  68. GASGAUGE_INTR_OFFSET, /* Bit 15 CC_AUTOCAL */
  69. USBOTG_INTR_OFFSET, /* Bit 16 ID_WKUP */
  70. USBOTG_INTR_OFFSET, /* Bit 17 VBUS_WKUP */
  71. USBOTG_INTR_OFFSET, /* Bit 18 ID */
  72. USB_PRES_INTR_OFFSET, /* Bit 19 VBUS */
  73. CHARGER_INTR_OFFSET, /* Bit 20 CHRG_CTRL */
  74. CHARGERFAULT_INTR_OFFSET, /* Bit 21 EXT_CHRG */
  75. CHARGERFAULT_INTR_OFFSET, /* Bit 22 INT_CHRG */
  76. RSV_INTR_OFFSET, /* Bit 23 Reserved */
  77. };
  78. /*----------------------------------------------------------------------*/
  79. static unsigned twl6030_irq_base;
  80. static struct completion irq_event;
  81. /*
  82. * This thread processes interrupts reported by the Primary Interrupt Handler.
  83. */
  84. static int twl6030_irq_thread(void *data)
  85. {
  86. long irq = (long)data;
  87. static unsigned i2c_errors;
  88. static const unsigned max_i2c_errors = 100;
  89. int ret;
  90. current->flags |= PF_NOFREEZE;
  91. while (!kthread_should_stop()) {
  92. int i;
  93. union {
  94. u8 bytes[4];
  95. u32 int_sts;
  96. } sts;
  97. /* Wait for IRQ, then read PIH irq status (also blocking) */
  98. wait_for_completion_interruptible(&irq_event);
  99. /* read INT_STS_A, B and C in one shot using a burst read */
  100. ret = twl_i2c_read(TWL_MODULE_PIH, sts.bytes,
  101. REG_INT_STS_A, 3);
  102. if (ret) {
  103. pr_warning("twl6030: I2C error %d reading PIH ISR\n",
  104. ret);
  105. if (++i2c_errors >= max_i2c_errors) {
  106. printk(KERN_ERR "Maximum I2C error count"
  107. " exceeded. Terminating %s.\n",
  108. __func__);
  109. break;
  110. }
  111. complete(&irq_event);
  112. continue;
  113. }
  114. sts.bytes[3] = 0; /* Only 24 bits are valid*/
  115. /*
  116. * Since VBUS status bit is not reliable for VBUS disconnect
  117. * use CHARGER VBUS detection status bit instead.
  118. */
  119. if (sts.bytes[2] & 0x10)
  120. sts.bytes[2] |= 0x08;
  121. for (i = 0; sts.int_sts; sts.int_sts >>= 1, i++) {
  122. local_irq_disable();
  123. if (sts.int_sts & 0x1) {
  124. int module_irq = twl6030_irq_base +
  125. twl6030_interrupt_mapping[i];
  126. generic_handle_irq(module_irq);
  127. }
  128. local_irq_enable();
  129. }
  130. ret = twl_i2c_write(TWL_MODULE_PIH, sts.bytes,
  131. REG_INT_STS_A, 3); /* clear INT_STS_A */
  132. if (ret)
  133. pr_warning("twl6030: I2C error in clearing PIH ISR\n");
  134. enable_irq(irq);
  135. }
  136. return 0;
  137. }
  138. /*
  139. * handle_twl6030_int() is the desc->handle method for the twl6030 interrupt.
  140. * This is a chained interrupt, so there is no desc->action method for it.
  141. * Now we need to query the interrupt controller in the twl6030 to determine
  142. * which module is generating the interrupt request. However, we can't do i2c
  143. * transactions in interrupt context, so we must defer that work to a kernel
  144. * thread. All we do here is acknowledge and mask the interrupt and wakeup
  145. * the kernel thread.
  146. */
  147. static irqreturn_t handle_twl6030_pih(int irq, void *devid)
  148. {
  149. disable_irq_nosync(irq);
  150. complete(devid);
  151. return IRQ_HANDLED;
  152. }
  153. /*----------------------------------------------------------------------*/
  154. static inline void activate_irq(int irq)
  155. {
  156. #ifdef CONFIG_ARM
  157. /* ARM requires an extra step to clear IRQ_NOREQUEST, which it
  158. * sets on behalf of every irq_chip. Also sets IRQ_NOPROBE.
  159. */
  160. set_irq_flags(irq, IRQF_VALID);
  161. #else
  162. /* same effect on other architectures */
  163. irq_set_noprobe(irq);
  164. #endif
  165. }
  166. /*----------------------------------------------------------------------*/
  167. static unsigned twl6030_irq_next;
  168. /*----------------------------------------------------------------------*/
  169. int twl6030_interrupt_unmask(u8 bit_mask, u8 offset)
  170. {
  171. int ret;
  172. u8 unmask_value;
  173. ret = twl_i2c_read_u8(TWL_MODULE_PIH, &unmask_value,
  174. REG_INT_STS_A + offset);
  175. unmask_value &= (~(bit_mask));
  176. ret |= twl_i2c_write_u8(TWL_MODULE_PIH, unmask_value,
  177. REG_INT_STS_A + offset); /* unmask INT_MSK_A/B/C */
  178. return ret;
  179. }
  180. EXPORT_SYMBOL(twl6030_interrupt_unmask);
  181. int twl6030_interrupt_mask(u8 bit_mask, u8 offset)
  182. {
  183. int ret;
  184. u8 mask_value;
  185. ret = twl_i2c_read_u8(TWL_MODULE_PIH, &mask_value,
  186. REG_INT_STS_A + offset);
  187. mask_value |= (bit_mask);
  188. ret |= twl_i2c_write_u8(TWL_MODULE_PIH, mask_value,
  189. REG_INT_STS_A + offset); /* mask INT_MSK_A/B/C */
  190. return ret;
  191. }
  192. EXPORT_SYMBOL(twl6030_interrupt_mask);
  193. int twl6030_mmc_card_detect_config(void)
  194. {
  195. int ret;
  196. u8 reg_val = 0;
  197. /* Unmasking the Card detect Interrupt line for MMC1 from Phoenix */
  198. twl6030_interrupt_unmask(TWL6030_MMCDETECT_INT_MASK,
  199. REG_INT_MSK_LINE_B);
  200. twl6030_interrupt_unmask(TWL6030_MMCDETECT_INT_MASK,
  201. REG_INT_MSK_STS_B);
  202. /*
  203. * Initially Configuring MMC_CTRL for receiving interrupts &
  204. * Card status on TWL6030 for MMC1
  205. */
  206. ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, &reg_val, TWL6030_MMCCTRL);
  207. if (ret < 0) {
  208. pr_err("twl6030: Failed to read MMCCTRL, error %d\n", ret);
  209. return ret;
  210. }
  211. reg_val &= ~VMMC_AUTO_OFF;
  212. reg_val |= SW_FC;
  213. ret = twl_i2c_write_u8(TWL6030_MODULE_ID0, reg_val, TWL6030_MMCCTRL);
  214. if (ret < 0) {
  215. pr_err("twl6030: Failed to write MMCCTRL, error %d\n", ret);
  216. return ret;
  217. }
  218. /* Configuring PullUp-PullDown register */
  219. ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, &reg_val,
  220. TWL6030_CFG_INPUT_PUPD3);
  221. if (ret < 0) {
  222. pr_err("twl6030: Failed to read CFG_INPUT_PUPD3, error %d\n",
  223. ret);
  224. return ret;
  225. }
  226. reg_val &= ~(MMC_PU | MMC_PD);
  227. ret = twl_i2c_write_u8(TWL6030_MODULE_ID0, reg_val,
  228. TWL6030_CFG_INPUT_PUPD3);
  229. if (ret < 0) {
  230. pr_err("twl6030: Failed to write CFG_INPUT_PUPD3, error %d\n",
  231. ret);
  232. return ret;
  233. }
  234. return 0;
  235. }
  236. EXPORT_SYMBOL(twl6030_mmc_card_detect_config);
  237. int twl6030_mmc_card_detect(struct device *dev, int slot)
  238. {
  239. int ret = -EIO;
  240. u8 read_reg = 0;
  241. struct platform_device *pdev = to_platform_device(dev);
  242. if (pdev->id) {
  243. /* TWL6030 provide's Card detect support for
  244. * only MMC1 controller.
  245. */
  246. pr_err("Unknown MMC controller %d in %s\n", pdev->id, __func__);
  247. return ret;
  248. }
  249. /*
  250. * BIT0 of MMC_CTRL on TWL6030 provides card status for MMC1
  251. * 0 - Card not present ,1 - Card present
  252. */
  253. ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, &read_reg,
  254. TWL6030_MMCCTRL);
  255. if (ret >= 0)
  256. ret = read_reg & STS_MMC;
  257. return ret;
  258. }
  259. EXPORT_SYMBOL(twl6030_mmc_card_detect);
  260. int twl6030_init_irq(int irq_num, unsigned irq_base, unsigned irq_end)
  261. {
  262. int status = 0;
  263. int i;
  264. struct task_struct *task;
  265. int ret;
  266. u8 mask[4];
  267. static struct irq_chip twl6030_irq_chip;
  268. mask[1] = 0xFF;
  269. mask[2] = 0xFF;
  270. mask[3] = 0xFF;
  271. ret = twl_i2c_write(TWL_MODULE_PIH, &mask[0],
  272. REG_INT_MSK_LINE_A, 3); /* MASK ALL INT LINES */
  273. ret = twl_i2c_write(TWL_MODULE_PIH, &mask[0],
  274. REG_INT_MSK_STS_A, 3); /* MASK ALL INT STS */
  275. ret = twl_i2c_write(TWL_MODULE_PIH, &mask[0],
  276. REG_INT_STS_A, 3); /* clear INT_STS_A,B,C */
  277. twl6030_irq_base = irq_base;
  278. /* install an irq handler for each of the modules;
  279. * clone dummy irq_chip since PIH can't *do* anything
  280. */
  281. twl6030_irq_chip = dummy_irq_chip;
  282. twl6030_irq_chip.name = "twl6030";
  283. twl6030_irq_chip.irq_set_type = NULL;
  284. for (i = irq_base; i < irq_end; i++) {
  285. irq_set_chip_and_handler(i, &twl6030_irq_chip,
  286. handle_simple_irq);
  287. activate_irq(i);
  288. }
  289. twl6030_irq_next = i;
  290. pr_info("twl6030: %s (irq %d) chaining IRQs %d..%d\n", "PIH",
  291. irq_num, irq_base, twl6030_irq_next - 1);
  292. /* install an irq handler to demultiplex the TWL6030 interrupt */
  293. init_completion(&irq_event);
  294. task = kthread_run(twl6030_irq_thread, (void *)irq_num, "twl6030-irq");
  295. if (IS_ERR(task)) {
  296. pr_err("twl6030: could not create irq %d thread!\n", irq_num);
  297. status = PTR_ERR(task);
  298. goto fail_kthread;
  299. }
  300. status = request_irq(irq_num, handle_twl6030_pih, IRQF_DISABLED,
  301. "TWL6030-PIH", &irq_event);
  302. if (status < 0) {
  303. pr_err("twl6030: could not claim irq%d: %d\n", irq_num, status);
  304. goto fail_irq;
  305. }
  306. return status;
  307. fail_irq:
  308. free_irq(irq_num, &irq_event);
  309. fail_kthread:
  310. for (i = irq_base; i < irq_end; i++)
  311. irq_set_chip_and_handler(i, NULL, NULL);
  312. return status;
  313. }
  314. int twl6030_exit_irq(void)
  315. {
  316. if (twl6030_irq_base) {
  317. pr_err("twl6030: can't yet clean up IRQs?\n");
  318. return -ENOSYS;
  319. }
  320. return 0;
  321. }