mx1_camera.c 20 KB

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  1. /*
  2. * V4L2 Driver for i.MXL/i.MXL camera (CSI) host
  3. *
  4. * Copyright (C) 2008, Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
  5. * Copyright (C) 2009, Darius Augulis <augulis.darius@gmail.com>
  6. *
  7. * Based on PXA SoC camera driver
  8. * Copyright (C) 2006, Sascha Hauer, Pengutronix
  9. * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. */
  15. #include <linux/clk.h>
  16. #include <linux/delay.h>
  17. #include <linux/device.h>
  18. #include <linux/dma-mapping.h>
  19. #include <linux/errno.h>
  20. #include <linux/fs.h>
  21. #include <linux/init.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/io.h>
  24. #include <linux/kernel.h>
  25. #include <linux/mm.h>
  26. #include <linux/module.h>
  27. #include <linux/moduleparam.h>
  28. #include <linux/mutex.h>
  29. #include <linux/platform_device.h>
  30. #include <linux/sched.h>
  31. #include <linux/time.h>
  32. #include <linux/version.h>
  33. #include <linux/videodev2.h>
  34. #include <media/soc_camera.h>
  35. #include <media/v4l2-common.h>
  36. #include <media/v4l2-dev.h>
  37. #include <media/videobuf-dma-contig.h>
  38. #include <asm/dma.h>
  39. #include <asm/fiq.h>
  40. #include <mach/dma-mx1-mx2.h>
  41. #include <mach/hardware.h>
  42. #include <mach/mx1_camera.h>
  43. /*
  44. * CSI registers
  45. */
  46. #define DMA_CCR(x) (0x8c + ((x) << 6)) /* Control Registers */
  47. #define DMA_DIMR 0x08 /* Interrupt mask Register */
  48. #define CSICR1 0x00 /* CSI Control Register 1 */
  49. #define CSISR 0x08 /* CSI Status Register */
  50. #define CSIRXR 0x10 /* CSI RxFIFO Register */
  51. #define CSICR1_RXFF_LEVEL(x) (((x) & 0x3) << 19)
  52. #define CSICR1_SOF_POL (1 << 17)
  53. #define CSICR1_SOF_INTEN (1 << 16)
  54. #define CSICR1_MCLKDIV(x) (((x) & 0xf) << 12)
  55. #define CSICR1_MCLKEN (1 << 9)
  56. #define CSICR1_FCC (1 << 8)
  57. #define CSICR1_BIG_ENDIAN (1 << 7)
  58. #define CSICR1_CLR_RXFIFO (1 << 5)
  59. #define CSICR1_GCLK_MODE (1 << 4)
  60. #define CSICR1_DATA_POL (1 << 2)
  61. #define CSICR1_REDGE (1 << 1)
  62. #define CSICR1_EN (1 << 0)
  63. #define CSISR_SFF_OR_INT (1 << 25)
  64. #define CSISR_RFF_OR_INT (1 << 24)
  65. #define CSISR_STATFF_INT (1 << 21)
  66. #define CSISR_RXFF_INT (1 << 18)
  67. #define CSISR_SOF_INT (1 << 16)
  68. #define CSISR_DRDY (1 << 0)
  69. #define VERSION_CODE KERNEL_VERSION(0, 0, 1)
  70. #define DRIVER_NAME "mx1-camera"
  71. #define CSI_IRQ_MASK (CSISR_SFF_OR_INT | CSISR_RFF_OR_INT | \
  72. CSISR_STATFF_INT | CSISR_RXFF_INT | CSISR_SOF_INT)
  73. #define CSI_BUS_FLAGS (SOCAM_MASTER | SOCAM_HSYNC_ACTIVE_HIGH | \
  74. SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW | \
  75. SOCAM_PCLK_SAMPLE_RISING | SOCAM_PCLK_SAMPLE_FALLING | \
  76. SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATA_ACTIVE_LOW | \
  77. SOCAM_DATAWIDTH_8)
  78. #define MAX_VIDEO_MEM 16 /* Video memory limit in megabytes */
  79. /*
  80. * Structures
  81. */
  82. /* buffer for one video frame */
  83. struct mx1_buffer {
  84. /* common v4l buffer stuff -- must be first */
  85. struct videobuf_buffer vb;
  86. const struct soc_camera_data_format *fmt;
  87. int inwork;
  88. };
  89. /*
  90. * i.MX1/i.MXL is only supposed to handle one camera on its Camera Sensor
  91. * Interface. If anyone ever builds hardware to enable more than
  92. * one camera, they will have to modify this driver too
  93. */
  94. struct mx1_camera_dev {
  95. struct soc_camera_host soc_host;
  96. struct soc_camera_device *icd;
  97. struct mx1_camera_pdata *pdata;
  98. struct mx1_buffer *active;
  99. struct resource *res;
  100. struct clk *clk;
  101. struct list_head capture;
  102. void __iomem *base;
  103. int dma_chan;
  104. unsigned int irq;
  105. unsigned long mclk;
  106. spinlock_t lock;
  107. };
  108. /*
  109. * Videobuf operations
  110. */
  111. static int mx1_videobuf_setup(struct videobuf_queue *vq, unsigned int *count,
  112. unsigned int *size)
  113. {
  114. struct soc_camera_device *icd = vq->priv_data;
  115. *size = icd->user_width * icd->user_height *
  116. ((icd->current_fmt->depth + 7) >> 3);
  117. if (!*count)
  118. *count = 32;
  119. while (*size * *count > MAX_VIDEO_MEM * 1024 * 1024)
  120. (*count)--;
  121. dev_dbg(icd->dev.parent, "count=%d, size=%d\n", *count, *size);
  122. return 0;
  123. }
  124. static void free_buffer(struct videobuf_queue *vq, struct mx1_buffer *buf)
  125. {
  126. struct soc_camera_device *icd = vq->priv_data;
  127. struct videobuf_buffer *vb = &buf->vb;
  128. BUG_ON(in_interrupt());
  129. dev_dbg(icd->dev.parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  130. vb, vb->baddr, vb->bsize);
  131. /*
  132. * This waits until this buffer is out of danger, i.e., until it is no
  133. * longer in STATE_QUEUED or STATE_ACTIVE
  134. */
  135. videobuf_waiton(vb, 0, 0);
  136. videobuf_dma_contig_free(vq, vb);
  137. vb->state = VIDEOBUF_NEEDS_INIT;
  138. }
  139. static int mx1_videobuf_prepare(struct videobuf_queue *vq,
  140. struct videobuf_buffer *vb, enum v4l2_field field)
  141. {
  142. struct soc_camera_device *icd = vq->priv_data;
  143. struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
  144. int ret;
  145. dev_dbg(icd->dev.parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  146. vb, vb->baddr, vb->bsize);
  147. /* Added list head initialization on alloc */
  148. WARN_ON(!list_empty(&vb->queue));
  149. BUG_ON(NULL == icd->current_fmt);
  150. /*
  151. * I think, in buf_prepare you only have to protect global data,
  152. * the actual buffer is yours
  153. */
  154. buf->inwork = 1;
  155. if (buf->fmt != icd->current_fmt ||
  156. vb->width != icd->user_width ||
  157. vb->height != icd->user_height ||
  158. vb->field != field) {
  159. buf->fmt = icd->current_fmt;
  160. vb->width = icd->user_width;
  161. vb->height = icd->user_height;
  162. vb->field = field;
  163. vb->state = VIDEOBUF_NEEDS_INIT;
  164. }
  165. vb->size = vb->width * vb->height * ((buf->fmt->depth + 7) >> 3);
  166. if (0 != vb->baddr && vb->bsize < vb->size) {
  167. ret = -EINVAL;
  168. goto out;
  169. }
  170. if (vb->state == VIDEOBUF_NEEDS_INIT) {
  171. ret = videobuf_iolock(vq, vb, NULL);
  172. if (ret)
  173. goto fail;
  174. vb->state = VIDEOBUF_PREPARED;
  175. }
  176. buf->inwork = 0;
  177. return 0;
  178. fail:
  179. free_buffer(vq, buf);
  180. out:
  181. buf->inwork = 0;
  182. return ret;
  183. }
  184. static int mx1_camera_setup_dma(struct mx1_camera_dev *pcdev)
  185. {
  186. struct videobuf_buffer *vbuf = &pcdev->active->vb;
  187. struct device *dev = pcdev->icd->dev.parent;
  188. int ret;
  189. if (unlikely(!pcdev->active)) {
  190. dev_err(dev, "DMA End IRQ with no active buffer\n");
  191. return -EFAULT;
  192. }
  193. /* setup sg list for future DMA */
  194. ret = imx_dma_setup_single(pcdev->dma_chan,
  195. videobuf_to_dma_contig(vbuf),
  196. vbuf->size, pcdev->res->start +
  197. CSIRXR, DMA_MODE_READ);
  198. if (unlikely(ret))
  199. dev_err(dev, "Failed to setup DMA sg list\n");
  200. return ret;
  201. }
  202. /* Called under spinlock_irqsave(&pcdev->lock, ...) */
  203. static void mx1_videobuf_queue(struct videobuf_queue *vq,
  204. struct videobuf_buffer *vb)
  205. {
  206. struct soc_camera_device *icd = vq->priv_data;
  207. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  208. struct mx1_camera_dev *pcdev = ici->priv;
  209. struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
  210. dev_dbg(icd->dev.parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  211. vb, vb->baddr, vb->bsize);
  212. list_add_tail(&vb->queue, &pcdev->capture);
  213. vb->state = VIDEOBUF_ACTIVE;
  214. if (!pcdev->active) {
  215. pcdev->active = buf;
  216. /* setup sg list for future DMA */
  217. if (!mx1_camera_setup_dma(pcdev)) {
  218. unsigned int temp;
  219. /* enable SOF irq */
  220. temp = __raw_readl(pcdev->base + CSICR1) |
  221. CSICR1_SOF_INTEN;
  222. __raw_writel(temp, pcdev->base + CSICR1);
  223. }
  224. }
  225. }
  226. static void mx1_videobuf_release(struct videobuf_queue *vq,
  227. struct videobuf_buffer *vb)
  228. {
  229. struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
  230. #ifdef DEBUG
  231. struct soc_camera_device *icd = vq->priv_data;
  232. struct device *dev = icd->dev.parent;
  233. dev_dbg(dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  234. vb, vb->baddr, vb->bsize);
  235. switch (vb->state) {
  236. case VIDEOBUF_ACTIVE:
  237. dev_dbg(dev, "%s (active)\n", __func__);
  238. break;
  239. case VIDEOBUF_QUEUED:
  240. dev_dbg(dev, "%s (queued)\n", __func__);
  241. break;
  242. case VIDEOBUF_PREPARED:
  243. dev_dbg(dev, "%s (prepared)\n", __func__);
  244. break;
  245. default:
  246. dev_dbg(dev, "%s (unknown)\n", __func__);
  247. break;
  248. }
  249. #endif
  250. free_buffer(vq, buf);
  251. }
  252. static void mx1_camera_wakeup(struct mx1_camera_dev *pcdev,
  253. struct videobuf_buffer *vb,
  254. struct mx1_buffer *buf)
  255. {
  256. /* _init is used to debug races, see comment in mx1_camera_reqbufs() */
  257. list_del_init(&vb->queue);
  258. vb->state = VIDEOBUF_DONE;
  259. do_gettimeofday(&vb->ts);
  260. vb->field_count++;
  261. wake_up(&vb->done);
  262. if (list_empty(&pcdev->capture)) {
  263. pcdev->active = NULL;
  264. return;
  265. }
  266. pcdev->active = list_entry(pcdev->capture.next,
  267. struct mx1_buffer, vb.queue);
  268. /* setup sg list for future DMA */
  269. if (likely(!mx1_camera_setup_dma(pcdev))) {
  270. unsigned int temp;
  271. /* enable SOF irq */
  272. temp = __raw_readl(pcdev->base + CSICR1) | CSICR1_SOF_INTEN;
  273. __raw_writel(temp, pcdev->base + CSICR1);
  274. }
  275. }
  276. static void mx1_camera_dma_irq(int channel, void *data)
  277. {
  278. struct mx1_camera_dev *pcdev = data;
  279. struct device *dev = pcdev->icd->dev.parent;
  280. struct mx1_buffer *buf;
  281. struct videobuf_buffer *vb;
  282. unsigned long flags;
  283. spin_lock_irqsave(&pcdev->lock, flags);
  284. imx_dma_disable(channel);
  285. if (unlikely(!pcdev->active)) {
  286. dev_err(dev, "DMA End IRQ with no active buffer\n");
  287. goto out;
  288. }
  289. vb = &pcdev->active->vb;
  290. buf = container_of(vb, struct mx1_buffer, vb);
  291. WARN_ON(buf->inwork || list_empty(&vb->queue));
  292. dev_dbg(dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  293. vb, vb->baddr, vb->bsize);
  294. mx1_camera_wakeup(pcdev, vb, buf);
  295. out:
  296. spin_unlock_irqrestore(&pcdev->lock, flags);
  297. }
  298. static struct videobuf_queue_ops mx1_videobuf_ops = {
  299. .buf_setup = mx1_videobuf_setup,
  300. .buf_prepare = mx1_videobuf_prepare,
  301. .buf_queue = mx1_videobuf_queue,
  302. .buf_release = mx1_videobuf_release,
  303. };
  304. static void mx1_camera_init_videobuf(struct videobuf_queue *q,
  305. struct soc_camera_device *icd)
  306. {
  307. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  308. struct mx1_camera_dev *pcdev = ici->priv;
  309. videobuf_queue_dma_contig_init(q, &mx1_videobuf_ops, icd->dev.parent,
  310. &pcdev->lock,
  311. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  312. V4L2_FIELD_NONE,
  313. sizeof(struct mx1_buffer), icd);
  314. }
  315. static int mclk_get_divisor(struct mx1_camera_dev *pcdev)
  316. {
  317. unsigned int mclk = pcdev->mclk;
  318. unsigned long div;
  319. unsigned long lcdclk;
  320. lcdclk = clk_get_rate(pcdev->clk);
  321. /*
  322. * We verify platform_mclk_10khz != 0, so if anyone breaks it, here
  323. * they get a nice Oops
  324. */
  325. div = (lcdclk + 2 * mclk - 1) / (2 * mclk) - 1;
  326. dev_dbg(pcdev->icd->dev.parent,
  327. "System clock %lukHz, target freq %dkHz, divisor %lu\n",
  328. lcdclk / 1000, mclk / 1000, div);
  329. return div;
  330. }
  331. static void mx1_camera_activate(struct mx1_camera_dev *pcdev)
  332. {
  333. unsigned int csicr1 = CSICR1_EN;
  334. dev_dbg(pcdev->icd->dev.parent, "Activate device\n");
  335. clk_enable(pcdev->clk);
  336. /* enable CSI before doing anything else */
  337. __raw_writel(csicr1, pcdev->base + CSICR1);
  338. csicr1 |= CSICR1_MCLKEN | CSICR1_FCC | CSICR1_GCLK_MODE;
  339. csicr1 |= CSICR1_MCLKDIV(mclk_get_divisor(pcdev));
  340. csicr1 |= CSICR1_RXFF_LEVEL(2); /* 16 words */
  341. __raw_writel(csicr1, pcdev->base + CSICR1);
  342. }
  343. static void mx1_camera_deactivate(struct mx1_camera_dev *pcdev)
  344. {
  345. dev_dbg(pcdev->icd->dev.parent, "Deactivate device\n");
  346. /* Disable all CSI interface */
  347. __raw_writel(0x00, pcdev->base + CSICR1);
  348. clk_disable(pcdev->clk);
  349. }
  350. /*
  351. * The following two functions absolutely depend on the fact, that
  352. * there can be only one camera on i.MX1/i.MXL camera sensor interface
  353. */
  354. static int mx1_camera_add_device(struct soc_camera_device *icd)
  355. {
  356. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  357. struct mx1_camera_dev *pcdev = ici->priv;
  358. int ret;
  359. if (pcdev->icd) {
  360. ret = -EBUSY;
  361. goto ebusy;
  362. }
  363. dev_info(icd->dev.parent, "MX1 Camera driver attached to camera %d\n",
  364. icd->devnum);
  365. mx1_camera_activate(pcdev);
  366. pcdev->icd = icd;
  367. ebusy:
  368. return ret;
  369. }
  370. static void mx1_camera_remove_device(struct soc_camera_device *icd)
  371. {
  372. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  373. struct mx1_camera_dev *pcdev = ici->priv;
  374. unsigned int csicr1;
  375. BUG_ON(icd != pcdev->icd);
  376. /* disable interrupts */
  377. csicr1 = __raw_readl(pcdev->base + CSICR1) & ~CSI_IRQ_MASK;
  378. __raw_writel(csicr1, pcdev->base + CSICR1);
  379. /* Stop DMA engine */
  380. imx_dma_disable(pcdev->dma_chan);
  381. dev_info(icd->dev.parent, "MX1 Camera driver detached from camera %d\n",
  382. icd->devnum);
  383. mx1_camera_deactivate(pcdev);
  384. pcdev->icd = NULL;
  385. }
  386. static int mx1_camera_set_crop(struct soc_camera_device *icd,
  387. struct v4l2_crop *a)
  388. {
  389. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  390. return v4l2_subdev_call(sd, video, s_crop, a);
  391. }
  392. static int mx1_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt)
  393. {
  394. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  395. struct mx1_camera_dev *pcdev = ici->priv;
  396. unsigned long camera_flags, common_flags;
  397. unsigned int csicr1;
  398. int ret;
  399. camera_flags = icd->ops->query_bus_param(icd);
  400. /* MX1 supports only 8bit buswidth */
  401. common_flags = soc_camera_bus_param_compatible(camera_flags,
  402. CSI_BUS_FLAGS);
  403. if (!common_flags)
  404. return -EINVAL;
  405. icd->buswidth = 8;
  406. /* Make choises, based on platform choice */
  407. if ((common_flags & SOCAM_VSYNC_ACTIVE_HIGH) &&
  408. (common_flags & SOCAM_VSYNC_ACTIVE_LOW)) {
  409. if (!pcdev->pdata ||
  410. pcdev->pdata->flags & MX1_CAMERA_VSYNC_HIGH)
  411. common_flags &= ~SOCAM_VSYNC_ACTIVE_LOW;
  412. else
  413. common_flags &= ~SOCAM_VSYNC_ACTIVE_HIGH;
  414. }
  415. if ((common_flags & SOCAM_PCLK_SAMPLE_RISING) &&
  416. (common_flags & SOCAM_PCLK_SAMPLE_FALLING)) {
  417. if (!pcdev->pdata ||
  418. pcdev->pdata->flags & MX1_CAMERA_PCLK_RISING)
  419. common_flags &= ~SOCAM_PCLK_SAMPLE_FALLING;
  420. else
  421. common_flags &= ~SOCAM_PCLK_SAMPLE_RISING;
  422. }
  423. if ((common_flags & SOCAM_DATA_ACTIVE_HIGH) &&
  424. (common_flags & SOCAM_DATA_ACTIVE_LOW)) {
  425. if (!pcdev->pdata ||
  426. pcdev->pdata->flags & MX1_CAMERA_DATA_HIGH)
  427. common_flags &= ~SOCAM_DATA_ACTIVE_LOW;
  428. else
  429. common_flags &= ~SOCAM_DATA_ACTIVE_HIGH;
  430. }
  431. ret = icd->ops->set_bus_param(icd, common_flags);
  432. if (ret < 0)
  433. return ret;
  434. csicr1 = __raw_readl(pcdev->base + CSICR1);
  435. if (common_flags & SOCAM_PCLK_SAMPLE_RISING)
  436. csicr1 |= CSICR1_REDGE;
  437. if (common_flags & SOCAM_VSYNC_ACTIVE_HIGH)
  438. csicr1 |= CSICR1_SOF_POL;
  439. if (common_flags & SOCAM_DATA_ACTIVE_LOW)
  440. csicr1 |= CSICR1_DATA_POL;
  441. __raw_writel(csicr1, pcdev->base + CSICR1);
  442. return 0;
  443. }
  444. static int mx1_camera_set_fmt(struct soc_camera_device *icd,
  445. struct v4l2_format *f)
  446. {
  447. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  448. const struct soc_camera_format_xlate *xlate;
  449. struct v4l2_pix_format *pix = &f->fmt.pix;
  450. int ret;
  451. xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
  452. if (!xlate) {
  453. dev_warn(icd->dev.parent, "Format %x not found\n",
  454. pix->pixelformat);
  455. return -EINVAL;
  456. }
  457. ret = v4l2_subdev_call(sd, video, s_fmt, f);
  458. if (!ret) {
  459. icd->buswidth = xlate->buswidth;
  460. icd->current_fmt = xlate->host_fmt;
  461. }
  462. return ret;
  463. }
  464. static int mx1_camera_try_fmt(struct soc_camera_device *icd,
  465. struct v4l2_format *f)
  466. {
  467. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  468. /* TODO: limit to mx1 hardware capabilities */
  469. /* limit to sensor capabilities */
  470. return v4l2_subdev_call(sd, video, try_fmt, f);
  471. }
  472. static int mx1_camera_reqbufs(struct soc_camera_file *icf,
  473. struct v4l2_requestbuffers *p)
  474. {
  475. int i;
  476. /*
  477. * This is for locking debugging only. I removed spinlocks and now I
  478. * check whether .prepare is ever called on a linked buffer, or whether
  479. * a dma IRQ can occur for an in-work or unlinked buffer. Until now
  480. * it hadn't triggered
  481. */
  482. for (i = 0; i < p->count; i++) {
  483. struct mx1_buffer *buf = container_of(icf->vb_vidq.bufs[i],
  484. struct mx1_buffer, vb);
  485. buf->inwork = 0;
  486. INIT_LIST_HEAD(&buf->vb.queue);
  487. }
  488. return 0;
  489. }
  490. static unsigned int mx1_camera_poll(struct file *file, poll_table *pt)
  491. {
  492. struct soc_camera_file *icf = file->private_data;
  493. struct mx1_buffer *buf;
  494. buf = list_entry(icf->vb_vidq.stream.next, struct mx1_buffer,
  495. vb.stream);
  496. poll_wait(file, &buf->vb.done, pt);
  497. if (buf->vb.state == VIDEOBUF_DONE ||
  498. buf->vb.state == VIDEOBUF_ERROR)
  499. return POLLIN | POLLRDNORM;
  500. return 0;
  501. }
  502. static int mx1_camera_querycap(struct soc_camera_host *ici,
  503. struct v4l2_capability *cap)
  504. {
  505. /* cap->name is set by the friendly caller:-> */
  506. strlcpy(cap->card, "i.MX1/i.MXL Camera", sizeof(cap->card));
  507. cap->version = VERSION_CODE;
  508. cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
  509. return 0;
  510. }
  511. static struct soc_camera_host_ops mx1_soc_camera_host_ops = {
  512. .owner = THIS_MODULE,
  513. .add = mx1_camera_add_device,
  514. .remove = mx1_camera_remove_device,
  515. .set_bus_param = mx1_camera_set_bus_param,
  516. .set_crop = mx1_camera_set_crop,
  517. .set_fmt = mx1_camera_set_fmt,
  518. .try_fmt = mx1_camera_try_fmt,
  519. .init_videobuf = mx1_camera_init_videobuf,
  520. .reqbufs = mx1_camera_reqbufs,
  521. .poll = mx1_camera_poll,
  522. .querycap = mx1_camera_querycap,
  523. };
  524. static struct fiq_handler fh = {
  525. .name = "csi_sof"
  526. };
  527. static int __init mx1_camera_probe(struct platform_device *pdev)
  528. {
  529. struct mx1_camera_dev *pcdev;
  530. struct resource *res;
  531. struct pt_regs regs;
  532. struct clk *clk;
  533. void __iomem *base;
  534. unsigned int irq;
  535. int err = 0;
  536. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  537. irq = platform_get_irq(pdev, 0);
  538. if (!res || !irq) {
  539. err = -ENODEV;
  540. goto exit;
  541. }
  542. clk = clk_get(&pdev->dev, "csi_clk");
  543. if (IS_ERR(clk)) {
  544. err = PTR_ERR(clk);
  545. goto exit;
  546. }
  547. pcdev = kzalloc(sizeof(*pcdev), GFP_KERNEL);
  548. if (!pcdev) {
  549. dev_err(&pdev->dev, "Could not allocate pcdev\n");
  550. err = -ENOMEM;
  551. goto exit_put_clk;
  552. }
  553. pcdev->res = res;
  554. pcdev->clk = clk;
  555. pcdev->pdata = pdev->dev.platform_data;
  556. if (pcdev->pdata)
  557. pcdev->mclk = pcdev->pdata->mclk_10khz * 10000;
  558. if (!pcdev->mclk) {
  559. dev_warn(&pdev->dev,
  560. "mclk_10khz == 0! Please, fix your platform data. "
  561. "Using default 20MHz\n");
  562. pcdev->mclk = 20000000;
  563. }
  564. INIT_LIST_HEAD(&pcdev->capture);
  565. spin_lock_init(&pcdev->lock);
  566. /*
  567. * Request the regions.
  568. */
  569. if (!request_mem_region(res->start, resource_size(res), DRIVER_NAME)) {
  570. err = -EBUSY;
  571. goto exit_kfree;
  572. }
  573. base = ioremap(res->start, resource_size(res));
  574. if (!base) {
  575. err = -ENOMEM;
  576. goto exit_release;
  577. }
  578. pcdev->irq = irq;
  579. pcdev->base = base;
  580. /* request dma */
  581. pcdev->dma_chan = imx_dma_request_by_prio(DRIVER_NAME, DMA_PRIO_HIGH);
  582. if (pcdev->dma_chan < 0) {
  583. dev_err(&pdev->dev, "Can't request DMA for MX1 CSI\n");
  584. err = -EBUSY;
  585. goto exit_iounmap;
  586. }
  587. dev_dbg(&pdev->dev, "got DMA channel %d\n", pcdev->dma_chan);
  588. imx_dma_setup_handlers(pcdev->dma_chan, mx1_camera_dma_irq, NULL,
  589. pcdev);
  590. imx_dma_config_channel(pcdev->dma_chan, IMX_DMA_TYPE_FIFO,
  591. IMX_DMA_MEMSIZE_32, DMA_REQ_CSI_R, 0);
  592. /* burst length : 16 words = 64 bytes */
  593. imx_dma_config_burstlen(pcdev->dma_chan, 0);
  594. /* request irq */
  595. err = claim_fiq(&fh);
  596. if (err) {
  597. dev_err(&pdev->dev, "Camera interrupt register failed \n");
  598. goto exit_free_dma;
  599. }
  600. set_fiq_handler(&mx1_camera_sof_fiq_start, &mx1_camera_sof_fiq_end -
  601. &mx1_camera_sof_fiq_start);
  602. regs.ARM_r8 = DMA_BASE + DMA_DIMR;
  603. regs.ARM_r9 = DMA_BASE + DMA_CCR(pcdev->dma_chan);
  604. regs.ARM_r10 = (long)pcdev->base + CSICR1;
  605. regs.ARM_fp = (long)pcdev->base + CSISR;
  606. regs.ARM_sp = 1 << pcdev->dma_chan;
  607. set_fiq_regs(&regs);
  608. mxc_set_irq_fiq(irq, 1);
  609. enable_fiq(irq);
  610. pcdev->soc_host.drv_name = DRIVER_NAME;
  611. pcdev->soc_host.ops = &mx1_soc_camera_host_ops;
  612. pcdev->soc_host.priv = pcdev;
  613. pcdev->soc_host.v4l2_dev.dev = &pdev->dev;
  614. pcdev->soc_host.nr = pdev->id;
  615. err = soc_camera_host_register(&pcdev->soc_host);
  616. if (err)
  617. goto exit_free_irq;
  618. dev_info(&pdev->dev, "MX1 Camera driver loaded\n");
  619. return 0;
  620. exit_free_irq:
  621. disable_fiq(irq);
  622. mxc_set_irq_fiq(irq, 0);
  623. release_fiq(&fh);
  624. exit_free_dma:
  625. imx_dma_free(pcdev->dma_chan);
  626. exit_iounmap:
  627. iounmap(base);
  628. exit_release:
  629. release_mem_region(res->start, resource_size(res));
  630. exit_kfree:
  631. kfree(pcdev);
  632. exit_put_clk:
  633. clk_put(clk);
  634. exit:
  635. return err;
  636. }
  637. static int __exit mx1_camera_remove(struct platform_device *pdev)
  638. {
  639. struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev);
  640. struct mx1_camera_dev *pcdev = container_of(soc_host,
  641. struct mx1_camera_dev, soc_host);
  642. struct resource *res;
  643. imx_dma_free(pcdev->dma_chan);
  644. disable_fiq(pcdev->irq);
  645. mxc_set_irq_fiq(pcdev->irq, 0);
  646. release_fiq(&fh);
  647. clk_put(pcdev->clk);
  648. soc_camera_host_unregister(soc_host);
  649. iounmap(pcdev->base);
  650. res = pcdev->res;
  651. release_mem_region(res->start, resource_size(res));
  652. kfree(pcdev);
  653. dev_info(&pdev->dev, "MX1 Camera driver unloaded\n");
  654. return 0;
  655. }
  656. static struct platform_driver mx1_camera_driver = {
  657. .driver = {
  658. .name = DRIVER_NAME,
  659. },
  660. .remove = __exit_p(mx1_camera_remove),
  661. };
  662. static int __init mx1_camera_init(void)
  663. {
  664. return platform_driver_probe(&mx1_camera_driver, mx1_camera_probe);
  665. }
  666. static void __exit mx1_camera_exit(void)
  667. {
  668. return platform_driver_unregister(&mx1_camera_driver);
  669. }
  670. module_init(mx1_camera_init);
  671. module_exit(mx1_camera_exit);
  672. MODULE_DESCRIPTION("i.MX1/i.MXL SoC Camera Host driver");
  673. MODULE_AUTHOR("Paulius Zaleckas <paulius.zaleckas@teltonika.lt>");
  674. MODULE_LICENSE("GPL v2");
  675. MODULE_ALIAS("platform:" DRIVER_NAME);