omapdss.h 31 KB

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  1. /*
  2. * Copyright (C) 2008 Nokia Corporation
  3. * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published by
  7. * the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. #ifndef __OMAP_OMAPDSS_H
  18. #define __OMAP_OMAPDSS_H
  19. #include <linux/list.h>
  20. #include <linux/kobject.h>
  21. #include <linux/device.h>
  22. #include <linux/interrupt.h>
  23. #include <video/videomode.h>
  24. #define DISPC_IRQ_FRAMEDONE (1 << 0)
  25. #define DISPC_IRQ_VSYNC (1 << 1)
  26. #define DISPC_IRQ_EVSYNC_EVEN (1 << 2)
  27. #define DISPC_IRQ_EVSYNC_ODD (1 << 3)
  28. #define DISPC_IRQ_ACBIAS_COUNT_STAT (1 << 4)
  29. #define DISPC_IRQ_PROG_LINE_NUM (1 << 5)
  30. #define DISPC_IRQ_GFX_FIFO_UNDERFLOW (1 << 6)
  31. #define DISPC_IRQ_GFX_END_WIN (1 << 7)
  32. #define DISPC_IRQ_PAL_GAMMA_MASK (1 << 8)
  33. #define DISPC_IRQ_OCP_ERR (1 << 9)
  34. #define DISPC_IRQ_VID1_FIFO_UNDERFLOW (1 << 10)
  35. #define DISPC_IRQ_VID1_END_WIN (1 << 11)
  36. #define DISPC_IRQ_VID2_FIFO_UNDERFLOW (1 << 12)
  37. #define DISPC_IRQ_VID2_END_WIN (1 << 13)
  38. #define DISPC_IRQ_SYNC_LOST (1 << 14)
  39. #define DISPC_IRQ_SYNC_LOST_DIGIT (1 << 15)
  40. #define DISPC_IRQ_WAKEUP (1 << 16)
  41. #define DISPC_IRQ_SYNC_LOST2 (1 << 17)
  42. #define DISPC_IRQ_VSYNC2 (1 << 18)
  43. #define DISPC_IRQ_VID3_END_WIN (1 << 19)
  44. #define DISPC_IRQ_VID3_FIFO_UNDERFLOW (1 << 20)
  45. #define DISPC_IRQ_ACBIAS_COUNT_STAT2 (1 << 21)
  46. #define DISPC_IRQ_FRAMEDONE2 (1 << 22)
  47. #define DISPC_IRQ_FRAMEDONEWB (1 << 23)
  48. #define DISPC_IRQ_FRAMEDONETV (1 << 24)
  49. #define DISPC_IRQ_WBBUFFEROVERFLOW (1 << 25)
  50. #define DISPC_IRQ_SYNC_LOST3 (1 << 27)
  51. #define DISPC_IRQ_VSYNC3 (1 << 28)
  52. #define DISPC_IRQ_ACBIAS_COUNT_STAT3 (1 << 29)
  53. #define DISPC_IRQ_FRAMEDONE3 (1 << 30)
  54. struct omap_dss_device;
  55. struct omap_overlay_manager;
  56. struct dss_lcd_mgr_config;
  57. struct snd_aes_iec958;
  58. struct snd_cea_861_aud_if;
  59. enum omap_display_type {
  60. OMAP_DISPLAY_TYPE_NONE = 0,
  61. OMAP_DISPLAY_TYPE_DPI = 1 << 0,
  62. OMAP_DISPLAY_TYPE_DBI = 1 << 1,
  63. OMAP_DISPLAY_TYPE_SDI = 1 << 2,
  64. OMAP_DISPLAY_TYPE_DSI = 1 << 3,
  65. OMAP_DISPLAY_TYPE_VENC = 1 << 4,
  66. OMAP_DISPLAY_TYPE_HDMI = 1 << 5,
  67. OMAP_DISPLAY_TYPE_DVI = 1 << 6,
  68. };
  69. enum omap_plane {
  70. OMAP_DSS_GFX = 0,
  71. OMAP_DSS_VIDEO1 = 1,
  72. OMAP_DSS_VIDEO2 = 2,
  73. OMAP_DSS_VIDEO3 = 3,
  74. OMAP_DSS_WB = 4,
  75. };
  76. enum omap_channel {
  77. OMAP_DSS_CHANNEL_LCD = 0,
  78. OMAP_DSS_CHANNEL_DIGIT = 1,
  79. OMAP_DSS_CHANNEL_LCD2 = 2,
  80. OMAP_DSS_CHANNEL_LCD3 = 3,
  81. };
  82. enum omap_color_mode {
  83. OMAP_DSS_COLOR_CLUT1 = 1 << 0, /* BITMAP 1 */
  84. OMAP_DSS_COLOR_CLUT2 = 1 << 1, /* BITMAP 2 */
  85. OMAP_DSS_COLOR_CLUT4 = 1 << 2, /* BITMAP 4 */
  86. OMAP_DSS_COLOR_CLUT8 = 1 << 3, /* BITMAP 8 */
  87. OMAP_DSS_COLOR_RGB12U = 1 << 4, /* RGB12, 16-bit container */
  88. OMAP_DSS_COLOR_ARGB16 = 1 << 5, /* ARGB16 */
  89. OMAP_DSS_COLOR_RGB16 = 1 << 6, /* RGB16 */
  90. OMAP_DSS_COLOR_RGB24U = 1 << 7, /* RGB24, 32-bit container */
  91. OMAP_DSS_COLOR_RGB24P = 1 << 8, /* RGB24, 24-bit container */
  92. OMAP_DSS_COLOR_YUV2 = 1 << 9, /* YUV2 4:2:2 co-sited */
  93. OMAP_DSS_COLOR_UYVY = 1 << 10, /* UYVY 4:2:2 co-sited */
  94. OMAP_DSS_COLOR_ARGB32 = 1 << 11, /* ARGB32 */
  95. OMAP_DSS_COLOR_RGBA32 = 1 << 12, /* RGBA32 */
  96. OMAP_DSS_COLOR_RGBX32 = 1 << 13, /* RGBx32 */
  97. OMAP_DSS_COLOR_NV12 = 1 << 14, /* NV12 format: YUV 4:2:0 */
  98. OMAP_DSS_COLOR_RGBA16 = 1 << 15, /* RGBA16 - 4444 */
  99. OMAP_DSS_COLOR_RGBX16 = 1 << 16, /* RGBx16 - 4444 */
  100. OMAP_DSS_COLOR_ARGB16_1555 = 1 << 17, /* ARGB16 - 1555 */
  101. OMAP_DSS_COLOR_XRGB16_1555 = 1 << 18, /* xRGB16 - 1555 */
  102. };
  103. enum omap_dss_load_mode {
  104. OMAP_DSS_LOAD_CLUT_AND_FRAME = 0,
  105. OMAP_DSS_LOAD_CLUT_ONLY = 1,
  106. OMAP_DSS_LOAD_FRAME_ONLY = 2,
  107. OMAP_DSS_LOAD_CLUT_ONCE_FRAME = 3,
  108. };
  109. enum omap_dss_trans_key_type {
  110. OMAP_DSS_COLOR_KEY_GFX_DST = 0,
  111. OMAP_DSS_COLOR_KEY_VID_SRC = 1,
  112. };
  113. enum omap_rfbi_te_mode {
  114. OMAP_DSS_RFBI_TE_MODE_1 = 1,
  115. OMAP_DSS_RFBI_TE_MODE_2 = 2,
  116. };
  117. enum omap_dss_signal_level {
  118. OMAPDSS_SIG_ACTIVE_HIGH = 0,
  119. OMAPDSS_SIG_ACTIVE_LOW = 1,
  120. };
  121. enum omap_dss_signal_edge {
  122. OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES,
  123. OMAPDSS_DRIVE_SIG_RISING_EDGE,
  124. OMAPDSS_DRIVE_SIG_FALLING_EDGE,
  125. };
  126. enum omap_dss_venc_type {
  127. OMAP_DSS_VENC_TYPE_COMPOSITE,
  128. OMAP_DSS_VENC_TYPE_SVIDEO,
  129. };
  130. enum omap_dss_dsi_pixel_format {
  131. OMAP_DSS_DSI_FMT_RGB888,
  132. OMAP_DSS_DSI_FMT_RGB666,
  133. OMAP_DSS_DSI_FMT_RGB666_PACKED,
  134. OMAP_DSS_DSI_FMT_RGB565,
  135. };
  136. enum omap_dss_dsi_mode {
  137. OMAP_DSS_DSI_CMD_MODE = 0,
  138. OMAP_DSS_DSI_VIDEO_MODE,
  139. };
  140. enum omap_display_caps {
  141. OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE = 1 << 0,
  142. OMAP_DSS_DISPLAY_CAP_TEAR_ELIM = 1 << 1,
  143. };
  144. enum omap_dss_display_state {
  145. OMAP_DSS_DISPLAY_DISABLED = 0,
  146. OMAP_DSS_DISPLAY_ACTIVE,
  147. };
  148. enum omap_dss_audio_state {
  149. OMAP_DSS_AUDIO_DISABLED = 0,
  150. OMAP_DSS_AUDIO_ENABLED,
  151. OMAP_DSS_AUDIO_CONFIGURED,
  152. OMAP_DSS_AUDIO_PLAYING,
  153. };
  154. struct omap_dss_audio {
  155. struct snd_aes_iec958 *iec;
  156. struct snd_cea_861_aud_if *cea;
  157. };
  158. enum omap_dss_rotation_type {
  159. OMAP_DSS_ROT_DMA = 1 << 0,
  160. OMAP_DSS_ROT_VRFB = 1 << 1,
  161. OMAP_DSS_ROT_TILER = 1 << 2,
  162. };
  163. /* clockwise rotation angle */
  164. enum omap_dss_rotation_angle {
  165. OMAP_DSS_ROT_0 = 0,
  166. OMAP_DSS_ROT_90 = 1,
  167. OMAP_DSS_ROT_180 = 2,
  168. OMAP_DSS_ROT_270 = 3,
  169. };
  170. enum omap_overlay_caps {
  171. OMAP_DSS_OVL_CAP_SCALE = 1 << 0,
  172. OMAP_DSS_OVL_CAP_GLOBAL_ALPHA = 1 << 1,
  173. OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA = 1 << 2,
  174. OMAP_DSS_OVL_CAP_ZORDER = 1 << 3,
  175. OMAP_DSS_OVL_CAP_POS = 1 << 4,
  176. OMAP_DSS_OVL_CAP_REPLICATION = 1 << 5,
  177. };
  178. enum omap_overlay_manager_caps {
  179. OMAP_DSS_DUMMY_VALUE, /* add a dummy value to prevent compiler error */
  180. };
  181. enum omap_dss_clk_source {
  182. OMAP_DSS_CLK_SRC_FCK = 0, /* OMAP2/3: DSS1_ALWON_FCLK
  183. * OMAP4: DSS_FCLK */
  184. OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC, /* OMAP3: DSI1_PLL_FCLK
  185. * OMAP4: PLL1_CLK1 */
  186. OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI, /* OMAP3: DSI2_PLL_FCLK
  187. * OMAP4: PLL1_CLK2 */
  188. OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC, /* OMAP4: PLL2_CLK1 */
  189. OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI, /* OMAP4: PLL2_CLK2 */
  190. };
  191. enum omap_hdmi_flags {
  192. OMAP_HDMI_SDA_SCL_EXTERNAL_PULLUP = 1 << 0,
  193. };
  194. enum omap_dss_output_id {
  195. OMAP_DSS_OUTPUT_DPI = 1 << 0,
  196. OMAP_DSS_OUTPUT_DBI = 1 << 1,
  197. OMAP_DSS_OUTPUT_SDI = 1 << 2,
  198. OMAP_DSS_OUTPUT_DSI1 = 1 << 3,
  199. OMAP_DSS_OUTPUT_DSI2 = 1 << 4,
  200. OMAP_DSS_OUTPUT_VENC = 1 << 5,
  201. OMAP_DSS_OUTPUT_HDMI = 1 << 6,
  202. };
  203. /* RFBI */
  204. struct rfbi_timings {
  205. int cs_on_time;
  206. int cs_off_time;
  207. int we_on_time;
  208. int we_off_time;
  209. int re_on_time;
  210. int re_off_time;
  211. int we_cycle_time;
  212. int re_cycle_time;
  213. int cs_pulse_width;
  214. int access_time;
  215. int clk_div;
  216. u32 tim[5]; /* set by rfbi_convert_timings() */
  217. int converted;
  218. };
  219. void omap_rfbi_write_command(const void *buf, u32 len);
  220. void omap_rfbi_read_data(void *buf, u32 len);
  221. void omap_rfbi_write_data(const void *buf, u32 len);
  222. void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width,
  223. u16 x, u16 y,
  224. u16 w, u16 h);
  225. int omap_rfbi_enable_te(bool enable, unsigned line);
  226. int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode,
  227. unsigned hs_pulse_time, unsigned vs_pulse_time,
  228. int hs_pol_inv, int vs_pol_inv, int extif_div);
  229. void rfbi_bus_lock(void);
  230. void rfbi_bus_unlock(void);
  231. /* DSI */
  232. enum omap_dss_dsi_trans_mode {
  233. /* Sync Pulses: both sync start and end packets sent */
  234. OMAP_DSS_DSI_PULSE_MODE,
  235. /* Sync Events: only sync start packets sent */
  236. OMAP_DSS_DSI_EVENT_MODE,
  237. /* Burst: only sync start packets sent, pixels are time compressed */
  238. OMAP_DSS_DSI_BURST_MODE,
  239. };
  240. struct omap_dss_dsi_videomode_timings {
  241. unsigned long hsclk;
  242. unsigned ndl;
  243. unsigned bitspp;
  244. /* pixels */
  245. u16 hact;
  246. /* lines */
  247. u16 vact;
  248. /* DSI video mode blanking data */
  249. /* Unit: byte clock cycles */
  250. u16 hss;
  251. u16 hsa;
  252. u16 hse;
  253. u16 hfp;
  254. u16 hbp;
  255. /* Unit: line clocks */
  256. u16 vsa;
  257. u16 vfp;
  258. u16 vbp;
  259. /* DSI blanking modes */
  260. int blanking_mode;
  261. int hsa_blanking_mode;
  262. int hbp_blanking_mode;
  263. int hfp_blanking_mode;
  264. enum omap_dss_dsi_trans_mode trans_mode;
  265. bool ddr_clk_always_on;
  266. int window_sync;
  267. };
  268. struct omap_dss_dsi_config {
  269. enum omap_dss_dsi_mode mode;
  270. enum omap_dss_dsi_pixel_format pixel_format;
  271. const struct omap_video_timings *timings;
  272. unsigned long hs_clk_min, hs_clk_max;
  273. unsigned long lp_clk_min, lp_clk_max;
  274. bool ddr_clk_always_on;
  275. enum omap_dss_dsi_trans_mode trans_mode;
  276. };
  277. enum omapdss_version {
  278. OMAPDSS_VER_UNKNOWN = 0,
  279. OMAPDSS_VER_OMAP24xx,
  280. OMAPDSS_VER_OMAP34xx_ES1, /* OMAP3430 ES1.0, 2.0 */
  281. OMAPDSS_VER_OMAP34xx_ES3, /* OMAP3430 ES3.0+ */
  282. OMAPDSS_VER_OMAP3630,
  283. OMAPDSS_VER_AM35xx,
  284. OMAPDSS_VER_OMAP4430_ES1, /* OMAP4430 ES1.0 */
  285. OMAPDSS_VER_OMAP4430_ES2, /* OMAP4430 ES2.0, 2.1, 2.2 */
  286. OMAPDSS_VER_OMAP4, /* All other OMAP4s */
  287. OMAPDSS_VER_OMAP5,
  288. };
  289. /* Board specific data */
  290. struct omap_dss_board_info {
  291. int (*get_context_loss_count)(struct device *dev);
  292. int num_devices;
  293. struct omap_dss_device **devices;
  294. struct omap_dss_device *default_device;
  295. const char *default_display_name;
  296. int (*dsi_enable_pads)(int dsi_id, unsigned lane_mask);
  297. void (*dsi_disable_pads)(int dsi_id, unsigned lane_mask);
  298. int (*set_min_bus_tput)(struct device *dev, unsigned long r);
  299. enum omapdss_version version;
  300. };
  301. /* Init with the board info */
  302. extern int omap_display_init(struct omap_dss_board_info *board_data);
  303. /* HDMI mux init*/
  304. extern int omap_hdmi_init(enum omap_hdmi_flags flags);
  305. struct omap_video_timings {
  306. /* Unit: pixels */
  307. u16 x_res;
  308. /* Unit: pixels */
  309. u16 y_res;
  310. /* Unit: KHz */
  311. u32 pixel_clock;
  312. /* Unit: pixel clocks */
  313. u16 hsw; /* Horizontal synchronization pulse width */
  314. /* Unit: pixel clocks */
  315. u16 hfp; /* Horizontal front porch */
  316. /* Unit: pixel clocks */
  317. u16 hbp; /* Horizontal back porch */
  318. /* Unit: line clocks */
  319. u16 vsw; /* Vertical synchronization pulse width */
  320. /* Unit: line clocks */
  321. u16 vfp; /* Vertical front porch */
  322. /* Unit: line clocks */
  323. u16 vbp; /* Vertical back porch */
  324. /* Vsync logic level */
  325. enum omap_dss_signal_level vsync_level;
  326. /* Hsync logic level */
  327. enum omap_dss_signal_level hsync_level;
  328. /* Interlaced or Progressive timings */
  329. bool interlace;
  330. /* Pixel clock edge to drive LCD data */
  331. enum omap_dss_signal_edge data_pclk_edge;
  332. /* Data enable logic level */
  333. enum omap_dss_signal_level de_level;
  334. /* Pixel clock edges to drive HSYNC and VSYNC signals */
  335. enum omap_dss_signal_edge sync_pclk_edge;
  336. };
  337. #ifdef CONFIG_OMAP2_DSS_VENC
  338. /* Hardcoded timings for tv modes. Venc only uses these to
  339. * identify the mode, and does not actually use the configs
  340. * itself. However, the configs should be something that
  341. * a normal monitor can also show */
  342. extern const struct omap_video_timings omap_dss_pal_timings;
  343. extern const struct omap_video_timings omap_dss_ntsc_timings;
  344. #endif
  345. struct omap_dss_cpr_coefs {
  346. s16 rr, rg, rb;
  347. s16 gr, gg, gb;
  348. s16 br, bg, bb;
  349. };
  350. struct omap_overlay_info {
  351. u32 paddr;
  352. u32 p_uv_addr; /* for NV12 format */
  353. u16 screen_width;
  354. u16 width;
  355. u16 height;
  356. enum omap_color_mode color_mode;
  357. u8 rotation;
  358. enum omap_dss_rotation_type rotation_type;
  359. bool mirror;
  360. u16 pos_x;
  361. u16 pos_y;
  362. u16 out_width; /* if 0, out_width == width */
  363. u16 out_height; /* if 0, out_height == height */
  364. u8 global_alpha;
  365. u8 pre_mult_alpha;
  366. u8 zorder;
  367. };
  368. struct omap_overlay {
  369. struct kobject kobj;
  370. struct list_head list;
  371. /* static fields */
  372. const char *name;
  373. enum omap_plane id;
  374. enum omap_color_mode supported_modes;
  375. enum omap_overlay_caps caps;
  376. /* dynamic fields */
  377. struct omap_overlay_manager *manager;
  378. /*
  379. * The following functions do not block:
  380. *
  381. * is_enabled
  382. * set_overlay_info
  383. * get_overlay_info
  384. *
  385. * The rest of the functions may block and cannot be called from
  386. * interrupt context
  387. */
  388. int (*enable)(struct omap_overlay *ovl);
  389. int (*disable)(struct omap_overlay *ovl);
  390. bool (*is_enabled)(struct omap_overlay *ovl);
  391. int (*set_manager)(struct omap_overlay *ovl,
  392. struct omap_overlay_manager *mgr);
  393. int (*unset_manager)(struct omap_overlay *ovl);
  394. int (*set_overlay_info)(struct omap_overlay *ovl,
  395. struct omap_overlay_info *info);
  396. void (*get_overlay_info)(struct omap_overlay *ovl,
  397. struct omap_overlay_info *info);
  398. int (*wait_for_go)(struct omap_overlay *ovl);
  399. struct omap_dss_device *(*get_device)(struct omap_overlay *ovl);
  400. };
  401. struct omap_overlay_manager_info {
  402. u32 default_color;
  403. enum omap_dss_trans_key_type trans_key_type;
  404. u32 trans_key;
  405. bool trans_enabled;
  406. bool partial_alpha_enabled;
  407. bool cpr_enable;
  408. struct omap_dss_cpr_coefs cpr_coefs;
  409. };
  410. struct omap_overlay_manager {
  411. struct kobject kobj;
  412. /* static fields */
  413. const char *name;
  414. enum omap_channel id;
  415. enum omap_overlay_manager_caps caps;
  416. struct list_head overlays;
  417. enum omap_display_type supported_displays;
  418. enum omap_dss_output_id supported_outputs;
  419. /* dynamic fields */
  420. struct omap_dss_device *output;
  421. /*
  422. * The following functions do not block:
  423. *
  424. * set_manager_info
  425. * get_manager_info
  426. * apply
  427. *
  428. * The rest of the functions may block and cannot be called from
  429. * interrupt context
  430. */
  431. int (*set_output)(struct omap_overlay_manager *mgr,
  432. struct omap_dss_device *output);
  433. int (*unset_output)(struct omap_overlay_manager *mgr);
  434. int (*set_manager_info)(struct omap_overlay_manager *mgr,
  435. struct omap_overlay_manager_info *info);
  436. void (*get_manager_info)(struct omap_overlay_manager *mgr,
  437. struct omap_overlay_manager_info *info);
  438. int (*apply)(struct omap_overlay_manager *mgr);
  439. int (*wait_for_go)(struct omap_overlay_manager *mgr);
  440. int (*wait_for_vsync)(struct omap_overlay_manager *mgr);
  441. struct omap_dss_device *(*get_device)(struct omap_overlay_manager *mgr);
  442. };
  443. /* 22 pins means 1 clk lane and 10 data lanes */
  444. #define OMAP_DSS_MAX_DSI_PINS 22
  445. struct omap_dsi_pin_config {
  446. int num_pins;
  447. /*
  448. * pin numbers in the following order:
  449. * clk+, clk-
  450. * data1+, data1-
  451. * data2+, data2-
  452. * ...
  453. */
  454. int pins[OMAP_DSS_MAX_DSI_PINS];
  455. };
  456. struct omap_dss_writeback_info {
  457. u32 paddr;
  458. u32 p_uv_addr;
  459. u16 buf_width;
  460. u16 width;
  461. u16 height;
  462. enum omap_color_mode color_mode;
  463. u8 rotation;
  464. enum omap_dss_rotation_type rotation_type;
  465. bool mirror;
  466. u8 pre_mult_alpha;
  467. };
  468. struct omapdss_dpi_ops {
  469. int (*connect)(struct omap_dss_device *dssdev,
  470. struct omap_dss_device *dst);
  471. void (*disconnect)(struct omap_dss_device *dssdev,
  472. struct omap_dss_device *dst);
  473. int (*enable)(struct omap_dss_device *dssdev);
  474. void (*disable)(struct omap_dss_device *dssdev);
  475. int (*check_timings)(struct omap_dss_device *dssdev,
  476. struct omap_video_timings *timings);
  477. void (*set_timings)(struct omap_dss_device *dssdev,
  478. struct omap_video_timings *timings);
  479. void (*get_timings)(struct omap_dss_device *dssdev,
  480. struct omap_video_timings *timings);
  481. void (*set_data_lines)(struct omap_dss_device *dssdev, int data_lines);
  482. };
  483. struct omapdss_sdi_ops {
  484. int (*connect)(struct omap_dss_device *dssdev,
  485. struct omap_dss_device *dst);
  486. void (*disconnect)(struct omap_dss_device *dssdev,
  487. struct omap_dss_device *dst);
  488. int (*enable)(struct omap_dss_device *dssdev);
  489. void (*disable)(struct omap_dss_device *dssdev);
  490. int (*check_timings)(struct omap_dss_device *dssdev,
  491. struct omap_video_timings *timings);
  492. void (*set_timings)(struct omap_dss_device *dssdev,
  493. struct omap_video_timings *timings);
  494. void (*get_timings)(struct omap_dss_device *dssdev,
  495. struct omap_video_timings *timings);
  496. void (*set_datapairs)(struct omap_dss_device *dssdev, int datapairs);
  497. };
  498. struct omapdss_dvi_ops {
  499. int (*connect)(struct omap_dss_device *dssdev,
  500. struct omap_dss_device *dst);
  501. void (*disconnect)(struct omap_dss_device *dssdev,
  502. struct omap_dss_device *dst);
  503. int (*enable)(struct omap_dss_device *dssdev);
  504. void (*disable)(struct omap_dss_device *dssdev);
  505. int (*check_timings)(struct omap_dss_device *dssdev,
  506. struct omap_video_timings *timings);
  507. void (*set_timings)(struct omap_dss_device *dssdev,
  508. struct omap_video_timings *timings);
  509. void (*get_timings)(struct omap_dss_device *dssdev,
  510. struct omap_video_timings *timings);
  511. };
  512. struct omapdss_atv_ops {
  513. int (*connect)(struct omap_dss_device *dssdev,
  514. struct omap_dss_device *dst);
  515. void (*disconnect)(struct omap_dss_device *dssdev,
  516. struct omap_dss_device *dst);
  517. int (*enable)(struct omap_dss_device *dssdev);
  518. void (*disable)(struct omap_dss_device *dssdev);
  519. int (*check_timings)(struct omap_dss_device *dssdev,
  520. struct omap_video_timings *timings);
  521. void (*set_timings)(struct omap_dss_device *dssdev,
  522. struct omap_video_timings *timings);
  523. void (*get_timings)(struct omap_dss_device *dssdev,
  524. struct omap_video_timings *timings);
  525. void (*set_type)(struct omap_dss_device *dssdev,
  526. enum omap_dss_venc_type type);
  527. void (*invert_vid_out_polarity)(struct omap_dss_device *dssdev,
  528. bool invert_polarity);
  529. int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
  530. u32 (*get_wss)(struct omap_dss_device *dssdev);
  531. };
  532. struct omapdss_hdmi_ops {
  533. int (*connect)(struct omap_dss_device *dssdev,
  534. struct omap_dss_device *dst);
  535. void (*disconnect)(struct omap_dss_device *dssdev,
  536. struct omap_dss_device *dst);
  537. int (*enable)(struct omap_dss_device *dssdev);
  538. void (*disable)(struct omap_dss_device *dssdev);
  539. int (*check_timings)(struct omap_dss_device *dssdev,
  540. struct omap_video_timings *timings);
  541. void (*set_timings)(struct omap_dss_device *dssdev,
  542. struct omap_video_timings *timings);
  543. void (*get_timings)(struct omap_dss_device *dssdev,
  544. struct omap_video_timings *timings);
  545. int (*read_edid)(struct omap_dss_device *dssdev, u8 *buf, int len);
  546. bool (*detect)(struct omap_dss_device *dssdev);
  547. /*
  548. * Note: These functions might sleep. Do not call while
  549. * holding a spinlock/readlock.
  550. */
  551. int (*audio_enable)(struct omap_dss_device *dssdev);
  552. void (*audio_disable)(struct omap_dss_device *dssdev);
  553. bool (*audio_supported)(struct omap_dss_device *dssdev);
  554. int (*audio_config)(struct omap_dss_device *dssdev,
  555. struct omap_dss_audio *audio);
  556. /* Note: These functions may not sleep */
  557. int (*audio_start)(struct omap_dss_device *dssdev);
  558. void (*audio_stop)(struct omap_dss_device *dssdev);
  559. };
  560. struct omapdss_dsi_ops {
  561. int (*connect)(struct omap_dss_device *dssdev,
  562. struct omap_dss_device *dst);
  563. void (*disconnect)(struct omap_dss_device *dssdev,
  564. struct omap_dss_device *dst);
  565. int (*enable)(struct omap_dss_device *dssdev);
  566. void (*disable)(struct omap_dss_device *dssdev, bool disconnect_lanes,
  567. bool enter_ulps);
  568. /* bus configuration */
  569. int (*set_config)(struct omap_dss_device *dssdev,
  570. const struct omap_dss_dsi_config *cfg);
  571. int (*configure_pins)(struct omap_dss_device *dssdev,
  572. const struct omap_dsi_pin_config *pin_cfg);
  573. void (*enable_hs)(struct omap_dss_device *dssdev, int channel,
  574. bool enable);
  575. int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
  576. int (*update)(struct omap_dss_device *dssdev, int channel,
  577. void (*callback)(int, void *), void *data);
  578. void (*bus_lock)(struct omap_dss_device *dssdev);
  579. void (*bus_unlock)(struct omap_dss_device *dssdev);
  580. int (*enable_video_output)(struct omap_dss_device *dssdev, int channel);
  581. void (*disable_video_output)(struct omap_dss_device *dssdev,
  582. int channel);
  583. int (*request_vc)(struct omap_dss_device *dssdev, int *channel);
  584. int (*set_vc_id)(struct omap_dss_device *dssdev, int channel,
  585. int vc_id);
  586. void (*release_vc)(struct omap_dss_device *dssdev, int channel);
  587. /* data transfer */
  588. int (*dcs_write)(struct omap_dss_device *dssdev, int channel,
  589. u8 *data, int len);
  590. int (*dcs_write_nosync)(struct omap_dss_device *dssdev, int channel,
  591. u8 *data, int len);
  592. int (*dcs_read)(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
  593. u8 *data, int len);
  594. int (*gen_write)(struct omap_dss_device *dssdev, int channel,
  595. u8 *data, int len);
  596. int (*gen_write_nosync)(struct omap_dss_device *dssdev, int channel,
  597. u8 *data, int len);
  598. int (*gen_read)(struct omap_dss_device *dssdev, int channel,
  599. u8 *reqdata, int reqlen,
  600. u8 *data, int len);
  601. int (*bta_sync)(struct omap_dss_device *dssdev, int channel);
  602. int (*set_max_rx_packet_size)(struct omap_dss_device *dssdev,
  603. int channel, u16 plen);
  604. };
  605. struct omap_dss_device {
  606. /* old device, to be removed */
  607. struct device old_dev;
  608. /* new device, pointer to panel device */
  609. struct device *dev;
  610. struct module *owner;
  611. struct list_head panel_list;
  612. /* alias in the form of "display%d" */
  613. char alias[16];
  614. enum omap_display_type type;
  615. enum omap_display_type output_type;
  616. union {
  617. struct {
  618. u8 data_lines;
  619. } dpi;
  620. struct {
  621. u8 channel;
  622. u8 data_lines;
  623. } rfbi;
  624. struct {
  625. u8 datapairs;
  626. } sdi;
  627. struct {
  628. int module;
  629. } dsi;
  630. struct {
  631. enum omap_dss_venc_type type;
  632. bool invert_polarity;
  633. } venc;
  634. } phy;
  635. struct {
  636. struct omap_video_timings timings;
  637. enum omap_dss_dsi_pixel_format dsi_pix_fmt;
  638. enum omap_dss_dsi_mode dsi_mode;
  639. } panel;
  640. struct {
  641. u8 pixel_size;
  642. struct rfbi_timings rfbi_timings;
  643. } ctrl;
  644. const char *name;
  645. /* used to match device to driver */
  646. const char *driver_name;
  647. void *data;
  648. struct omap_dss_driver *driver;
  649. union {
  650. const struct omapdss_dpi_ops *dpi;
  651. const struct omapdss_sdi_ops *sdi;
  652. const struct omapdss_dvi_ops *dvi;
  653. const struct omapdss_hdmi_ops *hdmi;
  654. const struct omapdss_atv_ops *atv;
  655. const struct omapdss_dsi_ops *dsi;
  656. } ops;
  657. /* helper variable for driver suspend/resume */
  658. bool activate_after_resume;
  659. enum omap_display_caps caps;
  660. struct omap_dss_device *output;
  661. enum omap_dss_display_state state;
  662. enum omap_dss_audio_state audio_state;
  663. /* OMAP DSS output specific fields */
  664. struct list_head list;
  665. /* DISPC channel for this output */
  666. enum omap_channel dispc_channel;
  667. /* output instance */
  668. enum omap_dss_output_id id;
  669. /* dynamic fields */
  670. struct omap_overlay_manager *manager;
  671. struct omap_dss_device *device;
  672. };
  673. struct omap_dss_hdmi_data
  674. {
  675. int ct_cp_hpd_gpio;
  676. int ls_oe_gpio;
  677. int hpd_gpio;
  678. };
  679. struct omap_dss_driver {
  680. struct device_driver driver;
  681. int (*probe)(struct omap_dss_device *);
  682. void (*remove)(struct omap_dss_device *);
  683. int (*connect)(struct omap_dss_device *dssdev);
  684. void (*disconnect)(struct omap_dss_device *dssdev);
  685. int (*enable)(struct omap_dss_device *display);
  686. void (*disable)(struct omap_dss_device *display);
  687. int (*run_test)(struct omap_dss_device *display, int test);
  688. int (*update)(struct omap_dss_device *dssdev,
  689. u16 x, u16 y, u16 w, u16 h);
  690. int (*sync)(struct omap_dss_device *dssdev);
  691. int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
  692. int (*get_te)(struct omap_dss_device *dssdev);
  693. u8 (*get_rotate)(struct omap_dss_device *dssdev);
  694. int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate);
  695. bool (*get_mirror)(struct omap_dss_device *dssdev);
  696. int (*set_mirror)(struct omap_dss_device *dssdev, bool enable);
  697. int (*memory_read)(struct omap_dss_device *dssdev,
  698. void *buf, size_t size,
  699. u16 x, u16 y, u16 w, u16 h);
  700. void (*get_resolution)(struct omap_dss_device *dssdev,
  701. u16 *xres, u16 *yres);
  702. void (*get_dimensions)(struct omap_dss_device *dssdev,
  703. u32 *width, u32 *height);
  704. int (*get_recommended_bpp)(struct omap_dss_device *dssdev);
  705. int (*check_timings)(struct omap_dss_device *dssdev,
  706. struct omap_video_timings *timings);
  707. void (*set_timings)(struct omap_dss_device *dssdev,
  708. struct omap_video_timings *timings);
  709. void (*get_timings)(struct omap_dss_device *dssdev,
  710. struct omap_video_timings *timings);
  711. int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
  712. u32 (*get_wss)(struct omap_dss_device *dssdev);
  713. int (*read_edid)(struct omap_dss_device *dssdev, u8 *buf, int len);
  714. bool (*detect)(struct omap_dss_device *dssdev);
  715. /*
  716. * For display drivers that support audio. This encompasses
  717. * HDMI and DisplayPort at the moment.
  718. */
  719. /*
  720. * Note: These functions might sleep. Do not call while
  721. * holding a spinlock/readlock.
  722. */
  723. int (*audio_enable)(struct omap_dss_device *dssdev);
  724. void (*audio_disable)(struct omap_dss_device *dssdev);
  725. bool (*audio_supported)(struct omap_dss_device *dssdev);
  726. int (*audio_config)(struct omap_dss_device *dssdev,
  727. struct omap_dss_audio *audio);
  728. /* Note: These functions may not sleep */
  729. int (*audio_start)(struct omap_dss_device *dssdev);
  730. void (*audio_stop)(struct omap_dss_device *dssdev);
  731. };
  732. enum omapdss_version omapdss_get_version(void);
  733. bool omapdss_is_initialized(void);
  734. int omap_dss_register_driver(struct omap_dss_driver *);
  735. void omap_dss_unregister_driver(struct omap_dss_driver *);
  736. int omapdss_register_display(struct omap_dss_device *dssdev);
  737. void omapdss_unregister_display(struct omap_dss_device *dssdev);
  738. struct omap_dss_device *omap_dss_get_device(struct omap_dss_device *dssdev);
  739. void omap_dss_put_device(struct omap_dss_device *dssdev);
  740. #define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL)
  741. struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from);
  742. struct omap_dss_device *omap_dss_find_device(void *data,
  743. int (*match)(struct omap_dss_device *dssdev, void *data));
  744. const char *omapdss_get_default_display_name(void);
  745. void videomode_to_omap_video_timings(const struct videomode *vm,
  746. struct omap_video_timings *ovt);
  747. void omap_video_timings_to_videomode(const struct omap_video_timings *ovt,
  748. struct videomode *vm);
  749. int dss_feat_get_num_mgrs(void);
  750. int dss_feat_get_num_ovls(void);
  751. enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel);
  752. enum omap_dss_output_id dss_feat_get_supported_outputs(enum omap_channel channel);
  753. enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane);
  754. int omap_dss_get_num_overlay_managers(void);
  755. struct omap_overlay_manager *omap_dss_get_overlay_manager(int num);
  756. int omap_dss_get_num_overlays(void);
  757. struct omap_overlay *omap_dss_get_overlay(int num);
  758. int omapdss_register_output(struct omap_dss_device *output);
  759. void omapdss_unregister_output(struct omap_dss_device *output);
  760. struct omap_dss_device *omap_dss_get_output(enum omap_dss_output_id id);
  761. struct omap_dss_device *omap_dss_find_output(const char *name);
  762. struct omap_dss_device *omap_dss_find_output_by_node(struct device_node *node);
  763. int omapdss_output_set_device(struct omap_dss_device *out,
  764. struct omap_dss_device *dssdev);
  765. int omapdss_output_unset_device(struct omap_dss_device *out);
  766. struct omap_dss_device *omapdss_find_output_from_display(struct omap_dss_device *dssdev);
  767. struct omap_overlay_manager *omapdss_find_mgr_from_display(struct omap_dss_device *dssdev);
  768. void omapdss_default_get_resolution(struct omap_dss_device *dssdev,
  769. u16 *xres, u16 *yres);
  770. int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev);
  771. void omapdss_default_get_timings(struct omap_dss_device *dssdev,
  772. struct omap_video_timings *timings);
  773. typedef void (*omap_dispc_isr_t) (void *arg, u32 mask);
  774. int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
  775. int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
  776. u32 dispc_read_irqstatus(void);
  777. void dispc_clear_irqstatus(u32 mask);
  778. u32 dispc_read_irqenable(void);
  779. void dispc_write_irqenable(u32 mask);
  780. int dispc_request_irq(irq_handler_t handler, void *dev_id);
  781. void dispc_free_irq(void *dev_id);
  782. int dispc_runtime_get(void);
  783. void dispc_runtime_put(void);
  784. void dispc_mgr_enable(enum omap_channel channel, bool enable);
  785. bool dispc_mgr_is_enabled(enum omap_channel channel);
  786. u32 dispc_mgr_get_vsync_irq(enum omap_channel channel);
  787. u32 dispc_mgr_get_framedone_irq(enum omap_channel channel);
  788. u32 dispc_mgr_get_sync_lost_irq(enum omap_channel channel);
  789. bool dispc_mgr_go_busy(enum omap_channel channel);
  790. void dispc_mgr_go(enum omap_channel channel);
  791. void dispc_mgr_set_lcd_config(enum omap_channel channel,
  792. const struct dss_lcd_mgr_config *config);
  793. void dispc_mgr_set_timings(enum omap_channel channel,
  794. const struct omap_video_timings *timings);
  795. void dispc_mgr_setup(enum omap_channel channel,
  796. const struct omap_overlay_manager_info *info);
  797. int dispc_ovl_check(enum omap_plane plane, enum omap_channel channel,
  798. const struct omap_overlay_info *oi,
  799. const struct omap_video_timings *timings,
  800. int *x_predecim, int *y_predecim);
  801. int dispc_ovl_enable(enum omap_plane plane, bool enable);
  802. bool dispc_ovl_enabled(enum omap_plane plane);
  803. void dispc_ovl_set_channel_out(enum omap_plane plane,
  804. enum omap_channel channel);
  805. int dispc_ovl_setup(enum omap_plane plane, const struct omap_overlay_info *oi,
  806. bool replication, const struct omap_video_timings *mgr_timings,
  807. bool mem_to_mem);
  808. #define to_dss_driver(x) container_of((x), struct omap_dss_driver, driver)
  809. #define to_dss_device(x) container_of((x), struct omap_dss_device, old_dev)
  810. int omapdss_sdi_display_enable(struct omap_dss_device *dssdev);
  811. void omapdss_sdi_display_disable(struct omap_dss_device *dssdev);
  812. void omapdss_sdi_set_timings(struct omap_dss_device *dssdev,
  813. struct omap_video_timings *timings);
  814. void omapdss_sdi_set_datapairs(struct omap_dss_device *dssdev, int datapairs);
  815. int omapdss_rfbi_display_enable(struct omap_dss_device *dssdev);
  816. void omapdss_rfbi_display_disable(struct omap_dss_device *dssdev);
  817. int omap_rfbi_update(struct omap_dss_device *dssdev, void (*callback)(void *),
  818. void *data);
  819. int omap_rfbi_configure(struct omap_dss_device *dssdev);
  820. void omapdss_rfbi_set_size(struct omap_dss_device *dssdev, u16 w, u16 h);
  821. void omapdss_rfbi_set_pixel_size(struct omap_dss_device *dssdev,
  822. int pixel_size);
  823. void omapdss_rfbi_set_data_lines(struct omap_dss_device *dssdev,
  824. int data_lines);
  825. void omapdss_rfbi_set_interface_timings(struct omap_dss_device *dssdev,
  826. struct rfbi_timings *timings);
  827. int omapdss_compat_init(void);
  828. void omapdss_compat_uninit(void);
  829. struct dss_mgr_ops {
  830. int (*connect)(struct omap_overlay_manager *mgr,
  831. struct omap_dss_device *dst);
  832. void (*disconnect)(struct omap_overlay_manager *mgr,
  833. struct omap_dss_device *dst);
  834. void (*start_update)(struct omap_overlay_manager *mgr);
  835. int (*enable)(struct omap_overlay_manager *mgr);
  836. void (*disable)(struct omap_overlay_manager *mgr);
  837. void (*set_timings)(struct omap_overlay_manager *mgr,
  838. const struct omap_video_timings *timings);
  839. void (*set_lcd_config)(struct omap_overlay_manager *mgr,
  840. const struct dss_lcd_mgr_config *config);
  841. int (*register_framedone_handler)(struct omap_overlay_manager *mgr,
  842. void (*handler)(void *), void *data);
  843. void (*unregister_framedone_handler)(struct omap_overlay_manager *mgr,
  844. void (*handler)(void *), void *data);
  845. };
  846. int dss_install_mgr_ops(const struct dss_mgr_ops *mgr_ops);
  847. void dss_uninstall_mgr_ops(void);
  848. int dss_mgr_connect(struct omap_overlay_manager *mgr,
  849. struct omap_dss_device *dst);
  850. void dss_mgr_disconnect(struct omap_overlay_manager *mgr,
  851. struct omap_dss_device *dst);
  852. void dss_mgr_set_timings(struct omap_overlay_manager *mgr,
  853. const struct omap_video_timings *timings);
  854. void dss_mgr_set_lcd_config(struct omap_overlay_manager *mgr,
  855. const struct dss_lcd_mgr_config *config);
  856. int dss_mgr_enable(struct omap_overlay_manager *mgr);
  857. void dss_mgr_disable(struct omap_overlay_manager *mgr);
  858. void dss_mgr_start_update(struct omap_overlay_manager *mgr);
  859. int dss_mgr_register_framedone_handler(struct omap_overlay_manager *mgr,
  860. void (*handler)(void *), void *data);
  861. void dss_mgr_unregister_framedone_handler(struct omap_overlay_manager *mgr,
  862. void (*handler)(void *), void *data);
  863. static inline bool omapdss_device_is_connected(struct omap_dss_device *dssdev)
  864. {
  865. return dssdev->output;
  866. }
  867. static inline bool omapdss_device_is_enabled(struct omap_dss_device *dssdev)
  868. {
  869. return dssdev->state == OMAP_DSS_DISPLAY_ACTIVE;
  870. }
  871. #endif