dpi.c 9.1 KB

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  1. /*
  2. * linux/drivers/video/omap2/dss/dpi.c
  3. *
  4. * Copyright (C) 2009 Nokia Corporation
  5. * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
  6. *
  7. * Some code and ideas taken from drivers/video/omap/ driver
  8. * by Imre Deak.
  9. *
  10. * This program is free software; you can redistribute it and/or modify it
  11. * under the terms of the GNU General Public License version 2 as published by
  12. * the Free Software Foundation.
  13. *
  14. * This program is distributed in the hope that it will be useful, but WITHOUT
  15. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  16. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  17. * more details.
  18. *
  19. * You should have received a copy of the GNU General Public License along with
  20. * this program. If not, see <http://www.gnu.org/licenses/>.
  21. */
  22. #define DSS_SUBSYS_NAME "DPI"
  23. #include <linux/kernel.h>
  24. #include <linux/delay.h>
  25. #include <linux/export.h>
  26. #include <linux/err.h>
  27. #include <linux/errno.h>
  28. #include <linux/platform_device.h>
  29. #include <linux/regulator/consumer.h>
  30. #include <video/omapdss.h>
  31. #include <plat/cpu.h>
  32. #include "dss.h"
  33. static struct {
  34. struct regulator *vdds_dsi_reg;
  35. struct platform_device *dsidev;
  36. struct dss_lcd_mgr_config mgr_config;
  37. } dpi;
  38. static struct platform_device *dpi_get_dsidev(enum omap_dss_clk_source clk)
  39. {
  40. int dsi_module;
  41. dsi_module = clk == OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC ? 0 : 1;
  42. return dsi_get_dsidev_from_id(dsi_module);
  43. }
  44. static bool dpi_use_dsi_pll(struct omap_dss_device *dssdev)
  45. {
  46. if (dssdev->clocks.dispc.dispc_fclk_src ==
  47. OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC ||
  48. dssdev->clocks.dispc.dispc_fclk_src ==
  49. OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC ||
  50. dssdev->clocks.dispc.channel.lcd_clk_src ==
  51. OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC ||
  52. dssdev->clocks.dispc.channel.lcd_clk_src ==
  53. OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC)
  54. return true;
  55. else
  56. return false;
  57. }
  58. static int dpi_set_dsi_clk(struct omap_dss_device *dssdev,
  59. unsigned long pck_req, unsigned long *fck, int *lck_div,
  60. int *pck_div)
  61. {
  62. struct dsi_clock_info dsi_cinfo;
  63. struct dispc_clock_info dispc_cinfo;
  64. int r;
  65. r = dsi_pll_calc_clock_div_pck(dpi.dsidev, pck_req, &dsi_cinfo,
  66. &dispc_cinfo);
  67. if (r)
  68. return r;
  69. r = dsi_pll_set_clock_div(dpi.dsidev, &dsi_cinfo);
  70. if (r)
  71. return r;
  72. dss_select_dispc_clk_source(dssdev->clocks.dispc.dispc_fclk_src);
  73. dpi.mgr_config.clock_info = dispc_cinfo;
  74. *fck = dsi_cinfo.dsi_pll_hsdiv_dispc_clk;
  75. *lck_div = dispc_cinfo.lck_div;
  76. *pck_div = dispc_cinfo.pck_div;
  77. return 0;
  78. }
  79. static int dpi_set_dispc_clk(struct omap_dss_device *dssdev,
  80. unsigned long pck_req, unsigned long *fck, int *lck_div,
  81. int *pck_div)
  82. {
  83. struct dss_clock_info dss_cinfo;
  84. struct dispc_clock_info dispc_cinfo;
  85. int r;
  86. r = dss_calc_clock_div(pck_req, &dss_cinfo, &dispc_cinfo);
  87. if (r)
  88. return r;
  89. r = dss_set_clock_div(&dss_cinfo);
  90. if (r)
  91. return r;
  92. dpi.mgr_config.clock_info = dispc_cinfo;
  93. *fck = dss_cinfo.fck;
  94. *lck_div = dispc_cinfo.lck_div;
  95. *pck_div = dispc_cinfo.pck_div;
  96. return 0;
  97. }
  98. static int dpi_set_mode(struct omap_dss_device *dssdev)
  99. {
  100. struct omap_video_timings *t = &dssdev->panel.timings;
  101. int lck_div = 0, pck_div = 0;
  102. unsigned long fck = 0;
  103. unsigned long pck;
  104. int r = 0;
  105. if (dpi_use_dsi_pll(dssdev))
  106. r = dpi_set_dsi_clk(dssdev, t->pixel_clock * 1000, &fck,
  107. &lck_div, &pck_div);
  108. else
  109. r = dpi_set_dispc_clk(dssdev, t->pixel_clock * 1000, &fck,
  110. &lck_div, &pck_div);
  111. if (r)
  112. return r;
  113. pck = fck / lck_div / pck_div / 1000;
  114. if (pck != t->pixel_clock) {
  115. DSSWARN("Could not find exact pixel clock. "
  116. "Requested %d kHz, got %lu kHz\n",
  117. t->pixel_clock, pck);
  118. t->pixel_clock = pck;
  119. }
  120. dss_mgr_set_timings(dssdev->manager, t);
  121. return 0;
  122. }
  123. static void dpi_config_lcd_manager(struct omap_dss_device *dssdev)
  124. {
  125. dpi.mgr_config.io_pad_mode = DSS_IO_PAD_MODE_BYPASS;
  126. dpi.mgr_config.stallmode = false;
  127. dpi.mgr_config.fifohandcheck = false;
  128. dpi.mgr_config.video_port_width = dssdev->phy.dpi.data_lines;
  129. dpi.mgr_config.lcden_sig_polarity = 0;
  130. dispc_mgr_set_io_pad_mode(dpi.mgr_config.io_pad_mode);
  131. dispc_mgr_enable_stallmode(dssdev->manager->id,
  132. dpi.mgr_config.stallmode);
  133. dispc_mgr_enable_fifohandcheck(dssdev->manager->id,
  134. dpi.mgr_config.fifohandcheck);
  135. dispc_mgr_set_tft_data_lines(dssdev->manager->id,
  136. dpi.mgr_config.video_port_width);
  137. dispc_mgr_set_clock_div(dssdev->manager->id,
  138. &dpi.mgr_config.clock_info);
  139. dispc_lcd_enable_signal_polarity(dpi.mgr_config.lcden_sig_polarity);
  140. dispc_mgr_set_lcd_type_tft(dssdev->manager->id);
  141. }
  142. int omapdss_dpi_display_enable(struct omap_dss_device *dssdev)
  143. {
  144. int r;
  145. if (cpu_is_omap34xx() && !dpi.vdds_dsi_reg) {
  146. DSSERR("no VDSS_DSI regulator\n");
  147. return -ENODEV;
  148. }
  149. if (dssdev->manager == NULL) {
  150. DSSERR("failed to enable display: no manager\n");
  151. return -ENODEV;
  152. }
  153. r = omap_dss_start_device(dssdev);
  154. if (r) {
  155. DSSERR("failed to start device\n");
  156. goto err_start_dev;
  157. }
  158. if (cpu_is_omap34xx()) {
  159. r = regulator_enable(dpi.vdds_dsi_reg);
  160. if (r)
  161. goto err_reg_enable;
  162. }
  163. r = dispc_runtime_get();
  164. if (r)
  165. goto err_get_dispc;
  166. if (dpi_use_dsi_pll(dssdev)) {
  167. r = dsi_runtime_get(dpi.dsidev);
  168. if (r)
  169. goto err_get_dsi;
  170. r = dsi_pll_init(dpi.dsidev, 0, 1);
  171. if (r)
  172. goto err_dsi_pll_init;
  173. }
  174. r = dpi_set_mode(dssdev);
  175. if (r)
  176. goto err_set_mode;
  177. dpi_config_lcd_manager(dssdev);
  178. mdelay(2);
  179. r = dss_mgr_enable(dssdev->manager);
  180. if (r)
  181. goto err_mgr_enable;
  182. return 0;
  183. err_mgr_enable:
  184. err_set_mode:
  185. if (dpi_use_dsi_pll(dssdev))
  186. dsi_pll_uninit(dpi.dsidev, true);
  187. err_dsi_pll_init:
  188. if (dpi_use_dsi_pll(dssdev))
  189. dsi_runtime_put(dpi.dsidev);
  190. err_get_dsi:
  191. dispc_runtime_put();
  192. err_get_dispc:
  193. if (cpu_is_omap34xx())
  194. regulator_disable(dpi.vdds_dsi_reg);
  195. err_reg_enable:
  196. omap_dss_stop_device(dssdev);
  197. err_start_dev:
  198. return r;
  199. }
  200. EXPORT_SYMBOL(omapdss_dpi_display_enable);
  201. void omapdss_dpi_display_disable(struct omap_dss_device *dssdev)
  202. {
  203. dss_mgr_disable(dssdev->manager);
  204. if (dpi_use_dsi_pll(dssdev)) {
  205. dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK);
  206. dsi_pll_uninit(dpi.dsidev, true);
  207. dsi_runtime_put(dpi.dsidev);
  208. }
  209. dispc_runtime_put();
  210. if (cpu_is_omap34xx())
  211. regulator_disable(dpi.vdds_dsi_reg);
  212. omap_dss_stop_device(dssdev);
  213. }
  214. EXPORT_SYMBOL(omapdss_dpi_display_disable);
  215. void dpi_set_timings(struct omap_dss_device *dssdev,
  216. struct omap_video_timings *timings)
  217. {
  218. int r;
  219. DSSDBG("dpi_set_timings\n");
  220. dssdev->panel.timings = *timings;
  221. if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) {
  222. r = dispc_runtime_get();
  223. if (r)
  224. return;
  225. dpi_set_mode(dssdev);
  226. dispc_runtime_put();
  227. } else {
  228. dss_mgr_set_timings(dssdev->manager, timings);
  229. }
  230. }
  231. EXPORT_SYMBOL(dpi_set_timings);
  232. int dpi_check_timings(struct omap_dss_device *dssdev,
  233. struct omap_video_timings *timings)
  234. {
  235. int r;
  236. int lck_div, pck_div;
  237. unsigned long fck;
  238. unsigned long pck;
  239. struct dispc_clock_info dispc_cinfo;
  240. if (dss_mgr_check_timings(dssdev->manager, timings))
  241. return -EINVAL;
  242. if (timings->pixel_clock == 0)
  243. return -EINVAL;
  244. if (dpi_use_dsi_pll(dssdev)) {
  245. struct dsi_clock_info dsi_cinfo;
  246. r = dsi_pll_calc_clock_div_pck(dpi.dsidev,
  247. timings->pixel_clock * 1000,
  248. &dsi_cinfo, &dispc_cinfo);
  249. if (r)
  250. return r;
  251. fck = dsi_cinfo.dsi_pll_hsdiv_dispc_clk;
  252. } else {
  253. struct dss_clock_info dss_cinfo;
  254. r = dss_calc_clock_div(timings->pixel_clock * 1000,
  255. &dss_cinfo, &dispc_cinfo);
  256. if (r)
  257. return r;
  258. fck = dss_cinfo.fck;
  259. }
  260. lck_div = dispc_cinfo.lck_div;
  261. pck_div = dispc_cinfo.pck_div;
  262. pck = fck / lck_div / pck_div / 1000;
  263. timings->pixel_clock = pck;
  264. return 0;
  265. }
  266. EXPORT_SYMBOL(dpi_check_timings);
  267. static int __init dpi_init_display(struct omap_dss_device *dssdev)
  268. {
  269. DSSDBG("init_display\n");
  270. if (cpu_is_omap34xx() && dpi.vdds_dsi_reg == NULL) {
  271. struct regulator *vdds_dsi;
  272. vdds_dsi = dss_get_vdds_dsi();
  273. if (IS_ERR(vdds_dsi)) {
  274. DSSERR("can't get VDDS_DSI regulator\n");
  275. return PTR_ERR(vdds_dsi);
  276. }
  277. dpi.vdds_dsi_reg = vdds_dsi;
  278. }
  279. if (dpi_use_dsi_pll(dssdev)) {
  280. enum omap_dss_clk_source dispc_fclk_src =
  281. dssdev->clocks.dispc.dispc_fclk_src;
  282. dpi.dsidev = dpi_get_dsidev(dispc_fclk_src);
  283. }
  284. return 0;
  285. }
  286. static void __init dpi_probe_pdata(struct platform_device *pdev)
  287. {
  288. struct omap_dss_board_info *pdata = pdev->dev.platform_data;
  289. int i, r;
  290. for (i = 0; i < pdata->num_devices; ++i) {
  291. struct omap_dss_device *dssdev = pdata->devices[i];
  292. if (dssdev->type != OMAP_DISPLAY_TYPE_DPI)
  293. continue;
  294. r = dpi_init_display(dssdev);
  295. if (r) {
  296. DSSERR("device %s init failed: %d\n", dssdev->name, r);
  297. continue;
  298. }
  299. r = omap_dss_register_device(dssdev, &pdev->dev, i);
  300. if (r)
  301. DSSERR("device %s register failed: %d\n",
  302. dssdev->name, r);
  303. }
  304. }
  305. static int __init omap_dpi_probe(struct platform_device *pdev)
  306. {
  307. dpi_probe_pdata(pdev);
  308. return 0;
  309. }
  310. static int __exit omap_dpi_remove(struct platform_device *pdev)
  311. {
  312. omap_dss_unregister_child_devices(&pdev->dev);
  313. return 0;
  314. }
  315. static struct platform_driver omap_dpi_driver = {
  316. .remove = __exit_p(omap_dpi_remove),
  317. .driver = {
  318. .name = "omapdss_dpi",
  319. .owner = THIS_MODULE,
  320. },
  321. };
  322. int __init dpi_init_platform_driver(void)
  323. {
  324. return platform_driver_probe(&omap_dpi_driver, omap_dpi_probe);
  325. }
  326. void __exit dpi_uninit_platform_driver(void)
  327. {
  328. platform_driver_unregister(&omap_dpi_driver);
  329. }