rtc-s3c.c 14 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613
  1. /* drivers/rtc/rtc-s3c.c
  2. *
  3. * Copyright (c) 2004,2006 Simtec Electronics
  4. * Ben Dooks, <ben@simtec.co.uk>
  5. * http://armlinux.simtec.co.uk/
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * S3C2410/S3C2440/S3C24XX Internal RTC Driver
  12. */
  13. #include <linux/module.h>
  14. #include <linux/fs.h>
  15. #include <linux/string.h>
  16. #include <linux/init.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/rtc.h>
  20. #include <linux/bcd.h>
  21. #include <linux/clk.h>
  22. #include <linux/log2.h>
  23. #include <linux/slab.h>
  24. #include <mach/hardware.h>
  25. #include <asm/uaccess.h>
  26. #include <asm/io.h>
  27. #include <asm/irq.h>
  28. #include <plat/regs-rtc.h>
  29. enum s3c_cpu_type {
  30. TYPE_S3C2410,
  31. TYPE_S3C64XX,
  32. };
  33. /* I have yet to find an S3C implementation with more than one
  34. * of these rtc blocks in */
  35. static struct resource *s3c_rtc_mem;
  36. static void __iomem *s3c_rtc_base;
  37. static int s3c_rtc_alarmno = NO_IRQ;
  38. static int s3c_rtc_tickno = NO_IRQ;
  39. static enum s3c_cpu_type s3c_rtc_cpu_type;
  40. static DEFINE_SPINLOCK(s3c_rtc_pie_lock);
  41. /* IRQ Handlers */
  42. static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
  43. {
  44. struct rtc_device *rdev = id;
  45. rtc_update_irq(rdev, 1, RTC_AF | RTC_IRQF);
  46. return IRQ_HANDLED;
  47. }
  48. static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
  49. {
  50. struct rtc_device *rdev = id;
  51. rtc_update_irq(rdev, 1, RTC_PF | RTC_IRQF);
  52. return IRQ_HANDLED;
  53. }
  54. /* Update control registers */
  55. static void s3c_rtc_setaie(int to)
  56. {
  57. unsigned int tmp;
  58. pr_debug("%s: aie=%d\n", __func__, to);
  59. tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
  60. if (to)
  61. tmp |= S3C2410_RTCALM_ALMEN;
  62. writeb(tmp, s3c_rtc_base + S3C2410_RTCALM);
  63. }
  64. static int s3c_rtc_setpie(struct device *dev, int enabled)
  65. {
  66. unsigned int tmp;
  67. pr_debug("%s: pie=%d\n", __func__, enabled);
  68. spin_lock_irq(&s3c_rtc_pie_lock);
  69. if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
  70. tmp = readb(s3c_rtc_base + S3C2410_RTCCON);
  71. tmp &= ~S3C64XX_RTCCON_TICEN;
  72. if (enabled)
  73. tmp |= S3C64XX_RTCCON_TICEN;
  74. writeb(tmp, s3c_rtc_base + S3C2410_RTCCON);
  75. } else {
  76. tmp = readb(s3c_rtc_base + S3C2410_TICNT);
  77. tmp &= ~S3C2410_TICNT_ENABLE;
  78. if (enabled)
  79. tmp |= S3C2410_TICNT_ENABLE;
  80. writeb(tmp, s3c_rtc_base + S3C2410_TICNT);
  81. }
  82. spin_unlock_irq(&s3c_rtc_pie_lock);
  83. return 0;
  84. }
  85. static int s3c_rtc_setfreq(struct device *dev, int freq)
  86. {
  87. struct platform_device *pdev = to_platform_device(dev);
  88. struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
  89. unsigned int tmp = 0;
  90. if (!is_power_of_2(freq))
  91. return -EINVAL;
  92. spin_lock_irq(&s3c_rtc_pie_lock);
  93. if (s3c_rtc_cpu_type == TYPE_S3C2410) {
  94. tmp = readb(s3c_rtc_base + S3C2410_TICNT);
  95. tmp &= S3C2410_TICNT_ENABLE;
  96. }
  97. tmp |= (rtc_dev->max_user_freq / freq)-1;
  98. writeb(tmp, s3c_rtc_base + S3C2410_TICNT);
  99. spin_unlock_irq(&s3c_rtc_pie_lock);
  100. return 0;
  101. }
  102. /* Time read/write */
  103. static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
  104. {
  105. unsigned int have_retried = 0;
  106. void __iomem *base = s3c_rtc_base;
  107. retry_get_time:
  108. rtc_tm->tm_min = readb(base + S3C2410_RTCMIN);
  109. rtc_tm->tm_hour = readb(base + S3C2410_RTCHOUR);
  110. rtc_tm->tm_mday = readb(base + S3C2410_RTCDATE);
  111. rtc_tm->tm_mon = readb(base + S3C2410_RTCMON);
  112. rtc_tm->tm_year = readb(base + S3C2410_RTCYEAR);
  113. rtc_tm->tm_sec = readb(base + S3C2410_RTCSEC);
  114. /* the only way to work out wether the system was mid-update
  115. * when we read it is to check the second counter, and if it
  116. * is zero, then we re-try the entire read
  117. */
  118. if (rtc_tm->tm_sec == 0 && !have_retried) {
  119. have_retried = 1;
  120. goto retry_get_time;
  121. }
  122. pr_debug("read time %02x.%02x.%02x %02x/%02x/%02x\n",
  123. rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
  124. rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);
  125. rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
  126. rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
  127. rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
  128. rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
  129. rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
  130. rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
  131. rtc_tm->tm_year += 100;
  132. rtc_tm->tm_mon -= 1;
  133. return 0;
  134. }
  135. static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
  136. {
  137. void __iomem *base = s3c_rtc_base;
  138. int year = tm->tm_year - 100;
  139. pr_debug("set time %02d.%02d.%02d %02d/%02d/%02d\n",
  140. tm->tm_year, tm->tm_mon, tm->tm_mday,
  141. tm->tm_hour, tm->tm_min, tm->tm_sec);
  142. /* we get around y2k by simply not supporting it */
  143. if (year < 0 || year >= 100) {
  144. dev_err(dev, "rtc only supports 100 years\n");
  145. return -EINVAL;
  146. }
  147. writeb(bin2bcd(tm->tm_sec), base + S3C2410_RTCSEC);
  148. writeb(bin2bcd(tm->tm_min), base + S3C2410_RTCMIN);
  149. writeb(bin2bcd(tm->tm_hour), base + S3C2410_RTCHOUR);
  150. writeb(bin2bcd(tm->tm_mday), base + S3C2410_RTCDATE);
  151. writeb(bin2bcd(tm->tm_mon + 1), base + S3C2410_RTCMON);
  152. writeb(bin2bcd(year), base + S3C2410_RTCYEAR);
  153. return 0;
  154. }
  155. static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
  156. {
  157. struct rtc_time *alm_tm = &alrm->time;
  158. void __iomem *base = s3c_rtc_base;
  159. unsigned int alm_en;
  160. alm_tm->tm_sec = readb(base + S3C2410_ALMSEC);
  161. alm_tm->tm_min = readb(base + S3C2410_ALMMIN);
  162. alm_tm->tm_hour = readb(base + S3C2410_ALMHOUR);
  163. alm_tm->tm_mon = readb(base + S3C2410_ALMMON);
  164. alm_tm->tm_mday = readb(base + S3C2410_ALMDATE);
  165. alm_tm->tm_year = readb(base + S3C2410_ALMYEAR);
  166. alm_en = readb(base + S3C2410_RTCALM);
  167. alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;
  168. pr_debug("read alarm %02x %02x.%02x.%02x %02x/%02x/%02x\n",
  169. alm_en,
  170. alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
  171. alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);
  172. /* decode the alarm enable field */
  173. if (alm_en & S3C2410_RTCALM_SECEN)
  174. alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
  175. else
  176. alm_tm->tm_sec = 0xff;
  177. if (alm_en & S3C2410_RTCALM_MINEN)
  178. alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
  179. else
  180. alm_tm->tm_min = 0xff;
  181. if (alm_en & S3C2410_RTCALM_HOUREN)
  182. alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
  183. else
  184. alm_tm->tm_hour = 0xff;
  185. if (alm_en & S3C2410_RTCALM_DAYEN)
  186. alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
  187. else
  188. alm_tm->tm_mday = 0xff;
  189. if (alm_en & S3C2410_RTCALM_MONEN) {
  190. alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon);
  191. alm_tm->tm_mon -= 1;
  192. } else {
  193. alm_tm->tm_mon = 0xff;
  194. }
  195. if (alm_en & S3C2410_RTCALM_YEAREN)
  196. alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
  197. else
  198. alm_tm->tm_year = 0xffff;
  199. return 0;
  200. }
  201. static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
  202. {
  203. struct rtc_time *tm = &alrm->time;
  204. void __iomem *base = s3c_rtc_base;
  205. unsigned int alrm_en;
  206. pr_debug("s3c_rtc_setalarm: %d, %02x/%02x/%02x %02x.%02x.%02x\n",
  207. alrm->enabled,
  208. tm->tm_mday & 0xff, tm->tm_mon & 0xff, tm->tm_year & 0xff,
  209. tm->tm_hour & 0xff, tm->tm_min & 0xff, tm->tm_sec);
  210. alrm_en = readb(base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
  211. writeb(0x00, base + S3C2410_RTCALM);
  212. if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
  213. alrm_en |= S3C2410_RTCALM_SECEN;
  214. writeb(bin2bcd(tm->tm_sec), base + S3C2410_ALMSEC);
  215. }
  216. if (tm->tm_min < 60 && tm->tm_min >= 0) {
  217. alrm_en |= S3C2410_RTCALM_MINEN;
  218. writeb(bin2bcd(tm->tm_min), base + S3C2410_ALMMIN);
  219. }
  220. if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
  221. alrm_en |= S3C2410_RTCALM_HOUREN;
  222. writeb(bin2bcd(tm->tm_hour), base + S3C2410_ALMHOUR);
  223. }
  224. pr_debug("setting S3C2410_RTCALM to %08x\n", alrm_en);
  225. writeb(alrm_en, base + S3C2410_RTCALM);
  226. s3c_rtc_setaie(alrm->enabled);
  227. if (alrm->enabled)
  228. enable_irq_wake(s3c_rtc_alarmno);
  229. else
  230. disable_irq_wake(s3c_rtc_alarmno);
  231. return 0;
  232. }
  233. static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
  234. {
  235. unsigned int ticnt;
  236. if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
  237. ticnt = readb(s3c_rtc_base + S3C2410_RTCCON);
  238. ticnt &= S3C64XX_RTCCON_TICEN;
  239. } else {
  240. ticnt = readb(s3c_rtc_base + S3C2410_TICNT);
  241. ticnt &= S3C2410_TICNT_ENABLE;
  242. }
  243. seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
  244. return 0;
  245. }
  246. static int s3c_rtc_open(struct device *dev)
  247. {
  248. struct platform_device *pdev = to_platform_device(dev);
  249. struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
  250. int ret;
  251. ret = request_irq(s3c_rtc_alarmno, s3c_rtc_alarmirq,
  252. IRQF_DISABLED, "s3c2410-rtc alarm", rtc_dev);
  253. if (ret) {
  254. dev_err(dev, "IRQ%d error %d\n", s3c_rtc_alarmno, ret);
  255. return ret;
  256. }
  257. ret = request_irq(s3c_rtc_tickno, s3c_rtc_tickirq,
  258. IRQF_DISABLED, "s3c2410-rtc tick", rtc_dev);
  259. if (ret) {
  260. dev_err(dev, "IRQ%d error %d\n", s3c_rtc_tickno, ret);
  261. goto tick_err;
  262. }
  263. return ret;
  264. tick_err:
  265. free_irq(s3c_rtc_alarmno, rtc_dev);
  266. return ret;
  267. }
  268. static void s3c_rtc_release(struct device *dev)
  269. {
  270. struct platform_device *pdev = to_platform_device(dev);
  271. struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
  272. /* do not clear AIE here, it may be needed for wake */
  273. s3c_rtc_setpie(dev, 0);
  274. free_irq(s3c_rtc_alarmno, rtc_dev);
  275. free_irq(s3c_rtc_tickno, rtc_dev);
  276. }
  277. static const struct rtc_class_ops s3c_rtcops = {
  278. .open = s3c_rtc_open,
  279. .release = s3c_rtc_release,
  280. .read_time = s3c_rtc_gettime,
  281. .set_time = s3c_rtc_settime,
  282. .read_alarm = s3c_rtc_getalarm,
  283. .set_alarm = s3c_rtc_setalarm,
  284. .irq_set_freq = s3c_rtc_setfreq,
  285. .irq_set_state = s3c_rtc_setpie,
  286. .proc = s3c_rtc_proc,
  287. };
  288. static void s3c_rtc_enable(struct platform_device *pdev, int en)
  289. {
  290. void __iomem *base = s3c_rtc_base;
  291. unsigned int tmp;
  292. if (s3c_rtc_base == NULL)
  293. return;
  294. if (!en) {
  295. tmp = readb(base + S3C2410_RTCCON);
  296. if (s3c_rtc_cpu_type == TYPE_S3C64XX)
  297. tmp &= ~S3C64XX_RTCCON_TICEN;
  298. tmp &= ~S3C2410_RTCCON_RTCEN;
  299. writeb(tmp, base + S3C2410_RTCCON);
  300. if (s3c_rtc_cpu_type == TYPE_S3C2410) {
  301. tmp = readb(base + S3C2410_TICNT);
  302. tmp &= ~S3C2410_TICNT_ENABLE;
  303. writeb(tmp, base + S3C2410_TICNT);
  304. }
  305. } else {
  306. /* re-enable the device, and check it is ok */
  307. if ((readb(base+S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0){
  308. dev_info(&pdev->dev, "rtc disabled, re-enabling\n");
  309. tmp = readb(base + S3C2410_RTCCON);
  310. writeb(tmp|S3C2410_RTCCON_RTCEN, base+S3C2410_RTCCON);
  311. }
  312. if ((readb(base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)){
  313. dev_info(&pdev->dev, "removing RTCCON_CNTSEL\n");
  314. tmp = readb(base + S3C2410_RTCCON);
  315. writeb(tmp& ~S3C2410_RTCCON_CNTSEL, base+S3C2410_RTCCON);
  316. }
  317. if ((readb(base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)){
  318. dev_info(&pdev->dev, "removing RTCCON_CLKRST\n");
  319. tmp = readb(base + S3C2410_RTCCON);
  320. writeb(tmp & ~S3C2410_RTCCON_CLKRST, base+S3C2410_RTCCON);
  321. }
  322. }
  323. }
  324. static int __devexit s3c_rtc_remove(struct platform_device *dev)
  325. {
  326. struct rtc_device *rtc = platform_get_drvdata(dev);
  327. platform_set_drvdata(dev, NULL);
  328. rtc_device_unregister(rtc);
  329. s3c_rtc_setpie(&dev->dev, 0);
  330. s3c_rtc_setaie(0);
  331. iounmap(s3c_rtc_base);
  332. release_resource(s3c_rtc_mem);
  333. kfree(s3c_rtc_mem);
  334. return 0;
  335. }
  336. static int __devinit s3c_rtc_probe(struct platform_device *pdev)
  337. {
  338. struct rtc_device *rtc;
  339. struct resource *res;
  340. int ret;
  341. pr_debug("%s: probe=%p\n", __func__, pdev);
  342. /* find the IRQs */
  343. s3c_rtc_tickno = platform_get_irq(pdev, 1);
  344. if (s3c_rtc_tickno < 0) {
  345. dev_err(&pdev->dev, "no irq for rtc tick\n");
  346. return -ENOENT;
  347. }
  348. s3c_rtc_alarmno = platform_get_irq(pdev, 0);
  349. if (s3c_rtc_alarmno < 0) {
  350. dev_err(&pdev->dev, "no irq for alarm\n");
  351. return -ENOENT;
  352. }
  353. pr_debug("s3c2410_rtc: tick irq %d, alarm irq %d\n",
  354. s3c_rtc_tickno, s3c_rtc_alarmno);
  355. /* get the memory region */
  356. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  357. if (res == NULL) {
  358. dev_err(&pdev->dev, "failed to get memory region resource\n");
  359. return -ENOENT;
  360. }
  361. s3c_rtc_mem = request_mem_region(res->start,
  362. res->end-res->start+1,
  363. pdev->name);
  364. if (s3c_rtc_mem == NULL) {
  365. dev_err(&pdev->dev, "failed to reserve memory region\n");
  366. ret = -ENOENT;
  367. goto err_nores;
  368. }
  369. s3c_rtc_base = ioremap(res->start, res->end - res->start + 1);
  370. if (s3c_rtc_base == NULL) {
  371. dev_err(&pdev->dev, "failed ioremap()\n");
  372. ret = -EINVAL;
  373. goto err_nomap;
  374. }
  375. /* check to see if everything is setup correctly */
  376. s3c_rtc_enable(pdev, 1);
  377. pr_debug("s3c2410_rtc: RTCCON=%02x\n",
  378. readb(s3c_rtc_base + S3C2410_RTCCON));
  379. s3c_rtc_setfreq(&pdev->dev, 1);
  380. device_init_wakeup(&pdev->dev, 1);
  381. /* register RTC and exit */
  382. rtc = rtc_device_register("s3c", &pdev->dev, &s3c_rtcops,
  383. THIS_MODULE);
  384. if (IS_ERR(rtc)) {
  385. dev_err(&pdev->dev, "cannot attach rtc\n");
  386. ret = PTR_ERR(rtc);
  387. goto err_nortc;
  388. }
  389. if (s3c_rtc_cpu_type == TYPE_S3C64XX)
  390. rtc->max_user_freq = 32768;
  391. else
  392. rtc->max_user_freq = 128;
  393. s3c_rtc_cpu_type = platform_get_device_id(pdev)->driver_data;
  394. platform_set_drvdata(pdev, rtc);
  395. return 0;
  396. err_nortc:
  397. s3c_rtc_enable(pdev, 0);
  398. iounmap(s3c_rtc_base);
  399. err_nomap:
  400. release_resource(s3c_rtc_mem);
  401. err_nores:
  402. return ret;
  403. }
  404. #ifdef CONFIG_PM
  405. /* RTC Power management control */
  406. static int ticnt_save, ticnt_en_save;
  407. static int s3c_rtc_suspend(struct platform_device *pdev, pm_message_t state)
  408. {
  409. /* save TICNT for anyone using periodic interrupts */
  410. ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT);
  411. if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
  412. ticnt_en_save = readb(s3c_rtc_base + S3C2410_RTCCON);
  413. ticnt_en_save &= S3C64XX_RTCCON_TICEN;
  414. }
  415. s3c_rtc_enable(pdev, 0);
  416. return 0;
  417. }
  418. static int s3c_rtc_resume(struct platform_device *pdev)
  419. {
  420. unsigned int tmp;
  421. s3c_rtc_enable(pdev, 1);
  422. writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT);
  423. if (s3c_rtc_cpu_type == TYPE_S3C64XX && ticnt_en_save) {
  424. tmp = readb(s3c_rtc_base + S3C2410_RTCCON);
  425. writeb(tmp | ticnt_en_save, s3c_rtc_base + S3C2410_RTCCON);
  426. }
  427. return 0;
  428. }
  429. #else
  430. #define s3c_rtc_suspend NULL
  431. #define s3c_rtc_resume NULL
  432. #endif
  433. static struct platform_device_id s3c_rtc_driver_ids[] = {
  434. {
  435. .name = "s3c2410-rtc",
  436. .driver_data = TYPE_S3C2410,
  437. }, {
  438. .name = "s3c64xx-rtc",
  439. .driver_data = TYPE_S3C64XX,
  440. },
  441. { }
  442. };
  443. MODULE_DEVICE_TABLE(platform, s3c_rtc_driver_ids);
  444. static struct platform_driver s3c_rtc_driver = {
  445. .probe = s3c_rtc_probe,
  446. .remove = __devexit_p(s3c_rtc_remove),
  447. .suspend = s3c_rtc_suspend,
  448. .resume = s3c_rtc_resume,
  449. .id_table = s3c_rtc_driver_ids,
  450. .driver = {
  451. .name = "s3c-rtc",
  452. .owner = THIS_MODULE,
  453. },
  454. };
  455. static char __initdata banner[] = "S3C24XX RTC, (c) 2004,2006 Simtec Electronics\n";
  456. static int __init s3c_rtc_init(void)
  457. {
  458. printk(banner);
  459. return platform_driver_register(&s3c_rtc_driver);
  460. }
  461. static void __exit s3c_rtc_exit(void)
  462. {
  463. platform_driver_unregister(&s3c_rtc_driver);
  464. }
  465. module_init(s3c_rtc_init);
  466. module_exit(s3c_rtc_exit);
  467. MODULE_DESCRIPTION("Samsung S3C RTC Driver");
  468. MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
  469. MODULE_LICENSE("GPL");
  470. MODULE_ALIAS("platform:s3c2410-rtc");