dma.c 10 KB

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  1. /*
  2. * DMA helper routines for Freescale STMP37XX/STMP378X
  3. *
  4. * Author: dmitry pervushin <dpervushin@embeddedalley.com>
  5. *
  6. * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
  7. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
  8. */
  9. /*
  10. * The code contained herein is licensed under the GNU General Public
  11. * License. You may obtain a copy of the GNU General Public License
  12. * Version 2 or later at the following locations:
  13. *
  14. * http://www.opensource.org/licenses/gpl-license.html
  15. * http://www.gnu.org/copyleft/gpl.html
  16. */
  17. #include <linux/kernel.h>
  18. #include <linux/device.h>
  19. #include <linux/dmapool.h>
  20. #include <linux/sysdev.h>
  21. #include <linux/cpufreq.h>
  22. #include <asm/page.h>
  23. #include <mach/dma.h>
  24. #include <mach/regs-apbx.h>
  25. #include <mach/regs-apbh.h>
  26. static const size_t pool_item_size = sizeof(struct stmp3xxx_dma_command);
  27. static const size_t pool_alignment = 8;
  28. static struct stmp3xxx_dma_user {
  29. void *pool;
  30. int inuse;
  31. const char *name;
  32. } channels[MAX_DMA_CHANNELS];
  33. static inline int dmach(int ch)
  34. {
  35. return ch % 16;
  36. }
  37. static inline int dmabus(int ch)
  38. {
  39. return ch / 16;
  40. }
  41. #define IS_VALID_CHANNEL(ch) ((ch) >= 0 && (ch) < MAX_DMA_CHANNELS)
  42. #define IS_USED(ch) (channels[ch].inuse)
  43. int stmp3xxx_dma_request(int ch, struct device *dev, const char *name)
  44. {
  45. struct stmp3xxx_dma_user *user;
  46. int err = 0;
  47. user = channels + ch;
  48. if (!IS_VALID_CHANNEL(ch)) {
  49. err = -ENODEV;
  50. goto out;
  51. }
  52. if (IS_USED(ch)) {
  53. err = -EBUSY;
  54. goto out;
  55. }
  56. /* Create a pool to allocate dma commands from */
  57. user->pool = dma_pool_create(name, dev, pool_item_size,
  58. pool_alignment, PAGE_SIZE);
  59. if (user->pool == NULL) {
  60. err = -ENOMEM;
  61. goto out;
  62. }
  63. user->name = name;
  64. user->inuse++;
  65. out:
  66. return err;
  67. }
  68. EXPORT_SYMBOL(stmp3xxx_dma_request);
  69. int stmp3xxx_dma_release(int ch)
  70. {
  71. struct stmp3xxx_dma_user *user = channels + ch;
  72. int err = 0;
  73. if (!IS_VALID_CHANNEL(ch)) {
  74. err = -ENODEV;
  75. goto out;
  76. }
  77. if (!IS_USED(ch)) {
  78. err = -EBUSY;
  79. goto out;
  80. }
  81. BUG_ON(user->pool == NULL);
  82. dma_pool_destroy(user->pool);
  83. user->inuse--;
  84. out:
  85. return err;
  86. }
  87. EXPORT_SYMBOL(stmp3xxx_dma_release);
  88. int stmp3xxx_dma_read_semaphore(int channel)
  89. {
  90. int sem = -1;
  91. switch (dmabus(channel)) {
  92. case STMP3XXX_BUS_APBH:
  93. sem =
  94. (HW_APBH_CHn_SEMA_RD(dmach(channel)) &
  95. BM_APBH_CHn_SEMA_PHORE) >> BP_APBH_CHn_SEMA_PHORE;
  96. break;
  97. case STMP3XXX_BUS_APBX:
  98. sem =
  99. (HW_APBX_CHn_SEMA_RD(dmach(channel)) &
  100. BM_APBX_CHn_SEMA_PHORE) >> BP_APBX_CHn_SEMA_PHORE;
  101. break;
  102. default:
  103. BUG();
  104. }
  105. return sem;
  106. }
  107. EXPORT_SYMBOL(stmp3xxx_dma_read_semaphore);
  108. int stmp3xxx_dma_allocate_command(int channel,
  109. struct stmp3xxx_dma_descriptor *descriptor)
  110. {
  111. struct stmp3xxx_dma_user *user = channels + channel;
  112. int err = 0;
  113. if (!IS_VALID_CHANNEL(channel)) {
  114. err = -ENODEV;
  115. goto out;
  116. }
  117. if (!IS_USED(channel)) {
  118. err = -EBUSY;
  119. goto out;
  120. }
  121. if (descriptor == NULL) {
  122. err = -EINVAL;
  123. goto out;
  124. }
  125. /* Allocate memory for a command from the buffer */
  126. descriptor->command =
  127. dma_pool_alloc(user->pool, GFP_KERNEL, &descriptor->handle);
  128. /* Check it worked */
  129. if (!descriptor->command) {
  130. err = -ENOMEM;
  131. goto out;
  132. }
  133. memset(descriptor->command, 0, pool_item_size);
  134. out:
  135. WARN_ON(err);
  136. return err;
  137. }
  138. EXPORT_SYMBOL(stmp3xxx_dma_allocate_command);
  139. int stmp3xxx_dma_free_command(int channel,
  140. struct stmp3xxx_dma_descriptor *descriptor)
  141. {
  142. int err = 0;
  143. if (!IS_VALID_CHANNEL(channel)) {
  144. err = -ENODEV;
  145. goto out;
  146. }
  147. if (!IS_USED(channel)) {
  148. err = -EBUSY;
  149. goto out;
  150. }
  151. /* Return the command memory to the pool */
  152. dma_pool_free(channels[channel].pool, descriptor->command,
  153. descriptor->handle);
  154. /* Initialise descriptor so we're not tempted to use it */
  155. descriptor->command = NULL;
  156. descriptor->handle = 0;
  157. descriptor->virtual_buf_ptr = NULL;
  158. descriptor->next_descr = NULL;
  159. WARN_ON(err);
  160. out:
  161. return err;
  162. }
  163. EXPORT_SYMBOL(stmp3xxx_dma_free_command);
  164. void stmp3xxx_dma_go(int channel,
  165. struct stmp3xxx_dma_descriptor *head, u32 semaphore)
  166. {
  167. int ch = dmach(channel);
  168. switch (dmabus(channel)) {
  169. case STMP3XXX_BUS_APBH:
  170. /* Set next command */
  171. HW_APBH_CHn_NXTCMDAR_WR(ch, head->handle);
  172. /* Set counting semaphore (kicks off transfer). Assumes
  173. peripheral has been set up correctly */
  174. HW_APBH_CHn_SEMA_WR(ch, semaphore);
  175. break;
  176. case STMP3XXX_BUS_APBX:
  177. /* Set next command */
  178. HW_APBX_CHn_NXTCMDAR_WR(ch, head->handle);
  179. /* Set counting semaphore (kicks off transfer). Assumes
  180. peripheral has been set up correctly */
  181. HW_APBX_CHn_SEMA_WR(ch, semaphore);
  182. break;
  183. }
  184. }
  185. EXPORT_SYMBOL(stmp3xxx_dma_go);
  186. int stmp3xxx_dma_running(int channel)
  187. {
  188. switch (dmabus(channel)) {
  189. case STMP3XXX_BUS_APBH:
  190. return HW_APBH_CHn_SEMA_RD(dmach(channel)) &
  191. BM_APBH_CHn_SEMA_PHORE;
  192. case STMP3XXX_BUS_APBX:
  193. return HW_APBX_CHn_SEMA_RD(dmach(channel)) &
  194. BM_APBX_CHn_SEMA_PHORE;
  195. default:
  196. BUG();
  197. return 0;
  198. }
  199. }
  200. EXPORT_SYMBOL(stmp3xxx_dma_running);
  201. /*
  202. * Circular dma chain management
  203. */
  204. void stmp3xxx_dma_free_chain(struct stmp37xx_circ_dma_chain *chain)
  205. {
  206. int i;
  207. for (i = 0; i < chain->total_count; i++)
  208. stmp3xxx_dma_free_command(
  209. STMP3xxx_DMA(chain->channel, chain->bus),
  210. &chain->chain[i]);
  211. }
  212. EXPORT_SYMBOL(stmp3xxx_dma_free_chain);
  213. int stmp3xxx_dma_make_chain(int ch, struct stmp37xx_circ_dma_chain *chain,
  214. struct stmp3xxx_dma_descriptor descriptors[],
  215. unsigned items)
  216. {
  217. int i;
  218. int err = 0;
  219. if (items == 0)
  220. return err;
  221. for (i = 0; i < items; i++) {
  222. err = stmp3xxx_dma_allocate_command(ch, &descriptors[i]);
  223. if (err) {
  224. WARN_ON(err);
  225. /*
  226. * Couldn't allocate the whole chain.
  227. * deallocate what has been allocated
  228. */
  229. if (i) {
  230. do {
  231. stmp3xxx_dma_free_command(ch,
  232. &descriptors
  233. [i]);
  234. } while (i-- >= 0);
  235. }
  236. return err;
  237. }
  238. /* link them! */
  239. if (i > 0) {
  240. descriptors[i - 1].next_descr = &descriptors[i];
  241. descriptors[i - 1].command->next =
  242. descriptors[i].handle;
  243. }
  244. }
  245. /* make list circular */
  246. descriptors[items - 1].next_descr = &descriptors[0];
  247. descriptors[items - 1].command->next = descriptors[0].handle;
  248. chain->total_count = items;
  249. chain->chain = descriptors;
  250. chain->free_index = 0;
  251. chain->active_index = 0;
  252. chain->cooked_index = 0;
  253. chain->free_count = items;
  254. chain->active_count = 0;
  255. chain->cooked_count = 0;
  256. chain->bus = dmabus(ch);
  257. chain->channel = dmach(ch);
  258. return err;
  259. }
  260. EXPORT_SYMBOL(stmp3xxx_dma_make_chain);
  261. void stmp37xx_circ_clear_chain(struct stmp37xx_circ_dma_chain *chain)
  262. {
  263. BUG_ON(stmp3xxx_dma_running(STMP3xxx_DMA(chain->channel, chain->bus)) >
  264. 0);
  265. chain->free_index = 0;
  266. chain->active_index = 0;
  267. chain->cooked_index = 0;
  268. chain->free_count = chain->total_count;
  269. chain->active_count = 0;
  270. chain->cooked_count = 0;
  271. }
  272. EXPORT_SYMBOL(stmp37xx_circ_clear_chain);
  273. void stmp37xx_circ_advance_free(struct stmp37xx_circ_dma_chain *chain,
  274. unsigned count)
  275. {
  276. BUG_ON(chain->cooked_count < count);
  277. chain->cooked_count -= count;
  278. chain->cooked_index += count;
  279. chain->cooked_index %= chain->total_count;
  280. chain->free_count += count;
  281. }
  282. EXPORT_SYMBOL(stmp37xx_circ_advance_free);
  283. void stmp37xx_circ_advance_active(struct stmp37xx_circ_dma_chain *chain,
  284. unsigned count)
  285. {
  286. BUG_ON(chain->free_count < count);
  287. chain->free_count -= count;
  288. chain->free_index += count;
  289. chain->free_index %= chain->total_count;
  290. chain->active_count += count;
  291. switch (chain->bus) {
  292. case STMP3XXX_BUS_APBH:
  293. /* Set counting semaphore (kicks off transfer). Assumes
  294. peripheral has been set up correctly */
  295. HW_APBH_CHn_SEMA_CLR(chain->channel,
  296. BM_APBH_CHn_SEMA_INCREMENT_SEMA);
  297. HW_APBH_CHn_SEMA_SET(chain->channel,
  298. BF_APBH_CHn_SEMA_INCREMENT_SEMA(count));
  299. break;
  300. case STMP3XXX_BUS_APBX:
  301. /* Set counting semaphore (kicks off transfer). Assumes
  302. peripheral has been set up correctly */
  303. HW_APBX_CHn_SEMA_CLR(chain->channel,
  304. BM_APBX_CHn_SEMA_INCREMENT_SEMA);
  305. HW_APBX_CHn_SEMA_SET(chain->channel,
  306. BF_APBX_CHn_SEMA_INCREMENT_SEMA(count));
  307. break;
  308. default:
  309. BUG();
  310. }
  311. }
  312. EXPORT_SYMBOL(stmp37xx_circ_advance_active);
  313. unsigned stmp37xx_circ_advance_cooked(struct stmp37xx_circ_dma_chain *chain)
  314. {
  315. unsigned cooked;
  316. cooked = chain->active_count -
  317. stmp3xxx_dma_read_semaphore(STMP3xxx_DMA(chain->channel, chain->bus));
  318. chain->active_count -= cooked;
  319. chain->active_index += cooked;
  320. chain->active_index %= chain->total_count;
  321. chain->cooked_count += cooked;
  322. return cooked;
  323. }
  324. EXPORT_SYMBOL(stmp37xx_circ_advance_cooked);
  325. void stmp3xxx_dma_set_alt_target(int channel, int function)
  326. {
  327. #if defined(CONFIG_ARCH_STMP37XX)
  328. unsigned bits = 4;
  329. #elif defined(CONFIG_ARCH_STMP378X)
  330. unsigned bits = 2;
  331. #else
  332. #error wrong arch
  333. #endif
  334. int shift = dmach(channel) * bits;
  335. unsigned mask = (1<<bits) - 1;
  336. BUG_ON(function < 0 || function >= (1<<bits));
  337. pr_debug("%s: channel = %d, using mask %x, "
  338. "shift = %d\n", __func__, channel, mask, shift);
  339. switch (dmabus(channel)) {
  340. case STMP3XXX_BUS_APBH:
  341. HW_APBH_DEVSEL_CLR(mask<<shift);
  342. HW_APBH_DEVSEL_SET(function<<shift);
  343. break;
  344. case STMP3XXX_BUS_APBX:
  345. HW_APBX_DEVSEL_CLR(mask<<shift);
  346. HW_APBX_DEVSEL_SET(function<<shift);
  347. break;
  348. default:
  349. BUG();
  350. }
  351. }
  352. EXPORT_SYMBOL(stmp3xxx_dma_set_alt_target);
  353. void stmp3xxx_dma_suspend(void)
  354. {
  355. HW_APBH_CTRL0_SET(BM_APBH_CTRL0_CLKGATE);
  356. HW_APBX_CTRL0_SET(BM_APBX_CTRL0_CLKGATE);
  357. }
  358. void stmp3xxx_dma_resume(void)
  359. {
  360. HW_APBH_CTRL0_CLR(BM_APBH_CTRL0_CLKGATE | BM_APBH_CTRL0_SFTRST);
  361. HW_APBX_CTRL0_CLR(BM_APBX_CTRL0_CLKGATE | BM_APBX_CTRL0_SFTRST);
  362. }
  363. #ifdef CONFIG_CPU_FREQ
  364. struct dma_notifier_block {
  365. struct notifier_block nb;
  366. void *data;
  367. };
  368. static int dma_cpufreq_notifier(struct notifier_block *self,
  369. unsigned long phase, void *p)
  370. {
  371. switch (phase) {
  372. case CPUFREQ_POSTCHANGE:
  373. stmp3xxx_dma_resume();
  374. break;
  375. case CPUFREQ_PRECHANGE:
  376. stmp3xxx_dma_suspend();
  377. break;
  378. default:
  379. break;
  380. }
  381. return NOTIFY_DONE;
  382. }
  383. static struct dma_notifier_block dma_cpufreq_nb = {
  384. .nb = {
  385. .notifier_call = dma_cpufreq_notifier,
  386. },
  387. };
  388. #endif /* CONFIG_CPU_FREQ */
  389. void __init stmp3xxx_dma_init(void)
  390. {
  391. HW_APBH_CTRL0_CLR(BM_APBH_CTRL0_CLKGATE | BM_APBH_CTRL0_SFTRST);
  392. HW_APBX_CTRL0_CLR(BM_APBX_CTRL0_CLKGATE | BM_APBX_CTRL0_SFTRST);
  393. #ifdef CONFIG_CPU_FREQ
  394. cpufreq_register_notifier(&dma_cpufreq_nb.nb,
  395. CPUFREQ_TRANSITION_NOTIFIER);
  396. #endif /* CONFIG_CPU_FREQ */
  397. }