budget-ci.c 32 KB

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  1. /*
  2. * budget-ci.c: driver for the SAA7146 based Budget DVB cards
  3. *
  4. * Compiled from various sources by Michael Hunold <michael@mihu.de>
  5. *
  6. * msp430 IR support contributed by Jack Thomasson <jkt@Helius.COM>
  7. * partially based on the Siemens DVB driver by Ralph+Marcus Metzler
  8. *
  9. * CI interface support (c) 2004 Andrew de Quincey <adq_dvb@lidskialf.net>
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * as published by the Free Software Foundation; either version 2
  14. * of the License, or (at your option) any later version.
  15. *
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  26. * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
  27. *
  28. *
  29. * the project's page is at http://www.linuxtv.org/dvb/
  30. */
  31. #include "budget.h"
  32. #include <linux/module.h>
  33. #include <linux/errno.h>
  34. #include <linux/slab.h>
  35. #include <linux/interrupt.h>
  36. #include <linux/input.h>
  37. #include <linux/spinlock.h>
  38. #include "dvb_ca_en50221.h"
  39. #include "stv0299.h"
  40. #include "stv0297.h"
  41. #include "tda1004x.h"
  42. #include "lnbp21.h"
  43. #include "bsbe1.h"
  44. #include "bsru6.h"
  45. /*
  46. * Regarding DEBIADDR_IR:
  47. * Some CI modules hang if random addresses are read.
  48. * Using address 0x4000 for the IR read means that we
  49. * use the same address as for CI version, which should
  50. * be a safe default.
  51. */
  52. #define DEBIADDR_IR 0x4000
  53. #define DEBIADDR_CICONTROL 0x0000
  54. #define DEBIADDR_CIVERSION 0x4000
  55. #define DEBIADDR_IO 0x1000
  56. #define DEBIADDR_ATTR 0x3000
  57. #define CICONTROL_RESET 0x01
  58. #define CICONTROL_ENABLETS 0x02
  59. #define CICONTROL_CAMDETECT 0x08
  60. #define DEBICICTL 0x00420000
  61. #define DEBICICAM 0x02420000
  62. #define SLOTSTATUS_NONE 1
  63. #define SLOTSTATUS_PRESENT 2
  64. #define SLOTSTATUS_RESET 4
  65. #define SLOTSTATUS_READY 8
  66. #define SLOTSTATUS_OCCUPIED (SLOTSTATUS_PRESENT|SLOTSTATUS_RESET|SLOTSTATUS_READY)
  67. struct budget_ci_ir {
  68. struct input_dev *dev;
  69. struct tasklet_struct msp430_irq_tasklet;
  70. char name[72]; /* 40 + 32 for (struct saa7146_dev).name */
  71. char phys[32];
  72. };
  73. struct budget_ci {
  74. struct budget budget;
  75. struct tasklet_struct ciintf_irq_tasklet;
  76. int slot_status;
  77. int ci_irq;
  78. struct dvb_ca_en50221 ca;
  79. struct budget_ci_ir ir;
  80. u8 tuner_pll_address; /* used for philips_tdm1316l configs */
  81. };
  82. /* from reading the following remotes:
  83. Zenith Universal 7 / TV Mode 807 / VCR Mode 837
  84. Hauppauge (from NOVA-CI-s box product)
  85. i've taken a "middle of the road" approach and note the differences
  86. */
  87. static u16 key_map[64] = {
  88. /* 0x0X */
  89. KEY_0, KEY_1, KEY_2, KEY_3, KEY_4, KEY_5, KEY_6, KEY_7, KEY_8,
  90. KEY_9,
  91. KEY_ENTER,
  92. KEY_RED,
  93. KEY_POWER, /* RADIO on Hauppauge */
  94. KEY_MUTE,
  95. 0,
  96. KEY_A, /* TV on Hauppauge */
  97. /* 0x1X */
  98. KEY_VOLUMEUP, KEY_VOLUMEDOWN,
  99. 0, 0,
  100. KEY_B,
  101. 0, 0, 0, 0, 0, 0, 0,
  102. KEY_UP, KEY_DOWN,
  103. KEY_OPTION, /* RESERVED on Hauppauge */
  104. KEY_BREAK,
  105. /* 0x2X */
  106. KEY_CHANNELUP, KEY_CHANNELDOWN,
  107. KEY_PREVIOUS, /* Prev. Ch on Zenith, SOURCE on Hauppauge */
  108. 0, KEY_RESTART, KEY_OK,
  109. KEY_CYCLEWINDOWS, /* MINIMIZE on Hauppauge */
  110. 0,
  111. KEY_ENTER, /* VCR mode on Zenith */
  112. KEY_PAUSE,
  113. 0,
  114. KEY_RIGHT, KEY_LEFT,
  115. 0,
  116. KEY_MENU, /* FULL SCREEN on Hauppauge */
  117. 0,
  118. /* 0x3X */
  119. KEY_SLOW,
  120. KEY_PREVIOUS, /* VCR mode on Zenith */
  121. KEY_REWIND,
  122. 0,
  123. KEY_FASTFORWARD,
  124. KEY_PLAY, KEY_STOP,
  125. KEY_RECORD,
  126. KEY_TUNER, /* TV/VCR on Zenith */
  127. 0,
  128. KEY_C,
  129. 0,
  130. KEY_EXIT,
  131. KEY_POWER2,
  132. KEY_TUNER, /* VCR mode on Zenith */
  133. 0,
  134. };
  135. static void msp430_ir_debounce(unsigned long data)
  136. {
  137. struct input_dev *dev = (struct input_dev *) data;
  138. if (dev->rep[0] == 0 || dev->rep[0] == ~0) {
  139. input_event(dev, EV_KEY, key_map[dev->repeat_key], 0);
  140. } else {
  141. dev->rep[0] = 0;
  142. dev->timer.expires = jiffies + HZ * 350 / 1000;
  143. add_timer(&dev->timer);
  144. input_event(dev, EV_KEY, key_map[dev->repeat_key], 2); /* REPEAT */
  145. }
  146. input_sync(dev);
  147. }
  148. static void msp430_ir_interrupt(unsigned long data)
  149. {
  150. struct budget_ci *budget_ci = (struct budget_ci *) data;
  151. struct input_dev *dev = budget_ci->ir.dev;
  152. unsigned int code =
  153. ttpci_budget_debiread(&budget_ci->budget, DEBINOSWAP, DEBIADDR_IR, 2, 1, 0) >> 8;
  154. if (code & 0x40) {
  155. code &= 0x3f;
  156. if (timer_pending(&dev->timer)) {
  157. if (code == dev->repeat_key) {
  158. ++dev->rep[0];
  159. return;
  160. }
  161. del_timer(&dev->timer);
  162. input_event(dev, EV_KEY, key_map[dev->repeat_key], 0);
  163. }
  164. if (!key_map[code]) {
  165. printk("DVB (%s): no key for %02x!\n", __FUNCTION__, code);
  166. return;
  167. }
  168. input_event(dev, EV_KEY, key_map[code], 1);
  169. input_sync(dev);
  170. /* initialize debounce and repeat */
  171. dev->repeat_key = code;
  172. /* Zenith remote _always_ sends 2 sequences */
  173. dev->rep[0] = ~0;
  174. mod_timer(&dev->timer, jiffies + msecs_to_jiffies(350));
  175. }
  176. }
  177. static int msp430_ir_init(struct budget_ci *budget_ci)
  178. {
  179. struct saa7146_dev *saa = budget_ci->budget.dev;
  180. struct input_dev *input_dev = budget_ci->ir.dev;
  181. int i;
  182. int err;
  183. budget_ci->ir.dev = input_dev = input_allocate_device();
  184. if (!input_dev)
  185. return -ENOMEM;
  186. snprintf(budget_ci->ir.name, sizeof(budget_ci->ir.name),
  187. "Budget-CI dvb ir receiver %s", saa->name);
  188. snprintf(budget_ci->ir.phys, sizeof(budget_ci->ir.phys),
  189. "pci-%s/ir0", pci_name(saa->pci));
  190. input_dev->name = budget_ci->ir.name;
  191. input_dev->phys = budget_ci->ir.phys;
  192. input_dev->id.bustype = BUS_PCI;
  193. input_dev->id.version = 1;
  194. if (saa->pci->subsystem_vendor) {
  195. input_dev->id.vendor = saa->pci->subsystem_vendor;
  196. input_dev->id.product = saa->pci->subsystem_device;
  197. } else {
  198. input_dev->id.vendor = saa->pci->vendor;
  199. input_dev->id.product = saa->pci->device;
  200. }
  201. # if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,15)
  202. input_dev->cdev.dev = &saa->pci->dev;
  203. # else
  204. input_dev->dev = &saa->pci->dev;
  205. # endif
  206. set_bit(EV_KEY, input_dev->evbit);
  207. for (i = 0; i < ARRAY_SIZE(key_map); i++)
  208. if (key_map[i])
  209. set_bit(key_map[i], input_dev->keybit);
  210. err = input_register_device(input_dev);
  211. if (err) {
  212. input_free_device(input_dev);
  213. return err;
  214. }
  215. input_register_device(budget_ci->ir.dev);
  216. input_dev->timer.function = msp430_ir_debounce;
  217. saa7146_write(saa, IER, saa7146_read(saa, IER) | MASK_06);
  218. saa7146_setgpio(saa, 3, SAA7146_GPIO_IRQHI);
  219. return 0;
  220. }
  221. static void msp430_ir_deinit(struct budget_ci *budget_ci)
  222. {
  223. struct saa7146_dev *saa = budget_ci->budget.dev;
  224. struct input_dev *dev = budget_ci->ir.dev;
  225. saa7146_write(saa, IER, saa7146_read(saa, IER) & ~MASK_06);
  226. saa7146_setgpio(saa, 3, SAA7146_GPIO_INPUT);
  227. if (del_timer(&dev->timer)) {
  228. input_event(dev, EV_KEY, key_map[dev->repeat_key], 0);
  229. input_sync(dev);
  230. }
  231. input_unregister_device(dev);
  232. }
  233. static int ciintf_read_attribute_mem(struct dvb_ca_en50221 *ca, int slot, int address)
  234. {
  235. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  236. if (slot != 0)
  237. return -EINVAL;
  238. return ttpci_budget_debiread(&budget_ci->budget, DEBICICAM,
  239. DEBIADDR_ATTR | (address & 0xfff), 1, 1, 0);
  240. }
  241. static int ciintf_write_attribute_mem(struct dvb_ca_en50221 *ca, int slot, int address, u8 value)
  242. {
  243. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  244. if (slot != 0)
  245. return -EINVAL;
  246. return ttpci_budget_debiwrite(&budget_ci->budget, DEBICICAM,
  247. DEBIADDR_ATTR | (address & 0xfff), 1, value, 1, 0);
  248. }
  249. static int ciintf_read_cam_control(struct dvb_ca_en50221 *ca, int slot, u8 address)
  250. {
  251. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  252. if (slot != 0)
  253. return -EINVAL;
  254. return ttpci_budget_debiread(&budget_ci->budget, DEBICICAM,
  255. DEBIADDR_IO | (address & 3), 1, 1, 0);
  256. }
  257. static int ciintf_write_cam_control(struct dvb_ca_en50221 *ca, int slot, u8 address, u8 value)
  258. {
  259. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  260. if (slot != 0)
  261. return -EINVAL;
  262. return ttpci_budget_debiwrite(&budget_ci->budget, DEBICICAM,
  263. DEBIADDR_IO | (address & 3), 1, value, 1, 0);
  264. }
  265. static int ciintf_slot_reset(struct dvb_ca_en50221 *ca, int slot)
  266. {
  267. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  268. struct saa7146_dev *saa = budget_ci->budget.dev;
  269. if (slot != 0)
  270. return -EINVAL;
  271. if (budget_ci->ci_irq) {
  272. // trigger on RISING edge during reset so we know when READY is re-asserted
  273. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQHI);
  274. }
  275. budget_ci->slot_status = SLOTSTATUS_RESET;
  276. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 0, 1, 0);
  277. msleep(1);
  278. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1,
  279. CICONTROL_RESET, 1, 0);
  280. saa7146_setgpio(saa, 1, SAA7146_GPIO_OUTHI);
  281. ttpci_budget_set_video_port(saa, BUDGET_VIDEO_PORTB);
  282. return 0;
  283. }
  284. static int ciintf_slot_shutdown(struct dvb_ca_en50221 *ca, int slot)
  285. {
  286. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  287. struct saa7146_dev *saa = budget_ci->budget.dev;
  288. if (slot != 0)
  289. return -EINVAL;
  290. saa7146_setgpio(saa, 1, SAA7146_GPIO_OUTHI);
  291. ttpci_budget_set_video_port(saa, BUDGET_VIDEO_PORTB);
  292. return 0;
  293. }
  294. static int ciintf_slot_ts_enable(struct dvb_ca_en50221 *ca, int slot)
  295. {
  296. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  297. struct saa7146_dev *saa = budget_ci->budget.dev;
  298. int tmp;
  299. if (slot != 0)
  300. return -EINVAL;
  301. saa7146_setgpio(saa, 1, SAA7146_GPIO_OUTLO);
  302. tmp = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0);
  303. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1,
  304. tmp | CICONTROL_ENABLETS, 1, 0);
  305. ttpci_budget_set_video_port(saa, BUDGET_VIDEO_PORTA);
  306. return 0;
  307. }
  308. static void ciintf_interrupt(unsigned long data)
  309. {
  310. struct budget_ci *budget_ci = (struct budget_ci *) data;
  311. struct saa7146_dev *saa = budget_ci->budget.dev;
  312. unsigned int flags;
  313. // ensure we don't get spurious IRQs during initialisation
  314. if (!budget_ci->budget.ci_present)
  315. return;
  316. // read the CAM status
  317. flags = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0);
  318. if (flags & CICONTROL_CAMDETECT) {
  319. // GPIO should be set to trigger on falling edge if a CAM is present
  320. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQLO);
  321. if (budget_ci->slot_status & SLOTSTATUS_NONE) {
  322. // CAM insertion IRQ
  323. budget_ci->slot_status = SLOTSTATUS_PRESENT;
  324. dvb_ca_en50221_camchange_irq(&budget_ci->ca, 0,
  325. DVB_CA_EN50221_CAMCHANGE_INSERTED);
  326. } else if (budget_ci->slot_status & SLOTSTATUS_RESET) {
  327. // CAM ready (reset completed)
  328. budget_ci->slot_status = SLOTSTATUS_READY;
  329. dvb_ca_en50221_camready_irq(&budget_ci->ca, 0);
  330. } else if (budget_ci->slot_status & SLOTSTATUS_READY) {
  331. // FR/DA IRQ
  332. dvb_ca_en50221_frda_irq(&budget_ci->ca, 0);
  333. }
  334. } else {
  335. // trigger on rising edge if a CAM is not present - when a CAM is inserted, we
  336. // only want to get the IRQ when it sets READY. If we trigger on the falling edge,
  337. // the CAM might not actually be ready yet.
  338. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQHI);
  339. // generate a CAM removal IRQ if we haven't already
  340. if (budget_ci->slot_status & SLOTSTATUS_OCCUPIED) {
  341. // CAM removal IRQ
  342. budget_ci->slot_status = SLOTSTATUS_NONE;
  343. dvb_ca_en50221_camchange_irq(&budget_ci->ca, 0,
  344. DVB_CA_EN50221_CAMCHANGE_REMOVED);
  345. }
  346. }
  347. }
  348. static int ciintf_poll_slot_status(struct dvb_ca_en50221 *ca, int slot, int open)
  349. {
  350. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  351. unsigned int flags;
  352. // ensure we don't get spurious IRQs during initialisation
  353. if (!budget_ci->budget.ci_present)
  354. return -EINVAL;
  355. // read the CAM status
  356. flags = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0);
  357. if (flags & CICONTROL_CAMDETECT) {
  358. // mark it as present if it wasn't before
  359. if (budget_ci->slot_status & SLOTSTATUS_NONE) {
  360. budget_ci->slot_status = SLOTSTATUS_PRESENT;
  361. }
  362. // during a RESET, we check if we can read from IO memory to see when CAM is ready
  363. if (budget_ci->slot_status & SLOTSTATUS_RESET) {
  364. if (ciintf_read_attribute_mem(ca, slot, 0) == 0x1d) {
  365. budget_ci->slot_status = SLOTSTATUS_READY;
  366. }
  367. }
  368. } else {
  369. budget_ci->slot_status = SLOTSTATUS_NONE;
  370. }
  371. if (budget_ci->slot_status != SLOTSTATUS_NONE) {
  372. if (budget_ci->slot_status & SLOTSTATUS_READY) {
  373. return DVB_CA_EN50221_POLL_CAM_PRESENT | DVB_CA_EN50221_POLL_CAM_READY;
  374. }
  375. return DVB_CA_EN50221_POLL_CAM_PRESENT;
  376. }
  377. return 0;
  378. }
  379. static int ciintf_init(struct budget_ci *budget_ci)
  380. {
  381. struct saa7146_dev *saa = budget_ci->budget.dev;
  382. int flags;
  383. int result;
  384. int ci_version;
  385. int ca_flags;
  386. memset(&budget_ci->ca, 0, sizeof(struct dvb_ca_en50221));
  387. // enable DEBI pins
  388. saa7146_write(saa, MC1, saa7146_read(saa, MC1) | (0x800 << 16) | 0x800);
  389. // test if it is there
  390. ci_version = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CIVERSION, 1, 1, 0);
  391. if ((ci_version & 0xa0) != 0xa0) {
  392. result = -ENODEV;
  393. goto error;
  394. }
  395. // determine whether a CAM is present or not
  396. flags = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0);
  397. budget_ci->slot_status = SLOTSTATUS_NONE;
  398. if (flags & CICONTROL_CAMDETECT)
  399. budget_ci->slot_status = SLOTSTATUS_PRESENT;
  400. // version 0xa2 of the CI firmware doesn't generate interrupts
  401. if (ci_version == 0xa2) {
  402. ca_flags = 0;
  403. budget_ci->ci_irq = 0;
  404. } else {
  405. ca_flags = DVB_CA_EN50221_FLAG_IRQ_CAMCHANGE |
  406. DVB_CA_EN50221_FLAG_IRQ_FR |
  407. DVB_CA_EN50221_FLAG_IRQ_DA;
  408. budget_ci->ci_irq = 1;
  409. }
  410. // register CI interface
  411. budget_ci->ca.owner = THIS_MODULE;
  412. budget_ci->ca.read_attribute_mem = ciintf_read_attribute_mem;
  413. budget_ci->ca.write_attribute_mem = ciintf_write_attribute_mem;
  414. budget_ci->ca.read_cam_control = ciintf_read_cam_control;
  415. budget_ci->ca.write_cam_control = ciintf_write_cam_control;
  416. budget_ci->ca.slot_reset = ciintf_slot_reset;
  417. budget_ci->ca.slot_shutdown = ciintf_slot_shutdown;
  418. budget_ci->ca.slot_ts_enable = ciintf_slot_ts_enable;
  419. budget_ci->ca.poll_slot_status = ciintf_poll_slot_status;
  420. budget_ci->ca.data = budget_ci;
  421. if ((result = dvb_ca_en50221_init(&budget_ci->budget.dvb_adapter,
  422. &budget_ci->ca,
  423. ca_flags, 1)) != 0) {
  424. printk("budget_ci: CI interface detected, but initialisation failed.\n");
  425. goto error;
  426. }
  427. // Setup CI slot IRQ
  428. if (budget_ci->ci_irq) {
  429. tasklet_init(&budget_ci->ciintf_irq_tasklet, ciintf_interrupt, (unsigned long) budget_ci);
  430. if (budget_ci->slot_status != SLOTSTATUS_NONE) {
  431. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQLO);
  432. } else {
  433. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQHI);
  434. }
  435. saa7146_write(saa, IER, saa7146_read(saa, IER) | MASK_03);
  436. }
  437. // enable interface
  438. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1,
  439. CICONTROL_RESET, 1, 0);
  440. // success!
  441. printk("budget_ci: CI interface initialised\n");
  442. budget_ci->budget.ci_present = 1;
  443. // forge a fake CI IRQ so the CAM state is setup correctly
  444. if (budget_ci->ci_irq) {
  445. flags = DVB_CA_EN50221_CAMCHANGE_REMOVED;
  446. if (budget_ci->slot_status != SLOTSTATUS_NONE)
  447. flags = DVB_CA_EN50221_CAMCHANGE_INSERTED;
  448. dvb_ca_en50221_camchange_irq(&budget_ci->ca, 0, flags);
  449. }
  450. return 0;
  451. error:
  452. saa7146_write(saa, MC1, saa7146_read(saa, MC1) | (0x800 << 16));
  453. return result;
  454. }
  455. static void ciintf_deinit(struct budget_ci *budget_ci)
  456. {
  457. struct saa7146_dev *saa = budget_ci->budget.dev;
  458. // disable CI interrupts
  459. if (budget_ci->ci_irq) {
  460. saa7146_write(saa, IER, saa7146_read(saa, IER) & ~MASK_03);
  461. saa7146_setgpio(saa, 0, SAA7146_GPIO_INPUT);
  462. tasklet_kill(&budget_ci->ciintf_irq_tasklet);
  463. }
  464. // reset interface
  465. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 0, 1, 0);
  466. msleep(1);
  467. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1,
  468. CICONTROL_RESET, 1, 0);
  469. // disable TS data stream to CI interface
  470. saa7146_setgpio(saa, 1, SAA7146_GPIO_INPUT);
  471. // release the CA device
  472. dvb_ca_en50221_release(&budget_ci->ca);
  473. // disable DEBI pins
  474. saa7146_write(saa, MC1, saa7146_read(saa, MC1) | (0x800 << 16));
  475. }
  476. static void budget_ci_irq(struct saa7146_dev *dev, u32 * isr)
  477. {
  478. struct budget_ci *budget_ci = (struct budget_ci *) dev->ext_priv;
  479. dprintk(8, "dev: %p, budget_ci: %p\n", dev, budget_ci);
  480. if (*isr & MASK_06)
  481. tasklet_schedule(&budget_ci->ir.msp430_irq_tasklet);
  482. if (*isr & MASK_10)
  483. ttpci_budget_irq10_handler(dev, isr);
  484. if ((*isr & MASK_03) && (budget_ci->budget.ci_present) && (budget_ci->ci_irq))
  485. tasklet_schedule(&budget_ci->ciintf_irq_tasklet);
  486. }
  487. static u8 philips_su1278_tt_inittab[] = {
  488. 0x01, 0x0f,
  489. 0x02, 0x30,
  490. 0x03, 0x00,
  491. 0x04, 0x5b,
  492. 0x05, 0x85,
  493. 0x06, 0x02,
  494. 0x07, 0x00,
  495. 0x08, 0x02,
  496. 0x09, 0x00,
  497. 0x0C, 0x01,
  498. 0x0D, 0x81,
  499. 0x0E, 0x44,
  500. 0x0f, 0x14,
  501. 0x10, 0x3c,
  502. 0x11, 0x84,
  503. 0x12, 0xda,
  504. 0x13, 0x97,
  505. 0x14, 0x95,
  506. 0x15, 0xc9,
  507. 0x16, 0x19,
  508. 0x17, 0x8c,
  509. 0x18, 0x59,
  510. 0x19, 0xf8,
  511. 0x1a, 0xfe,
  512. 0x1c, 0x7f,
  513. 0x1d, 0x00,
  514. 0x1e, 0x00,
  515. 0x1f, 0x50,
  516. 0x20, 0x00,
  517. 0x21, 0x00,
  518. 0x22, 0x00,
  519. 0x23, 0x00,
  520. 0x28, 0x00,
  521. 0x29, 0x28,
  522. 0x2a, 0x14,
  523. 0x2b, 0x0f,
  524. 0x2c, 0x09,
  525. 0x2d, 0x09,
  526. 0x31, 0x1f,
  527. 0x32, 0x19,
  528. 0x33, 0xfc,
  529. 0x34, 0x93,
  530. 0xff, 0xff
  531. };
  532. static int philips_su1278_tt_set_symbol_rate(struct dvb_frontend *fe, u32 srate, u32 ratio)
  533. {
  534. stv0299_writereg(fe, 0x0e, 0x44);
  535. if (srate >= 10000000) {
  536. stv0299_writereg(fe, 0x13, 0x97);
  537. stv0299_writereg(fe, 0x14, 0x95);
  538. stv0299_writereg(fe, 0x15, 0xc9);
  539. stv0299_writereg(fe, 0x17, 0x8c);
  540. stv0299_writereg(fe, 0x1a, 0xfe);
  541. stv0299_writereg(fe, 0x1c, 0x7f);
  542. stv0299_writereg(fe, 0x2d, 0x09);
  543. } else {
  544. stv0299_writereg(fe, 0x13, 0x99);
  545. stv0299_writereg(fe, 0x14, 0x8d);
  546. stv0299_writereg(fe, 0x15, 0xce);
  547. stv0299_writereg(fe, 0x17, 0x43);
  548. stv0299_writereg(fe, 0x1a, 0x1d);
  549. stv0299_writereg(fe, 0x1c, 0x12);
  550. stv0299_writereg(fe, 0x2d, 0x05);
  551. }
  552. stv0299_writereg(fe, 0x0e, 0x23);
  553. stv0299_writereg(fe, 0x0f, 0x94);
  554. stv0299_writereg(fe, 0x10, 0x39);
  555. stv0299_writereg(fe, 0x15, 0xc9);
  556. stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
  557. stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
  558. stv0299_writereg(fe, 0x21, (ratio) & 0xf0);
  559. return 0;
  560. }
  561. static int philips_su1278_tt_tuner_set_params(struct dvb_frontend *fe,
  562. struct dvb_frontend_parameters *params)
  563. {
  564. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  565. u32 div;
  566. u8 buf[4];
  567. struct i2c_msg msg = {.addr = 0x60,.flags = 0,.buf = buf,.len = sizeof(buf) };
  568. if ((params->frequency < 950000) || (params->frequency > 2150000))
  569. return -EINVAL;
  570. div = (params->frequency + (500 - 1)) / 500; // round correctly
  571. buf[0] = (div >> 8) & 0x7f;
  572. buf[1] = div & 0xff;
  573. buf[2] = 0x80 | ((div & 0x18000) >> 10) | 2;
  574. buf[3] = 0x20;
  575. if (params->u.qpsk.symbol_rate < 4000000)
  576. buf[3] |= 1;
  577. if (params->frequency < 1250000)
  578. buf[3] |= 0;
  579. else if (params->frequency < 1550000)
  580. buf[3] |= 0x40;
  581. else if (params->frequency < 2050000)
  582. buf[3] |= 0x80;
  583. else if (params->frequency < 2150000)
  584. buf[3] |= 0xC0;
  585. if (fe->ops.i2c_gate_ctrl)
  586. fe->ops.i2c_gate_ctrl(fe, 1);
  587. if (i2c_transfer(&budget_ci->budget.i2c_adap, &msg, 1) != 1)
  588. return -EIO;
  589. return 0;
  590. }
  591. static struct stv0299_config philips_su1278_tt_config = {
  592. .demod_address = 0x68,
  593. .inittab = philips_su1278_tt_inittab,
  594. .mclk = 64000000UL,
  595. .invert = 0,
  596. .skip_reinit = 1,
  597. .lock_output = STV0229_LOCKOUTPUT_1,
  598. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  599. .min_delay_ms = 50,
  600. .set_symbol_rate = philips_su1278_tt_set_symbol_rate,
  601. };
  602. static int philips_tdm1316l_tuner_init(struct dvb_frontend *fe)
  603. {
  604. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  605. static u8 td1316_init[] = { 0x0b, 0xf5, 0x85, 0xab };
  606. static u8 disable_mc44BC374c[] = { 0x1d, 0x74, 0xa0, 0x68 };
  607. struct i2c_msg tuner_msg = {.addr = budget_ci->tuner_pll_address,.flags = 0,.buf = td1316_init,.len =
  608. sizeof(td1316_init) };
  609. // setup PLL configuration
  610. if (fe->ops.i2c_gate_ctrl)
  611. fe->ops.i2c_gate_ctrl(fe, 1);
  612. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1)
  613. return -EIO;
  614. msleep(1);
  615. // disable the mc44BC374c (do not check for errors)
  616. tuner_msg.addr = 0x65;
  617. tuner_msg.buf = disable_mc44BC374c;
  618. tuner_msg.len = sizeof(disable_mc44BC374c);
  619. if (fe->ops.i2c_gate_ctrl)
  620. fe->ops.i2c_gate_ctrl(fe, 1);
  621. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1) {
  622. if (fe->ops.i2c_gate_ctrl)
  623. fe->ops.i2c_gate_ctrl(fe, 1);
  624. i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1);
  625. }
  626. return 0;
  627. }
  628. static int philips_tdm1316l_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  629. {
  630. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  631. u8 tuner_buf[4];
  632. struct i2c_msg tuner_msg = {.addr = budget_ci->tuner_pll_address,.flags = 0,.buf = tuner_buf,.len = sizeof(tuner_buf) };
  633. int tuner_frequency = 0;
  634. u8 band, cp, filter;
  635. // determine charge pump
  636. tuner_frequency = params->frequency + 36130000;
  637. if (tuner_frequency < 87000000)
  638. return -EINVAL;
  639. else if (tuner_frequency < 130000000)
  640. cp = 3;
  641. else if (tuner_frequency < 160000000)
  642. cp = 5;
  643. else if (tuner_frequency < 200000000)
  644. cp = 6;
  645. else if (tuner_frequency < 290000000)
  646. cp = 3;
  647. else if (tuner_frequency < 420000000)
  648. cp = 5;
  649. else if (tuner_frequency < 480000000)
  650. cp = 6;
  651. else if (tuner_frequency < 620000000)
  652. cp = 3;
  653. else if (tuner_frequency < 830000000)
  654. cp = 5;
  655. else if (tuner_frequency < 895000000)
  656. cp = 7;
  657. else
  658. return -EINVAL;
  659. // determine band
  660. if (params->frequency < 49000000)
  661. return -EINVAL;
  662. else if (params->frequency < 159000000)
  663. band = 1;
  664. else if (params->frequency < 444000000)
  665. band = 2;
  666. else if (params->frequency < 861000000)
  667. band = 4;
  668. else
  669. return -EINVAL;
  670. // setup PLL filter and TDA9889
  671. switch (params->u.ofdm.bandwidth) {
  672. case BANDWIDTH_6_MHZ:
  673. tda1004x_writereg(fe, 0x0C, 0x14);
  674. filter = 0;
  675. break;
  676. case BANDWIDTH_7_MHZ:
  677. tda1004x_writereg(fe, 0x0C, 0x80);
  678. filter = 0;
  679. break;
  680. case BANDWIDTH_8_MHZ:
  681. tda1004x_writereg(fe, 0x0C, 0x14);
  682. filter = 1;
  683. break;
  684. default:
  685. return -EINVAL;
  686. }
  687. // calculate divisor
  688. // ((36130000+((1000000/6)/2)) + Finput)/(1000000/6)
  689. tuner_frequency = (((params->frequency / 1000) * 6) + 217280) / 1000;
  690. // setup tuner buffer
  691. tuner_buf[0] = tuner_frequency >> 8;
  692. tuner_buf[1] = tuner_frequency & 0xff;
  693. tuner_buf[2] = 0xca;
  694. tuner_buf[3] = (cp << 5) | (filter << 3) | band;
  695. if (fe->ops.i2c_gate_ctrl)
  696. fe->ops.i2c_gate_ctrl(fe, 1);
  697. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1)
  698. return -EIO;
  699. msleep(1);
  700. return 0;
  701. }
  702. static int philips_tdm1316l_request_firmware(struct dvb_frontend *fe,
  703. const struct firmware **fw, char *name)
  704. {
  705. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  706. return request_firmware(fw, name, &budget_ci->budget.dev->pci->dev);
  707. }
  708. static struct tda1004x_config philips_tdm1316l_config = {
  709. .demod_address = 0x8,
  710. .invert = 0,
  711. .invert_oclk = 0,
  712. .xtal_freq = TDA10046_XTAL_4M,
  713. .agc_config = TDA10046_AGC_DEFAULT,
  714. .if_freq = TDA10046_FREQ_3617,
  715. .request_firmware = philips_tdm1316l_request_firmware,
  716. };
  717. static int dvbc_philips_tdm1316l_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  718. {
  719. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  720. u8 tuner_buf[5];
  721. struct i2c_msg tuner_msg = {.addr = budget_ci->tuner_pll_address,
  722. .flags = 0,
  723. .buf = tuner_buf,
  724. .len = sizeof(tuner_buf) };
  725. int tuner_frequency = 0;
  726. u8 band, cp, filter;
  727. // determine charge pump
  728. tuner_frequency = params->frequency + 36125000;
  729. if (tuner_frequency < 87000000)
  730. return -EINVAL;
  731. else if (tuner_frequency < 130000000) {
  732. cp = 3;
  733. band = 1;
  734. } else if (tuner_frequency < 160000000) {
  735. cp = 5;
  736. band = 1;
  737. } else if (tuner_frequency < 200000000) {
  738. cp = 6;
  739. band = 1;
  740. } else if (tuner_frequency < 290000000) {
  741. cp = 3;
  742. band = 2;
  743. } else if (tuner_frequency < 420000000) {
  744. cp = 5;
  745. band = 2;
  746. } else if (tuner_frequency < 480000000) {
  747. cp = 6;
  748. band = 2;
  749. } else if (tuner_frequency < 620000000) {
  750. cp = 3;
  751. band = 4;
  752. } else if (tuner_frequency < 830000000) {
  753. cp = 5;
  754. band = 4;
  755. } else if (tuner_frequency < 895000000) {
  756. cp = 7;
  757. band = 4;
  758. } else
  759. return -EINVAL;
  760. // assume PLL filter should always be 8MHz for the moment.
  761. filter = 1;
  762. // calculate divisor
  763. tuner_frequency = (params->frequency + 36125000 + (62500/2)) / 62500;
  764. // setup tuner buffer
  765. tuner_buf[0] = tuner_frequency >> 8;
  766. tuner_buf[1] = tuner_frequency & 0xff;
  767. tuner_buf[2] = 0xc8;
  768. tuner_buf[3] = (cp << 5) | (filter << 3) | band;
  769. tuner_buf[4] = 0x80;
  770. if (fe->ops.i2c_gate_ctrl)
  771. fe->ops.i2c_gate_ctrl(fe, 1);
  772. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1)
  773. return -EIO;
  774. msleep(50);
  775. if (fe->ops.i2c_gate_ctrl)
  776. fe->ops.i2c_gate_ctrl(fe, 1);
  777. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1)
  778. return -EIO;
  779. msleep(1);
  780. return 0;
  781. }
  782. static u8 dvbc_philips_tdm1316l_inittab[] = {
  783. 0x80, 0x01,
  784. 0x80, 0x00,
  785. 0x81, 0x01,
  786. 0x81, 0x00,
  787. 0x00, 0x09,
  788. 0x01, 0x69,
  789. 0x03, 0x00,
  790. 0x04, 0x00,
  791. 0x07, 0x00,
  792. 0x08, 0x00,
  793. 0x20, 0x00,
  794. 0x21, 0x40,
  795. 0x22, 0x00,
  796. 0x23, 0x00,
  797. 0x24, 0x40,
  798. 0x25, 0x88,
  799. 0x30, 0xff,
  800. 0x31, 0x00,
  801. 0x32, 0xff,
  802. 0x33, 0x00,
  803. 0x34, 0x50,
  804. 0x35, 0x7f,
  805. 0x36, 0x00,
  806. 0x37, 0x20,
  807. 0x38, 0x00,
  808. 0x40, 0x1c,
  809. 0x41, 0xff,
  810. 0x42, 0x29,
  811. 0x43, 0x20,
  812. 0x44, 0xff,
  813. 0x45, 0x00,
  814. 0x46, 0x00,
  815. 0x49, 0x04,
  816. 0x4a, 0x00,
  817. 0x4b, 0x7b,
  818. 0x52, 0x30,
  819. 0x55, 0xae,
  820. 0x56, 0x47,
  821. 0x57, 0xe1,
  822. 0x58, 0x3a,
  823. 0x5a, 0x1e,
  824. 0x5b, 0x34,
  825. 0x60, 0x00,
  826. 0x63, 0x00,
  827. 0x64, 0x00,
  828. 0x65, 0x00,
  829. 0x66, 0x00,
  830. 0x67, 0x00,
  831. 0x68, 0x00,
  832. 0x69, 0x00,
  833. 0x6a, 0x02,
  834. 0x6b, 0x00,
  835. 0x70, 0xff,
  836. 0x71, 0x00,
  837. 0x72, 0x00,
  838. 0x73, 0x00,
  839. 0x74, 0x0c,
  840. 0x80, 0x00,
  841. 0x81, 0x00,
  842. 0x82, 0x00,
  843. 0x83, 0x00,
  844. 0x84, 0x04,
  845. 0x85, 0x80,
  846. 0x86, 0x24,
  847. 0x87, 0x78,
  848. 0x88, 0x10,
  849. 0x89, 0x00,
  850. 0x90, 0x01,
  851. 0x91, 0x01,
  852. 0xa0, 0x04,
  853. 0xa1, 0x00,
  854. 0xa2, 0x00,
  855. 0xb0, 0x91,
  856. 0xb1, 0x0b,
  857. 0xc0, 0x53,
  858. 0xc1, 0x70,
  859. 0xc2, 0x12,
  860. 0xd0, 0x00,
  861. 0xd1, 0x00,
  862. 0xd2, 0x00,
  863. 0xd3, 0x00,
  864. 0xd4, 0x00,
  865. 0xd5, 0x00,
  866. 0xde, 0x00,
  867. 0xdf, 0x00,
  868. 0x61, 0x38,
  869. 0x62, 0x0a,
  870. 0x53, 0x13,
  871. 0x59, 0x08,
  872. 0xff, 0xff,
  873. };
  874. static struct stv0297_config dvbc_philips_tdm1316l_config = {
  875. .demod_address = 0x1c,
  876. .inittab = dvbc_philips_tdm1316l_inittab,
  877. .invert = 0,
  878. .stop_during_read = 1,
  879. };
  880. static void frontend_init(struct budget_ci *budget_ci)
  881. {
  882. switch (budget_ci->budget.dev->pci->subsystem_device) {
  883. case 0x100c: // Hauppauge/TT Nova-CI budget (stv0299/ALPS BSRU6(tsa5059))
  884. budget_ci->budget.dvb_frontend =
  885. dvb_attach(stv0299_attach, &alps_bsru6_config, &budget_ci->budget.i2c_adap);
  886. if (budget_ci->budget.dvb_frontend) {
  887. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = alps_bsru6_tuner_set_params;
  888. budget_ci->budget.dvb_frontend->tuner_priv = &budget_ci->budget.i2c_adap;
  889. break;
  890. }
  891. break;
  892. case 0x100f: // Hauppauge/TT Nova-CI budget (stv0299b/Philips su1278(tsa5059))
  893. budget_ci->budget.dvb_frontend =
  894. dvb_attach(stv0299_attach, &philips_su1278_tt_config, &budget_ci->budget.i2c_adap);
  895. if (budget_ci->budget.dvb_frontend) {
  896. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = philips_su1278_tt_tuner_set_params;
  897. break;
  898. }
  899. break;
  900. case 0x1010: // TT DVB-C CI budget (stv0297/Philips tdm1316l(tda6651tt))
  901. budget_ci->tuner_pll_address = 0x61;
  902. budget_ci->budget.dvb_frontend =
  903. dvb_attach(stv0297_attach, &dvbc_philips_tdm1316l_config, &budget_ci->budget.i2c_adap);
  904. if (budget_ci->budget.dvb_frontend) {
  905. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = dvbc_philips_tdm1316l_tuner_set_params;
  906. break;
  907. }
  908. break;
  909. case 0x1011: // Hauppauge/TT Nova-T budget (tda10045/Philips tdm1316l(tda6651tt) + TDA9889)
  910. budget_ci->tuner_pll_address = 0x63;
  911. budget_ci->budget.dvb_frontend =
  912. dvb_attach(tda10045_attach, &philips_tdm1316l_config, &budget_ci->budget.i2c_adap);
  913. if (budget_ci->budget.dvb_frontend) {
  914. budget_ci->budget.dvb_frontend->ops.tuner_ops.init = philips_tdm1316l_tuner_init;
  915. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = philips_tdm1316l_tuner_set_params;
  916. break;
  917. }
  918. break;
  919. case 0x1012: // TT DVB-T CI budget (tda10046/Philips tdm1316l(tda6651tt))
  920. budget_ci->tuner_pll_address = 0x60;
  921. philips_tdm1316l_config.invert = 1;
  922. budget_ci->budget.dvb_frontend =
  923. dvb_attach(tda10046_attach, &philips_tdm1316l_config, &budget_ci->budget.i2c_adap);
  924. if (budget_ci->budget.dvb_frontend) {
  925. budget_ci->budget.dvb_frontend->ops.tuner_ops.init = philips_tdm1316l_tuner_init;
  926. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = philips_tdm1316l_tuner_set_params;
  927. break;
  928. }
  929. break;
  930. case 0x1017: // TT S-1500 PCI
  931. budget_ci->budget.dvb_frontend = dvb_attach(stv0299_attach, &alps_bsbe1_config, &budget_ci->budget.i2c_adap);
  932. if (budget_ci->budget.dvb_frontend) {
  933. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = alps_bsbe1_tuner_set_params;
  934. budget_ci->budget.dvb_frontend->tuner_priv = &budget_ci->budget.i2c_adap;
  935. budget_ci->budget.dvb_frontend->ops.dishnetwork_send_legacy_command = NULL;
  936. if (dvb_attach(lnbp21_attach, budget_ci->budget.dvb_frontend, &budget_ci->budget.i2c_adap, LNBP21_LLC, 0) == NULL) {
  937. printk("%s: No LNBP21 found!\n", __FUNCTION__);
  938. dvb_frontend_detach(budget_ci->budget.dvb_frontend);
  939. budget_ci->budget.dvb_frontend = NULL;
  940. }
  941. }
  942. break;
  943. }
  944. if (budget_ci->budget.dvb_frontend == NULL) {
  945. printk("budget-ci: A frontend driver was not found for device %04x/%04x subsystem %04x/%04x\n",
  946. budget_ci->budget.dev->pci->vendor,
  947. budget_ci->budget.dev->pci->device,
  948. budget_ci->budget.dev->pci->subsystem_vendor,
  949. budget_ci->budget.dev->pci->subsystem_device);
  950. } else {
  951. if (dvb_register_frontend
  952. (&budget_ci->budget.dvb_adapter, budget_ci->budget.dvb_frontend)) {
  953. printk("budget-ci: Frontend registration failed!\n");
  954. dvb_frontend_detach(budget_ci->budget.dvb_frontend);
  955. budget_ci->budget.dvb_frontend = NULL;
  956. }
  957. }
  958. }
  959. static int budget_ci_attach(struct saa7146_dev *dev, struct saa7146_pci_extension_data *info)
  960. {
  961. struct budget_ci *budget_ci;
  962. int err;
  963. if (!(budget_ci = kmalloc(sizeof(struct budget_ci), GFP_KERNEL)))
  964. return -ENOMEM;
  965. dprintk(2, "budget_ci: %p\n", budget_ci);
  966. budget_ci->budget.ci_present = 0;
  967. dev->ext_priv = budget_ci;
  968. if ((err = ttpci_budget_init(&budget_ci->budget, dev, info, THIS_MODULE))) {
  969. kfree(budget_ci);
  970. return err;
  971. }
  972. tasklet_init(&budget_ci->ir.msp430_irq_tasklet, msp430_ir_interrupt,
  973. (unsigned long) budget_ci);
  974. msp430_ir_init(budget_ci);
  975. ciintf_init(budget_ci);
  976. budget_ci->budget.dvb_adapter.priv = budget_ci;
  977. frontend_init(budget_ci);
  978. ttpci_budget_init_hooks(&budget_ci->budget);
  979. return 0;
  980. }
  981. static int budget_ci_detach(struct saa7146_dev *dev)
  982. {
  983. struct budget_ci *budget_ci = (struct budget_ci *) dev->ext_priv;
  984. struct saa7146_dev *saa = budget_ci->budget.dev;
  985. int err;
  986. if (budget_ci->budget.ci_present)
  987. ciintf_deinit(budget_ci);
  988. if (budget_ci->budget.dvb_frontend) {
  989. dvb_unregister_frontend(budget_ci->budget.dvb_frontend);
  990. dvb_frontend_detach(budget_ci->budget.dvb_frontend);
  991. }
  992. err = ttpci_budget_deinit(&budget_ci->budget);
  993. tasklet_kill(&budget_ci->ir.msp430_irq_tasklet);
  994. msp430_ir_deinit(budget_ci);
  995. // disable frontend and CI interface
  996. saa7146_setgpio(saa, 2, SAA7146_GPIO_INPUT);
  997. kfree(budget_ci);
  998. return err;
  999. }
  1000. static struct saa7146_extension budget_extension;
  1001. MAKE_BUDGET_INFO(ttbs2, "TT-Budget/S-1500 PCI", BUDGET_TT);
  1002. MAKE_BUDGET_INFO(ttbci, "TT-Budget/WinTV-NOVA-CI PCI", BUDGET_TT_HW_DISEQC);
  1003. MAKE_BUDGET_INFO(ttbt2, "TT-Budget/WinTV-NOVA-T PCI", BUDGET_TT);
  1004. MAKE_BUDGET_INFO(ttbtci, "TT-Budget-T-CI PCI", BUDGET_TT);
  1005. MAKE_BUDGET_INFO(ttbcci, "TT-Budget-C-CI PCI", BUDGET_TT);
  1006. static struct pci_device_id pci_tbl[] = {
  1007. MAKE_EXTENSION_PCI(ttbci, 0x13c2, 0x100c),
  1008. MAKE_EXTENSION_PCI(ttbci, 0x13c2, 0x100f),
  1009. MAKE_EXTENSION_PCI(ttbcci, 0x13c2, 0x1010),
  1010. MAKE_EXTENSION_PCI(ttbt2, 0x13c2, 0x1011),
  1011. MAKE_EXTENSION_PCI(ttbtci, 0x13c2, 0x1012),
  1012. MAKE_EXTENSION_PCI(ttbs2, 0x13c2, 0x1017),
  1013. {
  1014. .vendor = 0,
  1015. }
  1016. };
  1017. MODULE_DEVICE_TABLE(pci, pci_tbl);
  1018. static struct saa7146_extension budget_extension = {
  1019. .name = "budget_ci dvb",
  1020. .flags = SAA7146_I2C_SHORT_DELAY,
  1021. .module = THIS_MODULE,
  1022. .pci_tbl = &pci_tbl[0],
  1023. .attach = budget_ci_attach,
  1024. .detach = budget_ci_detach,
  1025. .irq_mask = MASK_03 | MASK_06 | MASK_10,
  1026. .irq_func = budget_ci_irq,
  1027. };
  1028. static int __init budget_ci_init(void)
  1029. {
  1030. return saa7146_register_extension(&budget_extension);
  1031. }
  1032. static void __exit budget_ci_exit(void)
  1033. {
  1034. saa7146_unregister_extension(&budget_extension);
  1035. }
  1036. module_init(budget_ci_init);
  1037. module_exit(budget_ci_exit);
  1038. MODULE_LICENSE("GPL");
  1039. MODULE_AUTHOR("Michael Hunold, Jack Thomasson, Andrew de Quincey, others");
  1040. MODULE_DESCRIPTION("driver for the SAA7146 based so-called "
  1041. "budget PCI DVB cards w/ CI-module produced by "
  1042. "Siemens, Technotrend, Hauppauge");