Kconfig 9.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431
  1. #
  2. # Processor families
  3. #
  4. config CPU_SH2
  5. bool
  6. config CPU_SH2A
  7. bool
  8. select CPU_SH2
  9. config CPU_SH3
  10. bool
  11. select CPU_HAS_INTEVT
  12. select CPU_HAS_SR_RB
  13. config CPU_SH4
  14. bool
  15. select CPU_HAS_INTEVT
  16. select CPU_HAS_SR_RB
  17. select CPU_HAS_PTEA if (!CPU_SUBTYPE_ST40 && !CPU_SH4A) || CPU_SHX2
  18. config CPU_SH4A
  19. bool
  20. select CPU_SH4
  21. config CPU_SH4AL_DSP
  22. bool
  23. select CPU_SH4A
  24. select CPU_HAS_DSP
  25. config CPU_SUBTYPE_ST40
  26. bool
  27. select CPU_SH4
  28. config CPU_SHX2
  29. bool
  30. config CPU_SHX3
  31. bool
  32. choice
  33. prompt "Processor sub-type selection"
  34. #
  35. # Processor subtypes
  36. #
  37. # SH-2 Processor Support
  38. config CPU_SUBTYPE_SH7619
  39. bool "Support SH7619 processor"
  40. select CPU_SH2
  41. # SH-2A Processor Support
  42. config CPU_SUBTYPE_SH7206
  43. bool "Support SH7206 processor"
  44. select CPU_SH2A
  45. # SH-3 Processor Support
  46. config CPU_SUBTYPE_SH7705
  47. bool "Support SH7705 processor"
  48. select CPU_SH3
  49. config CPU_SUBTYPE_SH7706
  50. bool "Support SH7706 processor"
  51. select CPU_SH3
  52. help
  53. Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU.
  54. config CPU_SUBTYPE_SH7707
  55. bool "Support SH7707 processor"
  56. select CPU_SH3
  57. help
  58. Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU.
  59. config CPU_SUBTYPE_SH7708
  60. bool "Support SH7708 processor"
  61. select CPU_SH3
  62. help
  63. Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or
  64. if you have a 100 Mhz SH-3 HD6417708R CPU.
  65. config CPU_SUBTYPE_SH7709
  66. bool "Support SH7709 processor"
  67. select CPU_SH3
  68. help
  69. Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU.
  70. config CPU_SUBTYPE_SH7710
  71. bool "Support SH7710 processor"
  72. select CPU_SH3
  73. select CPU_HAS_DSP
  74. help
  75. Select SH7710 if you have a SH3-DSP SH7710 CPU.
  76. config CPU_SUBTYPE_SH7712
  77. bool "Support SH7712 processor"
  78. select CPU_SH3
  79. select CPU_HAS_DSP
  80. help
  81. Select SH7712 if you have a SH3-DSP SH7712 CPU.
  82. config CPU_SUBTYPE_SH7720
  83. bool "Support SH7720 processor"
  84. select CPU_SH3
  85. select CPU_HAS_DSP
  86. help
  87. Select SH7720 if you have a SH3-DSP SH7720 CPU.
  88. # SH-4 Processor Support
  89. config CPU_SUBTYPE_SH7750
  90. bool "Support SH7750 processor"
  91. select CPU_SH4
  92. help
  93. Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU.
  94. config CPU_SUBTYPE_SH7091
  95. bool "Support SH7091 processor"
  96. select CPU_SH4
  97. help
  98. Select SH7091 if you have an SH-4 based Sega device (such as
  99. the Dreamcast, Naomi, and Naomi 2).
  100. config CPU_SUBTYPE_SH7750R
  101. bool "Support SH7750R processor"
  102. select CPU_SH4
  103. config CPU_SUBTYPE_SH7750S
  104. bool "Support SH7750S processor"
  105. select CPU_SH4
  106. config CPU_SUBTYPE_SH7751
  107. bool "Support SH7751 processor"
  108. select CPU_SH4
  109. help
  110. Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU,
  111. or if you have a HD6417751R CPU.
  112. config CPU_SUBTYPE_SH7751R
  113. bool "Support SH7751R processor"
  114. select CPU_SH4
  115. config CPU_SUBTYPE_SH7760
  116. bool "Support SH7760 processor"
  117. select CPU_SH4
  118. config CPU_SUBTYPE_SH4_202
  119. bool "Support SH4-202 processor"
  120. select CPU_SH4
  121. # ST40 Processor Support
  122. config CPU_SUBTYPE_ST40STB1
  123. bool "Support ST40STB1/ST40RA processors"
  124. select CPU_SUBTYPE_ST40
  125. help
  126. Select ST40STB1 if you have a ST40RA CPU.
  127. This was previously called the ST40STB1, hence the option name.
  128. config CPU_SUBTYPE_ST40GX1
  129. bool "Support ST40GX1 processor"
  130. select CPU_SUBTYPE_ST40
  131. help
  132. Select ST40GX1 if you have a ST40GX1 CPU.
  133. # SH-4A Processor Support
  134. config CPU_SUBTYPE_SH7770
  135. bool "Support SH7770 processor"
  136. select CPU_SH4A
  137. config CPU_SUBTYPE_SH7780
  138. bool "Support SH7780 processor"
  139. select CPU_SH4A
  140. config CPU_SUBTYPE_SH7785
  141. bool "Support SH7785 processor"
  142. select CPU_SH4A
  143. select CPU_SHX2
  144. config CPU_SUBTYPE_SHX3
  145. bool "Support SH-X3 processor"
  146. select CPU_SH4A
  147. select CPU_SHX3
  148. select ARCH_SPARSEMEM_ENABLE
  149. select SYS_SUPPORTS_NUMA
  150. # SH4AL-DSP Processor Support
  151. config CPU_SUBTYPE_SH7343
  152. bool "Support SH7343 processor"
  153. select CPU_SH4AL_DSP
  154. config CPU_SUBTYPE_SH7722
  155. bool "Support SH7722 processor"
  156. select CPU_SH4AL_DSP
  157. select CPU_SHX2
  158. select ARCH_SPARSEMEM_ENABLE
  159. select SYS_SUPPORTS_NUMA
  160. endchoice
  161. menu "Memory management options"
  162. config QUICKLIST
  163. def_bool y
  164. config MMU
  165. bool "Support for memory management hardware"
  166. depends on !CPU_SH2
  167. default y
  168. help
  169. Some SH processors (such as SH-2/SH-2A) lack an MMU. In order to
  170. boot on these systems, this option must not be set.
  171. On other systems (such as the SH-3 and 4) where an MMU exists,
  172. turning this off will boot the kernel on these machines with the
  173. MMU implicitly switched off.
  174. config PAGE_OFFSET
  175. hex
  176. default "0x80000000" if MMU
  177. default "0x00000000"
  178. config MEMORY_START
  179. hex "Physical memory start address"
  180. default "0x08000000"
  181. ---help---
  182. Computers built with Hitachi SuperH processors always
  183. map the ROM starting at address zero. But the processor
  184. does not specify the range that RAM takes.
  185. The physical memory (RAM) start address will be automatically
  186. set to 08000000. Other platforms, such as the Solution Engine
  187. boards typically map RAM at 0C000000.
  188. Tweak this only when porting to a new machine which does not
  189. already have a defconfig. Changing it from the known correct
  190. value on any of the known systems will only lead to disaster.
  191. config MEMORY_SIZE
  192. hex "Physical memory size"
  193. default "0x00400000"
  194. help
  195. This sets the default memory size assumed by your SH kernel. It can
  196. be overridden as normal by the 'mem=' argument on the kernel command
  197. line. If unsure, consult your board specifications or just leave it
  198. as 0x00400000 which was the default value before this became
  199. configurable.
  200. config 32BIT
  201. bool "Support 32-bit physical addressing through PMB"
  202. depends on MMU && (CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785)
  203. default y
  204. help
  205. If you say Y here, physical addressing will be extended to
  206. 32-bits through the SH-4A PMB. If this is not set, legacy
  207. 29-bit physical addressing will be used.
  208. config X2TLB
  209. bool "Enable extended TLB mode"
  210. depends on CPU_SHX2 && MMU && EXPERIMENTAL
  211. help
  212. Selecting this option will enable the extended mode of the SH-X2
  213. TLB. For legacy SH-X behaviour and interoperability, say N. For
  214. all of the fun new features and a willingless to submit bug reports,
  215. say Y.
  216. config VSYSCALL
  217. bool "Support vsyscall page"
  218. depends on MMU
  219. default y
  220. help
  221. This will enable support for the kernel mapping a vDSO page
  222. in process space, and subsequently handing down the entry point
  223. to the libc through the ELF auxiliary vector.
  224. From the kernel side this is used for the signal trampoline.
  225. For systems with an MMU that can afford to give up a page,
  226. (the default value) say Y.
  227. config NUMA
  228. bool "Non Uniform Memory Access (NUMA) Support"
  229. depends on MMU && SYS_SUPPORTS_NUMA && EXPERIMENTAL
  230. default n
  231. help
  232. Some SH systems have many various memories scattered around
  233. the address space, each with varying latencies. This enables
  234. support for these blocks by binding them to nodes and allowing
  235. memory policies to be used for prioritizing and controlling
  236. allocation behaviour.
  237. config NODES_SHIFT
  238. int
  239. default "3" if CPU_SUBTYPE_SHX3
  240. default "1"
  241. depends on NEED_MULTIPLE_NODES
  242. config ARCH_FLATMEM_ENABLE
  243. def_bool y
  244. depends on !NUMA
  245. config ARCH_SPARSEMEM_ENABLE
  246. def_bool y
  247. select SPARSEMEM_STATIC
  248. config ARCH_SPARSEMEM_DEFAULT
  249. def_bool y
  250. config MAX_ACTIVE_REGIONS
  251. int
  252. default "6" if (CPU_SUBTYPE_SHX3 && SPARSEMEM)
  253. default "2" if (CPU_SUBTYPE_SH7722 && SPARSEMEM)
  254. default "1"
  255. config ARCH_POPULATES_NODE_MAP
  256. def_bool y
  257. config ARCH_SELECT_MEMORY_MODEL
  258. def_bool y
  259. config ARCH_ENABLE_MEMORY_HOTPLUG
  260. def_bool y
  261. depends on SPARSEMEM
  262. config ARCH_MEMORY_PROBE
  263. def_bool y
  264. depends on MEMORY_HOTPLUG
  265. choice
  266. prompt "Kernel page size"
  267. default PAGE_SIZE_4KB
  268. config PAGE_SIZE_4KB
  269. bool "4kB"
  270. help
  271. This is the default page size used by all SuperH CPUs.
  272. config PAGE_SIZE_8KB
  273. bool "8kB"
  274. depends on EXPERIMENTAL && X2TLB
  275. help
  276. This enables 8kB pages as supported by SH-X2 and later MMUs.
  277. config PAGE_SIZE_64KB
  278. bool "64kB"
  279. depends on EXPERIMENTAL && CPU_SH4
  280. help
  281. This enables support for 64kB pages, possible on all SH-4
  282. CPUs and later. Highly experimental, not recommended.
  283. endchoice
  284. choice
  285. prompt "HugeTLB page size"
  286. depends on HUGETLB_PAGE && CPU_SH4 && MMU
  287. default HUGETLB_PAGE_SIZE_64K
  288. config HUGETLB_PAGE_SIZE_64K
  289. bool "64kB"
  290. config HUGETLB_PAGE_SIZE_256K
  291. bool "256kB"
  292. depends on X2TLB
  293. config HUGETLB_PAGE_SIZE_1MB
  294. bool "1MB"
  295. config HUGETLB_PAGE_SIZE_4MB
  296. bool "4MB"
  297. depends on X2TLB
  298. config HUGETLB_PAGE_SIZE_64MB
  299. bool "64MB"
  300. depends on X2TLB
  301. endchoice
  302. source "mm/Kconfig"
  303. endmenu
  304. menu "Cache configuration"
  305. config SH7705_CACHE_32KB
  306. bool "Enable 32KB cache size for SH7705"
  307. depends on CPU_SUBTYPE_SH7705
  308. default y
  309. config SH_DIRECT_MAPPED
  310. bool "Use direct-mapped caching"
  311. default n
  312. help
  313. Selecting this option will configure the caches to be direct-mapped,
  314. even if the cache supports a 2 or 4-way mode. This is useful primarily
  315. for debugging on platforms with 2 and 4-way caches (SH7750R/SH7751R,
  316. SH4-202, SH4-501, etc.)
  317. Turn this option off for platforms that do not have a direct-mapped
  318. cache, and you have no need to run the caches in such a configuration.
  319. choice
  320. prompt "Cache mode"
  321. default CACHE_WRITEBACK if CPU_SH2A || CPU_SH3 || CPU_SH4
  322. default CACHE_WRITETHROUGH if (CPU_SH2 && !CPU_SH2A)
  323. config CACHE_WRITEBACK
  324. bool "Write-back"
  325. depends on CPU_SH2A || CPU_SH3 || CPU_SH4
  326. config CACHE_WRITETHROUGH
  327. bool "Write-through"
  328. help
  329. Selecting this option will configure the caches in write-through
  330. mode, as opposed to the default write-back configuration.
  331. Since there's sill some aliasing issues on SH-4, this option will
  332. unfortunately still require the majority of flushing functions to
  333. be implemented to deal with aliasing.
  334. If unsure, say N.
  335. config CACHE_OFF
  336. bool "Off"
  337. endchoice
  338. endmenu