tegra20.dtsi 4.0 KB

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  1. /include/ "skeleton.dtsi"
  2. / {
  3. compatible = "nvidia,tegra20";
  4. interrupt-parent = <&intc>;
  5. intc: interrupt-controller@50041000 {
  6. compatible = "arm,cortex-a9-gic";
  7. interrupt-controller;
  8. #interrupt-cells = <3>;
  9. reg = < 0x50041000 0x1000 >,
  10. < 0x50040100 0x0100 >;
  11. };
  12. apbdma: dma@6000a000 {
  13. compatible = "nvidia,tegra20-apbdma";
  14. reg = <0x6000a000 0x1200>;
  15. interrupts = < 0 104 0x04
  16. 0 105 0x04
  17. 0 106 0x04
  18. 0 107 0x04
  19. 0 108 0x04
  20. 0 109 0x04
  21. 0 110 0x04
  22. 0 111 0x04
  23. 0 112 0x04
  24. 0 113 0x04
  25. 0 114 0x04
  26. 0 115 0x04
  27. 0 116 0x04
  28. 0 117 0x04
  29. 0 118 0x04
  30. 0 119 0x04 >;
  31. };
  32. i2c@7000c000 {
  33. #address-cells = <1>;
  34. #size-cells = <0>;
  35. compatible = "nvidia,tegra20-i2c";
  36. reg = <0x7000C000 0x100>;
  37. interrupts = < 0 38 0x04 >;
  38. };
  39. i2c@7000c400 {
  40. #address-cells = <1>;
  41. #size-cells = <0>;
  42. compatible = "nvidia,tegra20-i2c";
  43. reg = <0x7000C400 0x100>;
  44. interrupts = < 0 84 0x04 >;
  45. };
  46. i2c@7000c500 {
  47. #address-cells = <1>;
  48. #size-cells = <0>;
  49. compatible = "nvidia,tegra20-i2c";
  50. reg = <0x7000C500 0x100>;
  51. interrupts = < 0 92 0x04 >;
  52. };
  53. i2c@7000d000 {
  54. #address-cells = <1>;
  55. #size-cells = <0>;
  56. compatible = "nvidia,tegra20-i2c-dvc";
  57. reg = <0x7000D000 0x200>;
  58. interrupts = < 0 53 0x04 >;
  59. };
  60. i2s@70002800 {
  61. compatible = "nvidia,tegra20-i2s";
  62. reg = <0x70002800 0x200>;
  63. interrupts = < 0 13 0x04 >;
  64. nvidia,dma-request-selector = < &apbdma 2 >;
  65. };
  66. i2s@70002a00 {
  67. compatible = "nvidia,tegra20-i2s";
  68. reg = <0x70002a00 0x200>;
  69. interrupts = < 0 3 0x04 >;
  70. nvidia,dma-request-selector = < &apbdma 1 >;
  71. };
  72. das@70000c00 {
  73. compatible = "nvidia,tegra20-das";
  74. reg = <0x70000c00 0x80>;
  75. };
  76. gpio: gpio@6000d000 {
  77. compatible = "nvidia,tegra20-gpio";
  78. reg = < 0x6000d000 0x1000 >;
  79. interrupts = < 0 32 0x04
  80. 0 33 0x04
  81. 0 34 0x04
  82. 0 35 0x04
  83. 0 55 0x04
  84. 0 87 0x04
  85. 0 89 0x04 >;
  86. #gpio-cells = <2>;
  87. gpio-controller;
  88. };
  89. pinmux: pinmux@70000000 {
  90. compatible = "nvidia,tegra20-pinmux";
  91. reg = < 0x70000014 0x10 /* Tri-state registers */
  92. 0x70000080 0x20 /* Mux registers */
  93. 0x700000a0 0x14 /* Pull-up/down registers */
  94. 0x70000868 0xa8 >; /* Pad control registers */
  95. };
  96. serial@70006000 {
  97. compatible = "nvidia,tegra20-uart";
  98. reg = <0x70006000 0x40>;
  99. reg-shift = <2>;
  100. interrupts = < 0 36 0x04 >;
  101. };
  102. serial@70006040 {
  103. compatible = "nvidia,tegra20-uart";
  104. reg = <0x70006040 0x40>;
  105. reg-shift = <2>;
  106. interrupts = < 0 37 0x04 >;
  107. };
  108. serial@70006200 {
  109. compatible = "nvidia,tegra20-uart";
  110. reg = <0x70006200 0x100>;
  111. reg-shift = <2>;
  112. interrupts = < 0 46 0x04 >;
  113. };
  114. serial@70006300 {
  115. compatible = "nvidia,tegra20-uart";
  116. reg = <0x70006300 0x100>;
  117. reg-shift = <2>;
  118. interrupts = < 0 90 0x04 >;
  119. };
  120. serial@70006400 {
  121. compatible = "nvidia,tegra20-uart";
  122. reg = <0x70006400 0x100>;
  123. reg-shift = <2>;
  124. interrupts = < 0 91 0x04 >;
  125. };
  126. emc@7000f400 {
  127. #address-cells = <1>;
  128. #size-cells = <0>;
  129. compatible = "nvidia,tegra20-emc";
  130. reg = <0x7000f400 0x200>;
  131. };
  132. sdhci@c8000000 {
  133. compatible = "nvidia,tegra20-sdhci";
  134. reg = <0xc8000000 0x200>;
  135. interrupts = < 0 14 0x04 >;
  136. };
  137. sdhci@c8000200 {
  138. compatible = "nvidia,tegra20-sdhci";
  139. reg = <0xc8000200 0x200>;
  140. interrupts = < 0 15 0x04 >;
  141. };
  142. sdhci@c8000400 {
  143. compatible = "nvidia,tegra20-sdhci";
  144. reg = <0xc8000400 0x200>;
  145. interrupts = < 0 19 0x04 >;
  146. };
  147. sdhci@c8000600 {
  148. compatible = "nvidia,tegra20-sdhci";
  149. reg = <0xc8000600 0x200>;
  150. interrupts = < 0 31 0x04 >;
  151. };
  152. usb@c5000000 {
  153. compatible = "nvidia,tegra20-ehci", "usb-ehci";
  154. reg = <0xc5000000 0x4000>;
  155. interrupts = < 0 20 0x04 >;
  156. phy_type = "utmi";
  157. };
  158. usb@c5004000 {
  159. compatible = "nvidia,tegra20-ehci", "usb-ehci";
  160. reg = <0xc5004000 0x4000>;
  161. interrupts = < 0 21 0x04 >;
  162. phy_type = "ulpi";
  163. };
  164. usb@c5008000 {
  165. compatible = "nvidia,tegra20-ehci", "usb-ehci";
  166. reg = <0xc5008000 0x4000>;
  167. interrupts = < 0 97 0x04 >;
  168. phy_type = "utmi";
  169. };
  170. };